Self-adaptive low dropout linear regulator with low power consumption and fast transient response

The adaptive low-dropout linear regulator optimizes transient response and power consumption by adjusting the STCB structure levels based on output voltage comparisons, addressing the limitations of existing LDOs.

CN119248048AActive Publication Date: 2025-01-03JIANGNAN UNIV
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Patent Information

Application Number
CN202411365826.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-29
Publication Date
2025-01-03
Estimated Expiration
2044-09-29

AI Technical Summary

Technical Problem

Existing low dropout regulators (LDOs) face challenges in achieving fast transient response while maintaining low power consumption, as increasing quiescent current or reducing power tube size has limited effectiveness and contradicts the trend of low power consumption.

Method used

An adaptive low-dropout linear regulator with a three-stage STCB structure circuit, a detection module, and a digital logic control module that adjusts the number of STCB structure levels based on output voltage comparisons to optimize transient response and power consumption.

Benefits of technology

The regulator achieves reduced power consumption while maintaining fast transient response by adaptively adjusting the STCB structure levels, improving load regulation rate and linear regulation rate.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a self-adaptive low dropout linear regulator with low power consumption and fast transient response, and belongs to the technical field of integrated circuit design. The voltage stabilizer is realized on the basis of a three-stage STCB structure circuit with a switch, the maximum value of overshoot or undershoot of output voltage VOUT when load current changes is compared with a preset voltage range through a detection circuit, and stage regulation of the STCB structure circuit is realized through a digital logic control module according to a detection result of the detection circuit. And the load regulation rate and the linear regulation rate of the LDO are further improved. In addition, according to the fast transient response LDO with the switch, the STCB series can be adjusted in a self-adaptive mode according to the detection result, and therefore the LDO can have lower power consumption under the condition that the transient response performance is good.
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Description

Technical Field

[0001] The invention relates to an adaptive low voltage difference linear regulator with low power consumption and fast transient response, belonging to the technical field of integrated circuit design. Background Art

[0002] A low dropout regulator (Low Dropout Regulator, LDO) is a device used to stabilize the input voltage at the required output voltage level. Its core function is to provide a stable reference voltage and achieve output voltage stability through an internal error amplifier, power transistor and feedback network. It can provide a stable, almost ripple-free output voltage and has the advantages of simple structure, low power consumption, low high-frequency noise, small size and easy integration. It plays a vital role in modern power management units and is widely used in electronic devices.

[0003] In order to save power in the circuit system, it is usually hoped that the circuit modules that are not working temporarily can be in shutdown or sleep mode. Once started, the power supply voltage can be stabilized in a very short time, which is usually in microseconds or nanoseconds. This requires that the power supply module can still have good voltage regulation capabilities when the jump occurs within the full load range. However, in the LDO loop, due to the limitations of bandwidth and slew rate, when the load current jumps transiently, the loop needs a certain adjustment time, which is manifested externally as a short-term overshoot and undershoot of the output voltage, or even a short-term oscillation phenomenon. Therefore, it is particularly important to improve the transient response.

[0004] Common technologies for enhancing LDO transient response include: 1) increasing the quiescent current of the LDO system, especially the driving current of the power tube gate, so that when the load current undergoes a transient jump, the power transistor can provide the required current more quickly, thereby reducing the fluctuation of the output voltage. 2) reducing the size of the power tube in the LDO structure and increasing the voltage swing of the power tube gate, so that the power tube can reach its on state in a shorter time and quickly provide the required output current. However, although the above method of increasing the quiescent current can effectively reduce the undershoot voltage and overshoot voltage, it will increase the power consumption of the system, which is not in line with the development trend of low power consumption of LDO chips. The method of appropriately reducing the size of the power tube and increasing the voltage swing of the power tube gate can improve the transient response performance of the LDO to a certain extent, but the degree of improvement is very limited.

[0005] In order to solve the above problems, Du Yan of Xi'an University of Technology proposed a fast transient response characteristic without external capacitor LDO in 2021. It uses an adaptive boost circuit with a simple structure and does not consume too much static current during operation, but its input voltage range is small, the layout area is large, and it does not show obvious advantages in power consumption. The Chinese patent with publication number CN105094199A proposes a low-power and low-noise low-voltage difference linear voltage regulator circuit, which can maintain a large gain while still having the characteristics of low power consumption and low noise, but it has no breakthrough in transient response. The Chinese patent with publication number CN208848104U proposes a fast transient response low-voltage difference linear regulator, and its load transient response enhancement circuit enhances the load transient response of the regulator. In the absence of external capacitors, the load transient response performance of the low-voltage difference linear regulator is improved, but it still cannot reflect its advantages in terms of power consumption. Summary of the invention

[0006] In order to reduce the power consumption of LDO while improving its transient response, the present invention provides an adaptive low-dropout linear regulator with low power consumption and fast transient response, which is improved on the basis of the existing solution of using STCB circuit to improve transient response, and achieves that its power consumption is greatly reduced while ensuring its transient response performance.

[0007] A low-power, fast-transient-response adaptive low-voltage-difference linear regulator comprises: an operational amplifier, a feedback network, a three-stage STCB structure circuit with a switch, a digital logic control module and a detection module, wherein the detection module is provided with a comparator for comparing the output voltage of the regulator with an internally set reference voltage; the digital logic control module is provided with a corresponding counter and a register for adjusting the number of stages of the three-stage STCB structure circuit according to the detection result of the detection module.

[0008] Optionally, the operational amplifier includes a two-stage operational circuit, and the three-stage STCB structure circuit with a switch is located between the two-stage operational circuit; the detection module is provided with two comparators to compare the maximum value Vmax of the overshoot and undershoot of the power tube output voltage with a preset voltage.

[0009] Optionally, the digital logic control module is composed of a counter and a register, and a digital trimming module is used to control switches to reduce or increase the number of levels of the STCB structure.

[0010] Optionally, the three-level STCB structure circuit with a switch includes a first-level STCB structure circuit, a second-level STCB structure circuit and a third-level STCB structure circuit; each level of the STCB structure circuit is divided into an upper part and a lower part, wherein the upper part of the first-level STCB structure circuit is composed of transistors M5-M9, and the lower part is composed of transistors M22-M26; the upper part of the second-level STCB structure circuit is composed of transistors M10-M14, and the lower part is composed of transistors M27-M31; the upper part of the third-level STCB structure circuit is composed of transistors M15-M19, and the lower part is composed of transistors M32-M36M38;

[0011] Transistors M55, M43, and M47 form a switch S1; transistors M41, M42, M44, M45, M46, M48, M51, and M54 form a switch S2; transistors M41, M42, M44, M46, M49, M50, M52, and M53 form a switch S3;

[0012] The transistor M55 in the switch S1 is connected between the gate of the transistor M9 at the top of the first-stage STCB circuit and the gate of the transistor M20 in the second-stage operation circuit, the transistor M43 is connected between the gate of the transistor M26 at the bottom of the first-stage STCB circuit and the gate of M37, and the transistor M47 in the switch S1 is connected between the source of the transistor M46 in the switch S2 and the gate of M37, to control the operation of the first-stage STCB circuit;

[0013] The transistor M41 in the switch S2 is connected between the gate of the transistor M9 at the top of the second-level STCB structure circuit and the gate of M10 in the switch S1, the transistor M42 is connected between the gate of the transistor M9 at the top of the second-level STCB structure circuit and the gate of the transistor M12 at the top of the second-level STCB structure circuit, the transistor M44 is connected between the gate of the transistor M26 at the bottom of the first-level STCB structure circuit and the gate of the transistor M27 at the bottom of the second-level STCB structure circuit, the transistor M46 is connected between the gate of the transistor M26 at the bottom of the first-level STCB structure circuit and the drain of M47 in the switch S1, and the switch S The transistor M45 in switch S2 is connected between the drain of M46 and the gate of the transistor M29 at the bottom of the second-level STCB structure circuit, the transistor M48 in switch S2 is connected between the gate of the transistor M16 at the top of the third-level STCB structure circuit and the gate of the transistor M20 in the output amplifier circuit, the transistor M51 in switch S2 is connected between the source of M49 and the gate of the transistor M20 in the output amplifier circuit, and the transistor M54 in switch S2 is connected between the gate of the transistor M31 at the bottom of the second-level STCB structure circuit and the gate of the transistor M21 in the output amplifier circuit to control the operation of the second-level STCB structure circuit;

[0014] The transistor M49 in the switch S3 is connected between the gate of the transistor M16 at the upper part of the third - stage STCB structure circuit and the drain of the transistor M51 in the switch S2. The transistor M50 in the switch S3 is connected between the drain of M49 and the gate of the transistor M35 at the lower part of the third - stage STCB structure circuit. The transistor M52 in the switch S3 is connected between the gate of the transistor M31 at the lower part of the second - stage STCB structure circuit and the gate of the transistor M34 at the lower part of the third - stage STCB structure circuit. The transistor M53 in the switch S3 is connected between the gate of the transistor M31 at the lower part of the second - stage STCB structure circuit and the gate of the transistor M32 at the lower part of the third - stage STCB structure circuit, controlling the operation of the third - stage STCB structure circuit.

[0015] Optionally, the gates of the transistors M55, M43, and M47 in the switch S1 are connected to the signal clk1, the gates of the transistors M41, M42, M44, M45, and M46 in the switch S2 are connected to the signal clk2, the gates of the transistors M48, M51, and M54 in the switch S3 are connected to the signal clk3, and M49, M50, M52, and M53 are connected to the signal clk4. The gate voltages of each transistor are controlled by the digital signals clk1, clk2, clk3, and clk4, thereby controlling the on - off states of each switch.

[0016] Optionally, the working process of the voltage regulator includes:

[0017] (1) Preparation stage: Each part of the circuit of the voltage regulator is reset, and the register configuration in the digital logic control module is in the default state;

[0018] (2) Startup stage: Each part of the circuit of the voltage regulator starts. When the load current changes, the output voltage Vout of the power transistor changes accordingly. The two comparators in the detection module compare the output voltage Vout with the preset voltages VH and VL, where the preset voltages VH and VL are the thresholds for overshoot and undershoot respectively:

[0019] If the maximum value Vmax of the overshoot / undershoot of the output voltage Vout is less than the preset voltage VH and greater than the preset voltage VL, that is, VL < Vmax < VH, then the output of the first comparator C1 = 0, and the output of the second comparator C2 = 0; the maximum value Vmax of the overshoot / undershoot of the output voltage Vout is within the normal range, and the circuit works normally;

[0020] If the maximum value of the undershoot of the output voltage Vout is less than the preset voltage VL, that is, Vmax < VL, the output of the first comparator C1 = 1, and the output of the second comparator C2 = 0; at this time, the first counter starts counting when it detects that the output of the first comparator C1 = 1;

[0021] If the maximum value of the overshoot of the output voltage Vout is greater than the preset voltage VH, ie, Vmax>VH, the second comparator outputs C2=1 and the first comparator outputs C1=0; at this time, the second counter detects that the second comparator outputs C2=1 and starts counting.

[0022] Optionally, the count values ​​N1 and N2 of the first counter and the second counter are determined by the difference between the counter operating frequency, the maximum value Vmax of the overshoot / undershoot of the output voltage Vout and the preset voltage, and the digital logic control module controls the switch according to the count values ​​of the two to reduce or increase the number of levels of the STCB structure:

[0023] like Then the control switch S1 is closed, the switches S2 and S3 are opened, the first-level STCB structure circuit is in working state, and the second-level and third-level STCB structure circuits are in non-working state;

[0024] like Then the control switches S1 and S2 are closed, the switch S3 is opened, the first and second level STCB structure circuits are in working state, and the third level STCB structure circuit is in non-working state;

[0025] like Then the control switches S2 and S3 are closed, the switch S1 is opened, and the first-stage, second-stage and third-stage STCB structure circuits are all in working state.

[0026] The beneficial effects of the present invention are:

[0027] First, the proposed detection circuit compares the maximum value of the overshoot or undershoot of the output voltage VOUT when the load current changes with the preset voltage range, and realizes adaptive level adjustment for the STCB structure circuit through the control circuit, thereby further improving the load regulation rate and linear regulation rate of the LDO. Second, the proposed fast transient response LDO with switch can adjust the STCB level according to the detection result, so that it can have lower power consumption when the transient response performance is good. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0029] Figure 1 This is a structural diagram of a low-dropout linear regulator with fast transient response of a switch and a control circuit thereof proposed by the present invention.

[0030] Figure 2It is the circuit diagram of the existing operational amplifier circuit and STCB structure.

[0031] Figure 3 This is a circuit diagram of the operational amplifier circuit and the STCB structure with switches proposed by the present invention.

[0032] Figure 4A A transient simulation performance diagram of a fast transient response low voltage drop linear regulator with a one-stage STCB structure having a switch proposed by the present invention;

[0033] Figure 4B A transient simulation performance diagram of a fast transient response low voltage drop linear regulator with a two-stage STCB structure having a switch proposed by the present invention;

[0034] Figure 4C A transient simulation performance diagram of a fast transient response low voltage drop linear regulator with a three-stage STCB structure having a switch proposed by the present invention;

[0035] Figure 4D This is a transient simulation performance diagram of the low-dropout linear regulator with fast transient response of the switch proposed by the present invention.

[0036] Figure 5 This is a power consumption diagram of the low dropout linear regulator with fast transient response of the switch proposed by the present invention. DETAILED DESCRIPTION

[0037] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0038] Embodiment 1:

[0039] This embodiment provides an adaptive low voltage dropout linear regulator with low power consumption and fast transient response. Figure 1 , including: an operational amplifier, a feedback loop, a three-level STCB structure circuit with a switch, a digital logic control module and a detection module; wherein the operational amplifier, the three-level STCB structure circuit with a switch and the power tube are connected in sequence, and the feedback loop connects the output end of the power tube and one of the input ends of the operational amplifier; the output end of the power tube is also connected to the detection module, so that the detection module compares the maximum value Vmax of the overshoot and undershoot of the output voltage with the preset voltage, and the output end of the detection module is connected to the digital logic control module, so that the digital logic control module adjusts the level of the three-level STCB structure circuit with a switch according to the output of the detection module.

[0040] like Figure 2 As shown, it is an existing operational amplifier circuit and STCB structure circuit, wherein the STCB structure circuit is a three-stage STCB structure circuit. Figure 3From the circuit diagram of the STCB structure with switches proposed in the present invention, it can be seen that the present application adds corresponding switches to each level of the STCB circuit on the basis of the existing STCB structure circuit structure, and designs a detection module and a digital logic control module based on the STCB structure circuit with switches. By detecting the comparison between the maximum value of the overshoot and undershoot of the output voltage and the preset voltage, the adaptive adjustment of the STCB circuit level is realized based on the switch, thereby reducing the circuit power consumption as much as possible while ensuring the transient response performance.

[0041] like Figure 1 As shown, the detection module is provided with two comparators, which are respectively used to compare the maximum value Vmax of the overshoot and undershoot of the output voltage with the preset voltage; the digital logic control module is provided with corresponding counters and registers, which are used to adjust the number of levels of the three-stage STCB structure circuit according to the detection results of the detection module.

[0042] like Figure 3 As shown, the operational amplifier includes two-stage operational circuits, and the three-stage STCB structure circuit with switches is located between the two-stage operational circuits. The first-stage operational circuit includes a bias circuit and an input amplifier circuit, and the second-stage operational circuit includes an output amplifier circuit; the bias circuit is composed of a current source and a transistor M39, and the current source is connected between the transistor M39 and the ground to ensure that the bias point of the operational amplifier is within a suitable range to ensure the linearity and stability of the circuit. The input amplifier circuit is composed of transistors M1-M4, and transistors M1 and M2 form a PMOS differential input pair. The differential input structure can better suppress common-mode interference; the drain of transistor M40 is connected to the source of transistors M1 and M2 to provide a constant bias current for the first-stage amplifier; the transistor M3 and M4 current mirrors are active loads; the output amplifier circuit is composed of transistors M20 and M21 to further improve the gain of the circuit.

[0043] See also Figure 2The STCB structure main circuit is connected between the differential input stage formed by transistors M1-M4 and the output stage composed of transistors M20 and M21, and includes a first-level STCB structure circuit, a second-level STCB structure circuit and a third-level STCB structure circuit. Each level of the STCB structure circuit is divided into an upper part and a lower part. The upper part of each level of the STCB structure circuit is cascaded as a cascade unit to form the upper part of the entire STCB structure circuit, and the lower part of each level of the STCB structure circuit is cascaded as a cascade unit to form the lower part of the entire STCB structure circuit. The upper part of the first-level STCB structure circuit is composed of transistors M5-M9, and the lower part is composed of transistors M22-M26; the upper part of the second-level STCB structure circuit is composed of transistors M10-M14, and the lower part is composed of transistors M27-M31; the upper part of the third-level STCB structure circuit is composed of transistors M15-M19, and the lower part is composed of transistors M32-M38; transistors M5-M9, transistors M10-M1 and transistors M15-M19 are cascaded to form the upper part of the STCB structure main circuit, and transistors M22-M26, transistors M27-M31 and transistors M32-M38 are cascaded to form the lower part of the STCB structure main circuit. The following is a detailed introduction to the connection relationship of each part of the transistors:

[0044] First-stage STCB structure circuit: In the input amplifier circuit of the first-stage operational circuit, the gate and drain of transistor M4 are connected, and its gate is connected to the gates of transistors M5 and M7 at the top of the first-stage STCB circuit to form two current mirrors. The size ratio of transistors M4, M5, and M7 is 1:1:k+1 (k>1). Similarly, the gate and drain of transistor M3 in the input amplifier circuit of the first-stage operational circuit are connected, and its gate is connected to the gates of transistors M22 and M24 at the bottom of the first-stage STCB circuit to form two current mirrors, and the size ratio of transistors M3, M22, and M24 is 1:1:k+1 (k>1); the gate and drain of transistor M6 at the top of the first-stage STCB circuit are connected, and its gate is connected to the gate of transistor M25 at the bottom of the first-stage STCB circuit to form a current mirror, and the size ratio of transistors M6 and M25 is 1:k; the gate and drain of transistor M23 at the bottom of the first-stage STCB circuit are connected, and its gate is connected to the gate of transistor M8 to form a current mirror, and the size ratio of transistors M23 and M8 is 1:k (k>1). At the same time, the drain of transistor M7 at the upper part of the first-level STCB circuit is connected to the drains of transistors M8 and M9, and the drain of transistor M24 at the lower part of the first-level STCB circuit is connected to the drains of transistors M25 and M26. Transistors M8, M9, M25, and M26 form a differential pair.

[0045] Second-level STCB structure circuit: The gate of transistor M9 at the top of the first-level STCB structure circuit is connected to the gates of transistors M10 and M12 at the top of the second-level STCB structure circuit to form two current mirrors, and the size ratio of transistors M9, M10, and M12 is 1:1:k+1 (k>1). Similarly, the gate of transistor M26 at the bottom of the first-level STCB structure circuit is connected to the gates of transistors M27 and M28 at the bottom of the second-level STCB structure circuit to form two current mirrors, and the size ratio of transistors M26, M27, and M29 is 1:1:k+1 (k>1). The gate and drain of transistor M11 at the top of the second-level STCB structure circuit are connected, and its gate is connected to the gate of transistor M30 at the bottom half to form a current mirror, and the size ratio of transistors M11 and M30 is 1:k; the gate and drain of transistor M28 at the bottom half are connected, and its gate is connected to the gate of transistor M13 at the top of the second-level STCB structure circuit to form a current mirror, and the size ratio of transistors M28 and M13 is 1:k (k>1). At the same time, the drain of transistor M12 at the upper part of the second-level STCB structure circuit is connected to the drains of transistors M13 and M14, and transistors M13 and M14 form a differential pair; the drain of transistor M29 at the lower part of the second-level STCB structure circuit is connected to the drains of transistors M30 and M31, and transistors M29 and M30 form a differential pair.

[0046] The third-level STCB structure circuit: The gate of the upper half of the transistor M14 in the upper part of the second-level STCB structure circuit is connected to the gates of the transistors M15 and M17 in the upper part of the third-level STCB structure circuit to form two current mirrors, and the size ratio of the transistors M14, M15, and M17 is 1:1:k+1 (k>1). Similarly, the gate of the transistor M31 in the lower part of the third-level STCB structure circuit is connected to the gates of the transistors M32 and M34 to form two current mirrors, and the size ratio of the transistors M31, M32, and M34 is 1:1:k+1 (k>1). The gate and drain of transistor M16 at the top of the second-level STCB structure circuit are connected, and its gate is connected to the gate of transistor M35 at the bottom of the third-level STCB structure circuit to form a current mirror, and the size ratio of transistors M16 and M35 is 1:k; the gate and drain of transistor M33 at the bottom of the third-level STCB structure circuit are connected, and its gate is connected to the gate of transistor M18 at the top of the second-level STCB structure circuit to form a current mirror, and the size ratio of transistors M33 and M18 is 1:k (k>1). At the same time, the drain of transistor M17 at the top of the second-level STCB structure circuit is connected to the drain of transistors M18 and M19, and transistors M18 and M19 form a differential pair; the drain of transistor M34 at the bottom of the third-level STCB structure circuit is connected to the drain of transistors M35 and M36, and transistors M35 and M36 form a differential pair. The gate and drain of the transistor M36 are connected, the gate of the transistor M37 is connected to the gate of the transistor M36, forming a current mirror; the transistor M38 is connected between the drain of the transistor M37 and the ground.

[0047] like Figure 3As shown, the low voltage difference linear regulator with switches proposed by the present invention adds switches to each STCB circuit, wherein transistors M55, M43, and M47 are used as switch S1; transistors M41, M42, M44, M45, M46, M48, M51, and M54 are used as switch S2; and transistors M41, M42, M44, M46, M49, M50, M52, and M53 are used as switch S3. The transistor M55 in switch S1 is connected between the gate of transistor M9 at the top of the first-stage STCB circuit and the gate of transistor M20 in the second-stage operation circuit, the transistor M43 is connected between the gate of transistor M26 at the bottom of the first-stage STCB circuit and the gate of M37, and the transistor M47 in switch S1 is connected between the source of transistor M46 in switch S2 and the gate of M37 to control the operation of the first-stage STCB circuit. The transistor M41 is connected between the gate of the transistor M9 at the upper part of the second-level STCB structure circuit and the gate of M10 in the switch S1, the transistor M42 is connected between the gate of the transistor M9 at the upper part of the second-level STCB structure circuit and the gate of the transistor M12 at the upper part of the second-level STCB structure circuit, the transistor M44 is connected between the gate of the transistor M26 at the lower part of the first-level STCB structure circuit and the gate of the transistor M27 at the lower part of the second-level STCB structure circuit, the transistor M46 is connected between the gate of the transistor M26 at the lower part of the first-level STCB structure circuit and the drain of M47 in the switch S1, and the transistor M47 in the switch S2 is connected between the gate of the transistor M26 at the lower part of the first-level STCB structure circuit and the drain of M47 in the switch S1. Transistor M45 is connected between the drain of M46 and the gate of transistor M29 at the bottom of the second-level STCB structure circuit, transistor M48 in switch S2 is connected between the gate of transistor M16 at the top of the third-level STCB structure circuit and the gate of transistor M20 in the output amplifier circuit, transistor M51 in switch S2 is connected between the source of M49 and the gate of transistor M20 in the output amplifier circuit, and transistor M54 in switch S2 is connected between the gate of transistor M31 at the bottom of the second-level STCB structure circuit and the gate of transistor M21 in the output amplifier circuit to control the operation of the second-level STCB structure circuit. The transistor M49 in switch S3 is connected between the gate of the transistor M16 at the top of the third-level STCB structure circuit and the drain of the transistor M51 in switch S2, the transistor M50 in switch S3 is connected between the drain of M49 and the gate of the transistor M35 at the bottom of the third-level STCB structure circuit, the transistor M52 in switch S3 is connected between the gate of the transistor M31 at the bottom of the second-level STCB structure circuit and the gate of the transistor M34 at the bottom of the third-level STCB structure circuit, and the transistor M53 in switch S3 is connected between the gate of the transistor M31 at the bottom of the second-level STCB structure circuit and the gate of the transistor M32 at the bottom of the third-level STCB structure circuit, to control the operation of the third-level STCB structure circuit.When the transistors M55, M43, and M47 that constitute switch S1 are turned on and the transistors that constitute switches S2 and S3 are turned off, the first-level STCB structure circuit works; when the transistors M41, M42, M44, M45, M46, M48, M51, and M54 that constitute switch S2 are turned on and the transistors that constitute switches S1 and S3 are turned off, the second-level STCB structure circuit works; when the transistors M41, M42, M44, M46, M49, M50, M52, and M53 that constitute switch S3 are turned on and the transistors that constitute switches S1 and S2 are turned off, the third-level STCB structure circuit works.

[0048] The gates of transistors M55, M43, and M47 in switch S1 are connected to signal clk1, the gates of M41, M42, M44, M45, and M46 in switch S2 are connected to signal clk2, the gates of M48, M51, and M54 in switch S3 are connected to signal clk3, and M49, M50, M52, and M53 are connected to signal clk4.

[0049] Embodiment 2:

[0050] This embodiment provides a control method for an adaptive low-dropout linear regulator with low power consumption and fast transient response, which is implemented based on the adaptive low-dropout linear regulator provided in the first embodiment.

[0051] like Figure 1 As shown, the detection module in the adaptive low voltage drop linear regulator provided in the first embodiment is composed of a first comparator and a second comparator; the digital logic control module is composed of a counter, a register, etc. The comparator is connected to the counter; the digital logic control module is connected to switches S1, S2, and S3, and the number of levels of the STCB structure circuit is adjusted by controlling the switch to be turned off and on.

[0052] The working principle of the present invention is as follows: the digital logic control module is composed of a counter and a register, and is combined with a digital trimming module to control the switch to reduce or increase the number of stages of the STCB structure. C1 and C2 are the code values ​​output by the first comparator and the second comparator. After the circuit is started, the digital logic circuit quantifies the disturbance of the stable time of the output voltage according to the output of the detection module, and adjusts the number of STCB structures according to the disturbance size.

[0053] The control method of the adaptive low voltage drop linear regulator with low power consumption and fast transient response provided by the present embodiment includes:

[0054] (i) Preparation stage: All circuits are reset and register configurations are in default state.

[0055] (2) Startup stage: The circuit starts up. When the load current changes, the output voltage Vout of the power transistor changes accordingly. The two comparators of the detection module compare the output voltage Vout with the preset voltages VH and VL. The preset voltages VH and VL are the thresholds for overshoot and undershoot respectively:

[0056] If the maximum value Vmax of the overshoot / undershoot of the output voltage Vout is less than the preset voltage VH and greater than the preset voltage VL, that is, VL < Vmax < VH, the output of the first comparator C1 = 0, and the output of the second comparator C2 = 0; the maximum value Vmax of the overshoot / undershoot of the output voltage Vout is within the normal range, and the circuit works normally.

[0057] If the maximum value of the undershoot of the output voltage Vout is less than the preset voltage VL, that is, Vmax < VL, the output of the first comparator C1 = 1, and the output of the second comparator C2 = 0; at this time, the first counter starts counting when it detects that the output of the first comparator C1 = 1.

[0058] If the maximum value of the overshoot of the output voltage Vout is greater than the preset voltage VH, that is, Vmax > VH, the output of the second comparator C2 = 1, and the output of the first comparator C1 = 0; at this time, the second counter starts counting when it detects that the output of the second comparator C2 = 1.

[0059] The outputs of the first counter are N1, and the outputs of the second counter are N2. Subsequently, the counter passes the output code value to the register, configures the register through ctr_reg<3,0>, and the register combines with the digital Trimming module to drive the turn-off and turn-on of the switch to adjust the number of stages of the STCB structure circuit.

[0060] For example, the initial state is: switches S1 and S2 are closed, and switch S3 is open (i.e., clk1 = 0, clk2 = 1, clk3 = 1, clk4 = 0), the register state is ctr_reg<3,0> = 1000, and the two-stage STCB structure circuit is in the working state.

[0061] The count values N1 and N2 of the first counter and the second counter are determined by the counter working frequency, the difference between the maximum value Vmax of the overshoot / undershoot of the output voltage Vout and the preset voltage. The specific adjustment algorithm is:

[0062] If At this time, the LDO transient response performance is good, and when the load changes, the LDO output voltage Vout stabilizes quickly; at this time, the register state changes from ctr_reg<3,0>=1000 to ctr_reg<3,0>=0111, and at the same time, with the assistance of the digital Triming module, the switch S1 is controlled to be closed, and the switches S2 and S3 are disconnected (ie, clk1=1, clk2=0, clk3=0, clk4=0), the first-level STCB structure circuit is in a working state, and the second and third-level STCB structure circuits are in a non-working state, further reducing the power consumption of the circuit, so that the LDO transient response performance is good and the power consumption is low.

[0063] like At this time, the LDO transient response performance is better and the power consumption is lower, the register state remains unchanged, the STCB structure circuit configuration of the LDO main circuit remains unchanged, switches S1 and S2 are closed, and switch S3 is open (i.e., clk1=0, clk2=1, clk3=1, clk4=0), and the register state is ctr_reg<3,0>=1000. The first and second level STCB structure circuits are in working state, and the third level STCB structure circuit is in non-working state.

[0064] like At this time, the transient response performance of LDO is poor. When the load changes, the stabilization time of LDO output voltage Vout is slow. It is necessary to adjust the STCB structure circuit to level three to speed up its stabilization time. The register state changes from ctr_reg<3,0>=1000 to ctr_reg<3,0>=1001. At the same time, with the assistance of the digital Triming module, switches S2 and S3 are controlled to be closed, and switch S1 is disconnected (i.e., clk1=0, clk2=1, clk3=0, clk4=1).

[0065] For further information, see Figure 4A , is the transient simulation performance diagram of the LDO with fast transient response of the first-level STCB structure circuit, Figure 4B The transient simulation performance diagram of the LDO with fast transient response of the two-stage STCB structure circuit is shown in Figure 2. Figure 4C The transient simulation performance diagram of the LDO with fast transient response of the three-stage STCB structure circuit. Figure 4D To compare the transient simulation results of LDO with fast transient response of each level of circuit, according to Figure 4A-4D It can be seen that:

[0066] When the load current is adjusted from 10mA to 20mA in 5μs, the maximum undershoot voltage of the output voltage of the first-level STCB structure circuit is 1.32V, the stabilization time is 512ns, and the transient response is 0.051μs / mA; when the load current is adjusted from 20mA to 10mA in 5μs, the maximum overshoot voltage of the output voltage of the first-level STCB structure circuit is 1.5V, the stabilization time is 1.2us, and the transient response is 0.12μs / Ma.

[0067] When the load current is adjusted from 10mA to 20mA in 5μs, the maximum undershoot voltage of the output voltage of the two-stage STCB structure circuit is 1.31V, the stabilization time is 301ns, and the transient response is 0.031μs / mA; when the load current is adjusted from 20mA to 10mA in 5μs, the maximum overshoot voltage of the output voltage of the two-stage STCB structure circuit is 1.48V, the stabilization time is 127ns, and the transient response is 0.012μs / mA.

[0068] When the load current is adjusted from 10mA to 20mA in 5μs, the maximum undershoot voltage of the output voltage of the three-level STCB structure circuit is 1.30V, the stabilization time is 156ns, and the transient response is 0.015μs / mA; when the load current is adjusted from 20mA to 10mA in 5μs, the maximum overshoot voltage of the output voltage of the three-level STCB structure circuit is 1.48V, the stabilization time is 172ns, and the transient response is 0.017μs / mA. It has good transient response performance.

[0069] For further information, see Figure 5 , Figure 5 This is a power consumption diagram of the low-dropout linear regulator with fast transient response of the present invention. The first-stage STCB structure LDO has a simple structure and a small area, and its quiescent current is low and its power consumption is the lowest; the second-stage STCB structure LDO has a larger circuit area, more MOS tubes, and more complex connections than the first-stage STCB structure LDO, and its quiescent current increases, and its power consumption also increases compared to the first-stage STCB structure LDO. The third-stage STCB structure LDO contains more components, has the largest area, and the most complex structure. At the same time, the quiescent current also increases linearly, and the power consumption increases compared to the second-stage circuit; therefore, from the LDO with the first-stage STCB structure to the LDO with the third-stage STCB structure, its power consumption increases step by step. The static power consumption of the circuit system can be expressed by the formula: P static =V cc ×I staticIt is found that when the power supply voltage is 1.8V and the load current is 20mA, the quiescent current of the first-level STCB structure circuit system is 98.3μA, and the power consumption is 0.17mW. The quiescent current of the second-level STCB structure circuit system is 136.4μA, and the power consumption is 0.24mW. The quiescent current of the third-level STCB structure circuit system is 232.7μA, and the power consumption is 0.41mW. Compared with the power consumption of the similar structure LDO of 0.36mW, the LDO circuit system of the present invention has less power consumption, and the transient response performance is better than the similar structure LDO, which can achieve a compromise between power consumption and transient response performance.

[0070] Some steps in the embodiments of the present invention may be implemented using software, and the corresponding software program may be stored in a readable storage medium, such as a CD or a hard disk.

[0071] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A low power consumption fast transient response adaptive low voltage dropout linear regulator, characterized in that: The voltage stabilizer includes: an operational amplifier, a feedback loop, a three-stage STCB structure circuit with a switch, a power tube, a digital logic control module and a detection module; wherein the operational amplifier, the three-stage STCB structure circuit with a switch and the power tube are connected in sequence, and the feedback loop connects the output end of the power tube and one of the input ends of the operational amplifier; the output end of the power tube is also connected to the detection module, and the output end of the detection module is connected to the digital logic control module, so that the digital logic control module adjusts the level of the three-stage STCB structure circuit with a switch according to the output of the detection module.

2. The voltage stabilizer according to claim 1, characterized in that: The operational amplifier includes a two-stage operational circuit, and the three-stage STCB structure circuit with a switch is located between the two-stage operational circuit; the detection module is provided with two comparators to compare the maximum value Vmax of the overshoot and undershoot of the power tube output voltage with the preset voltage.

3. The voltage stabilizer according to claim 2, characterized in that: The digital logic control module is composed of a counter and a register, and uses a digital trimming module to control switches to reduce or increase the number of stages of the STCB structure.

4. The voltage stabilizer according to claim 3, characterized in that: The three-level STCB structure circuit with a switch includes a first-level STCB structure circuit, a second-level STCB structure circuit and a third-level STCB structure circuit; each level of the STCB structure circuit is divided into an upper part and a lower part, wherein the upper part of the first-level STCB structure circuit is composed of transistors M5-M9, and the lower part is composed of transistors M22-M26; the upper part of the second-level STCB structure circuit is composed of transistors M10-M14, and the lower part is composed of transistors M27-M31; the upper part of the third-level STCB structure circuit is composed of transistors M15-M19, and the lower part is composed of transistors M32-M36M38; Transistors M55, M43, and M47 form a switch S1; transistors M41, M42, M44, M45, M46, M48, M51, and M54 form a switch S2; transistors M41, M42, M44, M46, M49, M50, M52, and M53 form a switch S3; The transistor M55 in the switch S1 is connected between the gate of the transistor M9 at the top of the first-stage STCB circuit and the gate of the transistor M20 in the second-stage operation circuit, the transistor M43 is connected between the gate of the transistor M26 at the bottom of the first-stage STCB circuit and the gate of M37, and the transistor M47 in the switch S1 is connected between the source of the transistor M46 in the switch S2 and the gate of M37, to control the operation of the first-stage STCB circuit; The transistor M41 in the switch S2 is connected between the gate of the transistor M9 at the top of the second-level STCB structure circuit and the gate of M10 in the switch S1, the transistor M42 is connected between the gate of the transistor M9 at the top of the second-level STCB structure circuit and the gate of the transistor M12 at the top of the second-level STCB structure circuit, the transistor M44 is connected between the gate of the transistor M26 at the bottom of the first-level STCB structure circuit and the gate of the transistor M27 at the bottom of the second-level STCB structure circuit, the transistor M46 is connected between the gate of the transistor M26 at the bottom of the first-level STCB structure circuit and the drain of M47 in the switch S1, and the switch S The transistor M45 in switch S2 is connected between the drain of M46 and the gate of the transistor M29 at the bottom of the second-level STCB structure circuit, the transistor M48 in switch S2 is connected between the gate of the transistor M16 at the top of the third-level STCB structure circuit and the gate of the transistor M20 in the output amplifier circuit, the transistor M51 in switch S2 is connected between the source of M49 and the gate of the transistor M20 in the output amplifier circuit, and the transistor M54 in switch S2 is connected between the gate of the transistor M31 at the bottom of the second-level STCB structure circuit and the gate of the transistor M21 in the output amplifier circuit to control the operation of the second-level STCB structure circuit; The transistor M49 in switch S3 is connected between the gate of the transistor M16 at the top of the third-level STCB structure circuit and the drain of the transistor M51 in switch S2, the transistor M50 in switch S3 is connected between the drain of M49 and the gate of the transistor M35 at the bottom of the third-level STCB structure circuit, the transistor M52 in switch S3 is connected between the gate of the transistor M31 at the bottom of the second-level STCB structure circuit and the gate of the transistor M34 at the bottom of the third-level STCB structure circuit, and the transistor M53 in switch S3 is connected between the gate of the transistor M31 at the bottom of the second-level STCB structure circuit and the gate of the transistor M32 at the bottom of the third-level STCB structure circuit, to control the operation of the third-level STCB structure circuit.

5. The voltage stabilizer according to claim 4, characterized in that: The gates of transistors M55, M43, and M47 in switch S1 are connected to signal clk1, the gates of M41, M42, M44, M45, and M46 in switch S2 are connected to signal clk2, the gates of M48, M51, and M54 in switch S3 are connected to signal clk3, and M49, M50, M52, and M53 are connected to signal clk4; the gate voltage of each transistor is controlled by digital signals clk1, clk2, clk3, and clk4, thereby controlling the on and off of each switch.

6. The voltage stabilizer according to claim 5, characterized in that: The working process of the voltage stabilizer includes: (i) In the preparation stage, the circuits of the regulator are reset, and the register configuration in the digital logic control module is in the default state; (2) Startup stage: Each part of the voltage regulator circuit starts up. When the load current changes, the output voltage Vout of the power transistor changes accordingly. The two comparators of the detection module compare the output voltage Vout with the preset voltages VH and VL. The preset voltages VH and VL are the thresholds for overshoot and undershoot respectively: If the maximum value Vmax of the overshoot / undershoot of the output voltage Vout is less than the preset voltage VH and greater than the preset voltage VL, that is, VL < Vmax < VH, the output of the first comparator C1 = 0, and the output of the second comparator C2 = 0; the maximum value Vmax of the overshoot / undershoot of the output voltage Vout is within the normal range, and the circuit works normally; If the maximum value of the undershoot of the output voltage Vout is less than the preset voltage VL, that is, Vmax < VL, the output of the first comparator C1 = 1, and the output of the second comparator C2 = 0; at this time, the first counter starts counting when it detects that the output of the first comparator C1 = 1; If the maximum value of the overshoot of the output voltage Vout is greater than the preset voltage VH, that is, Vmax > VH, the output of the second comparator C2 = 1, and the output of the first comparator C1 = 0; at this time, the second counter starts counting when it detects that the output of the second comparator C2 = 1.

7. The voltage stabilizer according to claim 6, characterized in that: The counted values N1 and N2 of the first counter and the second counter are determined by the counter operating frequency and the difference between the maximum value Vmax of the overshoot / undershoot of the output voltage Vout and the preset voltage. The digital logic control module controls the switch according to the counted values of the two to reduce or increase the number of stages of the STCB structure: like Then the control switch S1 is closed, the switches S2 and S3 are opened, the first-level STCB structure circuit is in working state, and the second-level and third-level STCB structure circuits are in non-working state; like Then the control switches S1 and S2 are closed, the switch S3 is opened, the first and second level STCB structure circuits are in working state, and the third level STCB structure circuit is in non-working state; like Then the control switches S2 and S3 are closed, the switch S1 is opened, and the first-stage, second-stage and third-stage STCB structure circuits are all in working state.

8. Application of the voltage regulator according to any one of claims 1-7 in the field of integrated circuits.

Citation Information

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