Circuit breaker driving circuit and control method thereof

Abstract

The invention discloses a circuit breaker driving circuit and a control method thereof. The circuit breaker driving circuit comprises an H bridge composed of a left bridge arm and a right bridge arm. The left bridge arm comprises a first upper bridge arm and a first lower bridge arm, and the right bridge arm comprises a second upper bridge arm and a second lower bridge arm; each bridge arm is provided with an IGBT, and the grid electrode of each IGBT is electrically connected with a drive circuit. A driving coil of the circuit breaker is connected in series on a transverse bridge of the H bridge, and the driving coil is connected in parallel with an RDC absorption circuit; the drive circuit is configured to enable the IGBTs on the first upper bridge arm and the second lower bridge arm to be conducted at the same time when the circuit breaker is driven to be switched on. And when the circuit breaker is driven to be opened, the IGBT on the second upper bridge arm is firstly turned off, and the IGBT on the first lower bridge arm is turned off in a delayed manner. Compared with the prior art, the IGBT peak voltage can be effectively suppressed, the safety coefficient of the IGBT module during working is improved, the influence of the peak voltage on the circuit is reduced, and the cost and the occupied space of the RDC absorption circuit module can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor switch circuits, and in particular to a circuit breaker drive circuit and a control method thereof. Background Art

[0002] At present, 27.5kV vacuum circuit breakers are mainly used in the field of rail transit, and the circuit breakers are permanent magnet operating mechanisms. Based on the special application scenario structure of rail transit circuit breakers, the structure of the permanent magnet operating mechanism of the circuit breaker is a single coil (the closing capacitor discharges to the mechanism coil, positive excitation, and the permanent magnet mechanism closes; the opening capacitor discharges to the mechanism coil, reverse excitation, and the permanent magnet mechanism opens). Operation sequence: open-0.3S-close open-180S-close open; and the opening and closing are non-frequent operation modes. By selecting power IGBTs (insulated gate bipolar transistors) to design an H-bridge circuit, the opening and closing control function of the circuit breaker is realized. Among them, the maximum rated current capacity of the closing circuit IGBT is 160A, which meets the current opening and closing power requirements of the 27.5kV permanent magnet operating mechanism.

[0003] However, during the IGBT shutdown process, due to the rapid change of the collector current (di / dt), an induced voltage will be generated on the system stray inductance. This induced voltage is superimposed on the bus voltage, which may cause the IGBT to be subjected to higher than usual voltage stress, forming a voltage spike. If this voltage spike is too large, it may cause permanent damage to the IGBT. Summary of the invention

[0004] The present invention provides a circuit breaker drive circuit and a control method thereof to solve the technical problem that a voltage spike formed in the shutdown process of the existing circuit breaker drive circuit may cause permanent damage to the IGBT.

[0005] To achieve the above object, the present invention adopts the following technical solution.

[0006] On the one hand, a circuit breaker driving circuit is provided, comprising an H-bridge composed of a left bridge arm and a right bridge arm and a processor; the left bridge arm comprises a first upper bridge arm and a first lower bridge arm, and the right bridge arm comprises a second upper bridge arm and a second lower bridge arm; each bridge arm is provided with an IGBT, the gate of each IGBT is electrically connected to a signal output end of a driving circuit, and the signal input end of each driving circuit is electrically connected to the processor; the driving coil of the circuit breaker is connected in series on the cross bridge of the H-bridge, and the driving coil is connected in parallel with an RDC absorption circuit;

[0007] The processor is configured to:

[0008] When the circuit breaker is closed, the IGBTs on the first upper bridge arm and the second lower bridge arm are driven to be turned on simultaneously;

[0009] When the circuit breaker is opened, the IGBT on the second upper bridge arm is driven to be turned off first, and the IGBT on the first lower bridge arm is turned off with a delay.

[0010] Therefore, the present invention first turns off the IGBT on the second upper bridge arm when opening the gate, and the IGBT on the first lower bridge arm is still in the on state at this time. One end of the driving coil is connected to GND (here is the large capacitor ground of the driving power supply) through the lower tube, so that the peak voltage has a certain discharge channel, which can suppress part of the peak voltage. In addition, the RDC absorption circuit suppresses part of the peak voltage, forming a superposition effect, thereby better suppressing the IGBT driving peak voltage. Secondly, compared with the circuit breaker drive circuit only equipped with the RDC absorption circuit, under the same peak suppression effect, the capacitance in the RDC absorption circuit of the present invention (a chip capacitor of about 1000pF, with a size of about 3.2×2.5×2.8mm) is greatly reduced relative to the capacitance in the existing RDC absorption circuit (generally a CBB capacitor of 1uF, with a size of about 29×20×14mm), which not only reduces the cost, but also greatly reduces the space occupied by the RDC absorption circuit. In addition, the CBB capacitor used in the existing RDC absorption circuit generates serious heat, and an additional heat dissipation space needs to be designed. Since the present invention adopts a chip capacitor, no additional heat dissipation space needs to be designed.

[0011] In some embodiments, the RDC absorption circuit includes a first diode, a first capacitor and a first resistor; the positive electrode of the first diode is connected to one end of the driving coil, the negative electrode is connected to one end of the first capacitor and the first resistor respectively, and the other end of the first capacitor and the first resistor is connected to the other end of the driving coil.

[0012] In some embodiments, the driving circuit is an optocoupler driving circuit.

[0013] In some embodiments, the driving circuit includes an optocoupler, a second resistor, a third resistor, a first zener diode and a second zener diode; the optocoupler has a first pin, a second pin, a third pin and a fourth pin; the first pin is connected to the positive pole of the power supply, the second pin is connected to the processor, the third pin is connected to the gate of the IGBT, and the fourth pin is connected to a +12V power supply; one end of the second resistor is connected to an electrical connection point between the third pin and the gate of the IGBT, and the other end is connected to a -5V power supply; the anode of the first zener diode is connected to an electrical connection point between the third pin and the gate of the IGBT, the cathode is connected to the cathode of the second zener diode, and the anode of the second zener diode is grounded; one end of the third resistor is connected to an electrical connection point between the third pin and the gate of the IGBT, and the other end is grounded.

[0014] In some embodiments, a fourth resistor is connected between the first pin and the positive electrode of the power supply.

[0015] In some embodiments, the delay time of turning off the IGBT on the first lower bridge arm is 70-100ms. If the delay time of turning off is too long, it will fail to meet the time response requirement, and if it is too short, it will lead to poor peak suppression effect.

[0016] On the other hand, a control method for the circuit breaker drive circuit is provided, comprising the following steps:

[0017] When driving the circuit breaker to close, the IGBTs on the first upper bridge arm and the second lower bridge arm are turned on at the same time;

[0018] When the circuit breaker is driven to open, the IGBT on the second upper bridge arm is turned off first, and the IGBT on the first lower bridge arm is turned off with a delay.

[0019] In some embodiments, the delay time of turning off the IGBT on the first lower bridge arm is 70-100ms. If the delay time of turning off is too long, it will fail to meet the time response requirement, and if it is too short, it will lead to poor peak suppression effect.

[0020] The present invention has at least the following technical effects or advantages:

[0021] 1. The driving circuit of the present invention effectively suppresses the IGBT peak voltage, improves the safety factor of the IGBT module during operation, and reduces the impact of the peak voltage on the circuit.

[0022] 2. The driving circuit of the present invention reduces the cost and space occupied by the RDC absorption circuit module. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of the circuit structure of a circuit breaker driving circuit in one embodiment of the present invention;

[0024] Figure 2 A schematic diagram of a reverse voltage waveform generated when the existing circuit breaker driving circuit is closed;

[0025] Figure 3 It is a schematic diagram of the reverse voltage waveform generated when the circuit breaker driving circuit of the present invention is closed. DETAILED DESCRIPTION

[0026] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0027] Embodiment 1

[0028] See also Figure 1A circuit breaker driving circuit includes an H-bridge composed of a left bridge arm and a right bridge arm and a processor (not shown in the figure). The left bridge arm includes a first upper bridge arm and a first lower bridge arm, and the right bridge arm includes a second upper bridge arm and a second lower bridge arm. An IGBT is provided on each bridge arm, specifically, a first IGBT (Q6) is provided on the first upper bridge arm, a second IGBT (Q9) is provided on the first lower bridge arm, a third IGBT (Q4) is provided on the second upper bridge arm, and a fourth IGBT (Q7) is provided on the second lower bridge arm. Among them, the model of the first IGBT (Q6) and the fourth IGBT (Q7) is 100N60T, and the model of the second IGBT (Q9) and the third IGBT (Q4) is 20N60U. The gate of each IGBT is electrically connected to the signal output end of an optocoupler driving circuit, and the signal input end of each optocoupler driving circuit is electrically connected to the processor. The driving coil S of the circuit breaker is connected in series on the cross bridge of the H bridge, and the driving coil is connected in parallel with an RDC absorption circuit.

[0029] The processor is configured as:

[0030] When the circuit breaker is closed, the IGBTs on the first upper bridge arm and the second lower bridge arm are driven, that is, the first IGBT (Q6) and the fourth IGBT (Q7) are turned on at the same time;

[0031] When the circuit breaker is opened, the IGBT on the second upper bridge arm, that is, the third IGBT (Q4), is driven to be turned off first, and the IGBT on the first lower bridge arm, that is, the second IGBT (Q9), is turned off with a delay.

[0032] Among them, the RDC absorption circuit includes a first diode D1, a first capacitor C1 and a first resistor R1; the positive electrode of the first diode D1 is connected to one end of the driving coil S, and the negative electrode is connected to one end of the first capacitor C1 and the first resistor R1 respectively, and the other ends of the first capacitor C1 and the first resistor R1 are connected to the other end of the driving coil S.

[0033] The driving circuit includes an optocoupler N, a second resistor R2, a third resistor R3, a first voltage zener diode DZ1 and a second voltage zener diode DZ2. The optocoupler N has a first pin 1, a second pin 2, a third pin 3 and a fourth pin 4. The first pin 1 is connected to the positive pole of the power supply, the second pin 2 is connected to the processor, the third pin 3 is connected to the gate of the IGBT, and the fourth pin 4 is connected to the +12V power supply. One end of the second resistor R2 is connected to an electrical connection point between the third pin 3 and the gate of the IGBT, and the other end is connected to the -5V power supply. The anode of the first voltage zener diode DZ1 is connected to an electrical connection point between the third pin N3 and the gate of the IGBT, the cathode is connected to the cathode of the second voltage zener diode DZ2, and the anode of the second voltage zener diode DZ2 is grounded. One end of the third resistor R3 is connected to an electrical connection point between the third pin N3 and the gate of the IGBT, and the other end is grounded. A fourth resistor R4 is also connected between the first pin 1 and the positive pole of the power supply. Specifically, the processor can be an MCU, and the positive pole of the power supply can be the positive pole of the power supply of the MCU system.

[0034] The role of the RDC absorption circuit is mainly reflected in the following aspects:

[0035] 1. Overvoltage suppression: When the IGBT is turned off, the inductive components in the circuit (such as inductors) will generate induced electromotive force, causing the IGBT collector voltage to rise sharply, forming an overvoltage. The RDC absorption circuit can absorb this energy and limit the voltage rise rate (du / dt), thereby protecting the IGBT from overvoltage damage.

[0036] 2. Overcurrent suppression: When the IGBT is turned on, a large impact current will be generated due to the discharge of the junction capacitance. The snubber circuit can reduce the peak value of the impact current by slowing down the current rise rate (di / dt) to prevent the IGBT from being damaged by overcurrent.

[0037] 3. Reduce switching losses: By optimizing the design of the snubber circuit, the loss of IGBT during the switching process can be reduced and the overall efficiency of the system can be improved.

[0038] 4. Reduce costs and space occupation: Compared with the circuit breaker driving circuit equipped with only the RDC absorption circuit, the capacitance in the RDC absorption circuit of the present invention (a chip capacitor of about 1000pF, with a size of about 3.2×2.5×2.8mm) is greatly reduced relative to the capacitance in the existing RDC absorption circuit (generally a CBB capacitor of 1uF, with a size of about 29×20×14mm), which not only reduces the cost, but also greatly reduces the space occupation of the RDC absorption circuit. In addition, the CBB capacitor used in the existing RDC absorption circuit generates serious heat and requires additional heat dissipation space to be designed. Since the present invention uses chip capacitors, no additional heat dissipation space needs to be designed.

[0039] The software control strategy is that the closing action drives the upper and lower tubes (i.e. IGBT (Q6) and the fourth IGBT (Q7)) of the closing switch at the same time, but when the closing IGBT is turned off, the upper tube (i.e. the third IGBT (Q4)) is turned off first, and then the lower tube (i.e. the second IGBT (Q9)) is turned off after a preset delay. The preset time range is 70-100ms, and the preferred value is 85ms (because it is necessary to ensure the response time of the circuit breaker's rapid closing and opening operations, preferably no more than 100ms).

[0040] Test results:

[0041] When the existing circuit breaker drive circuit and permanent magnet circuit breaker are used for joint debugging test, the reverse high voltage captured by the oscilloscope is as high as nearly 1kV (single tube IGBT withstand voltage 600V), the waveform is as follows Figure 2 shown.

[0042] The circuit breaker drive circuit of the present invention is used for joint debugging test with the permanent magnet circuit breaker, and the test is carried out according to the software control strategy provided by the present invention. The reverse high voltage is suppressed to about 330V, which is within the IGBT safety voltage range. The waveform is as follows: Figure 3 shown.

[0043] Embodiment 2

[0044] A control method for the above circuit breaker drive circuit comprises the following steps:

[0045] When the circuit breaker is closed, the IGBTs on the first upper bridge arm and the second lower bridge arm are driven to be turned on simultaneously;

[0046] When the circuit breaker is opened, the IGBT on the second upper bridge arm is driven to be turned off first, and the IGBT on the first lower bridge arm is turned off with a delay.

[0047] Preferably, the delay time for turning off the IGBT on the first lower bridge arm is 70-100 ms, and the preferred value is 85 ms (due to the need to ensure the response time of the circuit breaker's rapid closing and opening operations, preferably no more than 100 ms).

[0048] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0049] Similarly, it should be understood that in order to streamline the present disclosure and aid in understanding one or more of the various inventive aspects, in the above description of exemplary embodiments of the present invention, various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, this disclosed method should not be interpreted as reflecting the intention that the claimed invention requires more features than those expressly recited in each claim. Rather, as reflected in the claims, inventive aspects lie in less than all of the features of the individual embodiments previously disclosed. Therefore, the claims that follow the detailed description are hereby expressly incorporated into the detailed description, with each claim itself serving as a separate embodiment of the present invention.

[0050] Those skilled in the art will appreciate that the modules or units or groups of the devices in the examples disclosed herein may be arranged in the device as described in the embodiment, or alternatively may be located in one or more devices different from the devices in the example. The modules in the foregoing examples may be combined into one module or may be divided into multiple submodules.

[0051] Those skilled in the art will appreciate that the modules in the devices in the embodiments may be adaptively changed and arranged in one or more devices different from the embodiments. The modules or units or groups in the embodiments may be combined into one module or unit or group, and in addition they may be divided into a plurality of submodules or subunits or subgroups. Except that at least some of such features and / or processes or units are mutually exclusive, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this manner may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature providing the same, equivalent or similar purpose.

[0052] Furthermore, those skilled in the art will appreciate that although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features from different embodiments is meant to be within the scope of the present invention and to form different embodiments.

[0053] In addition, some of the embodiments are described herein as methods or combinations of method elements that can be implemented by a processor of a computer system or by other devices that perform the functions. Therefore, a processor with necessary instructions for implementing the method or method elements forms a device for implementing the method or method elements. In addition, the elements described herein of the device embodiments are examples of devices for implementing the functions performed by the elements for the purpose of implementing the invention.

[0054] The various techniques described herein may be implemented in combination with hardware or software, or a combination thereof. Thus, the method and apparatus of the present invention, or some aspects or portions of the method and apparatus of the present invention may be in the form of program codes (i.e., instructions) embedded in a tangible medium, such as a floppy disk, a CD-ROM, a hard disk drive, or any other machine-readable storage medium, wherein when the program is loaded into a machine such as a computer and executed by the machine, the machine becomes a device for practicing the present invention.

[0055] In the case where the program code is executed on a programmable computer, the computing device generally includes a processor, a storage medium readable by the processor (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device. The memory is configured to store the program code; the processor is configured to execute the method of the present invention according to the instructions in the program code stored in the memory.

[0056] By way of example and not limitation, computer readable media include computer storage media and communication media. Computer readable media include computer storage media and communication media. Computer storage media stores information such as computer readable instructions, data structures, program modules or other data. Communication media generally embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and includes any information delivery medium. Any combination of the above is also included within the scope of computer readable media.

[0057] As used herein, unless otherwise specified, the use of ordinal numbers "first," "second," "third," etc. to describe common objects merely indicates that different instances of similar objects are involved, and is not intended to imply that the objects so described must have a given order in time, space, order, or in any other manner.

[0058] Although the present invention has been described according to a limited number of embodiments, it will be apparent to those skilled in the art, with the benefit of the above description, that other embodiments may be envisioned within the scope of the invention thus described. In addition, it should be noted that the language used in this specification is selected primarily for readability and teaching purposes, rather than for explaining or defining the subject matter of the present invention. Therefore, many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the appended claims. The disclosure of the present invention is illustrative, not restrictive, with respect to the scope of the present invention, which is defined by the appended claims.

[0059] Finally, it should be noted that the present invention does not explain in detail the common knowledge recognized by technicians in this field. The above is only a specific embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A circuit breaker drive circuit, comprising an H-bridge consisting of a left bridge arm and a right bridge arm and a processor; the left bridge arm comprises a first upper bridge arm and a first lower bridge arm, and the right bridge arm comprises a second upper bridge arm and a second lower bridge arm; characterized in that: Each bridge arm is provided with an IGBT, the gate of each IGBT is electrically connected to the signal output end of a drive circuit, and the signal input end of each drive circuit is electrically connected to the processor; the cross bridge of the H bridge is connected in series with a drive coil of a circuit breaker, and the drive coil is connected in parallel with an RDC absorption circuit; The processor is configured to: When the circuit breaker is closed, the IGBTs on the first upper bridge arm and the second lower bridge arm are driven to be turned on simultaneously; When the circuit breaker is opened, the IGBT on the second upper bridge arm is driven to be turned off first, and the IGBT on the first lower bridge arm is turned off with a delay.

2. The circuit breaker driving circuit according to claim 1, characterized in that: The RDC absorption circuit includes a first diode, a first capacitor and a first resistor; the positive electrode of the first diode is connected to one end of the driving coil, the negative electrode is connected to one end of the first capacitor and the first resistor respectively, and the other ends of the first capacitor and the first resistor are connected to the other end of the driving coil.

3. The circuit breaker driving circuit according to claim 1 or 2, characterized in that: The driving circuit is an optocoupler driving circuit.

4. The circuit breaker driving circuit according to claim 3, characterized in that: The driving circuit includes an optocoupler, a second resistor, a third resistor, a first zener diode and a second zener diode; the optocoupler has a first pin, a second pin, a third pin and a fourth pin; the first pin is connected to the positive pole of the power supply, the second pin is connected to the processor, the third pin is connected to the gate of the IGBT, and the fourth pin is connected to a +12V power supply; one end of the second resistor is connected to an electrical connection point between the third pin and the gate of the IGBT, and the other end is connected to a -5V power supply; the anode of the first zener diode is connected to an electrical connection point between the third pin and the gate of the IGBT, the cathode is connected to the cathode of the second zener diode, and the anode of the second zener diode is grounded; one end of the third resistor is connected to an electrical connection point between the third pin and the gate of the IGBT, and the other end is grounded.

5. The circuit breaker driving circuit according to claim 4, characterized in that: A fourth resistor is connected between the first pin and the positive electrode of the power supply.

6. The circuit breaker driving circuit according to claim 1 or 2, characterized in that: The delay time for turning off the IGBT on the first lower bridge arm is 70-100ms.

7. A control method for a circuit breaker drive circuit according to any one of claims 1 to 6, characterized in that: The steps include: When the circuit breaker is closed, the IGBTs on the first upper bridge arm and the second lower bridge arm are driven to be turned on simultaneously; When the circuit breaker is opened, the IGBT on the second upper bridge arm is driven to be turned off first, and the IGBT on the first lower bridge arm is turned off with a delay.

8. The control method of the circuit breaker drive circuit according to claim 7, characterized in that: The delay time for turning off the IGBT on the first lower bridge arm is 70-100ms.

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