Method for improving resistivity detection accuracy of annealed high-resistance monocrystalline silicon wafer

Abstract

The invention provides a method for improving resistivity detection accuracy after annealing of a high-resistance monocrystalline silicon wafer, and relates to the technical field of silicon wafer detection methods, after a high-resistance silicon wafer is obtained through multi-wire cutting, the high-resistance silicon wafer is put into a mixed acid solution to be etched for a first preset time, a pretreated silicon wafer is obtained, and impurity particles brought in in the cutting process are eliminated; impurity particles are prevented from diffusing in the silicon wafer during annealing, then the pretreated silicon wafer is placed in an annealing furnace to be annealed so as to eliminate the load center, other charged particles influencing the detection accuracy in the silicon wafer are all eliminated, and then the detection precision during resistivity detection is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of silicon wafer detection methods, and in particular relates to a method for improving the accuracy of resistivity detection of high-resistance single-crystal silicon wafers after annealing. Background Art

[0002] Resistivity is a property of silicon single crystal itself. Silicon itself is not conductive and has infinite resistivity, which is also called intrinsic resistance silicon. However, its actual application in semiconductor devices, solar photovoltaic and other fields often requires silicon crystals with dopants. Currently, common dopants include boron, phosphorus, arsenic, etc. The resistivity after doping is generally less than 0.1Ω.cm, 1-4Ω.cm, 60-90Ω.cm, etc.

[0003] The pulling of single crystal ingots must go through the steps of chemical reaction, seeding, shoulder release, shoulder rotation, equal diameter, finishing, cooling, etc. During the ingot pulling process, some oxygen enters the silicon single crystal due to the crucible, heat field, etc., and exists in different forms at different temperatures. When the ingot is cooled to 350-550°C, oxygen will form a load center with the dopant; and in the process of cutting the ingot into silicon wafers, the impurity particles in the cutting fluid enter the silicon wafer due to the cutting process; since the load center and the impurity particles are both charged, the test results during the resistivity test are inaccurate. Summary of the invention

[0004] In view of this, the present invention provides a method for improving the resistivity detection accuracy of a high-resistance single crystal silicon wafer after annealing.

[0005] The technical solution adopted by the present invention to solve its technical problem is: A method for improving the resistivity detection accuracy of a high-resistance single-crystal silicon wafer after annealing, comprising a pretreatment step, an annealing step, The pretreatment step: after obtaining the high-resistance silicon wafer by multi-wire cutting, the high-resistance silicon wafer is placed in a mixed acid solution and etched for a first predetermined time to obtain a pretreated silicon wafer, thereby eliminating impurity particles; The annealing step is to place the pre-treated silicon wafer in an annealing furnace for annealing to obtain the silicon wafer to be tested, so as to eliminate the load center and improve the accuracy.

[0006] Preferably, in the pretreatment step, the first predetermined time is 1 min-2 min.

[0007] Preferably, in the pretreatment step, the mixed acid solution is a mixed solution of HF and HNO3.

[0008] Preferably, the ratio of HF to HNO3 in the mixed acid solution is 1:8-9.

[0009] Preferably, in the pretreatment step, the mixed acid solution is a mixed solution of HF, HNO3 and HAc.

[0010] Preferably, the ratio of HF to HNO3 and HAc in the mixed acid solution is 1-3:2-7:2-5.

[0011] Preferably, in the annealing step, the peak temperature of the annealing is 650°C-750°C.

[0012] Preferably, the peak temperature of the annealing is maintained for 30 min-60 min.

[0013] Preferably, after the annealing and heat preservation is completed, the temperature is lowered at a cooling rate of not less than 120° C. / min.

[0014] Preferably, in the pretreatment step, the high-resistance silicon wafer refers to a silicon wafer obtained from single crystal silicon with a resistivity greater than 10Ω.cm.

[0015] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a method for improving the resistivity detection accuracy of a high-resistance single crystal silicon wafer after annealing. After a high-resistance silicon wafer is obtained by multi-wire cutting, the high-resistance silicon wafer is placed in a mixed acid solution and etched for a first predetermined time to obtain a pre-treated silicon wafer, so as to eliminate impurity particles introduced during the cutting process and prevent the impurity particles from diffusing in the silicon wafer during annealing. The pre-treated silicon wafer is then placed in an annealing furnace for annealing to eliminate the load center, so that other charged particles in the silicon wafer that affect the detection accuracy are all eliminated, thereby improving the detection accuracy during resistivity detection. DETAILED DESCRIPTION

[0016] The technical solutions and technical effects of the embodiments of the present invention are further elaborated in detail below.

[0017] A method for improving the resistivity detection accuracy of a high-resistance single-crystal silicon wafer after annealing, comprising a pretreatment step, an annealing step, The pretreatment step: after obtaining the high-resistance silicon wafer by multi-wire cutting, the high-resistance silicon wafer is placed in a mixed acid solution and etched for a first predetermined time to obtain a pretreated silicon wafer, thereby eliminating impurity particles; The annealing step is to place the pre-treated silicon wafer in an annealing furnace for annealing to obtain the silicon wafer to be tested, so as to eliminate the load center and improve the accuracy.

[0018] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a method for improving the resistivity detection accuracy of a high-resistance single crystal silicon wafer after annealing. After a high-resistance silicon wafer is obtained by multi-wire cutting, the high-resistance silicon wafer is placed in a mixed acid solution and etched for a first predetermined time to obtain a pre-treated silicon wafer, so as to eliminate impurity particles introduced during the cutting process, prevent the impurity particles from diffusing in the silicon wafer during annealing, resulting in a high resistivity of a P-type semiconductor and a low resistivity of an N-type semiconductor, and then place the pre-treated silicon wafer in an annealing furnace for annealing to eliminate the load center, so that other charged particles in the silicon wafer that affect the detection accuracy are all eliminated, thereby improving the detection accuracy during resistivity detection.

[0019] Furthermore, after obtaining the test silicon wafer, there is no need to let it stand for the impurity particles to be naturally discharged completely, and the test can be carried out directly, which greatly improves the test efficiency.

[0020] Furthermore, in the pretreatment step, the first predetermined time is 1 min-2 min to ensure the etching depth.

[0021] Furthermore, in the pretreatment step, the mixed acid solution is a mixed solution of HF and HNO3.

[0022] Furthermore, the ratio of HF to HNO3 in the mixed acid solution is 1:8-9 to match the high-resistance silicon wafer.

[0023] Furthermore, in the pretreatment step, the mixed acid solution is a mixed solution of HF, HNO3 and HAc, so that the surface of the silicon wafer is etched more uniformly.

[0024] Furthermore, the ratio of HF to HNO3 and HAc in the mixed acid solution is 1-3:2-7:2-5 to match the high-resistance silicon wafer.

[0025] Furthermore, in the annealing step, the peak temperature of the annealing is 650°C-750°C, and annealing is performed after the pretreatment step to eliminate the load center formed during the crystal pulling process and prevent the temperature from being too high and the insulation time from being too long, thereby generating new donors and affecting the resistivity.

[0026] Furthermore, the peak temperature of the annealing is maintained for 30 min-60 min.

[0027] Furthermore, after the annealing and heat preservation is completed, the temperature is lowered at a cooling rate of not less than 120° C. / min to quickly pass through the temperature zone of 350° C.-550° C. to avoid the generation of a new load center.

[0028] Furthermore, in the pretreatment step, the high-resistance silicon wafer refers to a silicon wafer obtained from single crystal silicon with a resistivity greater than 10Ω.cm.

[0029] The use of the present invention is described by the following examples.

[0030] The diameter of the silicon wafer to be tested is 300-600mm; the thickness is 5-20mm; the resistivity is 30-120Ω.cm. Embodiment 1:

[0031] The pretreatment step: after obtaining the boron-doped high-resistance silicon wafer by multi-wire cutting, the boron-doped high-resistance silicon wafer is placed in a mixed acid solution of HF, HNO3 and HAc in a ratio of 2:5:3 and etched for 1-2 minutes to obtain a pretreated silicon wafer; The annealing step comprises placing the pretreated silicon wafer in an annealing furnace, setting the peak temperature to 650-750° C., holding the temperature for 30-60 min for annealing, and cooling the wafer at a cooling rate of not less than 120° C. / min after the holding is completed to obtain the silicon wafer to be tested.

[0032] Comparative Example 1: After obtaining the boron-doped high-resistance silicon wafer by multi-wire cutting, the boron-doped high-resistance silicon wafer is placed in an annealing furnace, the peak temperature is set to 800°C, the insulation time is 2 hours for annealing, and the temperature is slowly cooled down. After annealing, it is left to stand for 1-2 weeks to obtain the silicon wafer to be tested.

[0033] The silicon wafers to be tested obtained in Example 1 and Comparative Example 1 were subjected to resistivity testing respectively, and the instruments and processes used in the resistivity testing were supplemented, and the test results were obtained as shown in Table 1.

[0034] Table 1

[0035] Note: The qualified rate is based on the original doping data (theoretical data) of the crystal pulling. If the resistivity detected after annealing is consistent with the original theoretical calculated resistivity of the crystal pulling, it is qualified; for example, the controlled resistivity of the crystal pulling is 60-90Ω.cm; if it is detected after annealing and is 100Ω.cm, it is unqualified; As can be seen from Table 1, the pretreatment step and annealing step of the present invention improve the inspection pass rate of high-resistance silicon wafers, and the inspection time is short, the inspection efficiency is improved, and the inspection can be performed immediately after annealing.

[0036] What is disclosed above is only a preferred embodiment of the present invention, which certainly cannot be used to limit the scope of rights of the present invention. A person skilled in the art can understand that all or part of the processes of the above embodiments and equivalent changes made according to the claims of the present invention still fall within the scope of the invention.

Claims

1. A method for improving the accuracy of resistivity detection of high-resistance single-crystal silicon wafers after annealing, characterized in that: It includes a pretreatment step, an annealing step, The pretreatment step: after obtaining the high-resistance silicon wafer by multi-wire cutting, the high-resistance silicon wafer is placed in a mixed acid solution and etched for a first predetermined time to obtain a pretreated silicon wafer, thereby eliminating impurity particles; The annealing step is to place the pre-treated silicon wafer in an annealing furnace for annealing to obtain the silicon wafer to be tested, so as to eliminate the load center and improve the accuracy.

2. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 1, characterized in that: In the pre-processing step, the first predetermined time is 1 min-2 min.

3. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 2, characterized in that: In the pretreatment step, the mixed acid solution is a mixed solution of HF and HNO3.

4. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 3, characterized in that: The ratio of HF to HNO3 in the mixed acid solution is 1:8-9.

5. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 2, characterized in that: In the pretreatment step, the mixed acid solution is a mixed solution of HF, HNO3 and HAc.

6. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 5, characterized in that: The ratio of HF to HNO3 and HAc in the mixed acid solution is 1-3:2-7:2-5.

7. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 1, characterized in that: In the annealing step, the peak temperature of the annealing is 650°C-750°C.

8. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 7, characterized in that: The peak temperature of the annealing is maintained for 30 min to 60 min.

9. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 8, characterized in that: After the annealing and heat preservation is completed, the temperature is lowered at a cooling rate of not less than 120° C. / min.

10. The method for improving the resistivity detection accuracy of high-resistance single crystal silicon wafer after annealing as claimed in claim 1, characterized in that: In the pretreatment step, the high-resistance silicon wafer refers to a silicon wafer obtained from single crystal silicon with a resistivity greater than 10Ω.cm.

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