Heat dissipation array microstructure of semiconductor optical amplifier and graphene and preparation method of heat dissipation array microstructure
By adopting graphene's heat dissipation array microstructure in semiconductor optical amplifiers, the problem of insufficient heat dissipation capabilities of semiconductor optical amplifiers is solved, the output efficiency and reliability are improved, and technical support is provided for optical fiber communication in the 5G era.
Patent Information
- Application Number
- CN202411378710.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-01-07
AI Technical Summary
Due to the low heat dissipation capability of semiconductor optical amplifiers at this stage, the power consumption is increased and the output efficiency is reduced. The adhesive force in traditional lithography methods is insufficient, resulting in the problem of damage to semiconductor components.
Using graphene's heat dissipation array microstructure, the bonding layer is formed between the semiconductor optical amplifier chip, the graphene heat dissipation substrate and the heat sink, and the high thermal conductivity of graphene and the unique microarray structure are used to increase the contact area to increase the contact area. Heat transfer rate.
It significantly improves the heat dissipation capability of semiconductor optical amplifiers, enhances output efficiency and reliability, and provides technical guarantees for optical fiber communication in the 5G era.
Smart Images
Figure CN119270441A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a semiconductor optical amplifier and a graphene heat dissipation array microstructure and a preparation method thereof. Background Art
[0002] In the 5G era, semiconductor optical amplifiers (SOAs), as key optical devices for optical fiber communications, are gradually occupying a dominant position in the market and have been widely used in optical transmission systems. However, at this stage, SOA has low heat dissipation capacity, which leads to increased power consumption and reduced output efficiency. Taking AlN as an example, the thermal conductivity of traditional ceramic substrates is only 100-250 W / m•k; in addition, the existing photolithography semiconductor method may cause the chemical stability to decrease during photolithography due to insufficient bonding force of the adhesive, and cannot perform the bonding function well, which may cause the semiconductor component to be damaged after the photolithography film is formed. Therefore, a new SOA with good heat dissipation performance and high output efficiency is needed. Summary of the invention
[0003] Technical problem solved: In response to the above technical problem, the present invention provides a semiconductor optical amplifier and graphene heat dissipation array microstructure and a preparation method thereof, which can effectively solve the shortcomings of the above-mentioned SOA, such as increased power consumption and reduced output efficiency due to low heat dissipation capacity.
[0004] Technical solution: In the first aspect, the present invention provides a semiconductor optical amplifier and graphene heat dissipation array microstructure, comprising a semiconductor optical amplifier chip, a graphene heat dissipation substrate and a heat sink arranged in sequence from top to bottom, the lower surface of the semiconductor optical amplifier chip is bonded to the upper surface of the graphene heat dissipation substrate through a first bonding layer, and the lower surface of the graphene heat dissipation substrate is bonded through a second bonding layer.
[0005] Preferably, the lower surface of the semiconductor optical amplifier chip is a semiconductor optical amplifier convex structure surface, the upper surface of the graphene heat dissipation substrate is a graphene groove microstructure upper surface, and the lower surface is a graphene groove microstructure lower surface, the upper surface of the heat sink is a heat sink convex microstructure surface, the semiconductor optical amplifier convex structure surface and the graphene groove microstructure upper surface are matched to form a first bonding layer, and the graphene groove microstructure lower surface is matched to the heat sink convex microstructure surface to form a second bonding layer.
[0006] Preferably, the length and width of the upper surface of the graphene heat dissipation substrate are respectively greater than the length and width of the surface of the semiconductor optical amplifier protrusion structure, and the length and width of the heat sink protrusion microstructure surface are respectively greater than the length and width of the lower surface of the graphene groove microstructure.
[0007] In a second aspect, the present invention provides a method for preparing the semiconductor optical amplifier and graphene heat dissipation array microstructure according to the first aspect, comprising the following steps: S1. Prepare a semiconductor optical amplifier chip with a clean surface, a graphene heat dissipation substrate and a heat sink; S2, performing surface pretreatment on the semiconductor optical amplifier chip, graphene heat dissipation substrate and heat sink by photolithography technology; S3, cleaning the semiconductor optical amplifier chip, the graphene heat dissipation substrate and the heat sink to remove the residual photoresist; S4, bonding the semiconductor optical amplifier chip, the graphene heat dissipation substrate and the heat sink to obtain the final product.
[0008] Preferably, when the surface pretreatment is performed in step S2, the surface pattern is one of a lattice structure, a square, a straight line or a wavy line, and the three-dimensional patterns of the two bonding surfaces have opposite fluctuations.
[0009] Preferably, the photoresist used in the photolithography technology in step S2 is positive photoresist or negative photoresist, the semiconductor optical amplifier chip and the heat sink are photolithographically processed using the same photoresist, and the graphene heat dissipation substrate is photolithographically processed using a photoresist different from that of the heat sink.
[0010] Beneficial effects: The present invention adopts two-dimensional graphene material with a thermal conductivity of 2000-5000 W / m•k, which can greatly improve the heat dissipation capacity of SOA; at the same time, a unique micro-array structure treatment is adopted for the bonding surface, which can increase the contact area by at least 20%, greatly improving the heat transfer rate; the present invention improves the heat dissipation capacity of SOA, further improves the performance and reliability of SOA, and adds technical guarantee for the development of optical fiber communication in the 5G era. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 It is a schematic diagram of the overall structure of the present invention; Figure 2 A schematic diagram of a mask used for photolithography exposure; Figure 3 Schematic diagram of a semiconductor optical amplifier (SOA) chip with a clean surface; Figure 4 Schematic diagram of a SOA chip coated with positive photoresist; Figure 5 is a schematic diagram of the SOA chip after exposure; Figure 6 A schematic diagram of a SOA chip obtained after etching and cleaning the photoresist; Figure 7 Schematic diagram of a graphene heat dissipation substrate with a clean surface; Figure 8A schematic diagram of a graphene heat dissipation substrate coated with a negative photoresist; Fig. 9 is a schematic diagram of a graphene heat dissipation substrate after exposure; Fig.10 Schematic diagram of the upper surface of the graphene heat dissipation substrate obtained after etching and cleaning the photoresist Fig.11 A schematic diagram of the lower surface of the graphene heat dissipation substrate obtained after etching and cleaning the photoresist; Fig.12 This is a schematic diagram of the bonding between the graphene heat dissipation substrate and the SOA chip; Fig.13 Schematic diagram of a heat sink with a clean surface; Fig.14 is a schematic diagram of a heat sink coated with positive photoresist; Fig.15 is a schematic diagram of the heat sink after exposure; Fig.16 A schematic diagram of a heat sink obtained after etching and cleaning the photoresist; Fig.17 This is the overall schematic diagram of the SOA chip, graphene heat dissipation substrate and heat sink after bonding; Serial numbers in the figure: 1. semiconductor optical amplifier chip, 2. first bonding layer, 3. graphene heat dissipation substrate, 4. second bonding layer, 5. heat sink, 6. mask, 7. positive photoresist, 8. negative photoresist, 9. semiconductor optical amplifier raised structure surface, 10. graphene groove microstructure upper surface, 11. graphene groove microstructure lower surface, 12. heat sink raised microstructure surface. DETAILED DESCRIPTION
[0012] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments: Example 1
[0013] like Figure 1 As shown: A semiconductor optical amplifier and graphene heat dissipation array microstructure, including a semiconductor optical amplifier chip 1, a graphene heat dissipation substrate 3 and a heat sink 5 arranged in sequence from top to bottom, the lower surface of the semiconductor optical amplifier chip 1 is bonded to the upper surface of the graphene heat dissipation substrate 3 through a first bonding layer 2, and the lower surface of the graphene heat dissipation substrate 3 is bonded through a second bonding layer 4.
[0014] The lower surface of the semiconductor optical amplifier chip 1 is a semiconductor optical amplifier raised structure surface 9, the upper surface of the graphene heat dissipation substrate 3 is a graphene groove microstructure upper surface 10, and the lower surface is a graphene groove microstructure lower surface 11, the upper surface of the heat sink 5 is a heat sink raised microstructure surface 12, the semiconductor optical amplifier raised structure surface 9 is matched with the graphene groove microstructure upper surface 10 to form a first bonding layer 2, and the graphene groove microstructure lower surface 11 is matched with the heat sink raised microstructure surface 12 to form a second bonding layer 4.
[0015] The length and width of the upper surface of the graphene heat dissipation substrate 3 are respectively greater than the length and width of the semiconductor optical amplifier protrusion structure surface 9, and the length and width of the heat sink protrusion microstructure surface 12 are respectively greater than the length and width of the lower surface 11 of the graphene groove microstructure. Example 2
[0016] A method for preparing the semiconductor optical amplifier and graphene heat dissipation array microstructure according to embodiment 1 comprises the following steps: S1, prepare a semiconductor optical amplifier chip 1 with a clean surface, a graphene heat dissipation substrate 3 and a heat sink 5, such as Figure 3 , Figure 7 and Fig.13 As shown: the length, width and height of the selected SOA chip are 2 mm, 2 mm and 0.1 mm, the length, width and height of the graphene heat dissipation substrate 3 are 5 mm, 5 mm and 0.5 mm, and the length, width and height of the heat sink 5 are 10 mm, 10 mm and 1 mm; S2, pre-processing the semiconductor optical amplifier chip 1, the graphene heat dissipation substrate 3 and the heat sink 5 by photolithography technology, and the surface pattern adopts a dot pattern; specifically, the mask plate 6 used in this embodiment is as follows: Figure 2 As shown, it is a circular dot matrix, and the size of the mask 6 is adjusted according to the size of the graphene heat dissipation substrate 3 to ensure that the SOA chip can be adjusted on the graphene heat dissipation substrate 3 according to the external device during bonding; Use positive photoresist to treat SOA chips (such as Figure 4 and Figure 5 as shown) and heat sink 5 (as Fig.14 and Fig.15 As shown), photolithography is performed, and the exposed area of the positive photoresist 7 is dissolved in the developer to form a set three-dimensional array pattern; like Figure 8 and Fig. 9 As shown in the figure: the graphene heat dissipation substrate 3 is photolithographically processed using a negative photoresist 8, and the non-exposed area of the negative photoresist 8 is dissolved in a developer to form a three-dimensional array pattern that is opposite to the undulations of the bonding surface of the SOA chip and the heat sink 5; The obtained pattern is Figure 6 , Fig.10, Fig.11 and Fig.16 As shown: the radius of the micro cylinders formed by etching is 0.04 mm, and the height is 0.04 mm; S3, cleaning the semiconductor optical amplifier chip 1, the graphene heat dissipation substrate 3 and the heat sink 5 to remove the residual photoresist to ensure that the finished product is neat and clean; S4, bonding the semiconductor optical amplifier chip 1, the graphene heat dissipation substrate 3 and the heat sink 5 to obtain a final product, wherein the schematic diagram of the semiconductor optical amplifier chip 1 and the graphene heat dissipation substrate 3 after bonding is as shown in Fig.12 As shown, the schematic diagram of the semiconductor optical amplifier chip 1 and the graphene heat dissipation substrate 3 and the heat sink 5 after bonding is as shown in FIG. Fig.17 shown.
[0017] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. A semiconductor optical amplifier and graphene heat dissipation array microstructure, characterized in that: The invention comprises a semiconductor optical amplifier chip (1), a graphene heat dissipation substrate (3) and a heat sink (5) which are arranged in sequence from top to bottom, wherein the lower surface of the semiconductor optical amplifier chip (1) is bonded to the upper surface of the graphene heat dissipation substrate (3) via a first bonding layer (2), and the lower surface of the graphene heat dissipation substrate (3) is bonded via a second bonding layer (4).
2. The semiconductor optical amplifier and graphene heat dissipation array microstructure according to claim 1, characterized in that: The lower surface of the semiconductor optical amplifier chip (1) is a semiconductor optical amplifier convex structure surface (9), the upper surface of the graphene heat dissipation substrate (3) is a graphene groove microstructure upper surface (10), and the lower surface is a graphene groove microstructure lower surface (11), the upper surface of the heat sink (5) is a heat sink convex microstructure surface (12), the semiconductor optical amplifier convex structure surface (9) and the graphene groove microstructure upper surface (10) match to form a first bonding layer (2), and the graphene groove microstructure lower surface (11) and the heat sink convex microstructure surface (12) match to form a second bonding layer (4).
3. The semiconductor optical amplifier and graphene heat dissipation array microstructure according to claim 1, characterized in that: The length and width of the upper surface of the graphene heat dissipation substrate (3) are respectively greater than the length and width of the convex structure surface (9) of the semiconductor optical amplifier, and the length and width of the convex microstructure surface (12) of the heat sink are respectively greater than the length and width of the lower surface (11) of the graphene groove microstructure.
4. A method for preparing a semiconductor optical amplifier and graphene heat dissipation array microstructure according to any one of claims 1 to 3, characterized in that: The following steps are involved: S1, preparing a semiconductor optical amplifier chip (1) with a clean surface, a graphene heat dissipation substrate (3) and a heat sink (5); S2, performing surface pretreatment on the semiconductor optical amplifier chip (1), the graphene heat dissipation substrate (3) and the heat sink (5) by photolithography technology; S3, cleaning the semiconductor optical amplifier chip (1), the graphene heat dissipation substrate (3) and the heat sink (5) to remove residual photoresist; S4, bonding the semiconductor optical amplifier chip (1), the graphene heat dissipation substrate (3) and the heat sink (5) to obtain a final product.
5. The preparation method according to claim 4, characterized in that: When the surface pretreatment is performed in step S2, the surface pattern is one of a lattice structure, a square, a straight line or a wavy line, and the three-dimensional patterns of the two bonding surfaces have opposite fluctuations.
6. The preparation method according to claim 4, characterized in that: The photoresist used in the photolithography technology in step S2 is a positive photoresist (7) or a negative photoresist (8); the semiconductor optical amplifier chip (1) and the heat sink (5) are photolithographically processed using the same photoresist; and the graphene heat dissipation substrate (3) is photolithographically processed using a photoresist different from that of the heat sink (5).