A super surface etching process method
Through the method of multiple incisor exposure etching of layers, the problem of inconsistent etching depth caused by micro-load effects in metasurface processing is solved, and the consistency between the performance of metasurface devices and design indicators is achieved.
Patent Information
- Application Number
- CN202411817544.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-11
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2044-12-11
AI Technical Summary
During the metasurface processing, the different etching depths of different line width sizes caused by the micro-load effect in the etching process, resulting in the problem that the metasurface performance does not match the design indicators.
The nanostructures are divided into multiple layers according to the line width dimensions, and the nanostructures are exposed to etching layer by layer, and the etching parameters and time are adjusted according to the different etching rates of different line width dimensions to make the final etching depth consistent.
The machining accuracy of the metasurface is improved, the consistency between the performance of the metasurface device and the design indicators is ensured, and the problem of inconsistent etching depth caused by micro-load effect is solved.
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Figure CN119270579B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of micro-nano optical technology, and in particular relates to a super surface etching process method. Background Art
[0002] A metasurface is an artificial layered material with a thickness less than the wavelength. Metasurfaces can achieve flexible and effective control of the polarization, amplitude, phase, polarization mode, propagation mode and other characteristics of electromagnetic waves. According to the type of wave being controlled, metasurfaces can be divided into optical metasurfaces, acoustic metasurfaces, mechanical metasurfaces, etc. Optical metasurfaces are the most common type. They can control the polarization, phase, amplitude, frequency and other characteristics of electromagnetic waves through subwavelength microstructures. They are an emerging technology that combines optics and nanotechnology. As a cutting-edge micro-nano optical device, optical metasurfaces control light waves through subwavelength-sized nanostructure arrays to achieve high-resolution imaging and subwavelength focusing. They have the significant advantages of thin volume, light weight, small size and high integration.
[0003] At present, the micro-nano structures of optical metasurfaces can generally be divided into discrete nanocolumn configurations and concentric nanoring configurations. Figure 1 As shown in the figure, they are all composed of a large number of nano-sized structures, and the structure line width is small and the span is large. Due to the above characteristics of the structure size, high-precision lithography and etching processes are usually required to pattern the structural materials during the processing. During the etching process, due to the large span of the line width on the sample and the different densities in different areas, this will lead to different etching efficiencies at different locations on the same wafer, and ultimately form the problem of different etching depths between structures with different line widths. The etching results are shown in the figure. Figure 2 As shown. To address these problems, the current solution is usually to use the etching depth that occupies the largest proportion of the line width as the standard, but this will cause the final metasurface performance to be inconsistent with the design indicators. In order to specifically illustrate the performance gap caused by the processing etching depth error, a metasurface with a concentric nanoring configuration is simulated with a model with a processing etching depth error and an ideal model without a processing etching depth error. A scattering field calculation model based on finite element analysis is constructed, and TE and TM waves of equal intensity and normal incidence are set as the background field. The total scattering field of the structure is solved according to the Helmholtz equation, and the complex amplitude mean of the near-field exit surface is collected to calculate its focusing efficiency; among them, TE and TM waves are two basic polarization modes of two-dimensional waves whose propagation direction is constrained within the simulation plane. TE waves are transverse electric waves, which means that the direction of the electric field in the electromagnetic wave is perpendicular to the simulation plane; TM waves are transverse magnetic waves, which means that the direction of the magnetic field in the electromagnetic wave is perpendicular to the simulation plane. The scattering fields of the concentric nanoring configuration metasurface with and without processing etching depth errors are obtained, as shown in the figure. Figure 3 as shown; Figure 4As shown in the figure, there are three columns corresponding to the etching depth error and three columns corresponding to the no etching depth error. From left to right, they are the TE wave diffraction efficiency, TM wave diffraction efficiency and the average diffraction efficiency. It can be seen from the figure that the TE wave diffraction efficiency is 47.49% and 72.26% respectively, the TM wave diffraction efficiency is 39.35% and 46.93% respectively, and the average diffraction efficiency is 43.42% and 59.59%. It can be seen that the performance defects caused by the etching depth error are significant. Summary of the invention
[0004] In view of this, in order to solve the problem that in the process of supersurface processing, the etching depths of different line widths are different due to the micro-load effect of the etching process, resulting in the supersurface performance not meeting the design indicators, the present invention aims to provide a supersurface etching process method that can solve the micro-load effect in the supersurface etching process.
[0005] To achieve the above object, the technical solution created by the present invention is implemented as follows:
[0006] The present invention provides a super surface etching process method, which is used to etch a super surface structure, and the super surface etching process method comprises the following steps:
[0007] S1. Dividing the metasurface exposure layout into a plurality of line width size layouts according to different line width sizes, wherein the plurality of line width size layouts include at least a first line width size layout, a second line width size layout, and an Nth line width size layout;
[0008] S2. coating a photoresist on the surface of the substrate;
[0009] S3. Patterning the first line width size layout with the overlay mark to form a first line width size layout photoresist mask;
[0010] S4. transferring the pattern of the first line width size layout to the substrate to reach the designed etching depth;
[0011] S5. Aligning the reserved overlay mark, patterning the second line width size layout to form a second line width size layout photoresist mask;
[0012] S6. transferring the pattern of the second line width size layout to the substrate to reach the designed etching depth;
[0013] S7. For the Nth line width size layout among the multiple line width size layouts, repeat steps S5 and S6 respectively until the multiple line width size layouts all reach the designed etching depth and complete etching at the same depth.
[0014] Furthermore, when the material of the substrate is inconsistent with the material of the metasurface structure, S2 includes: preparing a meta-lens structure material film layer on the surface of the substrate, and coating a photoresist on the surface of the meta-lens structure material film layer; S4 includes: transferring the pattern of the first line width size layout to the meta-lens structure material film layer on the substrate; S6 includes: transferring the pattern of the second line width size layout to the meta-lens structure material film layer on the substrate.
[0015] Furthermore, the materials of the substrate and the meta-lens structure material film layer are selected from polymers, , , , , , , , , or At least one of .
[0016] Furthermore, when the etching selectivity ratio of the photoresist mask formed by using the photoresist is insufficient, the steps between S3 and S4 further include: converting the first line width size layout photoresist mask into a first line width size layout metal mask;
[0017] The step between S5 and S6 also includes: converting the second line width size layout photoresist mask into a second line width size layout metal mask.
[0018] Furthermore, the coating method of coating the photoresist on the surface of the meta-lens structure material film layer includes spraying, spin coating or scraping; the coating method of coating the photoresist on the surface of the substrate includes spraying, spin coating or scraping.
[0019] Furthermore, when the etching selectivity of the photoresist mask is sufficient, the patterning is positive structure patterning.
[0020] Furthermore, when the etching selectivity of the photoresist mask is insufficient, the patterning is inverse structure patterning.
[0021] Furthermore, a film layer of the meta-lens structure material is prepared on the surface of the substrate by a coating process, and the coating process includes vacuum evaporation, magnetron sputtering, ion beam plating, physical vapor deposition, chemical vapor deposition or atomic layer deposition.
[0022] Furthermore, the pattern of the first line width size layout is transferred to the substrate through an etching process, and the pattern of the second line width size layout is transferred to the substrate through an etching process; the etching process includes wet etching, reactive ion etching, inductively coupled plasma etching, ion beam etching or laser etching.
[0023] Furthermore, the first line width size layout with the overlay mark is patterned by a photolithography process to form a first line width size layout photoresist mask; the photolithography process includes electron beam lithography, two-photon lithography, stepper lithography, ultraviolet lithography or nanoimprinting.
[0024] Compared with the prior art, the invention can achieve the following beneficial effects:
[0025] The present invention provides a super surface etching process method which can solve the microscopic loading effect in the super surface etching process. The process method adopts a method of multiple overlay exposure etching by layer, that is, a nano structure is divided into multiple layers according to different line width sizes, and the layers are exposed and etched layer by layer; according to the different etching rates of different line width sizes, the etching parameters and time are adjusted to make the final etching depth consistent; thereby improving the processing accuracy of the super surface and ensuring the consistency of the performance of the super surface device with the design indicators. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The drawings constituting part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments and descriptions of the present invention are used to explain the present invention and do not constitute an improper limitation on the present invention. In the drawings:
[0027] Figure 1 Schematic diagram of the structure layout of different configurations of metasurfaces in the prior art;
[0028] Figure 2 It is a schematic diagram of etching results of a super surface under the influence of microscopic loading effect of etching process in the prior art;
[0029] Figure 3 It is a schematic diagram of a simulation model of a super surface under the influence of microscopic loading effect of an etching process in the prior art;
[0030] Figure 4 A schematic diagram of the difference analysis between the test performance and the design index of the super surface under the influence of the microscopic loading effect of the etching process in the prior art;
[0031] Figure 5 A schematic diagram of a process flow of a super surface etching method according to a first embodiment of the present invention;
[0032] Figure 6 This is a schematic diagram of the process flow of the ultra-surface etching process according to the second embodiment of the present invention.
[0033] Reference numerals:
[0034] In Example 1 and Example 4: Super Surface Exposure Plate Figure 1-1 , multiple line width size versions Figure 1-2, substrate 1-3, first layer of photoresist 1-4, overlay mark 1-5, first line width size pattern photoresist mask 1-6, second layer of photoresist 1-7, first line width size pattern Figure 1-2 -1, second line width size layout photoresist mask 1-8, second line width size layout Figure 1-2 -2. The third line width size version Figure 1-2 -3.
[0035] In Example 2 and Example 3: Super Surface Exposure Plate Figure 2-1 , multiple line width size versions Figure 2-2 , substrate 2-3, meta-lens structure material film layer 2-4, first photoresist layer 2-5, overlay mark 2-6, first line width size layout reverse structure photoresist mask 2-7, first metal film layer 2-8, first line width size layout metal mask 2-9, first size layout structure 2-10, first line width size layout Figure 2-2 -1, second layer of photoresist 2-11, second line width size version Figure 2-2 -2, second line width size layout photoresist mask 2-12, second metal film layer 2-13, second line width size layout metal mask 2-14, third line width size layout Figure 2-2 -3. The processed meta-lens structure material film layer 2-4-2. DETAILED DESCRIPTION
[0036] In order to make the purpose, technical solution and advantages of the invention more clear, the invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the invention and do not constitute a limitation of the invention.
[0037] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.
[0038] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.
[0039] In the description of the invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the invention can be understood according to specific circumstances.
[0040] In a specific embodiment of the present invention, a super surface etching process method is provided. The provided super surface etching process method can solve the microscopic load effect in the super surface etching process. Specifically, the super surface etching process method is used to etch a super surface structure. The super surface etching process method comprises the steps of:
[0041] S1. Divide the metasurface exposure layout into multiple line width size layouts according to different line width sizes, and the multiple line width size layouts include at least a first line width size layout, a second line width size layout and an Nth line width size layout; wherein N can be any natural number greater than or equal to 2. When N is 2, it means that the multiple line width size layouts only include the first line width size layout and the second line width size layout; when N is 3, it means that the multiple line width size layouts include the first line width size layout, the second line width size layout and the third line width size layout; when N is 4, it means that the multiple line width size layouts include the first line width size layout, the second line width size layout, the third line width size layout and the fourth line width size layout; and so on. N can also be 5, 6, 7, 8, 9, 10, 11, etc., which are all specific numbers of the multiple line width size layouts.
[0042] S2. Coat photoresist on the surface of each substrate of the plurality of line width size layouts; the description of this step specifically includes two situations. The first is that when the material of the substrate is inconsistent with the material of the metasurface structure, a meta-lens structure material film layer is prepared on the surface of the substrate, and photoresist is coated on the surface of the meta-lens structure material film layer; the second is that when the material of the substrate is consistent with the material of the metasurface structure, photoresist is directly coated on the surface of the substrate. Specifically, the coating method of coating the photoresist on the surface of the meta-lens structure material film layer or directly coating the photoresist on each substrate surface includes spraying, spin coating or scraping.
[0043] In a specific embodiment, the materials of the substrate and the meta-lens structure material film layer are selected from polymers, , , , , , , , , or At least one of the following; specifically, a film layer of a meta-lens structure material is prepared on the surface of the substrate by a coating process, and the coating process includes vacuum evaporation, magnetron sputtering, ion beam plating, physical vapor deposition, chemical vapor deposition or atomic layer deposition.
[0044] In a specific implementation manner, in the metasurface etching process method provided by the present invention, although the entire steps are described as S1 and S2, this is not a limitation on the order of precedence. In fact, there is no distinction in order between S1 and S2. The metasurface exposure pattern can be first divided into a plurality of line width size patterns according to different line width sizes, and then a photoresist is coated on the surface of the substrate or the meta-lens structure material film layer; or a photoresist can be first coated on the surface of the substrate or the meta-lens structure material film layer, and then the metasurface exposure pattern can be divided into a plurality of line width size patterns according to different line width sizes; or both can be performed simultaneously.
[0045] S3. Patterning the first line width size layout with overlay marks to form a first line width size layout photoresist mask; specifically, when the etching selectivity of the photoresist mask is sufficient, the patterning is positive structure patterning; when the etching selectivity of the photoresist mask is insufficient, the patterning is negative structure patterning; specifically, the first line width size layout with overlay marks is patterned using a photolithography process to form a first line width size layout photoresist mask; the photolithography process includes electron beam lithography, two-photon lithography, stepper lithography, ultraviolet lithography or nanoimprinting.
[0046] In a specific implementation, when the etching selectivity of the photoresist mask formed by using the photoresist is insufficient, the process between S3 and S4 also includes: converting the first line width size layout photoresist mask into a first line width size layout metal mask; when the etching selectivity of forming the photoresist mask is sufficient, it is not necessary to convert the first line width size layout photoresist mask into a first line width size layout metal mask; the etching selectivity refers to the relative etching rate of one material and another material under the same etching conditions; it is defined as the ratio of the etching rate of the etched material to the etching rate of another material. Specifically, the first line width size layout photoresist mask is converted into a first line width size layout metal mask by using a coating stripping process; the coating stripping process may specifically include removing the glue and the metal thereon after metal plating.
[0047] S4. Transfer the pattern of the first line width size layout to the substrate to reach the designed etching depth; specifically, transfer the pattern of the first line width size layout to the substrate through an etching process; the etching process includes wet etching, reactive ion etching, inductively coupled plasma etching, ion beam etching or laser etching. Corresponding to step S2, this step also includes two situations. When the material of the substrate is inconsistent with the material of the metasurface structure, this step includes: transferring the pattern of the first line width size layout to the film layer of the meta-lens structure material on the substrate; when the material of the substrate is consistent with the material of the metasurface structure, directly transferring the pattern of the first line width size layout to the substrate.
[0048] S5. Align the reserved overlay mark, graph the second line width size layout, and form a second line width size layout photoresist mask; when the etching selectivity of the photoresist mask formed by using the photoresist is insufficient, convert the second line width size layout photoresist mask into a second line width size layout metal mask; when the etching selectivity of the photoresist mask formed by using the photoresist is sufficient, there is no need to convert the second line width size layout photoresist mask into a second line width size layout metal mask.
[0049] In a specific implementation, an overlay process is used to align the reserved overlay mark, and the second line width size layout is patterned to form a second line width size layout photoresist mask; the overlay process is not much different from the optional scheme of the aforementioned photolithography process, and conventional photolithography equipment can be used. The only difference is that there is an extra step of overlaying the alignment mark; a coating stripping process is used to convert the second line width size layout photoresist mask into a second line width size layout metal mask; the coating stripping process can specifically include removing the glue and the metal thereon after metal plating.
[0050] S6. Transferring the pattern of the second line width size layout to the substrate to reach the designed etching depth; specifically, transferring the pattern of the second line width size layout to the substrate through an etching process; the etching process includes wet etching, reactive ion etching, inductively coupled plasma etching, ion beam etching or laser etching; corresponding to step S2, this step also includes two situations. When the material of the substrate is inconsistent with the material of the metasurface structure, this step includes: transferring the pattern of the second line width size layout to the film layer of the meta-lens structure material on the substrate; when the material of the substrate is consistent with the material of the metasurface structure, directly transferring the pattern of the second line width size layout to the substrate.
[0051] S7. For the Nth line width size layout among the multiple line width size layouts, repeat steps S5 and S6 respectively until the multiple line width size layouts all reach the designed etching depth and complete etching at the same depth; this step varies according to the value of N. When N is 2, the entire super surface etching process ends at step S6, and there is no etching process for other line width size layouts; when N is greater than 2, it is necessary to continue to repeat steps S5 and S6, and perform the same processing on the third line width size layout, the fourth line width size layout, the fifth line width size layout, and so on, so that each line width size layout reaches the designed etching depth, thereby ensuring that the etching depth of all line width size layouts is consistent, and then the etching depth protection of the entire super surface is consistent.
[0052] A specific embodiment of the present invention provides a super-surface etching process method that can solve the microscopic loading effect in the super-surface etching process. The process method adopts a method of multiple overlay exposure and etching by layer, that is, the nanostructure is divided into multiple layers according to different line width sizes, and exposed and etched layer by layer; through different line width sizes, according to different etching rates, the etching parameters and time are adjusted to make the final etching depth consistent; thereby improving the processing accuracy of the super-surface and ensuring the consistency of the performance of the super-surface device with the design indicators.
[0053] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments.
[0054] Example 1
[0055] like Figure 5 As shown, for the case where the substrate material is consistent with the super surface structure material and the photoresist can meet the selection ratio, this embodiment provides a process method for solving the microscopic loading effect of the super surface etching process, including the following steps:
[0056] S1: Expose the metasurface Figure 1-1 According to the different line width sizes, it is divided into multiple line width size versions Figure 1-2 , including the first line width size version Figure 1-2 -1. Second line width size version Figure 1-2 -2 and third line width size version Figure 1-2 -3;
[0057] S2: coating a first layer of photoresist 1-4 on the surface of the substrate 1-3;
[0058] S3: Using photolithography process to form the first line width size plate with overlay marks 1-5 Figure 1-2 -1 patterning to form a photoresist mask 1-6 of a first line width size layout;
[0059] S4: The first line width size version is etched using an etching process Figure 1-2 -1 pattern is transferred to substrate 1-3, reaching the designed etching depth;
[0060] S5: After removing the remaining photoresist after etching, a second photoresist layer 1-7 is coated;
[0061] S6: Use the overlay process to align the reserved overlay marks 1-5 and place the second line width size plate Figure 1-2 -2 patterning to form a second line width size layout photoresist mask 1-8;
[0062] S7: Use etching process to make the second line width size version Figure 1-2 -2 is transferred to substrate 1-3 to achieve the same designed etching depth;
[0063] S8: Repeat steps S6 to S7 to make the third line width size version Figure 1-2 -3 also reaches the designed etching depth, that is, all line width size layouts complete etching to the same depth.
[0064] Example 2
[0065] like Figure 6 As shown, for the case where the substrate material is inconsistent with the super surface structure material and the use of photoresist cannot meet the selection ratio, this embodiment provides a process method for solving the microscopic loading effect of the super surface etching process, including the following steps:
[0066] SS1: Exposure of the metasurface Figure 2-1 According to the different line width sizes, it is divided into multiple line width size versions Figure 2-2 , including the first line width size version Figure 2-2 -1. Second line width size version Figure 2-2 -2 and third line width size version Figure 2-2 -3;
[0067] SS2: A film layer 2-4 of a meta-lens structure material is prepared on the surface of a substrate 2-3 by using a coating process;
[0068] SS3: coating a first layer of photoresist 2-5 on the surface of the meta-lens structure material film layer 2-4;
[0069] SS4: The first line width size version with overlay marks 2-6 is printed using a photolithography process. Figure 2-2 -1 is patterned to form a first line width size layout reverse structure photoresist mask 2-7;
[0070] SS5: optional, using coating process on the first line width size version Figure 2-2 -1 A first metal film layer 2-8 is deposited on the inverse structure photoresist mask 2-7;
[0071] SS6: Using a stripping process, the photoresist mask 2-7 is converted into a first line width size layout metal mask 2-9;
[0072] SS7: Using an etching process to transfer the pattern of the first line width size layout metal mask 2-9 to the meta-lens structure material film layer 2-4, reaching the designed etching depth, and obtaining a first size layout structure 2-10;
[0073] SS8: After removing the metal mask remaining after etching, apply a second layer of photoresist 2-11;
[0074] SS9; Use the overlay process to align the reserved overlay marks 2-6 and place the second line width size plate Figure 2-2 -2 reverse structure patterning to form a second line width size layout photoresist mask 2-12;
[0075] SS10: Optionally, a second metal film layer 2-13 is deposited on the second line width size layout photoresist mask 2-12 by using a coating process;
[0076] SS11: Using the lift-off process, it is converted into the second line width size layout metal mask 2-14;
[0077] SS12: Using an etching process, the pattern of the second line width size layout metal mask 2-14 is transferred to the processed meta-lens structure material film layer 2-4-2 to reach the designed etching depth;
[0078] SS13: Repeat the steps from SS9 to SS12 to make the third line width size version Figure 2-2 -3 also reaches the designed etching depth, that is, all line width size layouts complete etching to the same depth.
[0079] Example 3
[0080] For the case where the substrate material is consistent with the metasurface structure material, but the use of photoresist cannot meet the selectivity ratio, this embodiment provides a process method for solving the microscopic loading effect of the metasurface etching process. The difference from Example 2 is that step SS2 in Example 2 is not required: using a coating process to prepare a metalens structure material film layer 2-4 on the surface of the substrate 2-3; specifically, this embodiment includes the following steps:
[0081] SS1: Exposure of the metasurface Figure 2-1 According to the different line width sizes, it is divided into multiple line width size versions Figure 2-2 , including the first line width size version Figure 2-2 -1. Second line width size version Figure 2-2 -2 and third line width size version Figure 2-2 -3;
[0082] SS3: coating a first layer of photoresist 2-5 on the surface of the substrate 2-3;
[0083] SS4: The first line width size version with overlay marks 2-6 is printed using a photolithography process. Figure 2-2 -1 is patterned to form a first line width size layout reverse structure photoresist mask 2-7;
[0084] SS5: optional, using coating process on the first line width size version Figure 2-2 -1 A first metal film layer 2-8 is deposited on the inverse structure photoresist mask 2-7;
[0085] SS6: Using a stripping process, the photoresist mask 2-7 is converted into a first line width size layout metal mask 2-9;
[0086] SS7: Using an etching process to transfer the pattern of the first line width size layout metal mask 2-9 to the substrate 2-3, reaching the designed etching depth, and obtaining a first size layout structure 2-10;
[0087] SS8: After removing the metal mask remaining after etching, apply a second layer of photoresist 2-11;
[0088] SS9; Use the overlay process to align the reserved overlay marks 2-6 and place the second line width size plate Figure 2-2 -2 reverse structure patterning to form a second line width size layout photoresist mask 2-12;
[0089] SS10: using a coating process to deposit a second metal film layer 2-13 on the second line width size layout photoresist mask 2-12;
[0090] SS11: Using the lift-off process, it is converted into the second line width size layout metal mask 2-14;
[0091] SS12: Using an etching process, the pattern of the second line width size layout metal mask 2-14 is transferred to the processed meta-lens structure material film layer 2-4-2 to reach the designed etching depth;
[0092] SS13: Repeat the steps from SS9 to SS12 to make the third line width size version Figure 2-2 -3 also reaches the designed etching depth, that is, all line width size layouts complete etching to the same depth.
[0093] Example 4
[0094] In the case where the substrate material is inconsistent with the metasurface structure material, but the photoresist used can meet the selection ratio, this embodiment provides a process method for solving the microscopic loading effect of the metasurface etching process. The difference from Embodiment 1 is that a process of preparing a metalens structure material film layer on the surface of the substrate 1-3 is added in step S2; this embodiment specifically includes the following steps:
[0095] S1: Expose the metasurface Figure 1-1 According to the different line width sizes, it is divided into multiple line width size versions Figure 1-2 , including the first line width size version Figure 1-2 -1. Second line width size version Figure 1-2 -2 and third line width size version Figure 1-2 -3;
[0096] S2: preparing a meta-lens structure material film layer on the surface of the substrate 1-3 by a coating process, and coating a first layer of photoresist 1-4 on the surface of the meta-lens structure material film layer;
[0097] S3: Using photolithography process to form the first line width size plate with overlay marks 1-5 Figure 1-2 -1 patterning to form a photoresist mask 1-6 of a first line width size layout;
[0098] S4: The first line width size version is etched using an etching process Figure 1-2 -1 pattern is transferred to the film layer of the meta-lens structure material to reach the designed etching depth;
[0099] S5: After removing the remaining photoresist after etching, a second photoresist layer 1-7 is coated;
[0100] S6: Use the overlay process to align the reserved overlay marks 1-5 and place the second line width size plate Figure 1-2 -2 patterning to form a second line width size layout photoresist mask 1-8;
[0101] S7: Use etching process to make the second line width size version Figure 1-2 -2 pattern is transferred to the meta-lens structure material film layer to achieve the same designed etching depth;
[0102] S8: Repeat steps S6 to S7 to make the third line width size version Figure 1-2 -3 also reaches the designed etching depth, that is, all line width size layouts complete etching to the same depth.
[0103] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the disclosure of the present invention can be performed in parallel, sequentially or in different orders, as long as the desired results of the technical solution disclosed in the present invention can be achieved, and this document does not limit this.
[0104] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A super surface etching process method, characterized in that: The super surface etching process method is used to etch a super surface structure, and the super surface etching process method comprises the steps of: S1. Dividing the metasurface exposure layout into a plurality of line width size layouts according to different line width sizes, wherein the plurality of line width size layouts at least include a first line width size layout, a second line width size layout, and an Nth line width size layout; N is any natural number greater than or equal to 2; S2. Preparing a meta-lens structure material film layer on the surface of the substrate, and coating a photoresist on the surface of the meta-lens structure material film layer; the material of the substrate is inconsistent with the material of the meta-surface structure; S3. Patterning the first line width size layout with the overlay mark to form a first line width size layout photoresist mask; S4. Transferring the pattern of the first line width size layout to the meta-lens structure material film layer on the substrate through an etching process to reach a designed etching depth; S5. Aligning the reserved overlay mark, patterning the second line width size layout to form a second line width size layout photoresist mask; S6. Transferring the pattern of the second line width size layout to the meta-lens structure material film layer on the substrate through an etching process to reach the designed etching depth; S7. For the Nth line width size layout among the multiple line width size layouts, repeat steps S5 and S6 respectively until the multiple line width size layouts all reach the designed etching depth on the substrate, thereby obtaining the same height structure of each line width layout of the meta-lens.
2. The ultra-surface etching process according to claim 1, characterized in that: The materials of the substrate and the meta-lens structure material film layer are selected from polymers, , , , , , , , , or At least one of .
3. The ultra-surface etching process according to claim 1, characterized in that: When the etching selectivity ratio of the photoresist mask formed by using the photoresist is insufficient, the steps between S3 and S4 further include: converting the first line width size layout photoresist mask into a first line width size layout metal mask; The step between S5 and S6 also includes: converting the second line width size layout photoresist mask into a second line width size layout metal mask.
4. The ultra-surface etching process according to claim 1, characterized in that: The coating method of coating the photoresist on the surface of the meta-lens structure material film layer includes spraying, spin coating or scraping; the coating method of coating the photoresist on the surface of the substrate includes spraying, spin coating or scraping.
5. The ultra-surface etching process according to claim 1, characterized in that: When the etching selectivity of the photoresist mask is sufficient, the patterning is positive structure patterning.
6. The ultra-surface etching process according to claim 1, characterized in that: When the etching selectivity of the photoresist mask is insufficient, the patterning is an inverse structure patterning.
7. The ultra-surface etching process according to claim 1, characterized in that: A film layer of a meta-lens structure material is prepared on the surface of the substrate by a coating process, wherein the coating process includes vacuum evaporation, magnetron sputtering, ion beam plating, physical vapor deposition, chemical vapor deposition or atomic layer deposition.
8. The ultra-surface etching process according to claim 1, characterized in that: The etching process includes wet etching, reactive ion etching, inductively coupled plasma etching, ion beam etching or laser etching.
9. The ultra-surface etching process according to claim 1, characterized in that: The first line width size layout with the overlay mark is patterned by a photolithography process to form a first line width size layout photoresist mask; the photolithography process includes electron beam lithography, two-photon lithography, stepper lithography, ultraviolet lithography or nanoimprinting.
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Photoetching method
CN102122113A