Plating selection process of circuit board and circuit board

Abstract

The invention relates to the technical field of circuit board manufacturing, and discloses a selective plating process of a circuit board and the circuit board, the selective plating process of the circuit board comprises the following steps: depositing a conductive layer on the inner hole wall of a via hole of a substrate, the substrate comprising a base material and two circuit layers; a first conducting layer is deposited on the substrate, the first conducting layer comprises a first part and a second part, the first part covers the conducting layer, and the second part covers the surface, away from the base material, of the circuit layer; a dry film is attached to the second part; part of the dry film is removed, so that a window is formed in the dry film; removing at least part of the second part exposed by the window; electroplating a second conductive layer in the open window, wherein the second conductive layer comprises a third part and a fourth part; and removing the residual dry film. According to the selective plating process of the circuit board and the circuit board provided by the invention, the problems that the hole copper of the via hole is thin or the hole ring is not coated with copper, the electrical conduction effect is poor and even the circuit board is scrapped after selective plating is carried out on the circuit board in the prior art can be solved.

Description

Technical Field

[0001] The present application relates to the technical field of circuit board manufacturing, and in particular to a selective plating process for a circuit board and a circuit board. Background Art

[0002] With the rapid development of FPC (Flexible Printed Circuit) and other circuit board technologies, their designs are becoming more and more sophisticated, and the line width and line spacing of the corresponding lines are becoming smaller and smaller. This requires the total thickness of the circuit layer after copper plating to be as thin as possible. However, under the premise of ensuring that the total thickness of the circuit layer after copper plating is as thin as possible, the copper thickness in the via hole must also meet the requirements of electrical conductivity.

[0003] In conventional technology, the whole board electroplating method is generally used to electroplate the hole copper in the via hole. However, in addition to thickening the hole copper, the surface copper as the circuit layer will also be thickened synchronously by the whole board electroplating, which is not conducive to the production of fine circuits. Therefore, the selective plating (i.e. local electroplating) process has emerged. Only the via hole is electroplated, and the circuit position of the surface copper is covered with a dry film to prevent it from contacting the copper plating solution. Therefore, the surface copper will not be thickened, thereby achieving the purpose of reducing the thickness of the surface via and making fine circuits.

[0004] In the prior art, after selective plating of a circuit board, the copper of the via hole may be too thin or the via ring may not have copper, resulting in poor electrical conduction and even causing the circuit board to be scrapped. Summary of the invention

[0005] The present application provides a selective plating process for a circuit board and a circuit board, which can solve the problem in the prior art that after selective plating of the circuit board, the copper of the via hole is too thin or the hole ring has no copper, the electrical conduction effect is poor, and even the circuit board is scrapped.

[0006] In a first aspect, an embodiment of the present application provides a selective plating process for a circuit board, comprising:

[0007] Depositing a conductive layer on the inner hole wall of the via hole of the substrate, the substrate comprising a substrate and two circuit layers, the two circuit layers are respectively arranged on two opposite sides of the substrate, the via hole penetrates the substrate and the two circuit layers, and the conductive layer electrically conducts the two circuit layers;

[0008] Depositing a first conductive layer on the substrate, wherein the first conductive layer comprises a first portion and a second portion connected to each other, wherein the first portion covers the conductive layer, and the second portion covers a surface of the circuit layer away from the substrate;

[0009] A dry film is attached to the second portion, wherein the dry film covers the opening of the via hole;

[0010] Removing a portion of the dry film so that a window is formed on the dry film, wherein the window exposes the opening of the via hole, and the opening of the via hole is located inside the window;

[0011] removing at least a portion of the second portion exposed by the window;

[0012] Electroplating a second conductive layer in the opening, the second conductive layer comprising a third portion and a fourth portion connected to each other, the third portion being arranged inside the conducting hole, and the fourth portion being arranged on a side of the circuit layer away from the substrate;

[0013] The remaining dry film is removed.

[0014] In some embodiments, when removing at least a portion of the second portion exposed by the window, the first portion in the conductive hole is also removed; when electroplating the second conductive layer in the window, the third portion covers the conductive layer.

[0015] In some embodiments, all of the second portion exposed by the window is removed; when the second conductive layer is electroplated in the window, the fourth portion covers the surface of the circuit layer facing away from the substrate.

[0016] In some embodiments, after removing the remaining dry film, the remaining second portion is removed.

[0017] In some embodiments, the thickness of the first conductive layer is 1 μm-1.5 μm.

[0018] In some embodiments, the conductive layer includes carbon powder or graphite.

[0019] In some embodiments, the dry film includes a retained portion and a removed portion; removing part of the dry film includes: exposing the retained portion of the dry film to light; and removing the removed portion by developing to obtain the window.

[0020] In some embodiments, removing the remaining dry film includes: removing the retained portion using an alkaline stripping solution.

[0021] In some of the embodiments, a micro-etching solution is used to remove at least a portion of the second portion exposed by the window opening, and the micro-etching solution includes a mixture of sulfuric acid and hydrogen peroxide, wherein the concentration of the sulfuric acid is 3%-7%, and the concentration of the hydrogen peroxide is 20g / L-50g / L.

[0022] In a second aspect, an embodiment of the present application provides a circuit board, which is manufactured by the selective plating process for the circuit board as described in the first aspect.

[0023] The selective plating process for the circuit board provided in the embodiment of the present application has the beneficial effect that: since a conductive layer is first deposited on the inner hole wall of the through hole of the substrate, and a first conductive layer is deposited on the substrate, and then a dry film is attached to the second part, and part of the dry film is removed, and then at least part of the second part exposed by the window is removed, the residual film formed by the residual dry film on the second part exposed by the window can be removed at the same time as at least part of the second part exposed by the window is removed, so that when the second conductive layer is electroplated in the window, it can be ensured that the fourth part of the second conductive layer can be tightly combined with the circuit layer in the window, and the hole ring formed by the fourth part has a certain thickness, and at the same time, the electrical conductivity of the two circuit layers can be better through the conductive layer and the third part of the second conductive layer, thereby improving the quality of the circuit board.

[0024] The beneficial effects of the circuit board provided in the present application compared with the prior art can be referred to the description of the beneficial effects of the selective plating process of the circuit board provided in the present application compared with the prior art, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0026] Figure 1 It is a schematic diagram of the prior art in which the surface copper line position of the circuit board is covered with a dry film and the dry film is developed;

[0027] Figure 2 Yes Figure 1 The schematic diagram of the circuit board shown is after electroplating;

[0028] Figure 3 This is a flow chart of a selective plating process for a circuit board in one of the embodiments of the present application;

[0029] Figure 4 It is a schematic diagram of depositing electroplating conductive material on the inner hole wall of a through hole of a substrate in one embodiment of the present application;

[0030] Figure 5 is Figure 4 A schematic diagram of depositing a first conductive layer on a substrate shown;

[0031] Figure 6 is Figure 5 A schematic diagram of a dry film attached to the second portion of the first conductive layer is shown;

[0032] Figure 7 Yes Figure 6Schematic diagram of the exposure treatment of the dry film shown;

[0033] Figure 8 Yes Figure 7 Schematic diagram of the exposure treatment of the dry film shown;

[0034] Fig. 9 Yes Figure 8 The schematic diagram of the dry film during the development process shown;

[0035] Fig.10 Yes Fig. 9 A schematic diagram of the entire second portion exposed by the opening of the dry film and the first portion in the conductive hole;

[0036] Fig.11 is Fig.10 A schematic diagram of electroplating a second conductive layer in the open window shown;

[0037] Fig.12 is removing Fig.11 A schematic diagram of the remaining dry film is shown;

[0038] Fig.13 is removing Fig.12 A schematic diagram of the remaining second part is shown.

[0039] The meanings of the marks in the figure are:

[0040] 1. Connection layer; 2. Surface copper; 3. Through hole; 4. Dry film; 5. Residual film; 6. Hole copper;

[0041] 10. Substrate; 20. Circuit layer; 30. Through hole; 40. Conductive layer; 50. First conductive layer; 51. First part; 52. Second part; 60. Dry film; 61. Retained part; 62. Removed part; 601. Window; 602. Residual film; 70. Film; 80. Second conductive layer; 81. Third part; 82. Fourth part. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0043] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0044] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0045] References to "one embodiment", "some embodiments" or "an embodiment" described in the specification of this application mean that a particular feature, structure or characteristic described in conjunction with the embodiment is included in one or more embodiments of the present application. Thus, the phrases "in one embodiment", "in some other embodiments", "in some other embodiments", etc., which appear at different places in this specification, do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. In addition, in one or more embodiments, particular features, structures or characteristics may be combined in any suitable manner.

[0046] In order to illustrate the technical solution of the present application, a description is given below with reference to specific drawings and embodiments.

[0047] In conventional technology, the whole board electroplating method is generally used to electroplate the hole copper in the via hole. However, in addition to thickening the hole copper, the surface copper as the circuit layer will also be thickened synchronously, which is not conducive to the production of fine circuits. Therefore, the selective plating (i.e. local electroplating) process has emerged.

[0048] Please refer to Figure 1 and Figure 2 In the prior art, a circuit board generally includes a connection layer 1 and surface copper 2 disposed on opposite sides of the connection layer 1, wherein the connection layer 1 includes PI (Polyimide), and the circuit board is also provided with a via hole 3. The selective plating process is to electroplate only the via hole 3, and the line position of the surface copper 2 is covered with a dry film 4 so that it cannot contact the copper plating solution, so that the surface copper 2 will not be thickened, thereby achieving the purpose of reducing the thickness of the surface via and making fine circuits.

[0049] When selectively plating a circuit board, a dry film 4 is generally first pasted on the surface copper 2, and then the dry film 4 is exposed and developed to obtain an opening that exposes the via hole 3. After the dry film 4 is developed, the dry film 4 will remain in the opening of the dry film 4 and form a residual film 5. The presence of the residual film 5 causes the surface copper 2 to be unable to contact the copper plating solution during subsequent electroplating, and a good conductive loop cannot be formed, resulting in the via copper 6 of the via hole 3 being too thin or the via ring not being coated with copper, poor electrical conductivity, and even causing the circuit board to be scrapped.

[0050] In view of this, the present application provides a selective plating process and a circuit board for a circuit board. Since a conductive layer is first deposited on the inner hole wall of the conductive hole of the substrate, and a first conductive layer is deposited on the substrate, and then a dry film is attached to the second part, and part of the dry film is removed, and then at least part of the second part exposed by the window is removed, the residual film formed by the residual dry film on the second part exposed by the window can be removed at the same time as at least part of the second part exposed by the window is removed, so that when the second conductive layer is electroplated in the window, it can be ensured that the fourth part of the second conductive layer can be tightly combined with the circuit layer in the window, and the hole ring formed by the fourth part has a certain thickness. At the same time, the third part of the conductive layer and the second conductive layer can make the electrical conduction effect of the two circuit layers better, thereby improving the quality of the circuit board. The selective plating process and circuit board of the circuit board provided by the present application can solve the problem in the related art that after the circuit board is selectively plated, the copper of the conductive hole is too thin or the copper is not on the hole ring, the electrical conduction effect is poor, and even the circuit board is scrapped.

[0051] Please refer to Figure 3 and Figure 4 In a first aspect, an embodiment of the present application provides a selective plating process for a circuit board, comprising:

[0052] S100: depositing a conductive layer 40 on the inner hole wall of the via hole 30 of the substrate, the substrate comprising a substrate 10 and two circuit layers 20, the two circuit layers 20 are respectively arranged on opposite sides of the substrate 10, the via hole 30 penetrates the substrate 10 and the two circuit layers 20, and the conductive layer 40 electrically conducts the two circuit layers 20.

[0053] Specifically, the substrate 10 may include PI, and the circuit layer 20 may be a copper layer, a silver layer, or an aluminum layer.

[0054] The conductive layer 40 may be deposited on the inner hole wall of the via hole 30 of the substrate by chemical deposition or black hole / black shadow method.

[0055] For example, when black holes are formed, the substrate is processed as a whole to deposit a conductive layer 40 on the inner hole wall of the conductive hole 30 of the substrate. The conductive layer 40 includes carbon powder or graphite, which can be conveniently deposited on the inner hole wall of the conductive hole 30 of the substrate.

[0056] S200: Please refer to Figure 5 , a first conductive layer 50 is deposited on the substrate, the first conductive layer 50 includes a first portion 51 and a second portion 52 connected to each other, the first portion 51 covers the conductive layer 40 , and the second portion 52 covers the surface of the circuit layer 20 away from the substrate 10 .

[0057] Specifically, the first conductive layer 50 can be deposited on the substrate by chemical deposition. The first conductive layer 50 can be a copper layer, a silver layer, or an aluminum layer, etc. For example, when the first conductive layer 50 is a copper layer, the first conductive layer 50 can be deposited on the substrate by chemical copper deposition.

[0058] S300: Please refer to Figure 6 A dry film 60 is attached to the second portion 52 , and the dry film 60 covers the opening of the via hole 30 .

[0059] Specifically, the dry film 60 may be attached to the second portion 52 manually or by a film attaching machine. For example, the dry film 60 may be attached to the second portion 52 by vacuum attaching, and the dry film 60 may be attached to the entire surface of the second portion 52.

[0060] It can be understood that the surfaces of the two circuit layers 20 facing away from the substrate 10 are both provided with the second portion 52 , and the two second portions 52 are both attached with the dry film 60 .

[0061] S400: Please refer to Figure 7 , Figure 8 and Fig. 9 , a portion of the dry film 60 is removed, so that a window 601 is formed on the dry film 60 , the window 601 exposes the opening of the via 30 , and the opening of the via 30 is located inside the window 601 .

[0062] Specifically, the dry film 60 includes a reserved portion 61 and a removed portion 62; removing part of the dry film 60 includes: firstly exposing the reserved portion 61 of the dry film 60, that is, utilizing the property of the dry film 60 to react and polymerize when exposed to light, exposing the reserved portion 61 of the dry film 60 to be retained, and using the film 70 to shield the removed portion 62 to be exposed from light, so as to prepare for development; secondly, removing the removed portion 62 by development to obtain the window 601, that is, utilizing the principle that the dry film 60 is insoluble in the developer after exposure, the reserved portion 61 will be retained in the second portion 52 after development, and the removed portion 62 covered by the film 70 during exposure will be washed away by the developer, exposing the opening of the via 30, and the whole process is simple and convenient.

[0063] It should be noted that after removing part of the dry film 60 to form the window 601 on the dry film 60 , part of the dry film 60 remains on the second portion 52 to form a residual film 602 , but does not remain on the circuit layer 20 .

[0064] S500: Please refer to it Fig.10 , at least a portion of the second portion 52 exposed by the window 601 is removed.

[0065] Specifically, micro-etching liquid is used to remove at least a portion of the second portion 52 exposed by the window 601 , which is simple and convenient to operate.

[0066] It should be noted that, since the first conductive layer 50 is not provided by the substrate itself but is formed by later deposition, its texture is looser and its surface is rougher, so it is easier to react with the micro-etching solution. The micro-etching solution reacts with the second part 52, thereby removing the residual film 602 attached to the second part 52, and will not affect the circuit layer 20, and will not cause excessive corrosion of the circuit layer 20 to cause poor copper plating holes.

[0067] The micro-etching solution may include a mixture of sulfuric acid and hydrogen peroxide, wherein the concentration of sulfuric acid is 3%-7% and the concentration of hydrogen peroxide is 20g / L-50g / L, and can effectively remove at least a portion of the second portion 52 exposed by the window 601 .

[0068] The copper ion concentration in the micro-etching solution can be less than or equal to 20 g / L, and the micro-etching amount of the micro-etching solution can be greater than or equal to 0.2 μm.

[0069] It should be noted that the amount of micro-etching solution is controlled to be sufficient to remove part of the second portion 52 without damaging the circuit layer 20. After micro-etching, the residual film 602 at the opening of the via hole 30 is removed together with part of the second portion 52, so that the circuit layer 20 is exposed at the opening of the via hole 30. After micro-etching, there is no dry film 60 remaining at the opening of the via hole 30, which can provide for post-process electroplating.

[0070] It can be understood that after removing at least a portion of the second portion 52 exposed by the opening 601 , the residual film 602 on the second portion 52 can be removed together.

[0071] S600: Please refer to Fig.11 A second conductive layer 80 is electroplated in the opening 601 , and the second conductive layer 80 includes a third portion 81 and a fourth portion 82 connected to each other. The third portion 81 is disposed inside the conducting hole 30 , and the fourth portion 82 is disposed on a side of the circuit layer 20 away from the substrate 10 .

[0072] Specifically, the second conductive layer 80 may be a copper layer, a silver layer or an aluminum layer, etc. Since the residual film 602 is removed, the circuit layer 20 can normally contact the copper plating solution, meeting the conductive loop requirements of the copper plating.

[0073] It should be noted that the time from depositing the first conductive layer 50 on the substrate to electroplating the second conductive layer 80 in the opening 601 may be ≤12 hours.

[0074] The substrate can be placed in a copper plating tank, which is provided with copper plating solution. The copper plating solution may include sulfuric acid, copper sulfate, chloride ions, a brightener and a wetting agent. The concentration of sulfuric acid is 170g / L-230g / L, the concentration of copper sulfate is 90g / L-150g / L, the concentration of chloride ions is 50ppm-90ppm, the concentration of the brightener is 0.5ml / L-1.3ml / L, and the concentration of the wetting agent is 10%-25%.

[0075] S700: Please refer to Fig.12 , remove the remaining dry film 60.

[0076] Specifically, an alkaline film stripping solution may be used to remove the remaining dry film 60 , that is, to remove the reserved portion 61 , which is simple and convenient to operate.

[0077] For example, the remaining dry film 60 is removed by spraying an alkaline film stripping solution.

[0078] The selective plating process for the circuit board provided in the embodiment of the present application is as follows: since a conductive layer 40 is first deposited on the inner hole wall of the through hole 30 of the substrate, and a first conductive layer 50 is deposited on the substrate, a dry film 60 is then attached to the second part 52, and part of the dry film 60 is removed, and then at least part of the second part 52 exposed by the window 601 is removed, the residual film 602 formed by the residual dry film 60 on the second part 52 exposed by the window 601 can be removed together with at least part of the second part 52 exposed by the window 601. Therefore, when the second conductive layer 80 is electroplated in the window 601, it can be ensured that the fourth part 82 of the second conductive layer 80 can be tightly combined with the circuit layer 20 in the window 601, and the hole ring formed by the fourth part 82 has a certain thickness. At the same time, the electrical conductivity of the two circuit layers 20 can be better through the conductive layer 40 and the third part 81 of the second conductive layer 80, thereby improving the quality of the circuit board.

[0079] Since the first conductive layer 50 itself is relatively loose and has poor bonding strength, to ensure the subsequent reliability of the circuit board, please refer to Fig.10 and Fig.11 In this embodiment, when at least a portion of the second portion 52 exposed by the window 601 is removed, the first portion 51 in the conductive hole 30 is also removed; when the second conductive layer 80 is electroplated in the window 601, the third portion 81 covers the conductive layer 40.

[0080] By adopting the above solution, it is possible to avoid the third portion 81 of the second conductive layer 80 being directly combined with the first portion 51 , which would cause the third portion 81 to fall off from the conducting hole 30 .

[0081] Optionally, all the second portions 52 exposed by the opening 601 are removed; when the second conductive layer 80 is electroplated in the opening 601 , the fourth portion 82 covers the surface of the circuit layer 20 facing away from the substrate 10 .

[0082] Such a configuration can prevent the fourth portion 82 of the second conductive layer 80 from being directly combined with the second portion 52 , causing the fourth portion 82 to fall off from the surface of the circuit layer 20 that is away from the substrate 10 .

[0083] Please refer to Fig.12 and Fig.13 Optionally, after removing the remaining dry film 60 , the remaining second portion 52 is removed.

[0084] By adopting the above solution, it is possible to avoid the electroplating layer directly combining with the second portion 52 during subsequent electroplating of the substrate, which causes the electroplating layer to fall off from the surface of the circuit layer 20 away from the substrate 10 .

[0085] For example, the remaining second portion 52 can be removed by acid cleaning. The cleaning solution can include a mixture of sulfuric acid and hydrogen peroxide, the concentration of sulfuric acid is 2%-4%, the concentration of hydrogen peroxide is 6g / L-18g / L, the concentration of copper ions in the cleaning solution can be less than or equal to 35g / L, and the micro-etching amount of the cleaning solution can be greater than or equal to 0.25μm.

[0086] It is understandable that after removing the remaining second portion 52 , the circuit layer 20 is exposed for subsequent steps of manufacturing precision circuits.

[0087] Please refer to Figure 5 and Fig.13 In this embodiment, the thickness of the first conductive layer 50 is 1 μm-1.5 μm.

[0088] By adopting the above solution, the first portion 51 and the second portion 52 of the first conductive layer 50 can be removed more conveniently.

[0089] Please refer to Figures 3 to 13 In a second aspect, an embodiment of the present application provides a circuit board, which is manufactured by a selective plating process of the circuit board of the first aspect.

[0090] The circuit board provided in the embodiment of the present application is manufactured by first depositing a conductive layer 40 on the inner hole wall of the conductive hole 30 of the substrate, and depositing a first conductive layer 50 on the substrate, and then attaching a dry film 60 on the second part 52, and removing part of the dry film 60, and then removing at least part of the second part 52 exposed by the window 601. Therefore, the residual film 602 formed by the residual dry film 60 on the second part 52 exposed by the window 601 can be removed at the same time as removing at least part of the second part 52 exposed by the window 601. Therefore, when the second conductive layer 80 is electroplated in the window 601, it can be ensured that the fourth part 82 of the second conductive layer 80 can be tightly combined with the circuit layer 20 in the window 601, and the hole ring formed by the fourth part 82 has a certain thickness. At the same time, the electrical conductivity of the two circuit layers 20 can be better through the conductive layer 40 and the third part 81 of the second conductive layer 80, thereby improving the quality of the circuit board.

[0091] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A selective plating process for a circuit board, characterized in that: include: Depositing a conductive layer on the inner hole wall of the via hole of the substrate, the substrate comprising a substrate and two circuit layers, the two circuit layers are respectively arranged on two opposite sides of the substrate, the via hole penetrates the substrate and the two circuit layers, and the conductive layer electrically conducts the two circuit layers; Depositing a first conductive layer on the substrate, wherein the first conductive layer comprises a first portion and a second portion connected to each other, wherein the first portion covers the conductive layer, and the second portion covers a surface of the circuit layer away from the substrate; A dry film is attached to the second portion, wherein the dry film covers the opening of the via hole; Removing a portion of the dry film so that a window is formed on the dry film, wherein the window exposes the opening of the via hole, and the opening of the via hole is located inside the window; removing at least a portion of the second portion exposed by the window; Electroplating a second conductive layer in the opening, the second conductive layer comprising a third portion and a fourth portion connected to each other, the third portion being arranged inside the conducting hole, and the fourth portion being arranged on a side of the circuit layer away from the substrate; The remaining dry film is removed.

2. The selective plating process for a circuit board according to claim 1, characterized in that: When removing at least a portion of the second portion exposed by the opening, the first portion in the conducting hole is removed at the same time; when electroplating the second conductive layer in the opening, the third portion covers the conductive layer.

3. The selective plating process for a circuit board according to claim 2, characterized in that: The entire second portion exposed by the opening is removed; when the second conductive layer is electroplated in the opening, the fourth portion covers the surface of the circuit layer away from the substrate.

4. The selective plating process for a circuit board according to claim 3, characterized in that: After removing the remaining dry film, removing the remaining second portion.

5. The selective plating process for a circuit board according to claim 1, characterized in that: The thickness of the first conductive layer is 1 μm-1.5 μm.

6. The selective plating process for a circuit board according to claim 1, characterized in that: The conductive layer includes carbon powder or graphite.

7. The selective plating process for a circuit board according to any one of claims 1 to 6, characterized in that: The dry film comprises a reserved portion and a removed portion; removing part of the dry film comprises: exposing the reserved portion of the dry film to light; removing the removed portion by developing to obtain the window.

8. The selective plating process for a circuit board according to claim 7, characterized in that: The removing of the remaining dry film includes: removing the reserved portion using an alkaline film stripping solution.

9. The selective plating process for a circuit board according to any one of claims 1 to 6, characterized in that: A micro-etching solution is used to remove at least a portion of the second portion exposed by the window opening. The micro-etching solution includes a mixture of sulfuric acid and hydrogen peroxide. The concentration of the sulfuric acid is 3%-7%, and the concentration of the hydrogen peroxide is 20g / L-50g / L.

10. A circuit board, characterized in that: The circuit board is manufactured by the selective plating process for the circuit board as claimed in any one of claims 1 to 9.

Images