Hall sensor based on semiconductor two-dimensional electron gas and preparation method thereof

Abstract

The invention provides a Hall sensor based on semiconductor two-dimensional electron gas and a preparation method thereof, and relates to the technical field of semiconductor sensors. The Hall sensor based on the semiconductor two-dimensional electron gas comprises a (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction which comprises a (Al, Ga) Sb barrier layer, an InAs quantum well layer and an AlSb barrier layer which are stacked in sequence; wherein the (Al, Ga) Sb barrier layer and the AlSb barrier layer are used for limiting electrons in the InAs quantum well layer so as to form two-dimensional electron gas; and the contact interface of the (Al, Ga) Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface.

Description

Technical Field

[0001] The present disclosure relates to the technical field of semiconductor sensors, and more specifically, to a Hall sensor based on semiconductor two-dimensional electron gas and a preparation method thereof. Background Art

[0002] As one of the three pillars of modern information technology, sensors play an extremely important role in information extraction. As one of many sensors, magnetic sensors can not only directly detect magnetic signals and output them as electrical signals, but also indirectly measure changes in physical quantities such as displacement, speed, force, and current based on changes in magnetic signals. Among them, semiconductor-based Hall sensors have a large magnetic detection range and are easy to integrate on a large scale. In addition, Hall sensors also have the advantages of simple structure, small size, stable performance, and good output signal linearity.

[0003] However, as the usage scenarios expand to weak magnetic fields such as the geomagnetic field, magnetic nanoparticles, and human body magnetic field, the detection accuracy of Hall sensors needs to be further improved. Summary of the invention

[0004] In view of this, the present disclosure provides a Hall sensor based on semiconductor two-dimensional electron gas and a preparation method thereof.

[0005] One aspect of the present disclosure provides a Hall sensor based on semiconductor two-dimensional electron gas, comprising: an (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction, comprising a (Al, Ga) Sb barrier layer, an InAs quantum well layer and an AlSb barrier layer stacked in sequence; wherein the (Al, Ga) Sb barrier layer and the AlSb barrier layer are used to confine electrons in the InAs quantum well layer to form a two-dimensional electron gas; and the interface where the (Al, Ga) Sb barrier layer contacts the InAs quantum well layer is a smooth In-Sb type interface.

[0006] According to an embodiment of the present disclosure, the atomic ratio in the (Al,Ga)Sb barrier layer is (Al 1-x ,Ga x )Sb, the valence band and conduction band energy structure of the (Al,Ga)Sb barrier layer are adjusted by changing the atomic ratio to reduce the lattice mismatch with the InAs quantum well layer, where 0.4≦x≦0.6.

[0007] According to an embodiment of the present disclosure, the method further comprises: sequentially stacking an Al2O3 layer on the (Al, Ga)Sb barrier layer away from the surface of the InAs quantum well layer; 0.7 Ga 0.3 Sb buffer layer, AlSb buffer layer, GaAs buffer layer and substrate; wherein the GaAs buffer layer, AlSb buffer layer and Al 0.7 Ga 0.3The Sb buffer layer is used to gradually increase the lattice constant of the surface layer and reduce the lattice mismatch with the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction to reduce the defect density.

[0008] According to an embodiment of the present disclosure, it further includes: a GaSb thin film layer, which is disposed on the surface of the AlSb barrier layer away from the InAs quantum well layer, and is used to prevent the AlSb barrier layer from being oxidized.

[0009] According to the embodiments of the present disclosure, the thickness of the (Al,Ga)Sb barrier layer is 30nm-50nm, the thickness of the InAs quantum well layer is 10nm-20nm, and the thickness of the AlSb barrier layer is 30nm-50nm; the thickness of the GaAs buffer layer is 100nm-10μm, the thickness of the AlSb buffer layer is 30nm-300nm, and the thickness of the AlAs buffer layer is 100nm-10μm. 0.7 Ga 0.3 The thickness of the Sb buffer layer is 500-2000nm, and the thickness of the GaSb thin film layer is 5nm-30nm.

[0010] Another aspect of the present disclosure provides a method for preparing a Hall sensor based on a semiconductor two-dimensional electron device, comprising: preparing an (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction; wherein the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction comprises an (Al, Ga) Sb barrier layer, an InAs quantum well layer and an AlSb barrier layer stacked in sequence; the (Al, Ga) Sb barrier layer and the AlSb barrier layer are used to confine electrons in the InAs quantum well layer to form a two-dimensional electron gas; and the interface where the (Al, Ga) Sb barrier layer contacts the InAs quantum well layer is a smooth In-Sb type interface.

[0011] According to an embodiment of the present disclosure, the interface between the (Al, Ga) Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface, including: epitaxially growing the (Al, Ga) Sb barrier layer, and after the growth of the (Al, Ga) Sb barrier layer is completed, closing the Al source furnace baffle and the Ga source furnace baffle at the same time, and keeping the Sb source furnace baffle open; after opening the In source furnace baffle, closing the Sb source furnace baffle and opening the As source furnace baffle at the same time to grow the InAs quantum well layer, so as to achieve a smooth In-Sb type interface between the (Al, Ga) Sb barrier layer and the InAs quantum well layer.

[0012] According to an embodiment of the present disclosure, the method further includes: epitaxially growing a GaAs buffer layer on the substrate at a first temperature; and epitaxially growing an AlSb buffer layer and an AlSb buffer layer on the GaAs buffer layer in sequence at a second temperature. 0.7 Ga 0.3 Sb buffer layer; at the third temperature, in Al 0.7 Ga0.3 An (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction is epitaxially grown on the surface of the Sb buffer layer; and a GaSb film is epitaxially grown on the surface of the (Al, Ga) Sb / InAs / AlSb semiconductor two-dimensional electron gas heterojunction at a third temperature.

[0013] According to an embodiment of the present disclosure, it also includes: the first temperature is 500°C-580°C, the second temperature is 500°C-560°C, and the third temperature is 400°C-500°C.

[0014] According to an embodiment of the present disclosure, it also includes: micro-nano processing a two-dimensional electron gas semiconductor heterojunction on the [-110] crystal direction of the substrate to obtain a Hall junction table; evaporating an electrode on the Hall junction table, and making the electrode form an ohmic contact with the (Al,Ga)Sb / InAs / AlSb semiconductor heterojunction.

[0015] According to the embodiments of the present disclosure, since the interface between the (Al, Ga) Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface, the interface roughness is reduced and the scattering is reduced by technical means, the technical problem of low room temperature detection accuracy in a weak magnetic environment is at least partially overcome, thereby achieving the technical effects of high carrier mobility and high magnetic field resolution. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0017] Figure 1 A schematic diagram of a thin film structure of a (Al, Ga) Sb / InAs / AlSb semiconductor two-dimensional electron gas according to an embodiment of the present disclosure is shown;

[0018] Figure 2 The energy band structure diagram of the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction according to an embodiment of the present disclosure is schematically shown;

[0019] Figure 3 Schematically showing a comparison diagram of carrier mobility of different atomic ratios of the (Al, Ga)Sb barrier layer according to an embodiment of the present disclosure;

[0020] Figure 4 A schematic diagram showing the switching sequence of the source furnace baffle during the growth of (Al,Ga)Sb / InAs / AlSb semiconductor two-dimensional electron gas according to an embodiment of the present disclosure;

[0021] Figure 5 The process flow chart of (Al,Ga)Sb / InAs / AlSb semiconductor two-dimensional electron gas according to an embodiment of the present disclosure is schematically shown;

[0022] Figure 6 A schematic diagram of a micro-nano processing flow chart of a (Al, Ga) Sb / InAs / AlSb semiconductor two-dimensional electron gas according to an embodiment of the present disclosure is shown;

[0023] Figure 7 A comparison diagram of carrier mobility of different substrate crystal orientations according to an embodiment of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0024] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0025] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise", "include", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0026] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0027] When using expressions such as "at least one of A, B, and C, etc.", they should generally be interpreted according to the meaning of the expression commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0028] Two-Dimensional Electron Gas (2DEG) refers to a quantum phenomenon in which, under certain specific conditions, electrons are confined in a two-dimensional plane and can only move freely within this plane, but are constrained in the direction perpendicular to the plane.

[0029] Compared with bulk materials, Hall sensors based on two-dimensional electron gas have better performance and integration. In Hall devices based on two-dimensional electron gas, the carrier conduction channel is confined to tens of nanometers at the barrier / well interface. The carriers and ionized impurities in the barrier layer are spatially separated, thereby reducing ion scattering and enhancing mobility.

[0030] The low-temperature magnetic moment of magnetic nanoparticles [Fe(CO)5] can be measured using GaAs / (Al,Ga)As two-dimensional electron gas Hall devices. However, the performance of GaAs / (Al,Ga)As two-dimensional electron gas decreases with increasing temperature, resulting in poor magnetic field detection accuracy of the Hall sensor at room temperature. Compared with the GaAs / (Al,Ga)As two-dimensional electron gas system, the AlSb / InAs two-dimensional electron gas has a higher mobility at room temperature. In addition, due to the large conduction band offset of the AlSb / InAs heterojunction, the electrons in the quantum well can be effectively confined, and a higher electron concentration can be achieved in this system by modulating doping.

[0031] Figure 1 A schematic diagram of the thin film structure of the (Al, Ga) Sb / InAs / AlSb semiconductor two-dimensional electron gas according to an embodiment of the present disclosure is schematically shown.

[0032] Figure 2 The energy band structure diagram of the (Al,Ga)Sb / InAs / AlSb semiconductor heterojunction according to an embodiment of the present disclosure is schematically shown.

[0033] like Figure 1 As shown, an embodiment of the present disclosure provides a Hall sensor based on semiconductor two-dimensional electron gas, including: an (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction, including a (Al, Ga) Sb barrier layer, an InAs quantum well layer and an AlSb barrier layer stacked in sequence; wherein the (Al, Ga) Sb barrier layer and the AlSb barrier layer are used to confine electrons in the InAs quantum well layer to form a two-dimensional electron gas; the interface where the (Al, Ga) Sb barrier layer contacts the InAs quantum well layer is a smooth In-Sb type interface.

[0034] In the embodiments of the present disclosure, (Al, Ga) Sb as a barrier layer has a wider bandgap width, which is used to limit the flow of electrons. Compared with the current AlSb barrier layer, (Al, Ga) Sb as a barrier layer has higher oxidation resistance and chemical stability. At the same time, the lattice constants of (Al, Ga) Sb are closer to those of InAs, which is more conducive to reducing the lattice mismatch of the heterojunction.

[0035] InAs as a quantum well layer has a narrow bandgap and a high electron mobility, which allows electrons to move quickly in the quantum well layer. AlSb as a barrier layer has a lattice constant that matches InAs well, which helps reduce lattice mismatch stress and can also form a high-quality interface with other materials.

[0036] like Figure 2 As shown in the figure, in the (Al,Ga)Sb / InAs / AlSb heterojunction, the energy bands of different materials are arranged to form a stepped band structure, resulting in the redistribution of electrons and holes at the interface. Since (Al,Ga)Sb and AlSb have wide bandgap widths, the conduction band and valence band of InAs are relatively low, thus forming a band step at the interface. Electrons are injected from the (Al,Ga)Sb barrier layer into the InAs quantum well layer. At the same time, since the conduction band of InAs is low, electrons are trapped in the InAs quantum well layer, forming a high-mobility two-dimensional electron gas (2DEG).

[0037] At the same time, the interface between the (Al,Ga)Sb barrier layer and the InAs quantum well layer is designed to be a smooth In-Sb type interface, which effectively reduces the interface roughness, reduces scattering, and obtains high carrier mobility and high magnetic field resolution; it avoids the formation of an Al-As type interface with antisite defects, which instead increases scattering centers and reduces carrier mobility.

[0038] Figure 3 The diagram schematically shows a comparison of carrier mobilities of (Al, Ga)Sb barrier layers with different atomic ratios according to an embodiment of the present disclosure.

[0039] like Figure 3 As shown, according to the embodiment of the present disclosure, the atomic ratio in the (Al,Ga)Sb barrier layer is (Al 1-x ,Ga x )Sb, the valence band and conduction band energy structure of the (Al,Ga)Sb barrier layer are adjusted by changing the atomic ratio to reduce the lattice mismatch with the InAs quantum well layer, where: .

[0040] In one embodiment of the present disclosure, the atomic ratio of the (Al,Ga)Sb barrier layer is (Al 0.5 ,Ga 0.5 )Sb.

[0041] In the embodiments of the present disclosure, by adjusting the Al / Ga component ratio, the electrical properties of the interface-related donors and the density of the intrinsic defects can be optimized, thereby improving the electron concentration and mobility in the InAs quantum well. Among them, the energy corresponding to the valence band top of GaSb is higher than that of the valence band top of AlSb. When the Ga component in the (Al, Ga) Sb layer gradually increases, the valence band of (Al, Ga) Sb will gradually rise, and the electrical properties of the interface-related donors will change accordingly; at the same time, the change of the Al / Ga component ratio in the (Al, Ga) Sb layer can change the density of the intrinsic defects in the (Al, Ga) Sb layer, thereby causing a change in the electron concentration in the InAs quantum well.

[0042] When growing (Al,Ga)Sb / InAs heterojunctions, Al 0.5 Ga 0.5 The composition ratio of Sb can achieve higher valence band top energy and lower conduction band bottom energy, optimize the band alignment in the heterojunction, reduce lattice mismatch, and obtain high carrier mobility and high magnetic field resolution.

[0043] According to an embodiment of the present disclosure, the method further comprises: sequentially stacking an Al2O3 layer on the (Al, Ga)Sb barrier layer away from the surface of the InAs quantum well layer; 0.7 Ga 0.3 Sb buffer layer, AlSb buffer layer, GaAs buffer layer and substrate; wherein the GaAs buffer layer, AlSb buffer layer and Al 0.7 Ga 0.3 The Sb buffer layer is used to gradually increase the lattice constant of the surface layer and gradually reduce the lattice mismatch with the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction to reduce the defect density.

[0044] In the embodiment of the present disclosure, a GaAs buffer layer is provided on the substrate to smooth the substrate surface, and an AlSb buffer layer and an AlSb buffer layer are provided in sequence. 0.7 Ga 0.3 The Sb buffer layer gradually increases the lattice constant of the sample surface and gradually reduces the lattice mismatch with the (Al,Ga)Sb / InAs / AlSb semiconductor heterojunction to reduce the defect density.

[0045] According to an embodiment of the present disclosure, it further includes: a GaSb thin film layer, which is disposed on the surface of the AlSb barrier layer away from the InAs quantum well layer to prevent the AlSb barrier layer from being oxidized.

[0046] According to the embodiments of the present disclosure, the thickness of the (Al,Ga)Sb barrier layer is 30nm-50nm, the thickness of the InAs quantum well layer is 10nm-20nm, and the thickness of the AlSb barrier layer is 30nm-50nm; the thickness of the GaAs buffer layer is 100nm-10μm, the thickness of the AlSb buffer layer is 30nm-300nm, and the thickness of the AlAs buffer layer is 100nm-10μm. 0.7 Ga 0.3 The thickness of the Sb buffer layer is 500-2000nm, and the thickness of the GaSb thin film layer is 5nm-30nm.

[0047] Another aspect of the present disclosure provides a method for preparing a Hall sensor based on a semiconductor two-dimensional electron device, comprising: preparing an (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction; wherein the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction comprises an (Al, Ga) Sb barrier layer, an InAs quantum well layer and an AlSb barrier layer stacked in sequence; the (Al, Ga) Sb barrier layer and the AlSb barrier layer are used to confine electrons in the InAs quantum well layer to form a two-dimensional electron gas; and the interface where the (Al, Ga) Sb barrier layer contacts the InAs quantum well layer is a smooth In-Sb type interface.

[0048] Figure 4 The diagram schematically shows the switching sequence of the source furnace baffle during the (Al,Ga)Sb / InAs / AlSb semiconductor two-dimensional electron gas growth process according to an embodiment of the present disclosure.

[0049] like Figure 4 As shown, according to an embodiment of the present disclosure, the interface between the (Al, Ga) Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface, including: epitaxially growing the (Al, Ga) Sb barrier layer, and after the growth of the (Al, Ga) Sb barrier layer is completed, closing the Al source furnace baffle and the Ga source furnace baffle at the same time, and keeping the Sb source furnace baffle open; after opening the In source furnace baffle, closing the Sb source furnace baffle and opening the As source furnace baffle at the same time to grow the InAs quantum well layer, so as to achieve a smooth In-Sb type interface between the (Al, Ga) Sb barrier layer and the InAs quantum well layer.

[0050] In one embodiment of the present disclosure, when the growth of the (Al, Ga)Sb barrier layer is completed, the Al source furnace baffle and the Ga source furnace baffle are closed at the same time, and the Sb source furnace baffle is kept open; and the In source furnace baffle is opened after 3 seconds, and the Sb source furnace baffle is closed after 5 seconds, and the As source furnace baffle is opened at the same time to grow the InAs quantum well layer. At this time, the interface where the (Al, Ga)Sb barrier layer and the InAs quantum well layer are in contact is a smooth In-Sb type interface.

[0051] In the embodiments of the present disclosure, by precisely controlling the switching sequence of the source furnace baffle, an In-Sb type interface can be obtained, thereby achieving the technical effects of reducing interface roughness, reducing scattering, and obtaining high carrier mobility and high magnetic field resolution.

[0052] Figure 5 The process flow chart of (Al,Ga)Sb / InAs / AlSb semiconductor two-dimensional electron gas according to an embodiment of the present disclosure is schematically shown.

[0053] like Figure 5 As shown, according to an embodiment of the present disclosure, the method further includes: epitaxially growing a GaAs buffer layer on a substrate at a first temperature; and epitaxially growing an AlSb buffer layer and an AlSb buffer layer on the GaAs buffer layer in sequence at a second temperature. 0.7 Ga 0.3 Sb buffer layer; at the third temperature, in Al 0.7 Ga 0.3 An (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction is epitaxially grown on the surface of the Sb buffer layer; and a GaSb film is epitaxially grown on the surface of the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction at a third temperature.

[0054] In the embodiments of the present disclosure, a room temperature high-mobility two-dimensional electron gas semiconductor heterojunction with controllable interface atomic arrangement and element composition is grown by molecular beam epitaxy technology, and a magnetic field detection accuracy of 10 -7 T's Hall sensor; compared with traditional weak magnetic field detection technology, it has the advantages of ultra-wide detection range, high linearity, high spatial resolution and magnetic field resolution.

[0055] According to an embodiment of the present disclosure, the material of the substrate includes GaAs, Si or GaSb.

[0056] According to an embodiment of the present disclosure, epitaxially growing a GaAs buffer layer on a substrate includes epitaxially growing a GaAs buffer layer on deoxidized GaAs (001).

[0057] According to an embodiment of the present disclosure, it also includes: the first temperature is 500°C-580°C, the second temperature is 500°C-560°C, and the third temperature is 400°C-500°C.

[0058] Figure 6 The micro-nano processing flow chart of (Al,Ga)Sb / InAs / AlSb semiconductor two-dimensional electron gas according to an embodiment of the present disclosure is schematically shown.

[0059] Figure 7 A comparison diagram of carrier mobility of different substrate crystal orientations according to an embodiment of the present disclosure is schematically shown.

[0060] like Figure 6 As shown, according to an embodiment of the present disclosure, it also includes: micro-nano processing a two-dimensional electron gas semiconductor heterojunction on the [-110] crystal direction of the substrate to obtain a micro-area Hall junction table; evaporating an electrode on the micro-area Hall junction table, and making the electrode form an ohmic contact with the (Al,Ga)Sb / InAs / AlSb semiconductor heterojunction.

[0061] According to the embodiments of the present disclosure, micro-nano processing technology includes photolithography, ion beam etching and metal evaporation, and the characteristic size of the Hall device is in the range of 10nm-1mm, which has the technical effect of taking into account both spatial resolution and magnetic field detection accuracy. -7 T level.

[0062] like Figure 7 As shown, in the embodiments of the present disclosure, the carrier mobility of the (Al, Ga) Sb / InAs / AlSb heterojunction along different crystal directions is significantly different. By selecting a specific crystal direction [-110] to prepare a Hall device, a high magnetic field resolution can be achieved. The (Al, Ga) Sb / InAs / AlSb semiconductor is micro-nano processed to form a Hall bridge shape, which has the function of limiting the electron movement area to obtain parallel uniform current, and the gold electrode has good ohmic contact.

[0063] It will be appreciated by those skilled in the art that the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways, even if such combinations and / or combinations are not explicitly described in the present disclosure. In particular, the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways without departing from the spirit and teachings of the present disclosure. All of these combinations and / or combinations fall within the scope of the present disclosure.

[0064] The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present disclosure. Although the embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage. The scope of the present disclosure is defined by the attached claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A Hall sensor based on semiconductor two-dimensional electron gas, characterized in that: include: (Al,Ga)Sb / InAs / AlSb semiconductor heterojunction, comprising a sequentially stacked (Al,Ga)Sb barrier layer, an InAs quantum well layer and an AlSb barrier layer; Wherein, the (Al,Ga)Sb barrier layer and the AlSb barrier layer are used to confine electrons in the InAs quantum well layer to form a two-dimensional electron gas; The interface between the (Al, Ga)Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface.

2. The Hall sensor based on semiconductor two-dimensional electron gas according to claim 1, characterized in that: The atomic ratio of the (Al,Ga)Sb barrier layer is (Al 1-x ,Ga x )Sb, the valence band and conduction band energy structure of the (Al,Ga)Sb barrier layer are adjusted by changing the atomic ratio to reduce the lattice mismatch with the InAs quantum well layer, wherein 0.4≦x≦0.

6.

3. The Hall sensor based on semiconductor two-dimensional electron gas according to claim 1 or 2, characterized in that: Also includes: The Al2O3 layer on the (Al,Ga)Sb barrier layer, which is far from the surface of the InAs quantum well layer, is stacked in sequence. 0.7 Ga 0.3 Sb buffer layer, AlSb buffer layer, GaAs buffer layer and substrate; Wherein, the GaAs buffer layer, the AlSb buffer layer and the Al 0.7 Ga 0.3 The Sb buffer layer is used to gradually increase the lattice constant of the surface layer and reduce the lattice mismatch with the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction to reduce the defect density.

4. The Hall sensor based on semiconductor two-dimensional electron gas according to claim 3, characterized in that: Also includes: The GaSb thin film layer is arranged on the surface of the AlSb barrier layer away from the InAs quantum well layer, and is used to prevent the AlSb barrier layer from being oxidized.

5. The Hall sensor based on semiconductor two-dimensional electron gas according to claim 4, characterized in that: The thickness of the (Al, Ga)Sb barrier layer is 30nm-50nm, the thickness of the InAs quantum well layer is 10nm-20nm, and the thickness of the AlSb barrier layer is 30nm-50nm; The thickness of the GaAs buffer layer is 100nm-10μm, the thickness of the AlSb buffer layer is 30nm-300nm, and the thickness of the AlSb buffer layer is 100nm-10μm. 0.7 Ga 0.3 The thickness of the Sb buffer layer is 500-2000nm, and the thickness of the GaSb thin film layer is 5nm-30nm.

6. A method for preparing a Hall sensor based on semiconductor two-dimensional electron gas, characterized in that: include: Preparation of (Al,Ga)Sb / InAs / AlSb semiconductor heterojunction; Wherein, the (Al, Ga) Sb / InAs / AlSb semiconductor heterojunction comprises an (Al, Ga) Sb barrier layer, an InAs quantum well layer and an AlSb barrier layer stacked in sequence; The (Al, Ga)Sb barrier layer and the AlSb barrier layer are used to confine electrons in the InAs quantum well layer to form a two-dimensional electron gas; The interface between the (Al, Ga)Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface.

7. The method for preparing a Hall sensor based on semiconductor two-dimensional electron gas according to claim 6, characterized in that: The interface between the (Al, Ga) Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface, comprising: epitaxially growing an (Al, Ga)Sb barrier layer, and after the growth of the (Al, Ga)Sb barrier layer is completed, closing the Al source furnace baffle and the Ga source furnace baffle at the same time, and leaving the Sb source furnace baffle open; After opening the In source furnace baffle, the Sb source furnace baffle is closed and the As source furnace baffle is opened at the same time to grow the InAs quantum well layer, so that the interface between the (Al, Ga)Sb barrier layer and the InAs quantum well layer is a smooth In-Sb type interface.

8. The method for preparing a Hall sensor based on semiconductor two-dimensional electron gas according to claim 6, characterized in that: Also includes: epitaxially growing a GaAs buffer layer on a substrate at a first temperature; At a second temperature, an AlSb buffer layer and an AlSb buffer layer are sequentially epitaxially grown on the GaAs buffer layer. 0.7 Ga 0.3 Sb buffer layer; At the third temperature, in the Al 0.7 Ga 0.3 Epitaxial growth of (Al,Ga)Sb / InAs / AlSb semiconductor heterojunction on the surface of Sb buffer layer; At the third temperature, a GaSb thin film is epitaxially grown on the surface of the (Al, Ga)Sb / InAs / AlSb semiconductor heterojunction.

9. The method for preparing a Hall sensor based on semiconductor two-dimensional electron gas according to claim 8, characterized in that: Also includes: The first temperature is 500°C-580°C, the second temperature is 500°C-560°C, and the third temperature is 400°C-500°C.

10. The method for preparing a Hall sensor based on semiconductor two-dimensional electron gas according to claim 8, characterized in that: Also includes: Micro-nano machining a two-dimensional electron gas semiconductor heterojunction on the [-110] crystal direction of the substrate to obtain a Hall junction table; An electrode is evaporated on the Hall junction table, and the electrode is made to form an ohmic contact with the (Al, Ga)Sb / InAs / AlSb semiconductor heterojunction.

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