Equivalent experiment device and method for VFTO (Very Fast Transient Overvoltage) invasion of semiconductor device

Abstract

The invention discloses an equivalent experiment device and method for VFTO invasion of a semiconductor device. The equivalent experiment device comprises a charging loop, an experiment loop and a discharging loop. Wherein the experimental loop is provided with a semiconductor device to be experimented, the semiconductor device to be experimented is provided with an electric signal detection device, and the semiconductor device to be experimented is connected in parallel with the converter valve sub-module simulation module and the experimental discharge module. A capacitive device of the converter valve sub-module simulation module is respectively connected in parallel with the charging loop and the discharging loop; a charging loop and a discharging loop of the experiment discharging module are connected in parallel. According to the invention, an effective experimental device is established through experimental topology, voltage waveforms equivalent to VFTO waveforms can be generated at the two ends of the semiconductor device through a corresponding experimental method, device characteristics of different semiconductor devices under the VFTO working condition can be researched conveniently, requirements of engineering application for experiments are met, and the device is simple in overall structure, low in cost and convenient to establish.

Description

Technical Field

[0001] The invention relates to the field of microelectronic technology, and in particular to an equivalent experimental device and an experimental method for semiconductor devices invaded by VFTO. Background Art

[0002] Very fast transient overvoltage (hereinafter referred to as: VFTO) refers to a transient overvoltage with a wavefront time in the range of 3 to 100ns. It seriously affects the stable operation of the power system due to its high amplitude (up to several times the rated voltage), high frequency (up to hundreds of kHz to several MHz) and extremely short duration (a few nanoseconds to a few microseconds).

[0003] For VFTO-related issues, research is generally conducted in a variety of ways, such as high-voltage level experiments and digital simulations. A common method is to use electromagnetic simulation software EMTP to build a wide-band model of gas-insulated metal-enclosed switchgear (hereinafter referred to as GIS) to simulate and obtain the port voltage at the GIS busbar outlet. In the experimental stage, in a specific example, the UHV AC test base established a UHV GIS equipment VFTO test circuit that can produce relatively severe VFTO. It conducted a large-scale GIS isolation switch operation test in the VFTO test circuit of the UHV GIS equipment and conducted a statistical analysis of the VFTO measurement results. The waveform characteristics, breakdown times, frequency components and residual voltage distribution of the VFTO whole process waveform, the waveform characteristics and oscillation coefficient distribution of the single breakdown waveform were obtained, and the VFTO characteristics of the UHV GIS were more comprehensively grasped. In another example, a VFTO simulation generator was used to generate a steep wave voltage superimposed on a single-frequency attenuated oscillation wave to simulate VFTO. By adjusting the circuit capacitance and inductance parameters, a VFTO generating device with an amplitude of 2.5kV was developed.

[0004] Therefore, the existing technology research on VFTO can be summarized into two categories. One is to focus on digital modeling and simulation of GIS; the other is to build a high-voltage level experimental circuit, actually operate the disconnector to switch off, and measure the voltage waveform of the GIS outlet port to the ground; there are also research teams that use a steep wave generator plus an attenuated oscillation wave to simulate VFTO. In the above research on VFTO, the VFTO waveform of the GIS outlet port to the ground is basically measured, and there is no further research on the impact of VFTO on subsequent converter valve devices. In the existing offshore converter platform, there are engineering cases where VFTO invades the converter valve submodule, causing damage to the semiconductor devices in the converter valve submodule. The actual engineering practice forces technicians to study the semiconductor devices in the converter valve under VFTO conditions.

[0005] However, there is currently no simulation experimental device and method available for studying the VFTO entering the converter valve, so the impact of the VFTO on the sub-module devices and the voltage waveform at the sub-module port have not been experimentally recorded.

[0006] In summary, the existing VFTO experimental device needs to be improved so that it can better simulate the impact of VFTO on the converter valve submodule devices in reality, so as to better predict the impact of the actual situation and guide the design of specific devices. Summary of the invention

[0007] The technical problem to be solved by the present invention is to provide an equivalent experimental device and a control method for semiconductor devices invaded by VFTO.

[0008] The present invention adopts the following technical solutions to solve the above technical problems:

[0009] On the one hand, the present invention provides an equivalent experimental device for semiconductor devices invaded by VFTO, including a charging circuit, an experimental circuit and a discharging circuit;

[0010] The charging circuit is provided with a first charging circuit and a second charging circuit; the first charging circuit is provided with a first DC power supply and a first charging switch; the second charging circuit is provided with a second DC power supply and a second charging switch;

[0011] The experimental circuit is provided with a semiconductor device to be tested, and an electrical signal detection device is installed at the semiconductor device to be tested; the semiconductor device to be tested is connected in parallel with a converter valve submodule simulation module; the semiconductor device to be tested is also connected in parallel with an experimental discharge module;

[0012] The discharge circuit is provided with a first discharge circuit and a second discharge circuit; the first discharge circuit is provided with a first discharge load and a first discharge switch; the second discharge circuit is provided with a second discharge load and a second discharge switch;

[0013] The capacitive devices of the converter valve submodule simulation module are respectively connected in parallel with the first charging circuit and the first discharging circuit;

[0014] The experimental discharge module is provided with a discharge capacitor and a charging capacitor, the discharge capacitor is connected to the charging capacitor; the discharge capacitor is connected to the experimental circuit; the charging capacitor is connected in parallel with the second charging circuit and the second discharge circuit respectively.

[0015] Optionally, the electrical signal detection device includes a differential probe and a Rogowski coil;

[0016] The electrical signal detection device is externally connected to an oscilloscope.

[0017] Optionally, the converter valve submodule simulation module is provided with an adjustment inductor and an adjustment capacitor;

[0018] The regulating capacitor is connected in parallel with the first charging circuit and the first discharging circuit respectively.

[0019] Optionally, the regulating inductor is a microhenry inductor; and the regulating capacitor is a microfarad capacitor.

[0020] Optionally, the charging capacitor is connected in series with a maintaining resistor, and forms a loop with the discharging capacitor;

[0021] The discharge capacitor is connected in parallel with the semiconductor device to be tested;

[0022] An isolating switch is provided on the experimental circuit.

[0023] Optionally, the charging capacitor is a microfarad capacitor, and the discharging capacitor is a picofarad capacitor;

[0024] The resistance value of the holding resistor ranges from 50 kΩ to 150 kΩ.

[0025] Optionally, the first discharge load and the second discharge load are both resistors;

[0026] The resistance range of the first discharge load is 1100Ω-2100Ω;

[0027] The resistance of the second discharge load ranges from 1800Ω to 2500Ω.

[0028] Optionally, the semiconductor device to be tested is an insulated gate bipolar transistor, a thyristor or a parallel diode.

[0029] Optionally, the experimental state of the semiconductor device to be tested is a blocking state.

[0030] On the other hand, the present invention also provides an equivalent experimental method for semiconductor devices invaded by VFTO, the main steps of which include:

[0031] S1, respectively charging the capacitive device and the charging capacitor of the converter valve submodule analog module through the charging circuit, and disconnecting the charging circuit when the charging voltage reaches the target voltage;

[0032] S2, closing the experimental loop, and recording the power-on waveform of the semiconductor device to be tested through an electrical signal detection device;

[0033] S3, disconnecting the experimental loop and closing the discharge loop to discharge the capacitive components of the converter valve submodule simulation module and the charging capacitor.

[0034] Compared with the prior art, the present invention adopts the above technical solution and has the following technical effects:

[0035] The present invention builds an effective experimental device through experimental topology, and can generate a voltage waveform equivalent to the VFTO waveform at both ends of the semiconductor device through a corresponding control method, which is convenient for studying the device characteristics of different semiconductor devices under VFTO conditions, solves the experimental needs of engineering applications, has a simple overall structure, low cost, and is easy to build. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0037] Figure 1 It is a simplified circuit diagram of the equivalent experimental device in the present invention;

[0038] Figure 2 is a flow chart of the control method in the present invention;

[0039] Figure 3 This is a waveform diagram of voltage and current across a thyristor measured in an experiment according to Embodiment 1 of the present invention. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0042] In the present invention, unless otherwise clearly specified and limited, the terms "installation", "connection" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0043] It should be noted that the methods used in the present invention are all conventional methods unless otherwise specified; the raw materials and devices used are all conventional commercially available products unless otherwise specified.

[0044] On the one hand, this embodiment provides an equivalent experimental device for semiconductor devices invaded by VFTO (hereinafter referred to as the device), which is as follows: Figure 1 As shown, it mainly includes a charging circuit, an experimental circuit and a discharging circuit.

[0045] by Figure 1 The configuration of the charging circuit is described as an example, wherein the charging circuit is a circuit configured on the left and right sides, specifically including a first charging circuit. The first charging circuit is provided with a first DC power supply U SM The second charging circuit is provided with a second DC power supply U0 and a second charging switch S2. Preferably, the first and second charging switches are vacuum contactors, which are controlled by a controller to disconnect or connect their respective circuits.

[0046] The experimental circuit is the middle part, which is equipped with the semiconductor device to be tested, which can be an insulated gate bipolar transistor or a thyristor. Figure 1 As shown, the semiconductor device to be tested is selected as a thyristor T, and the experimental state is kept in a blocking state. The left side of the thyristor is connected in parallel with a commutation valve submodule simulation module, and the right side is connected in parallel with an experimental discharge module.

[0047] Specifically, the converter valve submodule simulation module of this embodiment is provided with an adjustment inductor L SM and the adjusting capacitor C SM , and connect them in series, the first charging circuit and the capacitive device of this module, that is, the regulating capacitor C SM The two ends are connected in parallel. Preferably, the adjustment capacitor C SM A microfarad capacitor with a capacity range of 0.1μF-22000μF is selected, which is used to simulate the capacitor of the converter valve submodule; accordingly, the regulating inductor is a microhenry inductor with an inductance range of 1μH-820μH, which is used to adjust the loop oscillation frequency.

[0048] Furthermore, the experimental discharge module is provided with a discharge capacitor C1 and a charging capacitor C0, and the discharge capacitor C1 is connected with the charging capacitor C0 to form a branch circuit in the module, and a maintenance resistor R is connected in series on the circuit. Among them, the discharge capacitor C1 is a pico-farad capacitor with a capacity range of 10pF-1000pF; the charging capacitor C0 is also a micro-farad capacitor, which is used to maintain the voltage stability of the discharge capacitor C1 before closing; accordingly, the resistance range of the maintenance resistor R is 50kΩ-150kΩ, preferably 100kΩ, and the charging capacitor C0 discharges a small current to the discharge capacitor C1 through the maintenance resistor R to maintain the voltage across the discharge capacitor C1. The discharge capacitor C1 is connected in parallel with the thyristor T, and an isolating switch S is provided on the experimental circuit to control the experimental circuit switch. Preferably, the isolating switch S is an air isolating switch. When closing, the arc breakdown is tens of nanoseconds, which can simulate the rising edge of VFTO.

[0049] An electrical signal detection device is installed on the thyristor T; preferably, in this embodiment, the electrical signal detection device includes a differential probe and a Rogowski coil, and is externally connected to an oscilloscope. The differential probe is used to measure the voltage u T , Rogowski coil is used to measure the current i T The oscilloscope is used to display and record waveforms (including corresponding measurement parameters).

[0050] The discharge circuit is provided with a first discharge circuit ( Figure 1 left end) and the second discharge circuit ( Figure 1 The first discharge circuit is provided with a first discharge load and a first discharge switch S3. Preferably, the first discharge load is a regulating capacitor discharge resistor R E2 , whose resistance range is 1100Ω-2100Ω; the second discharge circuit is provided with a second discharge load and a second discharge switch S4, and preferably the second discharge load is a charging capacitor discharge resistor R E1 , and its resistance range is 1800Ω-2500Ω. Further, based on the above parameter selection, the resistance of the two resistors in this embodiment is the same, both 2000Ω. The first and second discharge switches are both selected as vacuum contactors. Therefore, the first discharge circuit and the regulating capacitor C are designed. SM In parallel, the second discharge loop is connected in parallel with the charging capacitor C0.

[0051] On the other hand, Figure 2 As shown, this embodiment further provides an experimental method based on the above-mentioned equivalent experimental device for semiconductor devices invaded by VFTO, and its main steps include:

[0052] S1, respectively charging the capacitive device and charging capacitor of the converter valve submodule analog module through the charging circuit, and disconnecting the charging circuit when the charging voltage reaches the target voltage;

[0053] S2, closing the experimental loop, and recording the power-on waveform of the semiconductor device to be tested through an electrical signal detection device;

[0054] S3. Disconnect the experimental circuit and close the discharge circuit to discharge the capacitive devices and charging capacitors of the converter valve submodule simulation module.

[0055] Example 1: Based on the above, the specific experimental operation is carried out, and the steps are as follows:

[0056] Disconnect all switches before the experiment;

[0057] S1, close the first charging switch S1 and the second charging switch S2; the first and second DC power supplies respectively charge the regulating capacitor C through two charging circuits SM and charging capacitor C0, and when the charging voltage reaches the target voltage, the first charging switch S1 and the second charging switch S2 are disconnected;

[0058] S2. Adjust the oscilloscope trigger, close the isolating switch S, and read the voltage u across the thyristor T through the oscilloscope of the electrical signal detection device. T and the current i flowing through the thyristor T Waveform, the experimental results are as follows Figure 3 As shown, the voltage rising edge dv / dt of the thyristor is 100kV / μs, the amplitude is 3.5pu, and the frequency is 10MHz, which meets the equivalent requirements of VFTO.

[0059] S3, after recording is completed, disconnect the isolation switch S, and close the first discharge switch S3 and the second discharge switch S4 to adjust the capacitor C SM and discharge the charging capacitor C0;

[0060] After the discharge is completed, disconnect all switches and the experiment ends.

[0061] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. An equivalent experimental device for semiconductor devices invaded by VFTO, characterized in that: Including charging circuit, experimental circuit and discharging circuit; The charging circuit is provided with a first charging circuit and a second charging circuit; the first charging circuit is provided with a first DC power supply and a first charging switch; the second charging circuit is provided with a second DC power supply and a second charging switch; The experimental circuit is provided with a semiconductor device to be tested, and an electrical signal detection device is installed at the semiconductor device to be tested; the semiconductor device to be tested is connected in parallel with a converter valve submodule simulation module; the semiconductor device to be tested is also connected in parallel with an experimental discharge module; The discharge circuit is provided with a first discharge circuit and a second discharge circuit; the first discharge circuit is provided with a first discharge load and a first discharge switch; the second discharge circuit is provided with a second discharge load and a second discharge switch; The capacitive devices of the converter valve submodule simulation module are respectively connected in parallel with the first charging circuit and the first discharging circuit; The experimental discharge module is provided with a discharge capacitor and a charging capacitor, the discharge capacitor is connected to the charging capacitor; the discharge capacitor is connected to the experimental circuit; the charging capacitor is connected in parallel with the second charging circuit and the second discharge circuit respectively.

2. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 1, characterized in that: The electrical signal detection device includes a differential probe and a Rogowski coil; The electrical signal detection device is externally connected to an oscilloscope.

3. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 1, characterized in that: The converter valve submodule simulation module is provided with an adjustment inductor and an adjustment capacitor; The regulating capacitor is connected in parallel with the first charging circuit and the first discharging circuit respectively.

4. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 3, characterized in that: The regulating inductor is a microhenry inductor; and the regulating capacitor is a microfarad capacitor.

5. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 4, characterized in that: The charging capacitor is connected in series with a holding resistor and forms a loop with the discharging capacitor; The discharge capacitor is connected in parallel with the semiconductor device to be tested; An isolating switch is provided on the experimental circuit.

6. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 5, characterized in that: The charging capacitor is a microfarad capacitor, and the discharging capacitor is a picofarad capacitor; The resistance value of the holding resistor ranges from 50 kΩ to 150 kΩ.

7. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 1, characterized in that: The first discharge load and the second discharge load are both resistors; The resistance range of the first discharge load is 1100Ω-2100Ω; The resistance of the second discharge load ranges from 1800Ω to 2500Ω.

8. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 1, characterized in that: The semiconductor device to be tested is an insulated gate bipolar transistor, a thyristor or a parallel diode.

9. The equivalent experimental device for semiconductor devices disturbed by VFTO according to claim 8, characterized in that: The experimental state of the semiconductor device to be tested is a blocking state.

10. An equivalent experimental method for semiconductor devices affected by VFTO, characterized in that the steps include: S1, respectively charging the capacitive device and the charging capacitor of the converter valve submodule analog module through the charging circuit, and disconnecting the charging circuit when the charging voltage reaches the target voltage; S2, closing the experimental loop, and recording the power-on waveform of the semiconductor device to be tested through an electrical signal detection device; S3, disconnecting the experimental loop and closing the discharge loop to discharge the capacitive components of the converter valve submodule simulation module and the charging capacitor.

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