Triangular step array based on large-aperture annular cavity VCSEL (Vertical Cavity Surface Emitting Laser) and preparation method
By adopting a triangular step array structure with large aperture annular cavity and isosceles right triangle arrangement design in the VCSEL array, the performance improvement problems of VCSEL array in high power and high beam quality are solved, and the power distribution and beam quality are achieved. At the same time, the manufacturing process is simplified and the cost is reduced.
Patent Information
- Application Number
- CN202411833284.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-13
- Publication Date
- 2025-01-14
AI Technical Summary
Existing VCSEL arrays have limitations on performance improvements in high power and high beam quality, including complex wiring, increased power consumption, high manufacturing complexity and poor material flexibility.
A triangular step array structure based on a large aperture annular cavity is adopted, and a Gaussian beam is formed through the design of a multi-annular cavity structure and isosceles right triangle arrangement, and the light field coupling effect is optimized by adjusting the unit spacing to achieve high power and high beam quality.
The performance optimization of VCSEL arrays is achieved, with uniform power distribution and improved beam quality, reducing thermal coupling density, improving device stability and heat dissipation efficiency, simplifying the manufacturing process and reducing costs.
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Figure CN119315386A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor laser technology, and more particularly to a triangular step array based on a large-aperture ring cavity VCSEL and a preparation method thereof. Background Art
[0002] Vertical Cavity Surface Emitting Laser (VCSEL) is a unique semiconductor laser with the advantages of small size, low threshold current, single longitudinal mode, fast modulation speed, low power consumption, and easy integration. It has become one of the most important semiconductor lasers on the market. With the development of large-aperture and two-dimensional arrays of VCSEL, VCSEL is increasingly used in the consumer market, including laser radar (LiDAR), distance sensing, 3D sensing, iris recognition, etc. These application areas require VCSEL to have high power, high photoelectric conversion efficiency and high beam quality. As an important component of optical communications, laser radar, biomedicine, and 3D sensing imaging, the light field coupling efficiency and beam quality of VCSEL arrays are crucial to the performance of the entire system.
[0003] However, there are some objective shortcomings in the prior art, which limit the further improvement of the performance of VCSEL arrays. For example, the independent addressing electrode structure proposed by patent CN113169518A is widely used in VCSEL arrays, but it has problems such as complex wiring and increased power consumption. This structure requires that each VCSEL unit has independent electrode control, which leads to complex wiring, increases the manufacturing cost and power consumption of the device, and limits the expansion of the array scale. Patent CN115173231A optimizes the array arrangement to improve the light field coupling problem of the VCSEL array to a certain extent, but the inconsistent unit size in this solution leads to inconsistent power distribution, increases the complexity of the manufacturing process, and requires precise control of the position and size of the auxiliary unit, which limits its promotion and application scope in practical applications. Patent CN117613666A etches a certain optical arrangement of micro-nanostructure pores on the surface, although it can achieve the regulation of the light field of the VCSEL array, but this technical solution requires a highly precise manufacturing process and requires a specific type of highly doped semiconductor transparent material, which limits the flexibility of selecting other potentially better materials according to specific application requirements, and increases production costs and manufacturing difficulties. Currently, the commonly used solutions are mostly focused on small-size, high-density integrated arrays, whose beams are non-Gaussian beams and the thermal characteristics of the devices are poor.
[0004] Therefore, how to realize a high-power and high-beam-quality vertical-cavity surface-emitting laser array is an urgent problem to be solved by those skilled in the art. Summary of the invention
[0005] In view of this, the present invention provides a triangular step array based on a large-aperture ring cavity VCSEL and a preparation method, which solves the technical problems existing in the above-mentioned prior art, provides an efficient, simple and low-cost VCSEL array light field control, and realizes effective optimization and improvement of the VCSEL array performance.
[0006] In order to achieve the above object, the present invention provides the following technical solutions: The triangular step array based on large-aperture ring-cavity VCSEL consists of, from top to bottom, a p-side electrode, a passivation layer, an ohmic contact layer, a p-DBR reflector, an oxidation restriction layer, an active region, an n-DBR reflector, a substrate and an n-side electrode. The unit device in the vertical cavity surface emitting laser array is a large-aperture unit, and a multi-ring cavity structure is adopted. Each unit device is expanded and arranged based on an isosceles right triangle to form a large-aperture triangular step array, and the array beam is a Gaussian beam.
[0007] Preferably, each unit device has the same size, forming a triangular step array large-aperture light-emitting structure for generating a Gaussian light field.
[0008] A method for preparing a triangular step array based on a large-aperture ring cavity VCSEL comprises the following steps: S1, using metal organic chemical vapor deposition MOCVD to sequentially grow an n-DBR reflector, an active region, an oxidation restriction layer, a p-DBR reflector and an ohmic contact layer on a substrate; S2. Preparation of array mesa: deep etching is performed by inductively coupled plasma etching (ICP). During the deep etching process, the array outer mesa and the annular groove are etched out simultaneously. The depth of the array outer mesa is consistent with the etching depth of the annular groove. The etching is stopped until the oxide restriction layer is exposed but not the active area. S3, wet oxidation: nitrogen carries water vapor into the high-temperature oxidation reaction chamber, and the water vapor reacts with the oxidation restriction layer to be oxidized in the reaction chamber, and the water vapor is used to perform lateral oxidation around the array table and the annular groove for photoelectric restriction; S4, passivation film deposition: using PECVD to grow a passivation layer on the ohmic contact layer of the array table, the sidewall and the bottom of the annular groove, and using photolithography and wet etching to remove the passivation layer on the surface of the light output hole prepared by photolithography after the passivation film deposition; S5, preparing a p-side electrode: preparing a first multilayer metal structure as a p-side electrode on the ohmic contact layer by sputtering and lift-off; S6. Fabricating an n-side electrode: thinning the substrate, and fabricating a second multilayer metal structure as an n-side electrode at the bottom of the substrate by sputtering.
[0009] Preferably, a rapid annealing process is performed after the n-side electrode is manufactured.
[0010] Preferably, in S1, the design wavelengths of the n-DBR reflector and the p-DBR reflector match the emission wavelength and the gain peak of the active region.
[0011] Preferably, the prepared array mesas are multiple multi-ring structures, and the etching is stopped until the oxidation restriction layer is exposed but not to the active area.
[0012] Preferably, the first multi-layer metal structure is formed by sequentially growing three layers of metal materials, namely titanium Ti, platinum Pt and gold Au, and serves as a p-side electrode.
[0013] Preferably, the second multi-layer metal structure is formed by sequentially growing four layers of metal materials, namely nickel Ni, gold-germanium alloy AuGe, chromium Cr and gold Au, and serves as an n-side electrode.
[0014] It can be seen from the above technical solutions that, compared with the prior art, the present invention discloses a triangular step array based on a large-aperture annular cavity VCSEL and a preparation method, which is efficient, simple, and low-cost, and achieves effective optimization and improvement of the performance of the VCSEL array. The specific beneficial effects are: 1. The array unit of the present invention adopts a large-aperture multi-ring cavity structure, which separates the injection current area into multiple areas to suppress the carrier aggregation effect area, so that the injection current intensity distribution of the large-aperture unit device is uniform, the luminous intensity is also uniform, and its far field is Gaussian distribution.
[0015] 2. The large-aperture multi-ring cavity structure unit devices in the array of the present invention are expanded and arranged based on isosceles right triangles to form a large-aperture triangular step array, and the optical field coupling effect between units in the VCSEL array is optimized by adjusting the unit spacing, so that the optical field of the array device also presents a Gaussian distribution, thereby realizing a high-power and high-beam quality VCSEL array.
[0016] 3. In the array design of the present invention, the unit devices have the same size, and by adjusting the unit spacing, not only the uniform distribution of power is achieved, and the overall uniformity of the light beam is improved; the heat dissipation performance of the device is further improved, making the heat distribution more uniform, the heat conduction path more optimized, and it is beneficial to reduce thermal resistance, thereby improving the heat dissipation efficiency and stability of the device.
[0017] 4. The present invention reduces the integration density, reduces the heat generation of the device and the thermal coupling density between the units, reduces the heat loss of the device, and improves the stability and reliability of the device through the large-aperture unit integrated array structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.
[0019] FIG. 1 (a) is a schematic diagram of the structure of a zero-order triangular step array based on a large-aperture ring cavity VCSEL provided by the present invention; FIG1( b ) is a schematic diagram of a first-level triangular step array structure based on a large-aperture ring cavity VCSEL provided by the present invention; FIG1( c ) is a schematic structural diagram of a two-stage triangular step array based on a large-aperture ring cavity VCSEL provided by the present invention; Figure 2 A schematic diagram of the structure of a large-aperture ring cavity VCSEL provided by the present invention; Figure 3 A schematic cross-sectional view of a zero-order triangular step array based on a large-aperture ring cavity VCSEL provided by the present invention; Figure 4 A schematic diagram of the large-aperture ring-cavity VCSEL epitaxial structure provided by the present invention; Figure 5 A schematic diagram of etching the mesa of the zero-level triangular step array provided by the present invention; Figure 6 A schematic diagram of zero-level triangular step array mesa oxidation provided by the present invention; Figure 7 A schematic diagram of the deposition of a zero-level triangular step array passivation layer provided by the present invention; Figure 8 A schematic diagram of a zero-level triangular step array p-side electrode provided by the present invention; Fig. 9 This is a schematic diagram of the zero-level triangular step array n-surface electrode provided by the present invention. DETAILED DESCRIPTION
[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0021] The purpose of the present invention is to provide a triangular step array based on a large-aperture ring cavity VCSEL and a preparation method thereof. The structure comprises, from top to bottom, a p-surface electrode 1, a passivation layer 2, an ohmic contact layer 3, a p-DBR reflector 4, an oxidation restriction layer 5, an active region 6, an n-DBR reflector 7, a substrate 8 and an n-surface electrode 9. The unit device in the vertical cavity surface emitting laser array adopts a large-aperture multi-ring cavity structure, which solves the problems of uneven carrier distribution and uneven beam intensity distribution of large-aperture unit devices in the VCSEL array; each unit device in the array is expanded and arranged based on an isosceles right triangle to form a large-aperture triangular step array, and the array far field presents a Gaussian distribution.
[0022] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.
[0023] Embodiment 1:
[0024] Embodiment 1 of the present invention discloses a triangular step array based on a large-aperture ring cavity VCSEL, which comprises, from top to bottom, a p-side electrode 1, a passivation layer 2, an ohmic contact layer 3, a p-DBR reflector 4, an oxidation restriction layer 5, an active region 6, an n-DBR reflector 7, a substrate 8 and an n-side electrode 9, wherein the unit device in the vertical cavity surface emitting laser array is a large-aperture unit, and a multi-ring cavity structure is adopted to improve the carrier distribution and generate a Gaussian beam. Each unit device is expanded and arranged based on an isosceles right triangle to form a large-aperture triangular step array, and the array far field presents a Gaussian distribution.
[0025] In a specific embodiment, the units of the VCSEL array are expanded based on the isosceles right triangle arrangement, and the size of each unit is consistent, forming a triangular step array large aperture light-emitting structure, and the far field is Gaussian distribution.
[0026] On the other hand, Embodiment 1 of the present invention provides a method for preparing a triangular step array based on a large aperture ring cavity VCSEL, comprising the following steps: S1, using metal organic chemical vapor deposition MOCVD to sequentially grow an n-DBR reflector 7, an active region 6, an oxidation restriction layer 5, a p-DBR reflector 4 and an ohmic contact layer 3 on a substrate 8; S2. Preparation of array mesas: deep etching is performed by inductively coupled plasma etching (ICP). During the deep etching process, the array outer mesas and the annular groove 10 are etched out simultaneously. The depth of the array outer mesas is consistent with the etching depth of the annular groove 10. The etching is stopped until the oxidation restriction layer 5 is exposed but the active area 6 is not etched. S3, wet oxidation: nitrogen carries water vapor into the high-temperature oxidation reaction chamber, and the water vapor reacts with the oxidation restriction layer 5 to be oxidized in the reaction chamber, and the water vapor is used to perform lateral oxidation from the periphery of the array table and the annular groove 10 for photoelectric restriction; S4, passivation film deposition: using PECVD to grow a passivation layer 2 on the ohmic contact layer 3, the sidewall and the bottom of the annular groove 10, and using photolithography and wet etching to remove the passivation layer 2 on the surface of the light output hole prepared by photolithography after the passivation film deposition; S5, manufacturing a p-side electrode: preparing a first multilayer metal structure as a p-side electrode 1 on the ohmic contact layer 3 by sputtering and lift-off; S6, making an n-side electrode: thinning the substrate 8, and preparing a second multi-layer metal structure as the n-side electrode 9 at the bottom of the substrate by sputtering.
[0027] In a specific embodiment, a rapid annealing process is performed after the n-side electrode 9 is manufactured.
[0028] In a specific embodiment, in S1 , the design wavelengths of the n-DBR reflector 7 and the p-DBR reflector 4 are matched with the emission wavelength and the gain peak of the active region.
[0029] In a specific embodiment, the prepared array mesas are multiple multi-ring structures, and the etching depth is etched to expose the oxidation restriction layer but does not stop at the active area.
[0030] In a specific embodiment, the first multilayer metal structure is formed by sequentially growing three layers of metal materials, namely titanium Ti, platinum Pt and gold Au, as a p-side electrode, wherein the thickness of the titanium Ti material is 40nm; the thickness of the platinum Pt material is 40nm; and the thickness of the gold Au material is 200nm.
[0031] In a specific embodiment, the second multilayer metal structure is formed by sequentially growing four layers of metal materials, namely nickel Ni, gold-germanium alloy AuGe, chromium Cr and gold Au, as an n-side electrode, wherein the thickness of the nickel Ni material is 5 nm; the thickness of the gold-germanium alloy AuGe material is 100 nm; the thickness of the chromium Cr material is 45 nm; and the thickness of the gold Au material is 300 nm.
[0032] More specifically, in order to make up for the deficiencies of the prior art, the present invention provides a large-aperture triangular step structure Gaussian VCSEL array through the above technical solution, as shown in Figure 1 (a)-Figure 1 (c). They are respectively a zero-level triangular step array structure based on a large-aperture ring cavity VCSEL, a first-level triangular step array structure based on a large-aperture ring cavity VCSEL, and a second-level triangular step array structure based on a large-aperture ring cavity VCSEL. At the same time, it is particularly emphasized that the array structure protected by the present invention is not limited to the zero-level, first-level, and second-level structures shown, and the third-level, fourth-level...extended therefrom are all within the scope of protection.
[0033] Specifically, by adopting Figure 2 The large-aperture annular cavity structure shown solves the problems of uneven carrier distribution and uneven beam intensity distribution in large-aperture light-emitting units in the VCSEL array. On this basis, the spacing and arrangement of each unit in the VCSEL array are optimized, and Gaussian beam modulation of each unit and the entire VCSEL array is achieved.
[0034] Compared with the traditional structure, the unit device in the vertical cavity surface emitting laser array (VCSEL) of the present invention is a large aperture unit, adopting a multi-ring cavity structure, and each unit device is expanded and arranged based on an isosceles right triangle to form a large aperture triangular step array, and the array far field is Gaussian distribution. The injection current area is separated into multiple areas to suppress the carrier aggregation effect, so that the injection current intensity distribution of the large aperture VCSEL is uniform, the luminous intensity is also uniform, and the far field is Gaussian distribution. The use of large aperture units helps to reduce the integration density of the device, reduce the heat generation of the device and the thermal coupling density between units. Although the groove 10 and the oxidation restriction layer 5 that play a separating role occupy a certain area of the current injection area, they help to dissipate heat from the device.
[0035] Adjusting the spacing and arrangement of each unit in the VCSEL array, expanding the isosceles right triangle as the basic unit of the array to form a large-aperture triangular step array, helps reduce the light field crosstalk between adjacent units and improves the stability and quality of the output beam; the size of each unit in the array is consistent to achieve uniform power distribution, avoid local overheating, and improve the overall uniformity of the beam. It can also further improve the heat dissipation performance of the device, making the heat distribution more uniform, the heat conduction path more optimized, and the thermal resistance lower, thereby improving the heat dissipation efficiency and stability of the device.
[0036] The light field of the triangular step array structure based on the large-aperture ring cavity VCSEL provided by the present invention presents a Gaussian far-field distribution. This optimization can improve the beam quality of the high-power VCSEL array, and help reduce beam scattering and improve coupling efficiency, thereby achieving better optical performance.
[0037] The preparation method of the present invention does not require additional process preparation. The light field can be optimized by adjusting the unit arrangement and spacing during the design of the VCSEL array, which greatly reduces the preparation cost and manufacturing complexity.
[0038] Embodiment 2:
[0039] Embodiment 2 of the present invention provides a triangular step array based on a large aperture ring cavity VCSEL, such as Figure 3 As shown, from top to bottom are p-side electrode 1, passivation layer 2, ohmic contact layer 3, p-DBR reflector 4, oxidation restriction layer 5, active region 6, n-DBR reflector 7, substrate 8, and n-side electrode 9.
[0040] The units of the vertical cavity surface emitting laser array (VCSEL) in this embodiment are based on an isosceles right triangle arrangement and can be expanded to form a triangular stepped array. Each unit has the same size. This array is a large-aperture light-emitting structure and the light field has a Gaussian distribution.
[0041] On the other hand, Embodiment 2 of the present invention provides a method for preparing a triangular step array based on a large aperture ring cavity VCSEL, comprising the following steps: See also Figure 4 As shown, S1, n-DBR 7, active region 6, oxidation restriction layer 5, p-DBR 4, and ohmic contact layer 3 are sequentially grown on n-type GaAs substrate 8 by using MOCVD technology.
[0042] Specifically, the design wavelength of the DBR reflector matches the emission wavelength and the gain peak of the active region.
[0043] More specifically, a DBR reflector is made of alternating high and low refractive index semiconductor materials with an optical thickness of one quarter wavelength. This structure uses the interference principle of light. By alternating high and low refractive indices, light of a specific wavelength is reflected and interfered multiple times inside the reflector, thereby enhancing or weakening the reflection effect of the light. Here, optical thickness is defined as the product of the refractive index of the material and the physical thickness, while a quarter wavelength refers to a quarter of the optical path length of the wavelength in the material.
[0044] Secondly, the design of the DBR reflector needs to match the emission wavelength. This is because the reflection characteristics of the DBR reflector are optimized for a specific wavelength of light. If the emission wavelength does not match the design wavelength of the DBR, the reflective efficiency of the reflector will be reduced, and it may not even be able to effectively reflect the target wavelength of light.
[0045] Finally, the design wavelength of the DBR reflector should also match the gain peak of the active region. In a semiconductor laser, the active region is the main area that generates laser light, and the wavelength corresponding to its gain peak is the main operating wavelength of the laser. If the design wavelength of the DBR reflector matches the gain peak of the active region, the reflector can effectively reflect the light of a specific wavelength generated by the active region, thereby improving the output efficiency and stability of the laser.
[0046] The DBR reflector achieves effective reflection of light of a specific wavelength through its special structural design, matching the emission wavelength and the peak gain of the active region. This type of reflector has broad application prospects in the fields of semiconductor lasers, optical fiber communications, etc.
[0047] See also Figure 5 As shown, S2, array mesa preparation: deep etching is performed using inductively coupled plasma etching technology (ICP) to etch out the array mesa, which is a multi-ring structure. The etching depth is such that the oxide restriction layer 5 is not etched to the active area 6, so as to fully expose the oxide restriction layer 5, which is conducive to forming oxide holes and achieving circular beam output. The specific etching depth is appropriately adjusted according to different epitaxial structures.
[0048] See also Figure 6 As shown, S3, wet oxidation: nitrogen carries water vapor into the high-temperature oxidation reaction chamber. The water vapor undergoes oxidation reaction with the 20-30nm thick high-aluminum component Alx Ga1-x As oxidation restriction layer 5 in the reaction chamber that needs to be oxidized, and the value of x ranges from 0.95 to 1. The water vapor is used to perform lateral oxidation from the periphery of the table and the annular groove 10 to generate aluminum oxide for photoelectric restriction.
[0049] See also Figure 7 As shown, S4, passivation film deposition: PECVD is used to grow a passivation layer 2, i.e., a p-side insulating layer, on the prepared ohmic contact layer 3 of the mesa, the sidewall and the bottom of the annular groove 10, and the passivation layer 2 on the surface of the light output hole is removed by photolithography technology and wet etching.
[0050] See also Figure 8 As shown, S5, p-side electrode: a Ti / Pt / Au layer is prepared on the ohmic contact layer 3 by sputtering and lift-off process as a p-side electrode. The three materials are grown in sequence, and the thicknesses are 40nm / 40nm / 200nm respectively.
[0051] See also Fig. 9 As shown, S6, n-side electrode: the substrate 8 is thinned to about 150 μm, and Ni / Cr / AuGe / Au is prepared as the n-side electrode at the bottom of the substrate 8 by sputtering, with thicknesses of 5 nm / 45 nm / 100 nm / 300 nm respectively. After the n-side electrode is prepared, a rapid annealing process is immediately performed.
[0052] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.
[0053] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A triangular step array based on a large aperture ring cavity VCSEL, characterized in that: From top to bottom, they are the p-side electrode, passivation layer, ohmic contact layer, p-DBR reflector, oxidation restriction layer, active area, n-DBR reflector, substrate and n-side electrode. Among them, the unit device in the vertical cavity surface emitting laser array is a large-aperture unit, adopting a multi-ring cavity structure. Each unit device is expanded and arranged based on an isosceles right triangle to form a large-aperture triangular stepped array, and the array beam is a Gaussian beam.
2. The triangular step array based on large aperture ring cavity VCSEL according to claim 1, characterized in that: The size of each unit device is consistent, forming a triangular step array large-aperture light-emitting structure, whose far field presents a Gaussian distribution.
3. A method for preparing a triangular step array based on a large aperture ring cavity VCSEL, characterized in that: The following steps are involved: S1, using metal organic chemical vapor deposition MOCVD to sequentially grow an n-DBR reflector, an active region, an oxidation restriction layer, a p-DBR reflector and an ohmic contact layer on a substrate; S2. Preparation of array mesa: deep etching is performed by inductively coupled plasma etching (ICP). During the deep etching process, the array outer mesa and the annular groove are etched out simultaneously. The depth of the array outer mesa is consistent with the etching depth of the annular groove. The etching is stopped until the oxide restriction layer is exposed but not the active area. S3, wet oxidation: nitrogen carries water vapor into the high-temperature oxidation reaction chamber, and the water vapor reacts with the oxidation restriction layer to be oxidized in the reaction chamber, and the water vapor is used to perform lateral oxidation around the array table and the annular groove for photoelectric restriction; S4, passivation film deposition: using PECVD to grow a passivation layer on the ohmic contact layer of the array table, the sidewall and the bottom of the annular groove, and using photolithography and wet etching to remove the passivation layer on the surface of the light output hole prepared by photolithography after the passivation film deposition; S5, preparing a p-side electrode: preparing a first multilayer metal structure as a p-side electrode on the ohmic contact layer by sputtering and lift-off; S6. Fabricating an n-side electrode: thinning the substrate, and fabricating a second multilayer metal structure as an n-side electrode at the bottom of the substrate by sputtering.
4. The method for preparing a triangular step array based on a large aperture ring cavity VCSEL according to claim 3, characterized in that: After the n-side electrode is manufactured, a rapid annealing process is performed.
5. The method for preparing a triangular step array based on a large aperture ring cavity VCSEL according to claim 3, characterized in that: In S1, the design wavelengths of the n-DBR reflector and the p-DBR reflector are matched with the emission wavelength and the gain peak of the active region.
6. The method for preparing a triangular step array based on a large aperture ring cavity VCSEL according to claim 3, characterized in that: The prepared array mesas are multiple multi-ring structures, which are etched until the oxidation restriction layer is exposed but not to the active area.
7. The method for preparing a triangular step array based on a large aperture ring cavity VCSEL according to claim 3, characterized in that: The first multi-layer metal structure is formed by sequentially growing three layers of metal materials, namely titanium Ti, platinum Pt and gold Au, and serves as a p-side electrode.
8. The method for preparing a triangular step array based on a large aperture ring cavity VCSEL according to claim 3, characterized in that: The second multi-layer metal structure is formed by sequentially growing four layers of metal materials, namely nickel Ni, gold-germanium alloy AuGe, chromium Cr and gold Au, and serves as an n-side electrode.
Citation Information
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