Miniaturized general eight-channel digital transceiver module

Abstract

According to the miniaturized general eight-channel digital transceiver module provided by the invention, a high-integration broadband digital transceiver ASIC chip, a high-integration ultra-wideband frequency-mixing multifunctional nest plate and a high-density board distribution technology are adopted, and the requirements of a universalized, miniaturized, low-power-consumption and low-cost phased-array antenna system are met. A frequency conversion channel is formed by using a high-integration ultra-wideband frequency-mixing multifunctional nest plate and matching radio frequency and intermediate frequency out-of-chip filter banks. A typical drive packaging circuit unit is adopted to drive a 0dBm input signal to 17dBm, a power division link is packaged by a universal LTCC power divider, and it is ensured that the local oscillator power is more than 2dBm after power division is applied to different frequency bands. A broadband digital transmit-receive ASIC chip is used to form a complete digital transmit-receive module. The printed board of the digital transceiver module is a multilayer microwave printed board or an FR4 board, a high-density board distribution technology is adopted, signal integrity simulation and power integrity simulation are combined, and the miniaturization design of the module is further realized.

Description

Technical Field

[0001] The present invention belongs to the field of antenna technology, and specifically relates to a miniaturized universal eight-channel digital transceiver module. Background Art

[0002] The digital transceiver module is an important component of the antenna system and various receivers. It is a key module for frequency conversion, signal acquisition, excitation generation, data preprocessing and transmission. When the receiver is working, the module mainly completes the functions of excitation signal generation, data acquisition, data preprocessing, data transmission, filtering, amplification, up and down frequency conversion and frequency conversion. The digital transceiver module includes circuit units such as frequency conversion link, analog-to-digital converter, digital-to-analog converter, digital logic chip, local oscillator network, etc.

[0003] Traditional digital transceiver modules use customized frequency conversion chips. Due to the different working frequency bands and working bandwidths of various projects, different projects use different types of frequency conversion chips and filter groups. The corresponding packaging and control signal requirements of the chips are different, resulting in different printed circuit boards for different projects, which cannot meet the universal design requirements. At the same time, traditional digital transceiver modules use programmable logic chips as digital logic main control chips, with discrete analog-to-digital converters and digital-to-analog converters. The integration is not high and cannot meet the design requirements of miniaturization, low power consumption and low cost of antenna systems. Summary of the invention

[0004] In order to overcome the shortcomings of the prior art, the present invention proposes a miniaturized universal eight-channel digital transceiver module, which adopts a highly integrated broadband digital transceiver ASIC chip, a highly integrated ultra-wideband mixing multifunctional chip set, and a high-density board layout technology to meet the requirements of universal, miniaturized, low-power, and low-cost phased array antenna systems.

[0005] The present invention uses a highly integrated ultra-wideband mixing multifunctional chip set, matched with a radio frequency and an intermediate frequency off-chip filter group, to form a frequency conversion channel.

[0006] The local oscillator driver uses a typical driver package circuit unit to drive the 0dBm input signal to 17dBm, and the power division link uses a universal LTCC power divider package to ensure that the local oscillator power after power division in different frequency bands is above 2dBm.

[0007] The present invention uses a broadband digital transceiver ASIC chip, which internally integrates 8-way high sampling rate digital-to-analog converters, 8-way high sampling rate analog-to-digital converters, a configurable digital down-conversion logic unit, an instruction parsing logic unit, a data unpacking / packing module, a high-speed serial interface, a phase-locked loop module, and is matched with an external memory module, a photoelectric conversion module, a power supply module, and a clock drive distribution link to form a complete digital transceiver module.

[0008] The digital transceiver module printed circuit board uses a multi-layer microwave printed circuit board or FR4 board, adopts high-density layout technology, and combines signal integrity simulation and power integrity simulation to further realize the miniaturization design of the module.

[0009] The beneficial effects of the present invention are

[0010] 1. The present invention adopts highly integrated broadband digital transceiver ASIC chip, highly integrated ultra-wideband mixing multifunctional chip set, and high-density board layout technology. The size of the eight-channel digital transceiver module (including mixing link) is only (200mm±

[0011] 0.5mm)×(100mm±0.5mm)×(13.5mm±1mm), which is significantly smaller than the conventional broadband eight-channel digital transceiver circuit solution.

[0012] 2. The present invention adopts a highly integrated ultra-wideband mixing multifunctional chip set and a flexible and replaceable off-chip filter group, supports multiple intermediate frequencies, and supports multiple frequency bands such as L, S, C, X, and Ku, thereby realizing the universalization of digital transceiver modules.

[0013] 3. The present invention adopts a highly integrated broadband digital transceiver ASIC chip to achieve low power consumption and low cost application of broadband digital transceiver.

[0014] 4. The present invention integrates the local oscillator and clock drive, which reduces the power demand for the power division network and improves reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is the frequency conversion channel link block diagram of a miniaturized universal eight-channel digital transceiver module.

[0016] Figure 2 This is the principle block diagram of the local oscillator driven power divider circuit.

[0017] Figure 3 This is the circuit block diagram of the digital transceiver module.

[0018] Figure 4 This is the assembly diagram of a miniaturized universal eight-channel digital transceiver module. DETAILED DESCRIPTION

[0019] The technical solutions in the embodiments of the present invention are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] 1. Frequency conversion link design

[0021] Frequency conversion link Figure 1As shown, the frequency conversion chip uses an ultra-wideband mixing multifunctional set of chips, supporting multiple frequency bands of L, S, C, X, and Ku. It is internally divided into a low-noise amplifier / driver module, a first-stage frequency conversion module, and a second-stage frequency conversion module; an external RF filter can be connected between the low-noise amplifier / driver module and the first-stage frequency conversion module, as shown in the figure with the RFP_OUT and RFP_IN pins; an external intermediate frequency filter can be connected between the first-stage frequency conversion module and the second-stage frequency conversion module, as shown in the figure with the IF1_OUT and IF1_IN pins. The first stage of the full link is the RF filter group, which can flexibly select filters according to the actual frequency band used in the project. The filter group includes LTCC and MEMS filter packages, supports L, S, C, X, and Ku full-band filtering, and can be configured as a pass-through mode to reduce the attenuation of the link input end and improve the noise coefficient, link gain, and output power. The second stage of the full link is an ultra-wideband mixer multifunctional chip set. Its external RF filter is configured in the same way as the first stage filter of the full link, which can further suppress out-of-band interference and harmonics. The external intermediate frequency filter packaging configuration is the same as the first stage filter configuration of the full link. The actual filter device can be flexibly selected according to the intermediate frequency configuration of the project. The third stage of the full link is the intermediate frequency filter group. Due to the low intermediate frequency, the main packaging form of this filter group is LTCC filter and surface acoustic wave filter (SAW). The corresponding device can be flexibly selected according to the intermediate frequency and bandwidth of the project. The fourth stage of the full link is the matching link of the analog-to-digital converter (ADC), the digital-to-analog converter (DAC), and the ADC and DAC chip IP units inside the broadband digital transceiver ASIC chip.

[0022] 2. Design of local oscillator drive power divider circuit

[0023] The local oscillator drives the power divider circuit as Figure 2 As shown. In order to reduce the power demand of the power division network, the first stage is the local oscillator driver amplifier. The ultra-wideband mixer multifunctional set contains a frequency multiplication circuit (four times). The actual one and two local oscillator frequencies only need to input low-frequency signals (four-way frequency). The driver amplifier adopts a universal PQ4 package. There are many optional driver amplifier chips on the market that cover the four-way frequency of the local oscillator signal in sections. The amplifier chip can be flexibly selected according to the frequency band and intermediate frequency configuration of the actual project. The second stage is the power divider network, which is built using the LTCC universal two-way power divider package. Similarly, for this package, there are many optional two-way power dividers on the market that cover the four-way frequency of the local oscillator signal in sections. The power divider device can be flexibly selected according to the frequency band and intermediate frequency configuration of the actual project. The local oscillator driver uses a typical driver package circuit unit to drive the 0dBm input signal to 17dBm. The power division link uses a universal LTCC power divider package to ensure that the local oscillator power after power division in different frequency bands is above 2dBm.

[0024] 3. Digital transceiver module design

[0025] Circuit diagram Figure 3 As shown. The digital transceiver module can convert the single power supply input voltage into the multi-level voltage required by each internal device, and filter each level of power supply. In the transmitting working state, the digital board clock management circuit unit receives the clock signal from the array and generates the conversion clock and synchronization clock in the board. The digital board directly generates the RF excitation signal at the DAC according to the control signal sent by the control unit and the received code element signal, and sends it to the RF front end after filtering and amplification. In the receiving working state, the digital board receives the echo signal sent by the receiving front end, and after amplification, attenuation and filtering, the ADC directly quantizes the RF signal and sends it to the ASIC for preprocessing. Finally, the digital I / Q signal is packaged and converted into an optical signal and output to the signal processing unit. This broadband digital transceiver ASIC chip integrates 8-channel high sampling rate digital-to-analog converters, 8-channel high sampling rate analog-to-digital converters, configurable digital down-conversion logic unit (DDC), instruction parsing logic unit (decoding), data unpacking / packing module, high-speed serial interface, phase-locked loop module (PLL), and is equipped with an external memory module, an optoelectronic conversion module, a power module, and a clock drive distribution link to form a complete digital transceiver module. Due to the high integration and specialized design advantages of broadband digital transceiver ASIC chips, chip IPs such as ADC, DAC, ASIC logic units, etc. can share the on-chip clock distribution link and on-chip power supply, saving chip area and power consumption. At the same time, the interface lines between ADC, DAC and ASIC logic units are completed within the chip, with short routing and low attenuation, further saving area and power consumption.

[0026] 4. PCB and assembly process

[0027] The printed circuit board uses a 24-layer microwave printed circuit board or FR4 board. If the project frequency is high, you can choose a microwave board. If it is a low frequency band within S, you can choose FR4 board. FR4 board has a lower cost and further saves costs. The assembly diagram of the digital transceiver module is as follows Figure 4 The size of the eight-channel digital transceiver module (including the mixing link) is only (200mm±0.5mm)×(100mm±0.5mm)×(13.5mm±1mm), which is significantly smaller than the conventional broadband eight-channel digital transceiver circuit solution.

[0028] The present invention is not limited to the above specific implementations, and the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made to the above implementations based on the technical essence of the present invention shall be included in the protection scope of the present invention.

Claims

1. A miniaturized universal eight-channel digital transceiver module, characterized in that: It includes frequency conversion link, local oscillator driving power division circuit and broadband digital transceiver ASIC chip; The frequency conversion link supports multiple frequency bands including L, S, C, X, and Ku, and includes a low noise amplifier / driver module, a first-stage frequency conversion module, and a second-stage frequency conversion module; an external RF filter is connected between the low noise amplifier / driver module and the first-stage frequency conversion module; an external intermediate frequency filter is connected between the first-stage frequency conversion module and the second-stage frequency conversion module; the first stage of the frequency conversion link is an RF filter group, and the RF filter group includes LTCC and MEMS filter packages; The second stage is an ultra-wideband mixer multifunctional chip set; the third stage is an intermediate frequency filter group, which is packaged in the form of LTCC filter and SAW filter; the fourth stage is an analog-to-digital converter, a digital-to-analog converter matching link, and the ADC and DAC chip IP units inside the broadband digital transceiver ASIC chip; The first stage of the local oscillator driving power division circuit is a local oscillator driving amplifier, and the local oscillator driving amplifier adopts a four-frequency driving amplifier chip in a PQ4 package; The second level is the power divider network, which is built using LTCC two-way power divider packaging; The digital transceiver module can convert the single power supply input voltage into the multi-level voltage required by each internal device, and filter each level of power supply; in the transmitting working state, the clock distribution unit of the broadband digital transceiver ASIC chip receives the clock signal from the array and generates the conversion clock and the synchronization clock; according to the control signal sent by the control unit and the received code element signal, the DAC directly generates the RF excitation signal, which is sent to the RF front end after filtering and amplification; in the receiving working state, the broadband digital transceiver ASIC chip receives the echo signal sent by the receiving front end, and after amplification, attenuation and filtering, the ADC directly quantizes the RF signal and sends it to the ASIC logic unit for preprocessing, and finally the digital I / Q signal is packaged and converted into an optical signal, which is output to the signal processing unit.

2. A miniaturized universal eight-channel digital transceiver module according to claim 1, characterized in that: The broadband digital transceiver ASIC chip internally integrates 8-way high sampling rate DAC, 8-way high sampling rate ADC, configurable digital down-conversion logic unit DDC, instruction parsing logic unit, data unpacking / packing module, high-speed serial interface, phase-locked loop module PLL, and is externally equipped with a memory module, a photoelectric conversion module, a power module, and a clock drive distribution link; the ADC, DAC, and instruction parsing logic unit share the on-chip clock distribution link and on-chip power supply.

3. A miniaturized universal eight-channel digital transceiver module according to claim 2, characterized in that: The digital transceiver module printed board is printed using a multi-layer microwave printed board or a FR4 board.

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