Double-battery-pack parallel circuit suitable for standard charging interface and electric vehicle

Abstract

The embodiment of the invention relates to the technical field of integrated circuits, and discloses a double-battery-pack parallel circuit suitable for a standard charging interface and an electric vehicle. The circuit comprises a master battery pack and a slave battery pack, the external interfaces are respectively provided with two power pins, four communication pins, a single-wire serial port, an address allocation and access detection function multiplexing interface, a 485-A and single-wire serial port multiplexing interface and a 485-B interface; the two power pins comprise a power positive electrode and a power negative electrode; the four communication pins comprise a single-wire serial port, an address allocation and access detection function multiplexing interface and a 485-A and single-wire serial port multiplexing interface; when connected with a standard charger, the power supply anode interface and the power supply cathode interface of the standard charger are respectively connected with the power supply anode and the power supply cathode; the interlocking interfaces are respectively connected with the cathode of the power supply; a 485-A interface of the standard charger is respectively connected with the 485-A and single-wire serial port multiplexing interface; the 485-B interface of the standard charger is respectively connected with the 485-B interface; a reserved interface of the standard charger is suspended. By adopting the scheme, the compatibility between the lithium battery double-pack parallel connection and the standard charging interface can be realized by defining the interface pins.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a dual battery pack parallel circuit and an electric vehicle suitable for a standard charging interface. Background Art

[0002] In recent years, with the rapid development of electric vehicle technology, new standards for the safety of electric vehicle chargers have officially come into effect. This new standard aims to solve the waste of resources and potential safety risks caused by the lack of unified charging interfaces, and promote the standardization of the charger market. The new national standard has designed two plug types based on the different voltage algorithms of lithium-ion and lead-acid batteries: the lead-acid battery plug adopts a 2+2 (two power pins and two communication pins) structure, while the lithium-ion battery plug adopts a 2+4 (two power pins and four communication pins) structure. At present, the products of lithium battery double packs in parallel on the market are often relatively expensive, and are not compatible with the requirements of the 2+4 charging port required by the new national standard. More PIN pins are needed to meet the requirements, and the communication method with the whole vehicle is relatively simple, and the compatibility is not strong. However, the parallel connection of lithium battery double packs is of great help to the performance of electric vehicles. Therefore, how to solve the compatibility problem of lithium battery double packs in parallel is a pain point in the industry. Summary of the invention

[0003] One purpose of the present application is to provide a dual battery pack parallel circuit and an electric vehicle suitable for a standard charging interface, at least to solve the problem of incompatibility between dual lithium battery packs in parallel and a new standard charging interface. The circuit described in the present application includes: a main battery pack and a slave battery pack; the main battery pack and the slave battery pack are respectively provided with the following external interfaces: two power pins: a positive power supply electrode and a negative power supply electrode, four communication pins: a single-line serial port, an address allocation and access detection function multiplexing interface, a 485-A and a single-line serial port multiplexing interface, and a 485-B interface; when connected to a standard charger, the positive power supply interface and the negative power supply interface of the standard charger are respectively connected to the positive power supply electrode and the negative power supply electrode of the main battery pack and the slave battery pack; the interlocking interface of the standard charger is respectively connected to the negative power supply electrode of the main battery pack and the slave battery pack; the 485-A interface of the standard charger is respectively connected to the 485-A and single-line serial port multiplexing interface of the main battery pack and the slave battery pack; the 485-B interface of the standard charger is respectively connected to the 485-B interface of the main battery pack and the slave battery pack; the reserved interface of the standard charger is left floating. By adopting this solution, the compatibility of the lithium battery dual packs in parallel with the standard charging interface can be achieved by defining the interface pins.

[0004] To achieve the above objectives, some embodiments of the present application provide the following aspects:

[0005] In a first aspect, some embodiments of the present application further provide a dual battery pack parallel circuit applicable to a standard charging interface, the circuit comprising:

[0006] A master battery pack and a slave battery pack;

[0007] The main battery pack and the slave battery pack are respectively provided with the following external interfaces: two power pins: positive power supply and negative power supply, four communication pins: single-line serial port, address allocation and access detection function multiplexing interface, 485-A and single-line serial port multiplexing interface, and 485-B interface;

[0008] When connected to a standard charger, the positive power interface and the negative power interface of the standard charger are connected to the positive power electrode and the negative power electrode of the master battery pack and the slave battery pack respectively;

[0009] The interlocking interface of the standard charger is connected to the negative poles of the power supply of the master battery pack and the slave battery pack respectively;

[0010] The 485-A interface of the standard charger is respectively connected to the 485-A and single-line serial port multiplexing interface of the master battery pack and the slave battery pack;

[0011] The 485-B interface of the standard charger is connected to the 485-B interfaces of the master battery pack and the slave battery pack respectively;

[0012] The reserved interface of the standard charger is left unconnected.

[0013] Further, the circuit also includes an electric vehicle central control;

[0014] The electric vehicle central control comprises:

[0015] 485-A and single-line serial port multiplexing pins are respectively connected to the 485-A and single-line serial port multiplexing interfaces of the master battery pack and the slave battery pack;

[0016] 485-B communication pins, connected to the 485-B interfaces of the master battery pack and the slave battery pack respectively;

[0017] The master battery pack and the slave battery pack use a single-wire serial port communication mode by default; when it is detected that the central control of the electric vehicle uses 485 communication, it switches to 485 communication.

[0018] Furthermore, the electric vehicle central control further comprises: a first detection pin and a second detection pin;

[0019] A second resistor is provided between the first detection pin and the second detection pin, the first detection pin is connected to the positive power poles of the master battery pack and the slave battery pack, and the second detection pin is connected to the address allocation and access detection function multiplexing interface of the slave battery pack;

[0020] The multiplexing interface for address allocation and access detection function of the slave battery pack is connected to a reference voltage via a first resistor;

[0021] The first resistor and the second resistor have the same resistance value, and whether the slave battery pack is connected to the electric vehicle is detected according to the voltage division value of the second resistor.

[0022] Furthermore, the electric vehicle central control further includes: a first detection pin and a third detection pin;

[0023] A third resistor is provided between the first detection pin and the third detection pin, the first detection pin is connected to the positive power poles of the master battery pack and the slave battery pack, and the third detection pin is connected to the address allocation and access detection function multiplexing interface of the master battery pack;

[0024] The address allocation and access detection function multiplexing interface of the main battery pack is connected to the reference voltage through a first resistor;

[0025] The resistance value of the first resistor is twice the resistance value of the third resistor, and whether the main battery pack is connected to the electric vehicle is detected according to the voltage division value of the third resistor.

[0026] Furthermore, the circuit also includes a controller;

[0027] The controller is connected to the electric vehicle central control via a 485 pin to send status information of the dual battery pack to the controller.

[0028] Furthermore, the master battery pack and the slave battery pack are connected via a single-line serial port.

[0029] In a second aspect, some embodiments of the present application further provide an electric vehicle, comprising a dual battery pack parallel circuit suitable for a standard charging interface as described above.

[0030] Compared with the related art, the solution provided in the embodiment of the present application, the circuit includes: a main battery pack and a slave battery pack; the main battery pack and the slave battery pack are respectively provided with the following external interfaces: two power pins: a positive power supply electrode and a negative power supply electrode, four communication pins: a single-line serial port, an address allocation and access detection function multiplexing interface, a 485-A and a single-line serial port multiplexing interface, and a 485-B interface; when connected to a standard charger, the positive power supply interface and the negative power supply interface of the standard charger are respectively connected to the positive power supply electrode and the negative power supply electrode of the main battery pack and the slave battery pack; the interlocking interface of the standard charger is respectively connected to the negative power supply electrode of the main battery pack and the slave battery pack; the 485-A interface of the standard charger is respectively connected to the 485-A and single-line serial port multiplexing interface of the main battery pack and the slave battery pack; the 485-B interface of the standard charger is respectively connected to the 485-B interface of the main battery pack and the slave battery pack; the reserved interface of the standard charger is left floating. By adopting this solution, the compatibility of the lithium battery dual packs in parallel with the standard charging interface can be achieved by defining the interface pins. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0032] Figure 1 A schematic diagram of a dual battery pack parallel circuit suitable for a standard charging interface provided according to some embodiments of the present application;

[0033] Figure 2 A schematic diagram of an interface function of a standard charging interface provided according to some embodiments of the present application;

[0034] Figure 3 An exemplary structural diagram of the electronic device is disclosed. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0036] First embodiment

[0037] The first embodiment of the present application relates to a dual battery pack parallel circuit suitable for a standard charging interface. Figure 1 As shown, the circuit may include:

[0038] A master battery pack and a slave battery pack;

[0039] The main battery pack and the slave battery pack are respectively provided with the following external interfaces: two power pins: positive power supply and negative power supply, four communication pins: single-line serial port, address allocation and access detection function multiplexing interface, 485-A and single-line serial port multiplexing interface, and 485-B interface;

[0040] When connected to a standard charger, the positive power interface and the negative power interface of the standard charger are connected to the positive power electrode and the negative power electrode of the master battery pack and the slave battery pack respectively;

[0041] The interlocking interface of the standard charger is connected to the negative poles of the power supply of the master battery pack and the slave battery pack respectively;

[0042] The 485-A interface of the standard charger is respectively connected to the 485-A and single-line serial port multiplexing interface of the master battery pack and the slave battery pack;

[0043] The 485-B interface of the standard charger is connected to the 485-B interfaces of the master battery pack and the slave battery pack respectively;

[0044] The reserved interface of the standard charger is left unconnected.

[0045] The master battery pack and the slave battery may be two parallel-connected lithium battery packs, and the internal structures and external interfaces of the two battery packs may be the same.

[0046] The positive pole of the power supply is mainly used to connect the positive output line of the battery pack to provide power for external devices. It usually has a high current carrying capacity to ensure stable output of power. Safety and reliability are taken into consideration in the design to prevent short circuits, overcurrent and other situations from causing damage to the battery pack and external devices.

[0047] The negative pole of the power supply is connected to the negative output line of the battery pack, and together with the positive serial port of the power supply, it forms a complete power circuit. It also needs to have good conductivity and safety. It usually works with the positive serial port to ensure the stable flow of current and the normal operation of the equipment.

[0048] Single-wire serial port: The master battery pack and the slave battery pack use a single-wire serial port for internal communication. Compared with other serial ports, the single-wire serial port has a simpler structure and only requires one signal line to achieve data transmission. It may be used in some specific application scenarios, such as transmitting a small amount of status information or simple control instructions.

[0049] The multiplexing interface of address allocation and access detection function is mainly responsible for allocating the physical address of the battery pack and detecting access. In terms of address allocation, the battery pack can determine its own physical address based on different voltage signals. In terms of access detection, the battery pack can use this interface to determine whether it is connected to the vehicle. It has high accuracy and reliability, and can accurately perform address allocation and access detection. At the same time, it may communicate with other control systems to realize intelligent battery management.

[0050] 485-A and single-line serial port multiplexing interface, the serial port can switch between 485 logic communication and single-line serial port communication. 485 logic communication is usually used in long-distance, multi-point communication scenarios, and can realize data exchange between multiple devices. Single-line serial port communication is suitable for some simple, low-cost application scenarios. It is flexible and can choose the appropriate communication method according to different application requirements. During the switching process, it is necessary to ensure the stability and reliability of communication.

[0051] The 485-B interface is mainly used for 485 logical communication and data exchange with other devices that support 485 communication. It has high anti-interference ability and long communication distance, and can achieve reliable data transmission. It is usually used in industrial automation, intelligent instruments and other fields.

[0052] Figure 2 Schematic diagram of the interface function of a standard charging interface provided according to some embodiments of the present application. Figure 2 As shown, the standard charger includes: a positive power interface, a negative power interface, an interlock interface, a 485-A interface, a 485-B interface, and a reserved interface.

[0053] Among them, the positive power interface and the negative power interface are respectively connected to the positive power serial port and the negative power serial port of the main battery pack and the slave battery pack; the interlocking interface of the standard charger is respectively connected to the negative power serial port of the main battery pack and the slave battery pack; the 485-A interface of the standard charger is respectively connected to the 485-A and single-line serial port multiplexing interface of the main battery pack and the slave battery pack; the 485-B interface of the standard charger is respectively connected to the 485-B interface of the main battery pack and the slave battery pack; and the reserved interface of the standard charger is left floating.

[0054] The solution provided by the embodiment of the present application includes: a main battery pack and a slave battery pack through the circuit; the main battery pack and the slave battery pack are respectively provided with: two power pins: a positive power supply electrode and a negative power supply electrode, four communication pins: a single-line serial port, an address allocation and access detection function multiplexing interface, a 485-A and a single-line serial port multiplexing interface, and a 485-B interface; when connected to a standard charger, the positive power supply interface and the negative power supply interface of the standard charger are respectively connected to the positive power supply electrode and the negative power supply electrode of the main battery pack and the slave battery pack; the interlocking interface of the standard charger is respectively connected to the negative power supply electrode of the main battery pack and the slave battery pack; the 485-A interface of the standard charger is respectively connected to the 485-A and single-line serial port multiplexing interface of the main battery pack and the slave battery pack; the 485-B interface of the standard charger is respectively connected to the 485-B interface of the main battery pack and the slave battery pack; the reserved interface of the standard charger is left floating. By adopting this solution, the compatibility of the lithium battery dual packs in parallel with the standard charging interface can be achieved by defining the interface pins.

[0055] In one embodiment, the circuit further includes an electric vehicle central control;

[0056] The electric vehicle central control comprises:

[0057] 485-A and single-line serial port multiplexing pins are respectively connected to the 485-A and single-line serial port multiplexing interfaces of the master battery pack and the slave battery pack;

[0058] 485-B communication pins, connected to the 485-B interfaces of the master battery pack and the slave battery pack respectively;

[0059] The master battery pack and the slave battery pack use a single-wire serial port communication mode by default; when it is detected that the central control of the electric vehicle uses 485 communication, it switches to 485 communication.

[0060] Among them, the electric vehicle central control is equipped with 485-A and single-line serial port multiplexing pins, 485-B communication pins, and other pins.

[0061] Specifically, Figure 1 As shown in the figure, after the two battery packs are connected to the vehicle through ADDR / DETD confirmation, the different voltage values ​​given by the instrument / central control are used to distinguish their respective addresses A / B, where A is the master battery pack and B is the slave battery pack. The communication mode of A and B packages to the vehicle is a single-line serial port by default. When the vehicle is detected to be 485 communication, it switches to 485 communication, otherwise it maintains the single-line serial port communication mode.

[0062] This solution uses the 485-A and single-wire serial port multiplexing pins to connect the 485-A and single-wire serial port multiplexing interfaces corresponding to the master battery pack and the slave battery pack, so as to realize the switching of communication modes.

[0063] Among them, the ADDR / DETD pins of the parallel battery pack are used for function multiplexing. The multiplexing principle is that the reference ground of the resistor R1 at the battery end is the B- of the battery, and R2 and R3 are respectively connected to the positive electrode P+ of the battery at the instrument end.

[0064] In one embodiment, the electric vehicle central control further includes: a first detection pin and a second detection pin;

[0065] A second resistor is provided between the first detection pin and the second detection pin, the first detection pin is serially connected to the positive power supply terminals of the master battery pack and the slave battery pack, and the second detection pin is connected to the multiplexing interface of the address allocation and access detection function of the slave battery pack;

[0066] The multiplexing interface for address allocation and access detection function of the slave battery pack is connected to a reference voltage via a first resistor;

[0067] The first resistor and the second resistor have the same resistance value, and whether the slave battery pack is connected to the electric vehicle is detected according to the voltage division value of the second resistor.

[0068] In one embodiment, the electric vehicle central control further includes: a first detection pin and a third detection pin;

[0069] A third resistor is provided between the first detection pin and the third detection pin, the first detection pin is connected to the positive power poles of the master battery pack and the slave battery pack, and the third detection pin is connected to the address allocation and access detection function multiplexing interface of the master battery pack;

[0070] The address allocation and access detection function multiplexing interface of the main battery pack is connected to the reference voltage through a first resistor;

[0071] The resistance value of the first resistor is twice the resistance value of the third resistor, and whether the main battery pack is connected to the electric vehicle is detected according to the voltage division value of the third resistor.

[0072] For the ADDR / DETD detection principle of the main battery pack A: the battery positive electrode P+, ​​the instrument terminal resistor R2, and the battery resistor R0 form the ADDR / DETD detection circuit of the A pack, and the resistor R2 = R1 is designed. The resistor R1 is Figure 1 The R resistor in the figure is the same as the master battery pack and the slave battery pack. Figure 1The symbol R is used to distinguish, so the R1 resistor divider is 1 / 2 of Vbat (Vbat is the battery voltage of package A), and the default is the package A address. At the same time, the voltage of the electrical node between R1 and R2 is converted into high and low level signals. When package A is not connected to the whole vehicle, it defaults to high level. When the electrical nodes of R1 and R2 have a voltage of low level, it is considered to be connected to the whole vehicle.

[0073] For the ADDR / DETD detection principle of battery pack B: the battery positive electrode P+, ​​the instrument terminal resistor R3, and the battery resistor R1 form the ADDR / DETD detection circuit of the A pack. The resistor R1=2R3 is designed, so the R1 resistor divider is 2 / 3 of Vbat (Vbat is the battery voltage of the B pack), which is the default address of the B pack. At the same time, the voltage of the electrical node between R1 and R3 is converted into a high-low level signal. When the B pack is not connected to the whole vehicle, it defaults to a high level. The electrical nodes of R1 and R3 have a voltage of a low level, which is considered to be connected to the whole vehicle.

[0074] This solution can save the setting of functional pins by reusing the ADDR / DETD pins of the parallel battery packs, and at the same time, there is no need to add peripheral circuits, and there is no need to consider the cost increase caused by the peripheral circuits.

[0075] In one embodiment, the circuit further comprises a controller;

[0076] The controller is connected to the electric vehicle central control via a 485 pin to send status information of the dual battery pack to the controller.

[0077] In one embodiment, the master battery pack and the slave battery pack are connected via a single-wire serial port.

[0078] In this solution, package A queries the voltage, current, SOC, fault status and other information of package B through the single-wire serial port (1-wire 2) to determine the status of package B and send corresponding instructions to control the power-on status of package B. The whole vehicle (instrument / central control) queries the information of package A / B through 485-A / 1-wire 1 and 485-B respectively, and forwards the relevant information (power-on status, maximum allowable discharge / feedback power, etc.) to the controller (FOC).

[0079] In this solution, the status information of the dual battery pack can be provided to the controller through the electric vehicle central control, so as to control the dual battery pack and monitor the status in real time. In addition, by setting a single-line serial port connection between the two battery packs, it can be ensured that the two batteries can communicate with each other after being placed in the electric vehicle, avoiding information isolation caused by mutual independence.

[0080] Second embodiment

[0081] The second embodiment of the present application relates to an electric vehicle. The electric vehicle provided in this embodiment may include:

[0082] The dual battery pack parallel circuit suitable for a standard charging interface as described in the first embodiment above.

[0083] It can be understood that the electric vehicle provided in this embodiment has the connection circuit and beneficial effects corresponding to the above-mentioned first embodiment, which will not be described in detail here.

[0084] In addition, some embodiments of the present application also provide an electronic device. The electronic device may be a digital computer in various forms, such as a laptop computer, a desktop computer, a workbench, a personal digital assistant, a server, a blade server, a mainframe computer, etc. The electronic device may also be a mobile device in various forms, such as a personal digital assistant, a cellular phone, a smart phone, a wearable device, and other similar computing devices.

[0085] The electronic device includes: the electronic device includes the dual battery pack parallel circuit suitable for a standard charging interface as described above and an electric vehicle. Figure 3 An exemplary structural diagram of the electronic device is disclosed. Figure 3 As shown, the electronic device includes: one or more processors 301, memory 302, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses and can be installed on a common mainboard or installed in other ways as needed. The processor can process instructions executed in the electronic device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some other embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple electronic devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Among them, the components shown in this article, their connections and relationships, and their functions are only used as examples, and are not intended to limit the implementation of the present application described and / or required herein.

[0086] The electronic device may further include: an input device 303 and an output device 304. The processor 301, the memory 302, the input device 303 and the output device 304 may be connected via a bus or other means. Figure 3 The example of connecting through bus is taken in the following.

[0087] The input device 303 can receive input digital or character information, and generate key signal input related to the user settings and function control of the electronic device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator bar, one or more mouse buttons, a trackball, a joystick and other input devices. The output device 304 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The display device may include, but is not limited to, a liquid crystal display (LCD), a light emitting diode (LED) display and a plasma display. In some embodiments, the display device may be a touch screen.

[0088] To provide interaction with a user, the electronic device may be a computer. The computer has: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball), through which the user can provide input to the computer. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0089] In the embodiments of the present application, a computer program / instruction is stored on a computer-readable medium, and when the computer program / instruction is executed by a processor, the steps of the method provided by any one or more of the above embodiments are implemented. The computer-readable medium may be included in the electronic device described in the above embodiments; or it may exist independently without being assembled into the device. The above computer-readable medium carries one or more computer-readable instructions.

[0090] The memory 302 can be used as a non-transient computer-readable storage medium, which can be used to store non-transient software programs, non-transient computer executable programs and modules. The processor 301 executes various functional applications and data processing of the server by running the non-transient software programs, instructions and modules stored in the memory 302, so as to implement the program instructions / modules corresponding to the method provided by any one or more of the above embodiments in the embodiments of the present application.

[0091] The memory 302 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the electronic device, etc. In addition, the memory 302 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage devices. In some embodiments, the memory 302 may optionally include a memory remotely arranged relative to the processor 301, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0092] It should be noted that the computer-readable medium described in the present application may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device.

[0093] Computer readable media include permanent and non-permanent, removable and non-removable media, and can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, modules of programs or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission medium that can be used to store information that can be accessed by a computing device.

[0094] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" language or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet).

[0095] In the above-described embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. For example, it can be implemented by using an application specific integrated circuit (ASIC), a general-purpose computer or any other similar hardware device. In certain embodiments, the software program of the present application can be executed by a processor to implement the above steps or functions. Similarly, the software program of the present application (including relevant data structures) can be stored in a computer-readable recording medium, for example, a RAM memory, a magnetic or optical drive or a floppy disk and similar devices. In addition, some steps or functions of the present application can be implemented by hardware, for example, as a circuit that cooperates with a processor to perform each step or function.

[0096] The computer program product provided in the embodiment of the present application includes one or more computer programs / instructions, and when the computer program / instructions are executed by the processor, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, a computer, a server or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrations. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive so lid state di sk (SSD)), etc.

[0097] The flow chart or block diagram in the accompanying drawings shows the possible architecture, function and operation of the equipment, method and computer program product according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented with a dedicated system for hardware that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0098] The scope of the present application is defined by the appended claims rather than the above description, and it is intended that all changes that fall within the meaning and scope of the equivalent elements of the claims are included in the present application. Any figure mark in the claims should not be regarded as limiting the claims involved. In addition, it is clear that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or devices stated in the device claim may also be implemented by one unit or device through software or hardware. The words "first", "second", etc. are only used to distinguish the description, and do not indicate any particular order, nor can they be understood as indicating or implying relative importance.

[0099] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily mention changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims, and the above embodiments should be regarded as exemplary and non-restrictive.

Claims

1. A dual battery pack parallel circuit suitable for a standard charging interface, characterized in that: The circuit comprises: A master battery pack and a slave battery pack; The main battery pack and the slave battery pack are respectively provided with the following external interfaces: two power pins: positive power supply and negative power supply, four communication pins: single-line serial port, address allocation and access detection function multiplexing interface, 485-A and single-line serial port multiplexing interface, and 485-B interface; When connected to a standard charger, the positive power interface and the negative power interface of the standard charger are connected to the positive power electrode and the negative power electrode of the master battery pack and the slave battery pack respectively; The interlocking interface of the standard charger is connected to the negative poles of the power supply of the master battery pack and the slave battery pack respectively; The 485-A interface of the standard charger is respectively connected to the 485-A and single-line serial port multiplexing interface of the master battery pack and the slave battery pack; The 485-B interface of the standard charger is connected to the 485-B interfaces of the master battery pack and the slave battery pack respectively; The reserved interface of the standard charger is left unconnected.

2. The method according to claim 1, characterized in that The circuit also includes an electric vehicle central control; The electric vehicle central control comprises: 485-A and single-line serial port multiplexing pins are respectively connected to the 485-A and single-line serial port multiplexing interfaces of the master battery pack and the slave battery pack; 485-B communication pins, connected to the 485-B interfaces of the master battery pack and the slave battery pack respectively; The master battery pack and the slave battery pack use a single-wire serial port communication mode by default; when it is detected that the central control of the electric vehicle uses 485 communication, it switches to 485 communication.

3. The method according to claim 2, characterized in that The electric vehicle central control further includes: a first detection pin and a second detection pin; A second resistor is provided between the first detection pin and the second detection pin, the first detection pin is connected to the positive power poles of the master battery pack and the slave battery pack, and the second detection pin is connected to the address allocation and access detection function multiplexing interface of the slave battery pack; The multiplexing interface for address allocation and access detection function of the slave battery pack is connected to a reference voltage via a first resistor; The first resistor and the second resistor have the same resistance value, and whether the slave battery pack is connected to the electric vehicle is detected according to the voltage division value of the second resistor.

4. The method according to claim 2, characterized in that: The electric vehicle central control further includes: a first detection pin and a third detection pin; A third resistor is provided between the first detection pin and the third detection pin, the first detection pin is connected to the positive power poles of the master battery pack and the slave battery pack, and the third detection pin is connected to the address allocation and access detection function multiplexing interface of the master battery pack; The address allocation and access detection function multiplexing interface of the main battery pack is connected to the reference voltage through a first resistor; The resistance value of the first resistor is twice the resistance value of the third resistor, and whether the main battery pack is connected to the electric vehicle is detected according to the voltage division value of the third resistor.

5. The method according to claim 2, characterized in that: The circuit also includes a controller; The controller is connected to the electric vehicle central control via a 485 pin to send status information of the dual battery pack to the controller.

6. The method according to claim 1, characterized in that The master battery pack and the slave battery pack are connected via a single-line serial port.

7. An electric vehicle, characterized in that: The electric vehicle comprises a dual battery pack parallel circuit suitable for a standard charging interface as described in any one of claims 1-6.

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