Current determination method of three-level inverter and three-level inverter

Abstract

The embodiment of the invention provides a current determination method of a three-level inverter and the three-level inverter, the three-level inverter comprises a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors, the midpoint of two clamping diodes of each phase bridge arm of the three-phase bridge arm is connected with the midpoint of the two voltage-dividing capacitors through the sampling resistor, and the sampling resistor is connected with the midpoint of the two voltage-dividing capacitors through the sampling resistor. The method comprises the following steps: acquiring position information of a reference voltage vector of the three-level inverter in a space vector diagram; determining a synthesis sequence of a target space voltage vector for obtaining the reference voltage vector according to the position information of the reference voltage vector in the space vector diagram; acquiring the voltage of the sampling resistor according to the synthesis sequence; the current switching state combination of the three-phase bridge arm is obtained, and when the current switching state combination meets the preset condition, the output phase current of the three-level inverter is determined according to the resistance value of the sampling resistor and the voltage of the sampling resistor, so that current sampling is performed through the resistor, the size of the inverter is reduced, and the sampling precision of the phase current is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of inverter control, and in particular to a current determination method of a three-level inverter and a three-level inverter. Background Art

[0002] Multi-level inverters have been widely used in variable frequency drive control scenarios at medium and high voltage levels. At the same voltage level, multi-level inverters have lower power and withstand voltage requirements for switching devices than two-level inverters, and the output is closer to a sine wave, and the requirements for post-stage filtering devices are also lower. However, as the number of levels increases, the control of the inverter device will become more complicated, and the neutral point clamped (NPC) three-level inverter is widely used in medium and high voltage and high power applications.

[0003] In the NPC three-level inverter closed-loop control system, output phase current sampling is the basis for realizing closed-loop control, and the phase current can also reflect the output power of the inverter to a certain extent. At present, the conventional solution is to install multiple current sensors on the output side of the inverter for phase current sampling. The sampling of multiple current sensors increases the volume and cost of the system, and due to process reasons, the parameter deviation between the current sensors will also affect the sampling accuracy of the phase current. Summary of the invention

[0004] In order to solve the above problem, an embodiment of the present invention discloses a current determination method of a three-level inverter and a three-level inverter.

[0005] In a first aspect, an embodiment of the present invention provides a current determination method for a three-level inverter, wherein the three-level inverter comprises a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors, wherein the two voltage-dividing capacitors are connected in series between a positive electrode and a negative electrode of a DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm is connected in parallel between a positive electrode and a negative electrode of a DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm comprises two clamping diodes connected in series, and a midpoint of the two clamping diodes of each phase bridge arm is connected to a midpoint of the two voltage-dividing capacitors through the sampling resistor, and the method comprises:

[0006] Acquire position information of a reference voltage vector of the three-level inverter in a space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system;

[0007] Determining a synthesis order of target space voltage vectors for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram;

[0008] Determining the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm according to the synthesis order of the target space voltage vector;

[0009] The current switch state combination of the three-phase bridge arm is obtained, and when the current switch state combination of the three-phase bridge arm meets a preset condition, the output phase current of the three-level inverter is determined according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

[0010] Optionally, the method further comprises:

[0011] Get the preset sampling time;

[0012] When the sampling time for collecting the voltage of the sampling resistor is less than the preset sampling time, the target space voltage vector used to obtain the reference voltage vector is updated according to the preset sampling time and the position information of the reference voltage vector, and the synthesis order of the updated target space voltage vector is adjusted.

[0013] Optionally, each phase bridge arm of the three-phase bridge arm further includes a first switch, a second switch, a third switch and a fourth switch connected in series; one end of the first switch is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes connected in series is connected between the first switch and the second switch, and the other end is connected between the third switch and the fourth switch; and the stator winding corresponding to the three-phase motor is connected between the second switch and the third switch.

[0014] Optionally, the preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector;

[0015] The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

[0016] Optionally, the space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors;

[0017] The position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: the target sector where the reference voltage vector is located in the equilateral hexagon, and the target sub-sector where the reference voltage vector is located in the target sector;

[0018] The step of determining a synthesis order of target space voltage vectors for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram comprises:

[0019] A synthesis order of target space voltage vectors for obtaining the reference voltage vector is determined according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

[0020] Optionally, determining the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination includes:

[0021] Determine the current of the sampling resistor according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the combination of the current switch state;

[0022] When the current switch state combination of the three-phase bridge arm meets a preset condition, the current of the sampling resistor is used as the output phase current of the three-level inverter.

[0023] Optionally, obtaining the preset sampling time includes:

[0024] According to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time, the preset sampling time is obtained according to the following formula:

[0025] T min =T death +T on / off +T rise +T sr +T AD

[0026] Among them, T min is the preset sampling time, T death is the preset dead time, T on / ogf is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T AD is the sampling time.

[0027] In a second aspect, an embodiment of the present invention provides a current determination device for a three-level inverter, wherein the three-level inverter comprises a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors, wherein the two voltage-dividing capacitors are connected in series between the positive electrode and the negative electrode of a DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm is connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm comprises two clamping diodes connected in series, and the midpoint of the two clamping diodes of each phase bridge arm is connected to the midpoint of the two voltage-dividing capacitors through the sampling resistor, and the device comprises:

[0028] A position information acquisition module, used to acquire position information of a reference voltage vector of the three-level inverter in a space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system;

[0029] A synthesis order determination module, used to determine a synthesis order of a target space voltage vector for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram;

[0030] A resistor voltage determination module, used to determine the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm according to the synthesis order of the target space voltage vector;

[0031] The output current determination module is used to obtain the current switch state combination of the three-phase bridge arm, and when the current switch state combination of the three-phase bridge arm meets the preset condition, determine the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

[0032] Optionally, the device further comprises:

[0033] A preset time acquisition module is used to obtain a preset sampling time;

[0034] A synthesis order adjustment module is used to update the target space voltage vector used to obtain the reference voltage vector according to the preset sampling time and the position information of the reference voltage vector when the sampling time for collecting the voltage of the sampling resistor is less than the preset sampling time, and adjust the synthesis order of the updated target space voltage vector.

[0035] Optionally, each phase bridge arm of the three-phase bridge arm further includes a first switch, a second switch, a third switch and a fourth switch connected in series; one end of the first switch is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes connected in series is connected between the first switch and the second switch, and the other end is connected between the third switch and the fourth switch; and the stator winding corresponding to the three-phase motor is connected between the second switch and the third switch.

[0036] Optionally, the preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector;

[0037] The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

[0038] Optionally, the space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors;

[0039] The position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: the target sector where the reference voltage vector is located in the equilateral hexagon, and the target sub-sector where the reference voltage vector is located in the target sector;

[0040] The synthesis order determination module comprises:

[0041] The synthesis order determination submodule is used to determine the synthesis order of the target space voltage vector used to obtain the reference voltage vector according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

[0042] Optionally, the output current determination module includes:

[0043] A resistance current determination submodule, used to determine the current of the sampling resistor according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the combination of the current switch state;

[0044] The output current determination submodule is used to use the current of the sampling resistor as the output phase current of the three-level inverter when the current switch state combination of the three-phase bridge arm meets a preset condition.

[0045] Optionally, the preset time acquisition module includes: The preset time acquisition submodule is used to obtain the preset sampling time according to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time according to the following formula:

[0048] Among them, T min is the preset sampling time, T death is the preset dead time, T on / ogf is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T AD is the sampling time.

[0049] In a third aspect, the present invention shows a three-level inverter comprising: a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors; the two voltage-dividing capacitors are connected in series between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm is connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm comprises two clamping diodes connected in series, and the midpoint of the two clamping diodes of each phase bridge arm is connected to the midpoint of the two voltage-dividing capacitors through the sampling resistor;

[0050] The output phase current of the three-level inverter is obtained according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination when the current switch state combination of the three-phase bridge arm meets the preset condition; the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is obtained according to the synthesis order of the target space voltage vector of the reference voltage vector of the three-level inverter; the synthesis order of the target space voltage vector is obtained according to the position information of the reference voltage vector in the space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter to a stationary coordinate system.

[0051] Optionally, the synthesis order of the target space voltage vector is obtained according to the preset sampling time and the position information of the reference voltage vector when the sampling time for collecting the voltage of the sampling resistor is less than the preset sampling time.

[0052] Optionally, each phase bridge arm of the three-phase bridge arm further includes a first switch, a second switch, a third switch and a fourth switch connected in series; one end of the first switch is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes connected in series is connected between the first switch and the second switch, and the other end is connected between the third switch and the fourth switch; and the stator winding corresponding to the three-phase motor is connected between the second switch and the third switch.

[0053] Optionally, the preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector;

[0054] The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

[0055] Optionally, the space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors;

[0056] The position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: the target sector where the reference voltage vector is located in the equilateral hexagon, and the target sub-sector where the reference voltage vector is located in the target sector;

[0057] The synthesis order of the target space voltage vector of the reference voltage vector is obtained according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

[0058] Optionally, when the current switch state combination of the three-phase bridge arm meets a preset condition, the output phase current of the three-level inverter is the current of the sampling resistor; the current of the sampling resistor is obtained according to the resistance value of the sampling resistor and the voltage of the sampling resistor.

[0059] Optionally, the preset sampling time is obtained according to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time, according to the following formula:

[0061] Among them, T min is the preset sampling time, T deathis the preset dead time, T on / ogf is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T AD is the sampling time.

[0062] Optionally, it further comprises: a voltage sensor, wherein the voltage sensor is connected in parallel with the sampling resistor;

[0063] The voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is acquired by the voltage sensor according to the synthesis order of the target space voltage vector of the reference voltage vector of the three-level inverter.

[0064] In a fourth aspect, the present invention shows an electrical device, comprising the above-mentioned three-level inverter, and a controller;

[0065] The controller is used to obtain the position information of the reference voltage vector of the three-level inverter in the space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system; according to the position information of the reference voltage vector in the space vector diagram, determine the synthesis order of the target space voltage vector used to obtain the reference voltage vector; according to the synthesis order of the target space voltage vector, determine the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm; obtain the current switch state combination of the three-phase bridge arm, and when the current switch state combination of the three-phase bridge arm meets the preset condition, determine the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

[0066] In a fifth aspect, the present invention shows an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned method for determining the current of a three-level inverter when executing the computer program.

[0067] In a sixth aspect, the present invention shows a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above-mentioned method for determining the current of a three-level inverter are implemented.

[0068] The embodiments of the present invention include the following advantages:

[0069] The three-level inverter of the embodiment of the present invention includes a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors. The midpoints of the two clamping diodes of each phase bridge arm of the three-phase bridge arm are connected to the midpoints of the two voltage-dividing capacitors through the sampling resistor, so that the phase current of the inverter can be sampled through one resistor, and multiple current sensors do not need to be installed on the output side of the inverter, thereby avoiding the influence of parameter errors of multiple current sensors and reducing the volume and cost of the inverter. The embodiment of the present invention can obtain the position information of the reference voltage vector of the three-level inverter in the space vector diagram, and determine the synthesis order of the target space voltage vector for obtaining the reference voltage vector according to the position information of the reference voltage vector in the space vector diagram, so that the current sampling timing can be determined according to the synthesis order; according to the synthesis order of the target space voltage vector, the voltage of the sampling resistor is collected, thereby improving the sampling accuracy of the phase current; the current switch state combination of the three-phase bridge arm is obtained, and when the current switch state combination of the three-phase bridge arm meets the preset condition, the output phase current of the three-level inverter is determined according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination, thereby reducing the volume and cost of the inverter and improving the sampling accuracy of the phase current. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0071] Figure 1 is a structural block diagram of a three-level inverter according to an embodiment of the present invention;

[0072] Figure 2 is a flow chart of the steps of a current determination method of a three-level inverter according to an embodiment of the present invention;

[0073] Figure 3 is a flowchart of another method for determining current of a three-level inverter according to an embodiment of the present invention;

[0074] Figure 4 is a schematic diagram of a switching state of a three-level inverter according to an embodiment of the present invention;

[0075] Figure 5 is a schematic diagram of a space vector diagram according to an embodiment of the present invention;

[0076] Figure 6 is a schematic diagram of a sector of a space vector diagram according to an embodiment of the present invention;

[0077] Figure 7is a simplified circuit diagram of a three-level inverter according to an embodiment of the present invention;

[0078] Figure 8 is a schematic diagram of a switch state combination and action time according to an embodiment of the present invention;

[0079] Fig. 9 is a schematic diagram of another switch state combination and action time according to an embodiment of the present invention;

[0080] Fig.10 is a schematic diagram of another switch state combination and action time according to an embodiment of the present invention;

[0081] Fig.11 is a schematic diagram of another switch state combination and action time according to an embodiment of the present invention;

[0082] Fig.12 is a logic diagram of a current determination method for a three-level inverter according to an embodiment of the present invention;

[0083] Fig.13 The present invention is a structural block diagram of a current determination device for a three-level inverter according to an embodiment of the present invention.

[0084] Description of reference numerals:

[0085] Three-phase bridge arms A, B, C, a sampling resistor R, two voltage-dividing capacitors C1 and C2, two clamping diodes D1 and D2, a first switch Sx1, a second switch Sx1, a third switch Sx1, and a fourth switch Sx1. DETAILED DESCRIPTION

[0086] The present invention proposes a current determination method for a three-level inverter, the purpose of which is to improve the sampling accuracy of the phase current. In order to achieve this goal, in an embodiment of the present invention, a sampling resistor is connected between the midpoint of two clamping diodes of each phase bridge arm of the three-phase bridge arm and the midpoint of two voltage-dividing capacitors, and the phase current of the inverter is sampled through the sampling resistor; at the same time, when the reference voltage vector passes through the current unobservable area, the action time of the vector is increased to increase the phase current observable area, thereby improving the sampling accuracy of the phase current while reducing the volume and cost of the inverter.

[0087] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0088] Reference Figure 1, shows a structural block diagram of a three-level inverter according to an embodiment of the present invention. The three-level inverter includes a three-phase bridge arm (phase A, phase B, phase C), a sampling resistor R and two voltage-dividing capacitors C1 and C2, the two voltage-dividing capacitors C1 and C2 are connected in series between the positive electrode and the negative electrode of the DC bus of the three-level inverter, the A phase, the B phase, and the C phase of each phase of the three-phase bridge arm are connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase of the three-phase bridge arm includes two clamping diodes D1 and D2 connected in series, and the midpoint of the two clamping diodes D1 and D2 of each phase of the bridge arm is connected to the midpoint of the two voltage-dividing capacitors C1 and C2 through the sampling resistor R.

[0089] Each phase bridge arm of the three-phase bridge arm also includes a first switch Sx1, a second switch Sx2, a third switch Sx3 and a fourth switch Sx4 connected in series, where x corresponds to the A-phase, B-phase and C-phase bridge arms; one end of the first switch Sx1 is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch Sx4 is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes D1 and D2 connected in series is connected between the first switch Sx1 and the second switch Sx2, and the other end is connected between the third switch Sx3 and the fourth switch Sx4; the stator winding corresponding to the three-phase motor is connected between the second switch Sx2 and the third switch Sx3.

[0090] Among them, C1 is the upper voltage-dividing capacitor on the DC side of the three-level inverter, and C2 is the lower voltage-dividing capacitor on the DC side of the NPC type three-level inverter; Vdc is the DC side voltage of the three-level inverter; O is the midpoint of the DC bus of the three-level inverter, that is, the cathode of the voltage-dividing capacitor C1 and the anode of the voltage-dividing capacitor C2; ia, ib, ic are the three-phase currents output by the inverter; up is the voltage on the DC side capacitor C1, and un is the voltage on the DC side capacitor C2; D1, D2, D3, D4, D5, and D6 are clamping diodes on the A-phase, B-phase, and C-phase bridge arms of the three-level inverter respectively; each phase bridge arm has four power switching devices (i.e., the first switch Sx1, the second switch Sx2, the third switch Sx3, and the fourth switch Sx4, x=a, b, c), and the midpoint of the clamping diode of each phase is connected to the midpoint of the DC bus through a sampling resistor R.

[0091] In the embodiment of the present invention, a sampling resistor is connected between the midpoint of two clamping diodes of each phase bridge arm of the three-phase bridge arm and the midpoint of two voltage-dividing capacitors, and the phase current of the inverter is sampled through the sampling resistor, thereby eliminating the need to install multiple current sensors on the output side of the inverter, avoiding the influence of parameter errors of multiple current sensors, and reducing the size and cost of the inverter.

[0092] Reference Figure 2, shows a flow chart of the steps of a current determination method of a three-level inverter according to an embodiment of the present invention, and the method may specifically include the following steps:

[0093] Step 101, obtaining position information of a reference voltage vector of the three-level inverter in a space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system;

[0094] In an embodiment of the present invention, the position information of the reference voltage vector of the three-level inverter in the space vector diagram can be obtained, and the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system. The position information of the reference voltage vector may include sectors and sub-sectors of the reference voltage vector in the space vector diagram. Accurate control of the inverter can be achieved through the position information of the reference voltage vector.

[0095] Step 102, determining a synthesis order of target space voltage vectors for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram;

[0096] In an embodiment of the present invention, the synthesis order of the target space voltage vector for obtaining the reference voltage vector can be determined according to the vector synthesis order table and the position information of the reference voltage vector in the space vector diagram. The vector synthesis order table includes a one-to-one mapping relationship between the position information of the reference voltage vector in the space vector diagram and the vector synthesis order.

[0097] Step 103, determining the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm according to the synthesis order of the target space voltage vector;

[0098] In the embodiment of the present invention, the three-level inverter can collect the voltage of the sampling resistor and determine the switch state combination of each phase bridge arm of the three-phase bridge arm corresponding to the current sampling resistor voltage according to the synthesis order of the target space voltage vector.

[0099] Step 104, obtaining the current switch state combination of the three-phase bridge arm, and when the current switch state combination of the three-phase bridge arm meets the preset condition, determining the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

[0100] In an embodiment of the present invention, when the current switch state combination of the three-phase bridge arm meets the preset condition, that is, when the current value of the sampling resistor corresponding to the current switch state combination is equal to the output phase current of the three-level inverter, the output phase current of the three-level inverter can be determined according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

[0101] The embodiment of the present invention can obtain the position information of the reference voltage vector of the three-level inverter in the space vector diagram, and determine the synthesis order of the target space voltage vector for obtaining the reference voltage vector according to the position information of the reference voltage vector in the space vector diagram, so that the current sampling timing can be determined according to the synthesis order; the current switch state combination of the three-phase bridge arm is obtained, and when the current switch state combination of the three-phase bridge arm meets the preset conditions, the voltage of the sampling resistor is collected, thereby improving the sampling accuracy of the phase current; according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination, the output phase current of the three-level inverter corresponding to the current switch state combination is determined, so that the sampling accuracy of the phase current can be improved while reducing the volume and cost of the inverter.

[0102] Reference Figure 3 , shows a flowchart of another method for determining the current of a three-level inverter according to an embodiment of the present invention, wherein the method may specifically include the following steps:

[0103] Step 201, obtaining position information of a reference voltage vector of the three-level inverter in a space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system;

[0104] In one embodiment, the space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors; the position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: a target sector where the reference voltage vector is located in the equilateral hexagon, and a target sub-sector where the reference voltage vector is located in the target sector;

[0105] The space vector diagram is composed of multiple space voltage vectors, which are determined according to the switch state combination of the three-phase bridge arms. The switch state combination of the three-phase bridge arms is a combination of the switch states of each phase of the three-phase bridge arms.

[0106] Reference Figure 4 , which is a schematic diagram showing the switching state of a three-level inverter according to an embodiment of the present invention. Figure 4 As shown in (a) and (b), when the first switch Sx1 and the second switch Sx2 are turned on, and the third switch Sx3 and the fourth switch Sx4 are turned off, the switch state of the bridge arm is the first switch state, represented by P; Figure 4 As shown in (c) and (d), when the second switch Sx2 or the third switch Sx3 is turned on, and the first switch Sx1 and the fourth switch Sx4 are turned off, the switch state of the bridge arm is the second switch state, which is represented by 0; Figure 4As shown in (e) and (f), when the third switch Sx3 and the fourth switch Sx4 are turned on, and the first switch Sx1 and the second switch Sx2 are turned off, the switch state of the bridge arm is the third switch state, represented by N. Each phase bridge arm of the three-level inverter has three switch states, namely P, O, and N. Therefore, the three-level inverter can output 27 switch state combinations, corresponding to 27 space voltage vectors.

[0107] When the switch state combination is that the switch states of two phases of the three-phase bridge arms are the same and the switch state of at least one phase of the bridge arm is the second switch state, the corresponding space voltage vector is the first vector, for example, POO, ONN, PPO, OON, OPO, NON, OPP, NOO, OOP, NNO, POP, ONO. When the switch state combination is that the switch states of each phase of the three-phase bridge arm are different from each other, the corresponding space voltage vector is the second vector, for example, PON, OPN, NPO, NOP, ONP, PNO. When the switch state combination is that the switch states of each phase of the three-phase bridge arm are the same, the corresponding space voltage vector is the third vector, for example, PPP, OOO, NNN. When the switch state combination is that the switch states of two phases of the three-phase bridge arm are the same and the switch state of the other phase is not the second switch state, the corresponding space voltage vector is the fourth vector, for example, PNN, PPN, NPN, NPP, NNP, PNP. The arrangement order of the switch state combination is A-phase bridge arm, B-phase bridge arm, and C-phase bridge arm. The first vector, the second vector, the third vector, and the fourth vector divide the space voltage vector according to the module length, wherein the third vector is a zero vector, the first vector is a small vector, the second vector is a medium vector, and the fourth vector is a large vector.

[0108] Reference Figure 5 , showing a schematic diagram of a space vector diagram of an embodiment of the present invention. The starting point of the space voltage vector is the centroid of the equilateral hexagon, the end point of the space voltage vector of the third vector is located at the centroid of the equilateral hexagon, the end point of the space voltage vector of the fourth vector is located at the vertex of the equilateral hexagon, the end point of the space voltage vector of the first vector is located between the centroid and the vertex of the equilateral hexagon, and the end point of the space voltage vector of the second vector is located between two adjacent vertexes of the equilateral hexagon; a sector is formed between the centroid and two adjacent vertexes of the equilateral hexagon, and the equilateral hexagon has a total of six sectors.

[0109] Reference Figure 6 , shows a schematic diagram of sectors of a space vector diagram of an embodiment of the present invention, each sector includes six sub-sectors, Figure 6 is a schematic diagram of sector 1. Wherein, Vref is a reference voltage vector to be synthesized.

[0110] Step 202, determining a synthesis order of target space voltage vectors for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram;

[0111] In one embodiment, the step of determining the synthesis order of the target space voltage vector for obtaining the reference voltage vector according to the position information of the reference voltage vector in the space vector diagram may further include the following sub-steps:

[0112] Sub-step S11, determining a synthesis order of target space voltage vectors for obtaining the reference voltage vector according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

[0113] In an embodiment of the present invention, the synthesis order of the target space voltage vector for obtaining the reference voltage vector can be determined according to the vector synthesis order table and the target sector where the reference voltage vector is located, and the target sub-sector where the target sector is located. The vector synthesis order table is as follows:

[0114] Table 1

[0115]

[0116]

[0117] Among them, N is the large sector in the space vector diagram; n is the sub-region within the sector. According to the sector and sub-sector where the reference voltage vector is located, the synthetic vector of the reference voltage vector is determined, and several space voltage vectors closest to the reference voltage vector are selected for synthesis, which can effectively reduce the harmonics of the inverter output current. For example, at this time, the reference voltage vector Vref is in the area of ​​N=Ⅰ, n=1. At this time, the reference voltage vector is located in the area surrounded by PPP, OOO, NNN (three zero vectors), PPO, OON (two small vectors), POO, ONN (two small vectors), and PPP, OOO, NNN, PPO, OON, POO, ONN can be selected to synthesize the reference voltage vector Vref.

[0118] Step 203, determining the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm according to the synthesis order of the target space voltage vector;

[0119] Step 204, obtaining the current switch state combination of the three-phase bridge arm, and when the current switch state combination of the three-phase bridge arm meets the preset condition, determining the current of the sampling resistor according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination;

[0120] In one embodiment, the preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector;

[0121] The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

[0122] Reference Figure 7 , shows a simplified circuit diagram of a three-level inverter according to an embodiment of the present invention. Figure 7 It can be seen that when the zero vector (i.e. the third vector PPP, OOO, NNN) and the large vector (i.e. the fourth vector PNN, PPN, NPN, NPP, NNP, PNP) act, the phase current is independent of the midpoint current of the two voltage-dividing capacitors. When the small vector (i.e. the first vector POO, ONN, PPO, OON, OPO, NON, OPP, NOO, OOP, NNO, POP, ONO) and the middle vector (i.e. the second vector PON, OPN, NPO, NOP, ONP, PNO) act, one phase of the three-phase stator winding has the same midpoint current as the two voltage-dividing capacitors. Therefore, the voltage of the sampling resistor can be collected during the time when the small vector and the middle vector act.

[0123] When one phase of the three-phase stator winding has the same current as the midpoint current, the phase current can be calculated by collecting the voltage value of the sampling resistor according to the following formula:

[0124]

[0125] Among them, Ix is the phase current, Io is the midpoint current, which is also the current of the sampling resistor, and Uo is the voltage of the sampling resistor.

[0126] Step 205: When the current switch state combination of the three-phase bridge arm meets a preset condition, the current of the sampling resistor is used as the output phase current of the three-level inverter.

[0127] pass Figure 4 The phase current flow direction corresponding to different switching states of the single-phase bridge arm is shown. It can be seen that only when the second switch Sx2 and the third switch Sx3 of the phase bridge arm are turned on, the phase current is the same as the midpoint current. Therefore, according to the above analysis, when the switching state of the phase bridge arm is O, the phase current can be determined by collecting the midpoint current, that is, the current of the sampling resistor.

[0128] When different space voltage vectors are used to synthesize reference voltage vectors, the relationship between the current of the sampling resistor and the phase current is shown in the following table:

[0129] Table 2

[0130]

[0131]

[0132] Reference Figure 8 , shows a schematic diagram of a switch state combination and action time according to an embodiment of the present invention. Figure 8 It can be seen that, taking the reference voltage vector in sector 1 and sub-region 2 as an example (N=1, n=2), the synthesis order of the reference voltage vector is: OON-OOO-POO-PPO-POO-OOO-OON. As the reference voltage vector Vref gradually approaches vectors OON and PPO, the action time of vector POO becomes shorter and shorter, that is, the time for sampling the current of phase A becomes shorter and shorter. The embodiment of the present invention improves the modulation order of the space voltage vector by the following method, increases the observable area of ​​the phase current, and increases the sampling accuracy of the current.

[0133] In one embodiment, the method may further include: obtaining a preset sampling time; when the sampling time for collecting the voltage of the sampling resistor is less than the preset sampling time, updating the target space voltage vector used to obtain the reference voltage vector according to the preset sampling time and the position information of the reference voltage vector, and adjusting the synthesis order of the updated target space voltage vectors.

[0134] In one embodiment, the step of obtaining the preset sampling time may further include the following sub-steps:

[0135] Sub-step S31, according to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time, the preset sampling time is obtained according to the following formula:

[0136] T min =T death +T on / off +T rise +T sr +T AD

[0137] Among them, T min is the preset sampling time, T death is the preset dead time, T on / off is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T ADis the sampling time.

[0138] In the embodiments of the present invention, considering factors such as the preset dead time, the switching conduction and turn-off time, the current rising time, and the current oscillation time, a preset sampling time is set for the sampling time, and the preset sampling time is the shortest time required for sampling. When the sampling time is less than the preset sampling time, the target space voltage vector used to obtain the reference voltage vector can be updated, and the synthesis order of the updated target space voltage vector can be adjusted.

[0139] Taking the reference voltage vector in sector and sub-region two as an example (N = 1, n = 2). As the reference voltage vector Vref gradually approaches the vectors OON and PPO, the action time of the vector POO becomes shorter and shorter. If the current T POO < Tmin, due to the symmetry of the vector action order, the action time of POO can be set to TPOO + 2Tmin, and NON is introduced, and the action time of NON is set to 2Tmin. At the same time, the action time of ONN is reduced, and the reduced time is deducted from the zero vector. Then the new volt-second balance equation is:

[0140] Vref * T s = NON * 2 * T min + OON * (T PPO,OON - 2 * T min )

[0141] + OOO * (T OOO - 2 * T min ) + POO * (T POO + 2 * T min )

[0142] wherein, Vref is the reference voltage vector, T s is the total time for synthesizing the reference voltage vector, P is the first switching state, O is the second switching state, N is the third switching state, and the arrangement order of the switching state combinations is the A-phase bridge arm, the B-phase bridge arm, and the C-phase bridge arm in sequence. T ABC is the time corresponding to the action of the switching state combination, and the time corresponding to the switching state combinations of OON and POO is the sampling time.

[0143] Since the synthesis order is symmetric (NON - OON - OOO - POO - OOO - OON – NON, with NON at both the front and the back), the action time of the first NON in the synthesis order is (T NON + 2Tmin) / 2 = T NON / 2 + Tmin, and the action time of the second NON is also (T NON + 2Tmin) / 2 = T NON / 2+Tmin, so that the changed current sampling time can be greater than Tmin. POO Change to T POO +2Tmin, this will inevitably cause inaccurate synthesis of the reference voltage vector, so other vectors need to be introduced to offset the 2Tmin of the extra action of the POO vector, so that NON also acts on 2Tmin. Because 2Tmin of POO and 2Tmin of NON can synthesize 2Tmin of OON, the action time of OON is reduced by 2Tmin, which ensures the accuracy of the reference voltage vector before and after the change, and also expands the current sampling time.

[0144] Reference Fig. 9 , showing another schematic diagram of the switch state combination and action time of an embodiment of the present invention. After the change, the synthesized reference voltage vector Vref remains unchanged, and the synthesis order of the reference voltage vector is: NON-OON-OOO-POO-OOO-OON-NON. It can be obtained that the switching times of the power switch tube before and after the improvement have not increased, and the sampling time of the A phase current has also been improved; according to the symmetry of the space vector distribution, this method can improve the current sampling time of Vref in all sectors and sub-areas n=1, 2, 3, 4.

[0145] Still taking the reference voltage vector in sector 1 and sub-region 2 as an example (N=1, n=2), when the debugging depth is too low, the action time of OON and POO is very short. OON , T POO If both are less than Tmin, let the action time of OON be T OON +2Tmin, let the action time of POO be T POO +2Tmin, and introduce NNO and NOO, set the action time of NNO and NOO to 2Tmin, and deduct the less time from the zero vector, then the new volt-second balance equation is:

[0146] Vref*T s =NNO*2*T min +NOO*2*T min +OOO*(T OOO -8*T min )

[0147] +POO*(T POO +2*T min )+PPO*(T PPO +2*T min )

[0148] Among them, the time corresponding to the switch state combination of POO and PPO is the sampling time.

[0149] Reference Fig.10 , showing a schematic diagram of another switch state combination and action time of an embodiment of the present invention. After the change, the synthesized Vref remains unchanged, and NNO and NOO that act for 2Tmin can offset OON and POO that act for an extra 2Tmin. The synthesis order of the reference voltage vector is: NNO-NOO-OOO-POO-PPO-POO-OOO-NOO-NNO. Although the power switch tube acts twice more, the sampling time of the C-phase and A-phase currents is improved. According to the symmetry of the space vector distribution, this method can improve the current sampling time of Vref in all large sectors at low modulation depth, and at the same time can also ensure the accuracy of the reference voltage synthesis vector before and after the change.

[0150] Taking the reference voltage vector in sector 1 and sub-region 6 as an example (N=1, n=6), as the reference voltage vector Vref gradually approaches vectors OON, PPO, and PPN, the action time of vector PON becomes shorter and shorter. PON If it is less than Tmin, let the action time of PON be T PON +2Tmin, and introduce NON, set the action time of NON to 2Tmin, and reduce the action time of OON to TPPO, OON-4Tmin, then the new volt-second balance equation is:

[0151] Vref*T s =NON*2*T min +OON*(T PpO,OON -4*T min )

[0152] +PON*(T PON +2*T min )+PPN*T PPN )

[0153] Among them, the time corresponding to when the switch state combination is OON and PON is the sampling time.

[0154] Reference Fig.11 , showing another schematic diagram of the switch state combination and action time of the embodiment of the present invention. After the change, the synthesized Vref remains unchanged, and the synthesis order of the reference voltage vector is: NON-OON-PON-PPN-PON-OON-NON. It can be obtained that the switching times of the power switch tube before and after the improvement have not increased, and the sampling time of the B phase current has also been improved; according to the symmetry of the space vector distribution, this method can improve the current sampling time of Vref in all large sectors and sub-areas n=5 and 6.

[0155] The updated vector synthesis order table can be obtained through the above method, as shown below:

[0156] Table 3

[0157]

[0158] When the reference voltage vector passes through the current unobservable area, the action time of a certain space voltage vector in the synthesis order of Table 2 will be insufficient to meet the minimum time Tmin of current sampling. In the embodiment of the present invention, the action time of the vector can be increased, and according to the switch redundancy and volt-second characteristics of the NPC three-level inverter, in combination with the vector synthesis order of Table 3, other space vectors are introduced to offset the influence of increasing the vector action time on the reference vector synthesis, so as to increase the observable area of ​​the phase current and increase the current sampling accuracy.

[0159] A method for determining the current of a three-level inverter proposed in an embodiment of the present invention abandons the method of installing multiple current sensors on the output side of the inverter, and only installs a resistor for current sampling at the midpoint trunk position of the DC bus of the three-level inverter, and samples the three-phase current through the switching state of the power switch tube at different times, thereby reducing the volume and cost of the inverter, and avoiding the influence of the current sensor parameter error on the system control accuracy. When the reference voltage vector passes through the current unobservable area, the action time of the vector can be increased, and according to the switch redundancy and volt-second characteristics of the three-level inverter, combined with the vector synthesis order of Table 3, other space vectors are introduced to offset the influence of the increased vector action time on the reference vector synthesis, and the target space voltage vector used to obtain the reference voltage vector is updated, and the synthesis order of the updated target space voltage vector is adjusted to increase the phase current observable area, thereby increasing the current sampling accuracy.

[0160] Reference Fig.12 , shows a logic diagram of a current determination method for a three-level inverter provided by an embodiment of the present invention, in order to enable those skilled in the art to better understand the embodiment of the present invention, the following is a Fig.12 The embodiments of the present invention are described as follows:

[0161] 1) obtaining the position information of the reference voltage vector of the three-level inverter in the space vector diagram, and referring to Table 2, determining the synthesis order of the target space voltage vector for obtaining the reference voltage vector;

[0162] 2) Determine whether the vector action time is less than the preset sampling time;

[0163] 3) If the vector action time is less than the preset sampling time, that is, the current enters the unobservable region, refer to Table 3, increase the observable region of the phase current, update the target space voltage vector used to obtain the reference voltage vector, and adjust the synthesis order of the updated target space voltage vector;

[0164] 4) If the vector action time is greater than the preset sampling time, the voltage of the sampling resistor is collected according to the vector synthesis order;

[0165] 5) Using Table 1, the phase current is calculated based on the voltage of the sampling resistor.

[0166] A method for determining the current of a three-level inverter proposed in an embodiment of the present invention abandons the method of installing multiple current sensors on the output side of the inverter, and only installs a resistor for current sampling at the midpoint trunk position of the DC bus of the three-level inverter, and samples the three-phase current through the switching state of the power switch tube at different times, thereby reducing the volume and cost of the inverter, and avoiding the influence of the current sensor parameter error on the system control accuracy. When the reference voltage vector passes through the current unobservable area, the action time of the vector can be increased, and according to the switch redundancy and volt-second characteristics of the three-level inverter, combined with the vector synthesis order of Table 3, other space vectors are introduced to offset the influence of the increased vector action time on the reference vector synthesis, and the target space voltage vector used to obtain the reference voltage vector is updated, and the synthesis order of the updated target space voltage vector is adjusted to increase the phase current observable area, thereby increasing the current sampling accuracy.

[0167] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0168] Reference Fig.13 , shows a structural block diagram of a current determination device for a three-level inverter provided by an embodiment of the present invention, wherein the three-level inverter comprises a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors, wherein the two voltage-dividing capacitors are connected in series between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm is connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm comprises two clamping diodes connected in series, and the midpoint of the two clamping diodes of each phase bridge arm is connected to the midpoint of the two voltage-dividing capacitors through the sampling resistor, and the device may specifically include the following modules:

[0169] A position information acquisition module 301 is used to acquire position information of a reference voltage vector of the three-level inverter in a space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system;

[0170] A synthesis order determination module 302, configured to determine a synthesis order of a target space voltage vector for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram;

[0171] The resistor voltage determination module 303 is used to determine the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm according to the synthesis order of the target space voltage vector;

[0172] The output current determination module 304 is used to obtain the current switch state combination of the three-phase bridge arm, and when the current switch state combination of the three-phase bridge arm meets the preset condition, determine the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

[0173] In an embodiment of the present invention, the device further includes:

[0174] A preset time acquisition module is used to obtain a preset sampling time;

[0175] A synthesis order adjustment module is used to update the target space voltage vector used to obtain the reference voltage vector according to the preset sampling time and the position information of the reference voltage vector when the sampling time for collecting the voltage of the sampling resistor is less than the preset sampling time, and adjust the synthesis order of the updated target space voltage vector.

[0176] In an embodiment of the present invention, each phase bridge arm of the three-phase bridge arm further includes a first switch, a second switch, a third switch and a fourth switch connected in series; one end of the first switch is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes connected in series is connected between the first switch and the second switch, and the other end is connected between the third switch and the fourth switch; and the stator winding corresponding to the three-phase motor is connected between the second switch and the third switch.

[0177] In an embodiment of the present invention, the preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector;

[0178] The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

[0179] In an embodiment of the present invention, the space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors;

[0180] The position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: the target sector where the reference voltage vector is located in the equilateral hexagon, and the target sub-sector where the reference voltage vector is located in the target sector;

[0181] The synthesis order determination module 302 includes:

[0182] The synthesis order determination submodule is used to determine the synthesis order of the target space voltage vector used to obtain the reference voltage vector according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

[0183] In the embodiment of the present invention, the output current determination module 304 includes:

[0184] A resistance current determination submodule, used to determine the current of the sampling resistor according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the combination of the current switch state;

[0185] The output current determination submodule is used to use the current of the sampling resistor as the output phase current of the three-level inverter when the current switch state combination of the three-phase bridge arm meets a preset condition.

[0186] In an embodiment of the present invention, the preset time acquisition module includes: The preset time acquisition submodule is used to obtain the preset sampling time according to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time according to the following formula:

[0189] Among them, T min is the preset sampling time, T death is the preset dead time, T on / off is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T AD is the sampling time.

[0190] A three-level inverter current determination device proposed in an embodiment of the present invention abandons the method of installing multiple current sensors on the output side of the inverter, and only installs a resistor for current sampling at the midpoint trunk position of the DC bus of the three-level inverter, and samples the three-phase current through the switching state of the power switch tube at different times, thereby reducing the volume and cost of the inverter. When the reference voltage vector passes through the current unobservable area, the action time of the vector can be increased, and according to the switch redundancy and volt-second characteristics of the three-level inverter, combined with the vector synthesis order in Table 3, other space vectors are introduced to offset the influence of increasing the vector action time on the reference vector synthesis, and the target space voltage vector used to obtain the reference voltage vector is updated, and the synthesis order of the updated target space voltage vector is adjusted to increase the phase current observable area, thereby increasing the current sampling accuracy.

[0191] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0192] The embodiment of the present invention further provides a three-level inverter, comprising: a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors; the two voltage-dividing capacitors are connected in series between the positive electrode and the negative electrode of the DC bus of the three-level inverter, each phase bridge arm of the three-phase bridge arm is connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, each phase bridge arm of the three-phase bridge arm comprises two clamping diodes connected in series, and the midpoint of the two clamping diodes of each phase bridge arm is connected to the midpoint of the two voltage-dividing capacitors through the sampling resistor;

[0193] The output phase current of the three-level inverter is obtained according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination when the current switch state combination of the three-phase bridge arm meets the preset condition; the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is obtained according to the synthesis order of the target space voltage vector of the reference voltage vector of the three-level inverter; the synthesis order of the target space voltage vector is obtained according to the position information of the reference voltage vector in the space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter to a stationary coordinate system.

[0194] In the embodiment of the present invention, the synthesis order of the target space voltage vector is obtained according to the preset sampling time and the position information of the reference voltage vector when the sampling time of collecting the voltage of the sampling resistor is less than the preset sampling time.

[0195] In an embodiment of the present invention, each phase bridge arm of the three-phase bridge arm further includes a first switch, a second switch, a third switch and a fourth switch connected in series; one end of the first switch is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes connected in series is connected between the first switch and the second switch, and the other end is connected between the third switch and the fourth switch; and the stator winding corresponding to the three-phase motor is connected between the second switch and the third switch.

[0196] In an embodiment of the present invention, the preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector;

[0197] The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

[0198] In an embodiment of the present invention, the space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors;

[0199] The position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: the target sector where the reference voltage vector is located in the equilateral hexagon, and the target sub-sector where the reference voltage vector is located in the target sector;

[0200] The synthesis order of the target space voltage vector of the reference voltage vector is obtained according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

[0201] In an embodiment of the present invention, when the current switch state combination of the three-phase bridge arm meets a preset condition, the output phase current of the three-level inverter is the current of the sampling resistor; the current of the sampling resistor is obtained according to the resistance value of the sampling resistor and the voltage of the sampling resistor.

[0202] In the embodiment of the present invention, the preset sampling time is obtained according to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time according to the following formula:

[0204] Among them, T minis the preset sampling time, T death is the preset dead time, T on / off is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T AD is the sampling time.

[0205] In an embodiment of the present invention, the three-level inverter further includes: a voltage sensor, the voltage sensor being connected in parallel with the sampling resistor;

[0206] The voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is acquired by the voltage sensor according to the synthesis order of the target space voltage vector of the reference voltage vector of the three-level inverter.

[0207] A three-level inverter proposed in an embodiment of the present invention abandons the method of installing multiple current sensors on the output side of the inverter, and only installs a resistor for current sampling at the midpoint trunk position of the DC bus of the three-level inverter, and samples the three-phase current through the switching state of the power switch tube at different times, thereby reducing the volume and cost of the inverter. When the reference voltage vector passes through the current unobservable area, the action time of the vector can be increased, and according to the switch redundancy and volt-second characteristics of the three-level inverter, combined with the vector synthesis order in Table 3, other space vectors are introduced to offset the influence of increasing the vector action time on the reference vector synthesis, and the target space voltage vector used to obtain the reference voltage vector is updated, and the synthesis order of the updated target space voltage vector is adjusted to increase the phase current observable area, thereby increasing the current sampling accuracy.

[0208] The embodiment of the present invention further provides an electrical device, comprising the above-mentioned three-level inverter, and a controller;

[0209] The controller is used to obtain the position information of the reference voltage vector of the three-level inverter in the space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system; according to the position information of the reference voltage vector in the space vector diagram, determine the synthesis order of the target space voltage vector used to obtain the reference voltage vector; according to the synthesis order of the target space voltage vector, determine the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm; obtain the current switch state combination of the three-phase bridge arm, and when the current switch state combination of the three-phase bridge arm meets the preset condition, determine the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

[0210] An embodiment of the present invention further provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned method for determining the current of a three-level inverter when executing the computer program.

[0211] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned method for determining the current of a three-level inverter are implemented.

[0212] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0213] Those skilled in the art will appreciate that the embodiments of the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more machine-readable media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0214] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0215] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0216] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0217] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0218] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0219] The above is a detailed introduction to a current determination method for a three-level inverter and a three-level inverter provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for determining current of a three-level inverter, characterized in that: The three-level inverter comprises a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors, the two voltage-dividing capacitors are connected in series between the positive electrode and the negative electrode of the DC bus of the three-level inverter, each phase bridge arm of the three-phase bridge arm is connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, each phase bridge arm of the three-phase bridge arm comprises two clamping diodes connected in series, and the midpoint of the two clamping diodes of each phase bridge arm is connected to the midpoint of the two voltage-dividing capacitors through the sampling resistor, and the method comprises: Acquire position information of a reference voltage vector of the three-level inverter in a space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system; Determining a synthesis order of target space voltage vectors for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram; Determining the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm according to the synthesis order of the target space voltage vector; The current switch state combination of the three-phase bridge arm is obtained, and when the current switch state combination of the three-phase bridge arm meets a preset condition, the output phase current of the three-level inverter is determined according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

2. The method according to claim 1, characterized in that: The method further comprises: Get the preset sampling time; When the sampling time for collecting the voltage of the sampling resistor is less than the preset sampling time, the target space voltage vector used to obtain the reference voltage vector is updated according to the preset sampling time and the position information of the reference voltage vector, and the synthesis order of the updated target space voltage vector is adjusted.

3. The method according to claim 1, characterized in that Each phase bridge arm of the three-phase bridge arm further includes a first switch, a second switch, a third switch and a fourth switch connected in series; one end of the first switch is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes connected in series is connected between the first switch and the second switch, and the other end is connected between the third switch and the fourth switch; and the stator winding corresponding to the three-phase motor is connected between the second switch and the third switch.

4. The method according to claim 3, characterized in that The preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector; The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

5. The method according to claim 1, characterized in that The space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors; The position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: the target sector where the reference voltage vector is located in the equilateral hexagon, and the target sub-sector where the reference voltage vector is located in the target sector; The step of determining a synthesis order of target space voltage vectors for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram comprises: A synthesis order of target space voltage vectors for obtaining the reference voltage vector is determined according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

6. The method according to claim 1, characterized in that Determining the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination includes: Determine the current of the sampling resistor according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the combination of the current switch state; When the current switch state combination of the three-phase bridge arm meets a preset condition, the current of the sampling resistor is used as the output phase current of the three-level inverter.

7. The method according to claim 2, characterized in that: The obtaining of the preset sampling time comprises: According to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time, the preset sampling time is obtained according to the following formula: T min =T death +T on / off +T rise +T sr +T AD Among them, T min is the preset sampling time, T death is the preset dead time, T on / ogf is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T AD is the sampling time.

8. A current determination device for a three-level inverter, characterized in that: The three-level inverter comprises a three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors, the two voltage-dividing capacitors are connected in series between the positive electrode and the negative electrode of the DC bus of the three-level inverter, each phase bridge arm of the three-phase bridge arm is connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, each phase bridge arm of the three-phase bridge arm comprises two clamping diodes connected in series, and the midpoint of the two clamping diodes of each phase bridge arm is connected to the midpoint of the two voltage-dividing capacitors through the sampling resistor, and the device comprises: A position information acquisition module, used to acquire position information of a reference voltage vector of the three-level inverter in a space vector diagram; the reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system; A synthesis order determination module, used to determine a synthesis order of a target space voltage vector for obtaining the reference voltage vector according to position information of the reference voltage vector in the space vector diagram; A resistor voltage determination module, used to determine the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm according to the synthesis order of the target space voltage vector; The output current determination module is used to obtain the current switch state combination of the three-phase bridge arm, and when the current switch state combination of the three-phase bridge arm meets the preset condition, determine the output phase current of the three-level inverter according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

9. A three-level inverter, characterized in that: include: A three-phase bridge arm, a sampling resistor and two voltage-dividing capacitors; the two voltage-dividing capacitors are connected in series between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm is connected in parallel between the positive electrode and the negative electrode of the DC bus of the three-level inverter, and each phase bridge arm of the three-phase bridge arm includes two clamping diodes connected in series, and the midpoint of the two clamping diodes of each phase bridge arm is connected to the midpoint of the two voltage-dividing capacitors through the sampling resistor; The output phase current of the three-level inverter is obtained according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination when the current switch state combination of the three-phase bridge arm meets the preset condition; the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is obtained according to the synthesis order of the target space voltage vector of the reference voltage vector of the three-level inverter; The synthesis order of the target space voltage vector is obtained according to the position information of the reference voltage vector in the space vector diagram; The reference voltage vector is obtained by mapping the output voltage of the three-level inverter onto a stationary coordinate system.

10. The three-level inverter according to claim 9, characterized in that: The synthesis order of the target space voltage vector is obtained according to the preset sampling time and the position information of the reference voltage vector when it is determined that the sampling time of the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is less than the preset sampling time.

11. The three-level inverter according to claim 9, characterized in that: Each phase bridge arm of the three-phase bridge arm further includes a first switch, a second switch, a third switch and a fourth switch connected in series; one end of the first switch is connected to the positive electrode of the DC bus of the three-level inverter, and one end of the fourth switch is connected to the negative electrode of the DC bus of the three-level inverter; one end of the two clamping diodes connected in series is connected between the first switch and the second switch, and the other end is connected between the third switch and the fourth switch; and the stator winding corresponding to the three-phase motor is connected between the second switch and the third switch.

12. The three-level inverter according to claim 11, characterized in that: The preset condition includes: the space voltage vector corresponding to the current switch state combination of the three-phase bridge arm is the first vector or the second vector; The switch state combination corresponding to the first vector is that the switch states of two phase bridge arms in the three-phase bridge arms are the same, and the switch state of at least one phase bridge arm is that the second switch or the third switch is turned on, and the first switch and the fourth switch are turned off; the switch state combination corresponding to the second vector is that the switch state of each phase bridge arm of the three-phase bridge arms is different from each other.

13. The three-level inverter according to claim 9, characterized in that: The space vector diagram is an equilateral hexagon; the equilateral hexagon includes a plurality of sectors, and the sector includes a plurality of sub-sectors; The position information of the reference voltage vector of the three-level inverter in the space vector diagram includes: the target sector where the reference voltage vector is located in the equilateral hexagon, and the target sub-sector where the reference voltage vector is located in the target sector; The synthesis order of the target space voltage vector of the reference voltage vector is obtained according to the target sector where the reference voltage vector is located in the equilateral hexagon and the target sub-sector where the reference voltage vector is located in the target sector.

14. The three-level inverter according to claim 9, characterized in that: When the current switch state combination of the three-phase bridge arm meets the preset condition, the output phase current of the three-level inverter is the current of the sampling resistor; the current of the sampling resistor is obtained according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

15. The three-level inverter according to claim 10, characterized in that: The preset sampling time is obtained according to the preset dead time, the preset switch on / off time, the preset current rise time, the preset current oscillation time and the sampling time according to the following formula: T min =T death +T on / off +T rise +T sr +T AD Among them, T min is the preset sampling time, T death is the preset dead time, T on / off is the preset switch on and off time, T rise is the preset current rise time, T sr is the preset current oscillation time, T AD is the sampling time.

16. The three-level inverter according to claim 9, characterized in that: Also includes: A voltage sensor, the voltage sensor is connected in parallel with the sampling resistor; The voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is acquired by the voltage sensor according to the synthesis order of the target space voltage vector of the reference voltage vector of the three-level inverter.

17. An electrical device, characterized in that: Comprising the three-level inverter according to claims 9 to 16, and a controller; The controller is used to obtain position information of a reference voltage vector of the three-level inverter in a space vector diagram; The reference voltage vector is obtained by mapping the output voltage of the three-level inverter in a stationary coordinate system; according to the position information of the reference voltage vector in the space vector diagram, a synthesis order of the target space voltage vector for obtaining the reference voltage vector is determined; according to the synthesis order of the target space voltage vector, the voltage of the sampling resistor corresponding to the switch state combination of the three-phase bridge arm is determined; the current switch state combination of the three-phase bridge arm is obtained, and when the current switch state combination of the three-phase bridge arm meets a preset condition, the output phase current of the three-level inverter is determined according to the resistance value of the sampling resistor and the voltage of the sampling resistor corresponding to the current switch state combination.

18. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, the steps of a current determination method for a three-level inverter as claimed in any one of claims 1 to 7 are implemented.

19. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the current determination method for a three-level inverter according to any one of claims 1 to 7 are implemented.

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