Heat treatment method

Abstract

The invention provides a heat treatment method capable of reducing heat applied to a substrate. In this heat treatment method, a semiconductor wafer is preheated to a predetermined preheating temperature by irradiation with light from a halogen lamp, and then flash heating is performed by irradiating a flash light onto the surface of the semiconductor wafer from a flash lamp and heating the surface for 1 second or less. The flash heating includes first flash heating for raising the temperature of the surface of the semiconductor wafer at a first temperature raising rate and second flash heating for raising the temperature of the surface at a higher second temperature raising rate. The preheating temperature is set to be lower than the reaction temperature at which the reaction occurs on the semiconductor wafer, the insufficient part of the preheating is compensated by the first flash heating, and finally the surface of the semiconductor wafer is heated to the target processing temperature by the second flash heating. Since preheating is compensated by millisecond flash heating, the amount of heat applied to the semiconductor wafer can be reduced compared to the prior art.

Description

Technical Field

[0001] The present invention relates to a heat treatment method for heating a substrate by irradiating light onto the substrate. The substrate to be treated includes, for example, a semiconductor wafer, a substrate for a liquid crystal display device, a substrate for an FPD (flat panel display), a substrate for an optical disk, a substrate for a magnetic disk, or a substrate for a solar cell. Background Art

[0002] In the manufacturing process of semiconductor devices, flash lamp annealing (FLA) for heating semiconductor wafers in a very short time has attracted attention. Flash lamp annealing is a heat treatment technology that uses a xenon flash lamp (hereinafter referred to as a "flash lamp" to refer to a xenon flash lamp) to irradiate a flash of light onto the surface of a semiconductor wafer, thereby heating only the surface of the semiconductor wafer in a very short time (less than a few milliseconds).

[0003] The radiation spectrum of the xenon flash lamp is distributed from the ultraviolet region to the near-infrared region, which is shorter than the wavelength of the conventional halogen lamp and is basically consistent with the fundamental absorption band of the silicon semiconductor wafer. Therefore, when the xenon flash lamp is used to irradiate the semiconductor wafer with flash, the semiconductor wafer can be heated up quickly with less transmitted light. In addition, it has been found that if the flash is irradiated for an extremely short time of less than a few milliseconds, it is possible to selectively heat only the surface of the semiconductor wafer.

[0004] This type of flash lamp annealing is used for processes that require heating with a low thermal history (less heat applied), such as typically for activating impurities implanted into a semiconductor wafer. If a flash lamp is irradiated with a flash of light onto the surface of a semiconductor wafer into which impurities have been implanted by ion implantation, the surface of the semiconductor wafer can be heated to an activation temperature in a very short time, so that the thermal history is low, and thus only impurity activation can be performed without causing the impurities to diffuse deeply. Generally speaking, it is difficult to bring the surface of a semiconductor wafer to a target temperature by flash irradiation alone, so a flash of light is irradiated onto the surface of a semiconductor wafer that has been preheated to a specified temperature (for example, Patent Document 1).

[0005] Flash lamp annealing with an extremely short irradiation time can suppress the diffusion of impurities to a greater depth, but in recent years, it has been required to achieve high activation while suppressing diffusion at the angstrom level. For this reason, the thermal history in flash lamp annealing is required to be further reduced.

[0006] In addition, research is underway to use new materials such as germanium to replace silicon in the manufacture of semiconductor devices. Although germanium has a higher carrier mobility, its melting point is lower than that of silicon, and it has the property of reacting with ambient gases such as oxygen even at low temperatures. Therefore, in order to apply flash lamp annealing to new materials such as germanium, a process with a lower thermal history is required.

[0007] Furthermore, the three-dimensionalization of semiconductor devices represented by complementary field effect transistors (CFETs) is also being studied. CFETs have a stacked structure in which nMOS is stacked on pMOS. When flash lamp annealing is performed to form the upper nMOS, it is necessary not to cause excessive thermal influence on the completed lower pMOS to avoid deterioration of device characteristics. In other words, in this case, the thermal history in flash lamp annealing is also required to be further reduced.

[0008] [Background Technology Literature]

[0009] [Patent Document]

[0010] [Patent Document 1] Japanese Patent Application Publication No. 2018-101760 Summary of the invention

[0011] [Problems to be solved by the invention]

[0012] Thus, for various purposes, the thermal history in flash lamp annealing is required to be further reduced, but in general flash lamp annealing, the semiconductor wafer is preheated (auxiliary heating) to a predetermined temperature by a halogen lamp or the like before flash irradiation is performed. This is because, as described above, it is difficult to make the surface of the semiconductor wafer reach the target temperature by flash irradiation alone.

[0013] However, compared with flash heating using flash irradiation, the heating time of preheating using a halogen lamp or the like is significantly longer, and the heating rate is extremely slow. Typically, the heating time of flash heating is in the millisecond range, while the heating time of preheating is in the second range. In addition, the heating rate of flash heating is several million degrees Celsius per second, while the heating rate of preheating is several hundred degrees Celsius per second. Therefore, the amount of heat applied to the semiconductor wafer during preheating is inevitably increased, which hinders the low-heat process of flash lamp annealing.

[0014] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a heat treatment method capable of reducing the amount of heat applied to a substrate.

[0015] [Technical means to solve the problem]

[0016] In order to solve the above-mentioned problem, the first form of the present invention is a heat treatment method, which heats a substrate by irradiating light onto the substrate, and comprises: a preheating step, in which the substrate is heated to a preheating temperature lower than a reaction temperature of a reaction occurring on the substrate by irradiating light onto the substrate from a continuously lit lamp; and a flash heating step, in which, after the preheating step, a flash is irradiated onto the surface of the substrate from a flash lamp, so that the surface is heated in multiple stages to a treatment temperature higher than the reaction temperature in such a manner that the heating rate of the surface becomes higher towards the latter stage.

[0017] In addition, the second form is a heat treatment method according to the first form, wherein the flash heating process includes: a first flash process, irradiating a flash to the surface of the substrate so that the surface is heated to an intermediate temperature at a first heating rate; and a second flash process, subsequent to the first flash process, irradiating a flash to the surface of the substrate so that the surface is heated to the processing temperature at a second heating rate that is higher than the first heating rate.

[0018] In addition, the third form is a heat treatment method according to the second form, wherein the substrate has silicon as the main component, and the preheating temperature is above 400°C and below 700°C, the intermediate temperature is above 600°C and below 1000°C, and the processing temperature is above 1100°C and below 1300°C.

[0019] In addition, the fourth form is a heat treatment method according to the second form, wherein the substrate has germanium as the main component, and the preheating temperature is above 100°C and below 400°C, the intermediate temperature is above 300°C and below 600°C, and the processing temperature is above 600°C and below 900°C.

[0020] In addition, the fifth form is a heat treatment method according to the second form, wherein the substrate has silicon germanium as the main component, and the preheating temperature is above 300°C and below 600°C, the intermediate temperature is above 600°C and below 900°C, and the processing temperature is above 900°C and below 1200°C.

[0021] In addition, the 6th form is a heat treatment method according to any one of the 1st form to the 5th form, which further comprises a cooling process for reducing the temperature of the substrate after the flash heating process, and the cooling rate in the cooling process is more than 20% higher than the cooling rate when the surface of the substrate is heated to the processing temperature in one stage.

[0022] [Effects of the invention]

[0023] According to the heat treatment method of the first to sixth forms, after the substrate is heated to a preheating temperature lower than the reaction temperature of the reaction on the substrate by irradiating light from a continuously lit lamp, a flash lamp is used to irradiate a flash onto the surface of the substrate, thereby heating the surface in multiple stages in such a manner that the heating rate of the surface becomes higher toward the later stage. Therefore, the amount of heat applied to the substrate can be reduced compared to preheating by only continuously lighting the lamp.

[0024] In particular, according to the second form of the heat treatment method, a flash is irradiated onto the surface of the substrate to heat the surface to an intermediate temperature at a first heating rate, and then a flash is irradiated onto the surface of the substrate to heat the surface to a processing temperature at a second heating rate higher than the first heating rate, thereby being able to reduce the amount of heat applied to the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a longitudinal sectional view showing the structure of a heat treatment apparatus for carrying out the heat treatment method of the present invention.

[0026] Figure 2 It is a perspective view showing the overall appearance of the holding portion.

[0027] Figure 3 This is a top view of the base.

[0028] Figure 4 is a cross-sectional view of the base.

[0029] Figure 5 It is a top view of the transfer mechanism.

[0030] Figure 6 It is a side view of the transfer mechanism.

[0031] Figure 7 It is a top view showing the arrangement of a plurality of halogen lamps.

[0032] Figure 8 This is a diagram showing a driving circuit of a flash lamp.

[0033] Fig. 9 It is a flowchart showing the processing procedure of the heat treatment method of the present invention.

[0034] Fig.10 This is a graph showing temperature changes of a semiconductor wafer.

[0035] Fig.11 This is a diagram showing the change in surface temperature of a semiconductor wafer during two-stage flash heating. DETAILED DESCRIPTION

[0036] Hereinafter, with reference to the drawings, the embodiments of the present invention are described in detail. Hereinafter, as long as there is no special explanation, the expression (for example, "in a direction", "along a direction", "parallel", "orthogonal", "center", "concentric", "coaxial", etc.) representing the relative or absolute positional relationship not only strictly represents the positional relationship, but also represents the state of displacement in the tolerance or the range of obtaining the same degree of function. In addition, as long as there is no special explanation, the expression (for example, "same", "equal", "homogeneous", etc.) representing the equal state not only represents the state of strict quantitative equality, but also represents the state of difference in the existence of tolerance or the same degree of function. In addition, as long as there is no special explanation, the expression (for example, "circular", "quadrilateral", "cylindrical shape", etc.) representing the shape not only strictly represents the shape in geometry, but also represents the shape in the range of obtaining the same degree of effect, for example, it can also have concave-convex or chamfering, etc. In addition, each expression such as "equipped", "having", "equipped with", "including", "having" constituent elements is not an exclusive expression excluding the existence of other constituent elements. In addition, the expression "at least one of A, B, and C" includes "only A", "only B", "only C", "any two of A, B, and C", and "all of A, B, and C".

[0037] Figure 1 It is a longitudinal sectional view showing the structure of a heat treatment apparatus 1 for carrying out the heat treatment method of the present invention. Figure 1 The heat treatment device 1 is a flash lamp annealing device that heats a disk-shaped semiconductor wafer W as a substrate by flash irradiation. The size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, φ300 mm or φ450 mm (φ300 mm in this embodiment). Figure 1 In the following drawings, the size or number of each component is exaggerated or simplified as necessary to facilitate understanding.

[0038] The heat treatment device 1 includes: a chamber 6 for accommodating a semiconductor wafer W; a flash heating unit 5 for housing a plurality of flash lamps FL; and a halogen heating unit 4 for housing a plurality of halogen lamps HL. The flash heating unit 5 is provided on the upper side of the chamber 6, and the halogen heating unit 4 is provided on the lower side. In addition, the heat treatment device 1 includes: a holding unit 7 for holding the semiconductor wafer W in a horizontal position inside the chamber 6; and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding unit 7 and the outside of the device. Furthermore, the heat treatment device 1 includes a control unit 3 for controlling each operating mechanism provided in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to perform heat treatment of the semiconductor wafer W.

[0039] The chamber 6 is formed by installing chamber windows made of quartz on the upper and lower parts of a cylindrical chamber side portion 61. The chamber side portion 61 has a generally cylindrical shape with upper and lower openings, and the upper opening is closed by installing an upper chamber window 63, and the lower opening is closed by installing a lower chamber window 64. The upper chamber window 63 constituting the top wall of the chamber 6 is a disk-shaped component formed of quartz, and functions as a quartz window that allows the flash emitted from the flash heating unit 5 to be transmitted into the chamber 6. In addition, the lower chamber window 64 constituting the bottom part of the chamber 6 is also a disk-shaped component formed of quartz, and functions as a quartz window that allows the light from the halogen heating unit 4 to be transmitted into the chamber 6.

[0040] In addition, a reflection ring 68 is installed on the upper part of the inner wall of the chamber side portion 61, and a reflection ring 69 is installed on the lower part. Both the reflection rings 68 and 69 are formed in a circular ring shape. The upper reflection ring 68 is installed by embedding from the upper side of the chamber side portion 61. On the other hand, the lower reflection ring 69 is installed by embedding from the lower side of the chamber side portion 61 and fixing it with screws omitted from the figure. That is, the reflection rings 68 and 69 are both installed on the chamber side portion 61 so as to be freely loaded and unloaded. The inner space of the chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61 and the reflection rings 68 and 69 is defined as a heat treatment space 65.

[0041] By installing the reflection rings 68 and 69 on the chamber side portion 61, a recessed portion 62 is formed on the inner wall surface of the chamber 6. That is, the recessed portion 62 is formed to be surrounded by the central portion of the inner wall surface of the chamber side portion 611 where the reflection rings 68 and 69 are not installed, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69. The recessed portion 62 is formed in a circular ring shape along the horizontal direction on the inner wall surface of the chamber 6, surrounding the holding portion 7 holding the semiconductor wafer W. The chamber side portion 611 and the reflection rings 68 and 69 are formed of a metal material (e.g., stainless steel) having excellent strength and heat resistance.

[0042] In addition, a transport opening (furnace port) 66 is formed on the chamber side 61 for carrying in and out the semiconductor wafer W relative to the chamber 6. The transport opening 66 can be opened and closed by the gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transport opening 66, the semiconductor wafer W can be carried into the heat treatment space 65 from the transport opening 66 through the recess 62, and the semiconductor wafer W can be carried out from the heat treatment space 65. In addition, when the gate valve 185 closes the transport opening 66, the heat treatment space 65 in the chamber 6 becomes a closed space.

[0043] Furthermore, a through hole 61a and a through hole 61b are formed in the chamber side portion 61. The through hole 61a is a cylindrical hole for guiding infrared light emitted from the upper surface of the semiconductor wafer W held on the susceptor 74 described below to the infrared sensor 29 of the upper radiation thermometer 25. On the other hand, the through hole 61b is a cylindrical hole for guiding infrared light emitted from the lower surface of the semiconductor wafer W to the lower radiation thermometer 20. The through hole 61a and the through hole 61b are arranged obliquely with respect to the horizontal direction in such a manner that the axis of the through direction thereof intersects with the main surface of the semiconductor wafer W held on the susceptor 74. A transparent window 26 is installed at the end of the through hole 61a facing the heat treatment space 65 side, and the transparent window 26 contains a calcium fluoride material that allows infrared light in the wavelength range that can be measured by the upper radiation thermometer 25 to pass through. Furthermore, a transparent window 21 made of a barium fluoride material that transmits infrared light in a wavelength range that can be measured by the lower radiation thermometer 20 is attached to the end of the through hole 61 b ​​facing the heat treatment space 65 .

[0044] In addition, a gas supply hole 81 is formed at the upper part of the inner wall of the chamber 6 for supplying a processing gas to the heat treatment space 65. The gas supply hole 81 is formed at a position higher than the recess 62, and may also be provided at the reflection ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 via a buffer space 82 formed in a circular ring shape inside the side wall of the chamber 6. The gas supply pipe 83 is connected to a processing gas supply source 85. In addition, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 diffuses and flows in the buffer space 82 where the fluid resistance is smaller than that of the gas supply hole 81, and is supplied from the gas supply hole 81 to the heat treatment space 65. As the processing gas, for example, nitrogen (N 2 ) or other inert gases, or hydrogen (H 2 ), ammonia (NH 3 ) or a mixed gas obtained by mixing them (nitrogen in this embodiment).

[0045] On the other hand, a gas discharge hole 86 for discharging the gas in the heat treatment space 65 is formed at the lower part of the inner wall of the chamber 6. The gas discharge hole 86 is formed at a position lower than the recess 62, and can also be set at the reflection ring 69. The gas discharge hole 86 is connected to the gas discharge pipe 88 through the buffer space 87 formed in a circular ring shape inside the side wall of the chamber 6. The gas discharge pipe 88 is connected to the exhaust part 190. In addition, a valve 89 is inserted in the middle of the path of the gas discharge pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas discharge hole 86 through the buffer space 87 to the gas discharge pipe 88. In addition, the gas supply hole 81 and the gas discharge hole 86 can be set in multiple numbers along the circumferential direction of the chamber 6, or they can be slit-shaped. In addition, the processing gas supply source 85 and the exhaust part 190 can be a mechanism set in the heat treatment device 1, or it can be a facility of a factory where the heat treatment device 1 is set.

[0046] A gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the front end of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.

[0047] Figure 2 : is a perspective view showing the overall appearance of the holding part 7. The holding part 7 is composed of a base ring 71, a connecting part 72 and a base 74. The base ring 71, the connecting part 72 and the base 74 are all formed of quartz. That is, the holding part 7 is formed of quartz as a whole.

[0048] The base ring 71 is a quartz component with a circular arc shape formed by removing a portion of the circular ring. The removed portion is provided to prevent the transfer arm 11 of the transfer mechanism 10 described below from interfering with the base ring 71. The base ring 71 is supported by the wall surface of the chamber 6 by being placed on the bottom surface of the recess 62 (see Figure 1 ). On the upper surface of the base ring 71, a plurality of connecting parts 72 (four in this embodiment) are provided vertically along the circumferential direction of the annular shape. The connecting part 72 is also a quartz component and is fixed to the base ring 71 by welding.

[0049] The base 74 is supported by four connection parts 72 provided on the base ring 71 . Figure 3 74 is a top view of the base. Figure 4 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate-shaped member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger plane size than the semiconductor wafer W.

[0050] A guide ring 76 is provided on the peripheral portion of the upper surface of the retaining plate 75. The guide ring 76 is a ring-shaped component having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 is an inclined surface that becomes wider from the retaining plate 75 upward. The guide ring 76 is formed of the same quartz as the retaining plate 75. The guide ring 76 can be welded to the upper surface of the retaining plate 75, or it can be fixed to the retaining plate 75 by a separately processed pin or the like. Alternatively, the retaining plate 75 and the guide ring 76 can be processed as an integral component.

[0051] The area on the upper surface of the holding plate 75 that is inside the guide ring 76 is set as a planar holding surface 75a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In the present embodiment, along the circumference of the concentric circle of the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76), one substrate support pin 77 is erected every 30°, for a total of 12. The diameter of the circle on which the 12 substrate support pins 77 are arranged (the distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is φ300 mm, the diameter of the circle on which the 12 substrate support pins 77 are arranged is φ270 mm to φ280 mm (φ270 mm in the present embodiment). Each substrate support pin 77 is formed of quartz. A plurality of substrate support pins 77 can be set on the upper surface of the holding plate 75 by welding, or can be processed integrally with the holding plate 75.

[0052] Back to Figure 2 The four connecting parts 72 erected on the base ring 71 and the peripheral part of the holding plate 75 of the base 74 are fixed by welding. That is, the base 74 and the base ring 71 are fixedly connected by the connecting parts 72. The holding part 7 is installed in the chamber 6 by supporting the base ring 71 of the holding part 7 by the wall surface of the chamber 6. In the state where the holding part 7 is installed in the chamber 6, the holding plate 75 of the base 74 is in a horizontal posture (a posture in which the normal line is consistent with the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal plane.

[0053] The semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal posture on the pedestal 74 of the holding portion 7 installed in the chamber 6. At this time, the semiconductor wafer W is supported by 12 substrate support pins 77 erected on the holding plate 75, and is held on the pedestal 74. More strictly speaking, the upper ends of the 12 substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. The heights of the 12 substrate support pins 77 (the distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75) are uniform, so the semiconductor wafer W can be supported in a horizontal posture by the 12 substrate support pins 77.

[0054] In addition, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined interval from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents the semiconductor wafer W supported by the plurality of substrate support pins 77 from being displaced in the horizontal direction.

[0055] In addition, if Figure 2 and Figure 3 As shown, an opening 78 is formed in the holding plate 75 of the base 74 so as to penetrate from top to bottom. The opening 78 is provided so as to allow the lower radiation thermometer 20 to receive the radiation light (infrared light) emitted from the lower surface of the semiconductor wafer W. That is, the lower radiation thermometer 20 receives the light emitted from the lower surface of the semiconductor wafer W through the opening 78 and the transparent window 21 installed in the through hole 61b of the chamber side 61, thereby measuring the temperature of the semiconductor wafer W. Furthermore, four through holes 79 are formed in the holding plate 75 of the base 74, and the through holes 79 are used for the lift pins 12 of the transfer mechanism 10 described below to penetrate when the semiconductor wafer W is transferred.

[0056] Figure 5 1 is a top view of the transfer mechanism 10. Figure 6 1 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arms 11 are in an arc shape along the substantially annular recess 62. Two lift pins 12 are vertically provided on each transfer arm 11. The transfer arms 11 and the lift pins 12 are formed of quartz. Each transfer arm 11 can be rotated by a horizontal moving mechanism 13. The horizontal moving mechanism 13 enables a pair of transfer arms 11 to be in a transfer operation position ( Figure 5 The solid line position) and the retreat position ( Figure 5 As the horizontal moving mechanism 13, each transfer arm 11 can be rotated separately by an independent motor, or a connecting rod mechanism can be used to rotate a pair of transfer arms 11 in conjunction with one motor.

[0057] In addition, the pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see Figure 2 , 3), the upper end of the lift pin 12 protrudes from the upper surface of the base 74. On the other hand, when the lifting mechanism 14 lowers the pair of transfer arms 11 in the transfer action position and pulls the lift pin 12 out of the through hole 79, and the horizontal moving mechanism 13 moves the pair of transfer arms 11 apart, each transfer arm 11 moves to the retreat position. The retreat position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. The base ring 71 is placed on the bottom surface of the recess 62, so the retreat position of the transfer arm 11 becomes the inner side of the recess 62. In addition, near the location where the drive portion (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is provided, an exhaust mechanism (not shown) is also provided, and the exhaust mechanism is configured to discharge the gas around the drive portion of the transfer mechanism 10 to the outside of the chamber 6.

[0058] Back to Figure 1 The flash heating unit 5 disposed above the chamber 6 is configured to include, on the inner side of a housing 51: a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL: and a reflector 52 disposed so as to cover the upper side of the light source. In addition, a light irradiation window 53 is installed at the bottom of the housing 51 of the flash heating unit 5. The light irradiation window 53 constituting the bottom portion of the flash heating unit 5 is a plate-shaped quartz window formed of quartz. By disposing the flash heating unit 5 above the chamber 6, the light irradiation window 53 is opposed to the upper chamber window 63. The flash lamp FL irradiates a flash from the upper side of the chamber 6 through the light irradiation window 53 and the upper chamber window 63 to the heat treatment space 65.

[0059] The flash lamps FL are rod-shaped lamps each having a long cylindrical shape and are arranged in a plane so that their longitudinal directions are parallel to each other along the main surface (i.e., along the horizontal direction) of the semiconductor wafer W held by the holding portion 7. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

[0060] Figure 8 is a diagram showing a driving circuit of the flash lamp FL. As shown in the figure, a capacitor 93, a coil 94, a flash lamp FL, and an IGBT (Insulated Gate Bipolar Transistor) 96 are connected in series. Figure 8 As shown, the control unit 3 includes a pulse generator 31 and a waveform setting unit 32, and is connected to an input unit 33. As the input unit 33, various well-known input devices such as a keyboard, a mouse, and a touch panel can be used. The waveform setting unit 32 sets the waveform of the pulse signal based on the input content from the input unit 33, and the pulse generator 31 generates a pulse signal based on the waveform.

[0061] The flash lamp FL includes: a rod-shaped glass tube (discharge tube) 92, in which xenon gas is sealed and an anode and a cathode are arranged at both ends; and a trigger electrode 91 attached to the outer peripheral surface of the glass tube 92. A predetermined voltage is applied to the capacitor 93 by a power supply unit 95, and a charge corresponding to the applied voltage (charging voltage) is supplied. In addition, a high voltage can be applied to the trigger electrode 91 from the trigger circuit 97. The timing of the trigger circuit 97 applying the voltage to the trigger electrode 91 is controlled by the control unit 3.

[0062] IGBT96 is a bipolar transistor formed by integrating MOSFET (Meta1 Oxide Semiconductor Field effect transistor) in the gate part, and is a switching element suitable for handling high power. A pulse signal is applied to the gate of IGBT96 from the pulse generator 31 of the control unit 3. When a voltage (high voltage) greater than a specified value is applied to the gate of IGBT96, IGBT96 becomes on, and when a voltage (low voltage) less than a specified value is applied, IGBT96 becomes off. In this way, the drive circuit including the flash lamp FL is turned on or off by using IGBT96. By turning on and off the IGBT96, the flash lamp FL and the corresponding capacitor 93 are intermittently connected, thereby controlling the on and off of the current flowing into the flash lamp FL.

[0063] Since xenon gas is an electrical insulator, even if IGBT 96 is turned on when capacitor 93 is charged and a high voltage is applied to both end electrodes of glass tube 92, the glass tube 92 is not energized in a normal state. However, when trigger circuit 97 applies a high voltage to trigger electrode 91 and breaks the insulation, current flows into glass tube 92 instantaneously due to discharge between the end electrodes, and light is radiated due to the excitation of atoms or molecules of xenon gas at this time.

[0064] like Figure 8 The driving circuits shown in FIG. 1 are separately provided in a plurality of flash lamps FL, and the plurality of flash lamps FL are provided in the flash heating unit 5. In this embodiment, 30 flash lamps FL are arranged in a plane, so as Figure 8 As shown in FIG. 1 , 30 drive circuits are provided corresponding to these. Therefore, the current flowing into each of the 30 flash lamps FL is individually controlled to be turned on or off by the corresponding IGBT 96 .

[0065] In addition, the reflector 52 is provided above the plurality of flash lamps FL in a manner covering the entirety thereof. The basic function of the reflector 52 is to reflect the flash emitted from the plurality of flash lamps FL to the side of the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and its surface (the surface facing the flash lamp FL side) is roughened by sandblasting.

[0066] The halogen heating unit 4 disposed below the chamber 6 has a plurality of (40 in this embodiment) halogen lamps HL built inside a housing 41. The halogen heating unit 4 is a light irradiation unit that heats the semiconductor wafer W by irradiating light from the bottom of the chamber 6 through the lower chamber window 64 into the heat treatment space 65 using the plurality of halogen lamps HL.

[0067] Figure 7 It is a top view showing the configuration of a plurality of halogen lamps HL. 40 halogen lamps HL are divided into two sections, upper and lower. 20 halogen lamps HL are arranged in the upper section close to the holding portion 7, and 20 halogen lamps HL are also arranged in the lower section farther from the holding portion 7 than the upper section. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in both the upper and lower sections are arranged in parallel with each other along the main surface of the semiconductor wafer W held in the holding portion 7 (i.e., along the horizontal direction) in their respective length directions. Therefore, the planes formed by the arrangement of the halogen lamps HL in the upper and lower sections are both horizontal planes.

[0068] In addition, if Figure 7 As shown, the upper and lower sections have a higher density of halogen lamps HL in the area opposite to the peripheral portion of the semiconductor wafer W held by the holding portion 7 than in the area opposite to the central portion. That is, the spacing of halogen lamps HL in the peripheral portion of the lamp arrangement is shorter than that in the central portion in the upper and lower sections. Therefore, the peripheral portion of the semiconductor wafer W, whose temperature is easily reduced when heated by light irradiation from the halogen heating unit 4, can be irradiated with more light.

[0069] In addition, the lamp group including the upper halogen lamps HL and the lamp group including the lower halogen lamps HL are arranged in a cross-lattice manner. That is, a total of 40 halogen lamps HL are arranged so that the length direction of the 20 halogen lamps HL arranged in the upper section and the length direction of the 20 halogen lamps HL arranged in the lower section are orthogonal to each other.

[0070] The halogen lamp HL is a filament-type light source, which emits light by energizing the filament disposed inside a glass tube to make the filament incandescent. Inside the glass tube, a gas obtained by introducing a trace amount of halogen elements (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is sealed. By introducing the halogen element, the breakage of the filament can be suppressed, and the temperature of the filament can be set to a high temperature. Therefore, compared with a conventional incandescent bulb, the halogen lamp HL has a longer life and can continuously irradiate strong light. That is, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least 1 second. In addition, the halogen lamp HL is a rod-shaped lamp, so it has a longer life, and by arranging the halogen lamp HL in the horizontal direction, the radiation efficiency to the semiconductor wafer W above becomes excellent.

[0071] In addition, a reflector 43 ( Figure 1 ). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 side.

[0072] like Figure 1 As shown, the heat treatment device 1 includes an upper radiation thermometer 25 and a lower radiation thermometer 20. The upper radiation thermometer 25 is disposed obliquely above the semiconductor wafer W held on the susceptor 74, and receives infrared light emitted from the upper surface of the semiconductor wafer W, thereby measuring the temperature of the upper surface. The infrared sensor 29 of the upper radiation thermometer 25 includes an InSb (indium antimonide) optical element so as to be able to cope with the rapid temperature change of the upper surface of the semiconductor wafer W at the moment of the irradiation flash. On the other hand, the lower radiation thermometer 20 is disposed obliquely below the semiconductor wafer W held on the susceptor 74, and receives infrared light emitted from the lower surface of the semiconductor wafer W, thereby measuring the temperature of the lower surface.

[0073] The control unit 3 controls the various action mechanisms provided in the heat treatment device 1. The hardware structure of the control unit 3 is the same as that of a general computer. That is, the control unit 3 includes a circuit for performing various calculations, namely a CPU (Central Processing Unit), a read-only memory for storing basic programs, namely a ROM (Read-Only Memory), a readable and writable memory for storing various information, namely a RAM (Random Access Memory), and a storage unit (such as a magnetic disk or SSD (Solid State Disk)) for storing control software or data. The processing in the heat treatment device 1 is performed by the CPU of the control unit 3 executing a prescribed processing program. In addition, the control unit 3 includes a pulse generator 31 and a waveform setting unit 32 ( Figure 8 ), the waveform setting unit 32 sets the waveform of the pulse signal based on the input content from the input unit 33, and accordingly, the pulse generator 31 outputs a pulse signal to the gate of the IGBT96.

[0074] In addition to the above-mentioned configuration, the heat treatment apparatus 1 also has various cooling structures to prevent the temperature of the halogen heating unit 4, the flash heating unit 5, and the chamber 6 from excessively rising due to the heat energy generated by the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. For example, a water cooling pipe (not shown) is provided on the wall of the chamber 6. In addition, the halogen heating unit 4 and the flash heating unit 5 are air-cooled structures, and air flow is formed inside to discharge heat. In addition, air is also supplied to the gap between the upper chamber window 63 and the lamp radiation window 53 to cool the flash heating unit 5 and the upper chamber window 63.

[0075] Next, the treatment procedure of the heat treatment method of the present invention will be described. Fig. 9 1 is a flowchart showing the processing procedure of the heat treatment method of the present invention. In this embodiment, the semiconductor wafer W to be processed is a semiconductor substrate with silicon as the main component. For the silicon semiconductor wafer W, impurities such as phosphorus (P) or boron (B) are implanted to a predetermined depth in advance by, for example, ion implantation.

[0076] First, the semiconductor wafer W to which impurities are added is moved into the chamber 6 (step S1). When the wafer is moved in, the valve 84 for gas supply is opened, and the exhaust valves 89 and 192 are opened at the same time, and the gas supply and exhaust in the chamber 6 are started. When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. In addition, when the valve 89 is opened, the gas in the chamber 6 is discharged from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward and is discharged from the lower part of the heat treatment space 65.

[0077] In addition, by opening the valve 192, the gas in the chamber 6 is also exhausted from the transfer opening 66. Furthermore, by omitting the exhaust mechanism shown in the figure, the gas around the driving part of the transfer mechanism 10 is also exhausted. In addition, when the semiconductor wafer W is heat-treated in the heat treatment apparatus 1, nitrogen gas is continuously supplied to the heat treatment space 65, and its supply amount is appropriately changed according to the treatment process.

[0078] Next, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W is transferred into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by a transfer robot outside the device. At this time, external air may be brought in with the transfer of the semiconductor wafer W, but since nitrogen gas is continuously supplied to the chamber 6, the nitrogen gas flows out from the transfer opening 66, and the external air brought in can be suppressed to a minimum.

[0079] The semiconductor wafer W carried in by the transfer robot enters and stops at a position just above the holding portion 7. Then, the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retracted position to the transfer operation position and rise, thereby allowing the lift pins 12 to pass through the through holes 79 and protrude from the upper surface of the holding plate 75 of the base 74, thereby receiving the semiconductor wafer W. At this time, the lift pins 12 rise to a position higher than the upper ends of the substrate support pins 77.

[0080] After the semiconductor wafer W is placed on the lift pins 12, the transport robot arm withdraws from the heat treatment space 65, and the transport opening 66 is closed by the gate valve 185. Then, by lowering the pair of transfer arms 11, the semiconductor wafer W is delivered from the transfer mechanism 10 to the base 74 of the holding portion 7 and held in a horizontal posture from below. The semiconductor wafer W is supported by a plurality of substrate support pins 77 erected on the holding plate 75 and held on the base 74. In addition, the semiconductor wafer W is held on the holding portion 7 with the surface into which the impurities are injected as the upper surface. A predetermined gap is formed between the back surface (the main surface on the opposite side to the front side) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 that have been lowered to the bottom of the base 74 are retreated to the retreat position, i.e., the inner side of the recess 62, by the horizontal moving mechanism 13.

[0081] After the semiconductor wafer W is held in a horizontal position from below by the base 74 of the holding part 7 formed of quartz, the 40 halogen lamps HL of the halogen heating part 4 are simultaneously lit to start preheating (auxiliary heating) (step S2). The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the base 74 formed of quartz, and irradiates the lower surface of the semiconductor wafer W. By receiving the light irradiation from the halogen lamp HL, the semiconductor wafer W is preheated and the temperature rises. In addition, the transfer arm 11 of the transfer mechanism 10 has retreated to the inner side of the recess 62, so it will not hinder the heating by the halogen lamp HL.

[0082] Figure 1 0 is a diagram showing the temperature change of the semiconductor wafer W. At time t1, the halogen lamp HL is turned on, and the semiconductor wafer W begins to heat up. When preheating is performed using the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the lower radiation thermometer 20. That is, the lower radiation thermometer 20 receives infrared light radiated from the lower surface of the semiconductor wafer W held on the base 74 through the opening 78 through the transparent window 21, thereby measuring the temperature of the wafer during heating. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W heated by the light irradiation from the halogen lamp HL reaches the prescribed preheating temperature T1. That is, the control unit 3 performs feedback control on the output of the halogen lamp HL based on the measured value obtained using the lower radiation thermometer 20 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1. In this way, the lower radiation thermometer 20 is a radiation thermometer for controlling the temperature of the semiconductor wafer W during preheating.

[0083] In the case of a silicon semiconductor wafer W, the preheating temperature T1 is 400° C. or higher and 700° C. or lower. If the preheating temperature T1 is lower than 400° C., it is difficult to raise the surface temperature of the semiconductor wafer W to the required processing temperature T3 during the subsequent flash heating. On the other hand, if the preheating temperature T1 exceeds 700° C., the impurities injected into the semiconductor wafer W begin to diffuse. That is, the preheating temperature T1 is lower than the reaction temperature at which the reaction (in this embodiment, the diffusion of impurities) occurs on the semiconductor wafer W.

[0084] After the temperature of the semiconductor wafer W reaches the preheating temperature T1 at time t2, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W approximately at the preheating temperature T1.

[0085] By preheating with the halogen lamp HL in this way, the temperature of the entire semiconductor wafer W is uniformly raised to the preheating temperature T1. In the stage of preheating with the halogen lamp HL, there is a tendency that the temperature of the peripheral portion of the semiconductor wafer W, which is easier to dissipate heat, drops lower than that of the central portion, and the arrangement density of the halogen lamp HL in the halogen heating unit 4 facing the peripheral portion of the semiconductor wafer W is higher than that of the central portion. Therefore, the amount of light irradiated to the peripheral portion of the semiconductor wafer W, which is easier to dissipate heat, increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.

[0086] At time t3 when the temperature of the semiconductor wafer W reaches the preheating temperature T1 and a predetermined time has passed, the flash lamp FL of the flash heating unit 5 flash-irradiates the surface of the semiconductor wafer W held on the susceptor 74. At this time, a part of the flash emitted from the flash lamp FL goes directly into the chamber 6, and another part is reflected by the reflector 52 and goes into the chamber 6, and the semiconductor wafer W is flash-heated by the flash irradiation.

[0087] When flash lamp FL performs flash irradiation, power supply unit 95 accumulates charge at a predetermined charging voltage in capacitor 93. Then, with charge accumulated in capacitor 93, pulse generator 31 of control unit 3 outputs a pulse signal to IGBT 96 to drive IGBT 96 on and off.

[0088] For example, by inputting a recipe that sequentially sets the pulse width time (on time) and the pulse interval time (off time) as parameters from the input unit 33, the waveform of the pulse signal can be specified. When the operator inputs such a recipe from the input unit 33 to the control unit 3, the waveform setting unit 32 of the control unit 3 sets a pulse waveform that repeatedly turns on and off accordingly. Then, the pulse generator 31 outputs a pulse signal according to the pulse waveform set by the waveform setting unit 32. As a result, a pulse signal of the set waveform is applied to the gate of the IGBT 96 to control the on and off drive of the IGBT 96. Specifically, when the pulse signal input to the gate of the IGBT 96 is turned on, the IGBT 96 is turned on, and when the pulse signal is turned off, the IGBT 96 is turned off.

[0089] In addition, the control unit 3 controls the trigger circuit 97 to apply a high voltage (trigger voltage) to the trigger electrode 91 in synchronization with the timing when the pulse signal output from the pulse generator 31 is turned on. In a state where the capacitor 93 stores charges, a high voltage is applied to the trigger electrode 91 in synchronization with the timing when a pulse signal is input to the gate of the IGBT 96 and the pulse signal is turned on. Thus, when the pulse signal is turned on, current flows between the electrodes at both ends of the glass tube 92, and light is radiated by the excitation of atoms or molecules of the xenon gas at this time.

[0090] In this way, the 30 flash lamps FL of the flash heating unit 5 emit light, and the flash light is irradiated to the surface of the semiconductor wafer W held by the holding unit 7. Here, if the IGBT 96 is not used when the flash lamp FL is emitted, the charge stored in the capacitor 93 will be consumed in one emission, and the output waveform from the flash lamp FL will become a simple single pulse with a width of about 0.1 milliseconds or 10 milliseconds. In contrast, in this embodiment, by connecting the IGBT 96 as a switching element in the circuit and outputting a pulse signal to its gate, the capacitor 93 is intermittently supplied with charge to the flash lamp FL by the IGBT 96, thereby controlling the on and off of the current flowing into the flash lamp FL. As a result, the emission of the flash lamp FL is controlled by chopping, the charge stored in the capacitor 93 is consumed in batches, and the flash lamp FL is repeatedly turned on and off in a very short time. In addition, before the current value flowing in the circuit completely becomes "0", the next pulse is applied to the gate of the IGBT 96 to increase the current value again, so that the light output of the flash lamp FL does not completely become "0" during the repeated on and off of the flash lamp FL.

[0091] By controlling the on / off of the current flowing into the flash lamp FL by using the IGBT 96, the light emission mode (time waveform of light emission output) of the flash lamp FL can be freely specified, thereby freely adjusting the light emission time and light emission intensity. The on / off drive mode of the IGBT 96 is specified by the pulse width time and pulse interval time input from the input unit 33. That is, by assembling the IGBT 96 in the drive circuit of the flash lamp FL, the light emission mode of the flash lamp FL can be freely specified by appropriately setting the pulse width time and pulse interval time input from the input unit 33.

[0092] Specifically, for example, if the ratio of the pulse width time input from the input unit 33 to the pulse interval time is increased, the current flowing into the flash lamp FL increases, and the light emission intensity becomes stronger. Conversely, if the ratio of the pulse width time input from the input unit 33 to the pulse interval time is decreased, the current flowing into the flash lamp FL decreases, and the light emission intensity becomes weaker. In addition, if the ratio of the pulse interval time input from the input unit 33 to the pulse width time is appropriately adjusted, the light emission intensity of the flash lamp FL is maintained constant. Furthermore, by lengthening the total time of the combination of the pulse width time and the pulse interval time input from the input unit 33, the current continues to flow in the flash lamp FL for a relatively long time, and the light emission time of the flash lamp FL becomes longer. The light emission time of the flash lamp FL is appropriately set between 0.1 milliseconds and 100 milliseconds. The maximum temperature reached on the surface of the semiconductor wafer W and the amount of heat input to the semiconductor wafer W are determined by the charging voltage of the capacitor 93 and the waveform of the light emission pattern of the flash lamp FL.

[0093] In this embodiment, the pulse signal applied to the gate of IGBT96 is set in such a manner as to become a light emitting mode of the flash lamp FL as follows, wherein the light emitting mode of the flash lamp FL performs two stages of flash heating, namely, a first flash heating in which the surface of the semiconductor wafer W is heated at a first heating rate and a second flash heating in which the surface is heated at a second heating rate. Fig.11 2 is a graph showing the temperature change of the surface of the semiconductor wafer W during the two-stage flash heating. Fig.10 This is an enlarged view of the vicinity of time t3. Impurities have been introduced into the surface of the semiconductor wafer W.

[0094] By performing the first stage of flash irradiation by the flash lamp FL from time t31 to time t32, the first flash heating (step S3) of increasing the temperature of the surface of the semiconductor wafer W at the first heating rate is performed. In the first flash heating, the surface of the semiconductor wafer W is heated from the preheating temperature T1 to the intermediate temperature T2 at the first heating rate. That is, the surface temperature of the semiconductor wafer W reaches the intermediate temperature T2 at time t32. By applying a pulse signal in which the ratio of the pulse width time to the pulse interval time is the first ratio to the IGBT 96, the current flowing into the flash lamp FL gradually increases, and the first flash heating of increasing the temperature of the surface of the semiconductor wafer W at the first heating rate is achieved.

[0095] The heating time ta of the first flash heating from time t31 to time t32 is 3 milliseconds or more. Preferably, the heating time ta of the first flash heating is 3 milliseconds or more and 40 milliseconds or less. In addition, the intermediate temperature T2 is 600°C or more and 1000°C or less. Preferably, the intermediate temperature T2 is 700°C or more and 1000°C or less.

[0096] Next, by performing the second stage of flash irradiation by the flash lamp FL from time t32 to time t33, the second flash heating of heating the surface of the semiconductor wafer W at the second heating rate is performed (step S4). In the second flash heating, the surface of the semiconductor wafer W is heated from the intermediate temperature T2 to the processing temperature T3 at the second heating rate. That is, the surface temperature of the semiconductor wafer W reaches the processing temperature T3 at time t33. The second heating rate is higher than the first heating rate. In addition, the processing temperature T3 is the highest temperature reached by the surface of the semiconductor wafer W in a series of heat treatments, and is of course higher than the preheating temperature T1 and the intermediate temperature T2. By applying a pulse signal of a second ratio in which the ratio of the pulse width time to the pulse interval time is larger than the first ratio to the IGBT96, the current flowing into the flash lamp FL is further increased, and the second flash heating of heating the surface of the semiconductor wafer W at the second heating rate is achieved.

[0097] The heating time tb of the second flash heating from time t32 to time t33 is less than 2 milliseconds. It is preferred that the heating time tb of the second flash heating is greater than 0.1 milliseconds and less than 2 milliseconds. That is, the heating time ta of the first flash heating is longer than the heating time tb of the second flash heating. In addition, the processing temperature T3 is greater than 1100°C and less than 1300°C, which is higher than the reaction temperature of the semiconductor wafer W. Through the second flash heating, the surface of the semiconductor wafer W reaches the processing temperature T3, thereby activating the impurities injected into the surface. In addition, Fig.10 The horizontal axis (time axis) is measured in seconds, whereas Fig.11 The horizontal axis is in milliseconds, so Fig.10 middle, Fig.11t31 to t33 are represented by overlapping with time t3.

[0098] At time t33, the pulse signal applied to IGBT96 is turned off, so that the flash from the flash lamp FL stops emitting light, and the surface temperature of the semiconductor wafer W drops rapidly (step S5). Thereafter, the halogen lamp HL is also turned off. As a result, the semiconductor wafer W is cooled rapidly from the preheating temperature T1 (step S4). Fig.10 ). The temperature of the semiconductor wafer W being cooled is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W is cooled to a specified temperature based on the measurement result of the lower radiation thermometer 20. Then, after the temperature of the semiconductor wafer W is cooled to below the specified temperature, the pair of transfer arms 11 of the transfer mechanism 10 are horizontally moved from the retreat position to the transfer action position and raised again, and the lift pins 12 protrude from the upper surface of the base 74 to receive the semiconductor wafer W after the heat treatment from the base 74. Next, the transport opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the lift pins 12 is moved out by the transport robot arm outside the device, and the heating treatment of the semiconductor wafer W in the heat treatment device 1 is completed (step S6). In addition, the surface temperature of the semiconductor wafer W that is rapidly heated and then cooled can also be measured by the upper radiation thermometer 25. The upper radiation thermometer 25 measures the surface temperature of the semiconductor wafer W at extremely short sampling intervals. Therefore, even if the surface temperature of the semiconductor wafer W changes rapidly during flash irradiation, the upper radiation thermometer 25 can follow the change.

[0099] In this embodiment, the semiconductor wafer W injected with impurities is irradiated with light from a halogen lamp HL to preheat the semiconductor wafer W to a preheating temperature T1, and then flash heating is performed: a flash is irradiated from a flash lamp FL to the surface of the semiconductor wafer W to heat the surface for less than 1 second. The preheating temperature T1 is lower than the reaction temperature at which the impurities diffuse. In the past, a large amount of heat was applied to the semiconductor wafer W during preheating, but by making the preheating temperature T1 lower than the reaction temperature at which the reaction occurs on the semiconductor wafer W, the amount of heat applied to the semiconductor wafer W during preheating can be suppressed to a low level, thereby preventing the diffusion of impurities.

[0100] However, if the preheating temperature T1 becomes low, the temperature increase by flash irradiation is limited, and therefore, there is a concern that the surface of the semiconductor wafer W may not be heated to the desired processing temperature T3 during flash heating. Therefore, in the present embodiment, two stages of flash heating are performed, and the two stages of flash heating include a first flash heating in which the surface of the semiconductor wafer W is heated at a first heating rate and a second flash heating in which the surface is heated at a higher second heating rate. The technical significance of the first flash heating is to perform auxiliary heating by flash irradiation from the flash lamp FL. That is, the surface temperature of the semiconductor wafer W is raised from the preheating temperature T1 to the intermediate temperature T2 by the first flash heating, and thus, the surface temperature of the semiconductor wafer W can reach the processing temperature T3 at the time of the second flash heating. The subsequent second flash heating has the same technical significance as the conventional flash heating, and raises the surface of the semiconductor wafer W to the processing temperature T3 to activate the implanted impurities.

[0101] In other words, the first flash heating by the flash lamp FL makes up for the lack of preheating caused by suppressing the preheating temperature T1 to a low level. Compared with the halogen lamp HL that performs heating in seconds, the flash heating by the flash lamp FL that performs heating in milliseconds can significantly reduce the amount of heat applied to the semiconductor wafer W. Fig.10 The dotted line in FIG. 1 shows the temperature change of the semiconductor wafer W when the preheating is performed only by the halogen lamp HL as in the past. Fig.10 In the present embodiment shown by the solid line in FIG. 1 , the preheating temperature T1 by the halogen lamp HL is suppressed to a low level, and the shortfall is compensated by the first stage of the two-stage flash heating, thereby making it possible to reduce the amount of heat applied to the semiconductor wafer W to a level lower than that in the conventional embodiment ( Fig.10 The dashed line shows a significant decrease compared to the

[0102] In addition, when the surface of the semiconductor wafer W is heated from the preheating temperature T1 to the processing temperature T3 by one stage of flash heating during flash heating, the temperature of the surface changes as shown in FIG. Fig.11 According to the two-stage flash heating ( Fig.11 solid line), with one stage of flash heating ( Fig.11 Compared with the dotted line, the heat applied to the surface of the semiconductor wafer W can be reduced by Fig.11In addition, compared with the one-stage flash heating, in the two-stage flash heating, when the light irradiated by the flash lamp is reflected by the semiconductor wafer W, the degree of temperature rise of the gas including the processing gas and the surrounding environment including the inner wall of the chamber 6 and other components is lower, thereby further promoting the heat dissipation of the semiconductor wafer W. That is, as in the present embodiment, after the semiconductor wafer W is heated to the preheating temperature T1 lower than the reaction temperature by the halogen lamp HL, the surface of the semiconductor wafer W is heated in two stages by the flash lamp FL, thereby further reducing the amount of heat applied to the semiconductor wafer W.

[0103] Furthermore, by performing two-stage flash heating as in the present embodiment, in the cooling stage after time t33, the cooling rate of the semiconductor wafer W during the two-stage flash heating can be made higher than the cooling rate during the one-stage flash heating to raise the surface temperature of the semiconductor wafer W from the preheating temperature T1 to the processing temperature T3 by 20% or more, preferably higher by 20% or more and lower than 50%. By increasing the cooling rate, the activated impurities can be prevented from being deactivated.

[0104] The embodiments of the present invention have been described above, but the present invention can be modified in various ways other than the above without departing from the main purpose thereof. For example, in the above embodiment, two stages of flash heating are performed, but three or more stages of flash heating may be performed after preheating. That is, multi-stage flash heating may be performed to heat the surface of the semiconductor wafer W from the preheating temperature T1 to the processing temperature T3 in multiple stages. In the case of multi-stage flash heating, the light emission pattern of the flash lamp FL is set so that the heating rate of the surface of the semiconductor wafer W increases toward the later stage. More specifically, the ratio of the pulse width time to the pulse interval time in the pulse signal applied to the IGBT96 is set higher toward the later stage of the multi-stage flash heating. This can further reduce the amount of heat applied to the semiconductor wafer W.

[0105] In addition, in the above-mentioned embodiment, the semiconductor wafer W having silicon as the main component is heat-treated, but the present invention is not limited thereto, and the semiconductor wafer W to be heat-treated may also have germanium or silicon germanium as the main component. Germanium has a significantly lower melting point than silicon, and the heating temperature of germanium during heat treatment needs to be lower than that of silicon.

[0106] Specifically, the preheating temperature T1 when the semiconductor wafer W having germanium as the main component is heat-treated is 100° C. or higher and 400° C. or lower. In addition, the intermediate temperature T2 when the semiconductor wafer W having germanium as the main component is flash-heated in two stages is 300° C. or higher and 600° C. (preferably 400° C. or higher and 600° C. or lower), and the treatment temperature T3 is 600° C. or higher and 900° C. or lower.

[0107] In addition, the preheating temperature T1 when the semiconductor wafer W having silicon germanium (50% silicon) as the main component is heat-treated is 300° C. to 600° C. In addition, the intermediate temperature T2 when the semiconductor wafer W having silicon germanium as the main component is flash-heated in two stages is 600° C. to 900° C., and the treatment temperature T3 is 900° C. to 1200° C.

[0108] In the above embodiment, 30 flash lamps FL are provided in the flash heating unit 5, but the present invention is not limited thereto, and the number of flash lamps FL can be set to any number. In addition, the flash lamp FL is not limited to a xenon flash lamp, and can also be a krypton flash lamp. In addition, the number of halogen lamps HL provided in the halogen heating unit 4 is not limited to 40, and can be set to any number.

[0109] In addition, in the embodiment, a filament-type halogen lamp HL is used as a continuous-lighting lamp that emits light continuously for more than 1 second to preheat the semiconductor wafer W, but this is not limited to this. A discharge arc lamp (such as a xenon arc lamp) or an LED (Light Emitting Diode) lamp may be used instead of the halogen lamp HL as a continuous-lighting lamp for preheating.

[0110] [Explanation of symbols]

[0111] 1 Heat treatment device 3 Control unit

[0112] 4 Halogen heating unit

[0113] 5 Flash heating unit

[0114] 6 Chamber 7 Holding unit 10 Transfer mechanism 20 Lower radiation thermometer 25 Upper radiation thermometer 31 Pulse generator

[0115] 32 Waveform setting section

[0116] 33 Input section

[0117] 63 Upper chamber window

[0118] 64 Lower chamber window

[0119] 65 Heat treatment space

[0120] 74 Base 93 Capacitor 96 IGBT FL Flash lamp HL Halogen lamp W Semiconductor wafer.

Claims

1. A heat treatment method, which heats a substrate by irradiating light onto the substrate, and comprises: a preheating step of irradiating light from a continuously lit lamp onto the substrate to heat the substrate to a preheating temperature lower than a reaction temperature at which a reaction occurs on the substrate; and In the flash heating process, after the preheating process, a flash lamp is used to irradiate the surface of the substrate with a flash so that the surface is heated in multiple stages to a processing temperature higher than the reaction temperature in such a way that the heating rate of the surface becomes higher toward the later stage.

2. The heat treatment method according to claim 1, wherein The flash heating process comprises: a first flash step of irradiating a flash of light onto the surface of the substrate to heat the surface to an intermediate temperature at a first heating rate; and The second flash step is performed subsequent to the first flash step, and irradiates the surface of the substrate with flash to heat the surface to the processing temperature at a second heating rate that is higher than the first heating rate.

3. The heat treatment method according to claim 2, wherein The substrate has silicon as a main component, and The preheating temperature is 400°C or higher and 700°C or lower. The intermediate temperature is 600°C or higher and 1000°C or lower. The processing temperature is greater than or equal to 1100° C. and less than or equal to 1300° C.

4. The heat treatment method according to claim 2, wherein The substrate has germanium as a main component, and The preheating temperature is 100°C or higher and 400°C or lower. The intermediate temperature is 300°C or higher and 600°C or lower. The processing temperature is 600° C. or higher and 900° C. or lower.

5. The heat treatment method according to claim 2, wherein The substrate has silicon germanium as a main component, and The preheating temperature is 300°C or higher and 600°C or lower. The intermediate temperature is 600°C or higher and 900°C or lower. The processing temperature is 900° C. or higher and 1200° C. or lower.

6. The heat treatment method according to any one of claims 1 to 5, wherein and further comprising a cooling step of lowering the temperature of the substrate after the flash heating step, and The temperature reduction rate in the temperature reduction step is higher than the temperature reduction rate when the surface of the substrate is heated to the processing temperature in one step by 20% or more.

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