Computing system and optical module

Abstract

The invention provides a computing system and an optical module. The computing system comprises: an optical backplane comprising a plurality of optical connectors and a network formed by optical links arranged between each two of the plurality of optical connectors; and a plurality of computing devices, each computing device including an optical interface connected to one of the plurality of optical connectors. And every two computing devices in the plurality of computing devices are in point-to-point optical interconnection through a corresponding optical link in the network.

Description

Technical Field

[0001] The present disclosure relates to the fields of communication and computing, and in particular to a computing system and an optical module used for the computing system. Background Art

[0002] As AI accelerators continue to gain computing power through various process iterations and chip architecture innovations, the interconnection bandwidth between AI accelerators is also growing. According to data from artificial intelligence research company OpenAI, the growth rate of AI model computing has far exceeded the growth rate of computing hardware computing power.

[0003] AI accelerator interconnection networks have become the key to improving overall computing power. In traditional interconnection networks, electrical channels are usually used to interconnect various accelerators. However, the response of electrical channels will decay as the signal rate increases. Higher-speed interfaces often involve more complex architectures and circuit designs, introduce latency costs, consume more power and occupy a larger chip area, thereby limiting the chip I / O bandwidth. In addition, longer metal wiring distances will further deteriorate the loss characteristics of the circuit and limit the interconnection distance between AI accelerators. In order to break the limitations of long-distance high-frequency electrical link losses, the use of light in computing systems has been favored in recent years. Compared with electrical interconnection, the loss of optical channels remains unchanged at different frequencies and the value is very small, so optical interconnection can support longer transmission distances.

[0004] In addition, when the computing model is expanded to more nodes, due to the higher latency and lower link bandwidth between nodes, communication between nodes will be blocked, which leads to insufficient utilization of computing resources. In view of this, replacing the original interface of the AI ​​accelerator for external communication with an optical interconnection interface can greatly increase the interconnection distance. Compared with electrical interconnection, optical interconnection can not only extend the distance by taking advantage of the extremely low loss property of optical fiber, but also provide wiring flexibility. For example, for a dense network with a large bandwidth and fully connected topology, if an electrical interconnection network is used, due to the limitation of the limited metal layer, the electrical signal cannot be interconnected with multiple crosses at the maximum bandwidth density. Complex wiring using in-plane wires on substrates and PCB boards is very challenging. However, for optical interconnection, since optical fibers can be freely routed in space, the network topology can be extremely flexible.

[0005] However, as the demand for optical interconnection bandwidth in computing systems continues to grow, the number of optical fibers will also increase exponentially, which can easily lead to chaotic fiber connections that cannot be effectively sorted out manually, are prone to errors, and are difficult to troubleshoot when they are misconnected, increasing a lot of operation and maintenance costs. This is undoubtedly a new challenge for the maintenance and management of optical interconnection computing systems. Summary of the invention

[0006] In order to solve the above problems, the present disclosure proposes to integrate a complex optical interconnection network into an optical backplane. For example, the optical backplane can solidify all optical channels within the optical interconnection network, thereby saving the complicated fiber connection work. At the same time, by making the optical backplane thinner and smaller, and integrating it with the computing device in a computing system, it is helpful to improve the integration level and realize the optical interconnection between various computing devices.

[0007] In one aspect, the present disclosure provides a computing system, comprising: an optical backplane, comprising a plurality of optical connectors and a network formed by optical links arranged between the plurality of optical connectors; and a plurality of computing devices, each of which comprises an optical interface connected to one of the plurality of optical connectors. Each two computing devices in the plurality of computing devices are optically interconnected point-to-point through corresponding optical links in the network.

[0008] In some embodiments, the optical backplane includes a carrier board, and the network includes a plurality of optical fiber pathways arranged in the carrier board and between pairs of the plurality of optical connectors.

[0009] In some embodiments, the optical backplane includes an optical waveguide plate, and the network includes a plurality of optical waveguide pathways arranged within the optical waveguide plate and between pairs of the plurality of optical connectors.

[0010] In some embodiments, the optical interface of each computing device includes multiple optical input ports and multiple optical output ports, and wherein the corresponding optical link between each two computing devices in the multiple computing devices is connected to a corresponding optical input port in the multiple optical input ports and a corresponding optical output port in the multiple optical output ports through a corresponding optical connector.

[0011] In some embodiments, each computing device includes: a PCB board; a computing chip arranged on the PCB board, the computing chip including one or more input-output high-speed interfaces, wherein each input-output high-speed interface has one or more input high-speed ports and one or more output high-speed ports, each output high-speed port performs parallel-to-serial conversion on a parallel signal in the computing chip to output a first electrical signal, and each input high-speed port performs serial-to-parallel conversion on a received second electrical signal as a high-speed serial signal; and one or more optical modules arranged on the PCB board, each optical module including an electrical input-output interface and an optical input-output interface, the electrical input-output interface including at least one electrical input port and at least one electrical output port, the optical input-output interface including at least one optical input port to output a first electrical signal. and at least one optical output port, wherein each of the at least one electrical input port is electrically connected to a corresponding one of the one or more output high-speed ports through wiring in the PCB board, each of the at least one electrical output port is electrically connected to a corresponding one of the one or more input high-speed ports through wiring in the PCB board, each optical module converts the first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output ports, and converts the second optical signal received from each of the at least one optical input port into the second electrical signal and outputs the second electrical signal, and wherein the optical input and output interfaces of the one or more optical modules together constitute the optical interface of each computing device.

[0012] In some embodiments, data transmission is performed between a first computing device and a second computing device among the multiple computing devices as follows: the first electrical signal output by a corresponding output high-speed port of a computing chip in the first computing device is provided to a corresponding electrical input port of a corresponding optical module in the first computing device; the corresponding optical module converts the first electrical signal into the first optical signal and outputs it from the corresponding optical output port; the first optical signal is provided to a corresponding optical input port of a corresponding optical module of the second device via a corresponding optical link in the optical backplane; and the corresponding optical module of the second device converts the first optical signal into a corresponding electrical signal and provides it to the computing chip of the second device.

[0013] In some embodiments, the first computing device and the second computing device are the same computing device or different computing devices.

[0014] In some embodiments, the number of output high-speed ports of the computing chip is equal to the total number of electrical input ports of the one or more optical modules, and the number of input high-speed ports of the computing chip is equal to the total number of electrical output ports of the one or more optical modules.

[0015] In some embodiments, each computing device further includes at least one high bandwidth memory (HBM) unit, the at least one HBM unit and the computing chip are packaged on a substrate, and the substrate is arranged on the PCB board.

[0016] In some embodiments, the at least one HBM unit and the computing chip are packaged on the substrate through an interposer. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1A A schematic diagram showing a two-dimensional grid topology connection formed between 16 computing devices.

[0018] Figure 1B A schematic diagram showing a two-dimensional surround topology connection between 16 computing devices.

[0019] Figure 1C A schematic diagram showing a fully interconnected topology connection between 16 computing devices.

[0020] Figure 2 A schematic diagram of a computing system according to an embodiment of the present disclosure is shown.

[0021] Figure 3A-3B A schematic diagram showing an example configuration of a computing device according to an embodiment of the present disclosure.

[0022] Figure 4A-4B A schematic diagram showing another example configuration of a computing device according to an embodiment of the present disclosure.

[0023] Figures 5A-5C A schematic diagram showing an example configuration of an optical module according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although some embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure should not be interpreted as being limited to the embodiments described herein, but rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0025] It should be noted that the various parts or components described in the various embodiments of the present disclosure are merely illustrative. In some cases, some of the parts or components may be omitted, or replaced with other parts or components having the same or similar functions, or additional parts or components may be added.

[0026] In addition, the various parts or components that are separated or combined with each other in various embodiments of the present disclosure are only for the convenience of description, which does not mean that they are physically separated or combined with each other, nor does it mean that such separation or combination is necessary. Those skilled in the art can arbitrarily separate or combine the various parts or components according to actual needs.

[0027] Without departing from the inventive concept of the present disclosure, any modifications or combinations described above fall within the protection scope of the present disclosure.

[0028] In a network used for data communication, a good topology can fully exploit the available encapsulation technology to achieve the requirements of latency and bandwidth with minimal consumption. In order to maximize the communication bandwidth, the topology should saturate the bisection bandwidth under the existing encapsulation technology. "Bisection bandwidth", also known as peer bandwidth, refers to the maximum data transmission rate through a section when a section is used to divide the network into two equal halves (or when two subnets have the same number of nodes). Therefore, the larger the bisection bandwidth, the stronger the communication capability of the network. The size of the bisection bandwidth usually depends on the topology of the network.

[0029] Figure 1A A schematic diagram showing a two-dimensional grid topology connection formed between 16 computing devices. Figure 1B A schematic diagram showing a two-dimensional surround topology connection between 16 computing devices. Figure 1C A schematic diagram showing a fully interconnected topology connection between 16 computing devices.

[0030] by Figure 1A-1B As an example, assuming that the bidirectional bandwidth of each computing device to the outside is B, the bidirectional bandwidth of each link is B / 4, then Figure 1A The bisection bandwidth of the two-dimensional grid topology in is B, Figure 1B The bisection bandwidth of the two-dimensional surround topology in is 2B. This is because Figure 1A-1B In the example, taking computing device 5 as an example, each computing device is connected to the other four computing devices through four links. Figure 1A The middle bisection bandwidth is 0.25B×4=B (there are 4 links in the middle section). Figure 1B The middle bisection bandwidth is 0.25B×8=2B.

[0031] compared to Figure 1A to Figure 1B The topology of partial interconnection between computing devices in Figure 1C The topology of 16 computing devices fully interconnected with each other is shown.

[0032] The so-called "full interconnection" means that, for example, computing device 0 is interconnected point-to-point with each of the other computing devices 1 to 15. In this fully interconnected topology, assuming that Figure 1C The topology of the network is cut in half. For example, if computing devices 0-7 are in one subnetwork and computing devices 8-15 are in another subnetwork, then the links connecting computing device 0 to computing devices 8-15 will pass through the cut section, for a total of 8 links. Similarly, the links connecting computing device 1 to computing devices 8-15 will pass through the section, for a total of 8 links. By analogy, there will be a total of 8×8=64 optical links passing through the section. If Figure 1C The external bidirectional bandwidth of each computing device is also B, and the bidirectional bandwidth of each link is B / 16, then Figure 1C The half bandwidth is 64×B / 16=4B.

[0033] In this way, without changing the output bandwidth of the computing device, Figure 1C The bisection bandwidth of a full interconnect is Figure 1A 4 times of the 2D grid topology, Figure 1B The 2D surround topology is twice as fast as the 2D surround topology, which can greatly increase the communication efficiency of the network.

[0034] based on Figure 1C The fully interconnected topology shown in the figure, the present disclosure provides a computing system based on a fully interconnected optical backplane. Figure 2 A schematic diagram of a computing system 2000 according to an embodiment of the present disclosure is shown.

[0035] like Figure 2 As shown, the computing system 2000 includes an optical backplane 600 and a plurality of computing devices (e.g., computing devices 0 to 15). The optical backplane 600 includes a plurality of optical connectors 601 and a network formed by optical links 603 arranged between the plurality of optical connectors 601. As shown, each of the plurality of computing devices (e.g., computing devices 0 to 15) includes an optical interface 201 connected to one of the plurality of optical connectors 601 of the optical backplane 600. Through the above configuration, as shown in FIG. Figure 2 Every two computing devices among the multiple computing devices shown are connected to each other in a point-to-point fixed optical manner via corresponding optical links in the network of optical links 603 .

[0036] It should be noted that Figure 2The two-to-two optical interconnections between the 16 computing devices shown in the figure through the optical backplane 600 are merely exemplary, and other numbers of computing devices are also possible. For example, a more complex optical backplane 600 with a greater number of optical connectors 601 and more optical links 603 can be designed to support two-to-two optical interconnections between a greater number of computing devices (e.g., 24, 32, 48, etc.). Conversely, it is obvious that two-to-two optical interconnections between a smaller number of computing devices are also possible.

[0037] In some examples, the optical backplane 600 can be composed of a carrier board and optical fibers. For example, the carrier board can be a flexible board, and multiple groups of ribbon optical fibers 602 can be routed and packaged in the flexible board through an integrated connection method. In this case, the network of optical links 603 can include multiple optical fiber paths arranged in the flexible board and between multiple optical connectors 601. In this way, a network of integrated optical links as shown in the figure can be formed without manual fiber jumpering.

[0038] Optionally, the optical backplane 600 can also be composed of a plurality of optical waveguide plate connection structures and optical waveguide plates. In this case, the network of the optical link 603 can include a plurality of optical waveguide paths arranged in the optical waveguide plate and between the plurality of optical connectors 601. Since the optical waveguide plate has a higher degree of integration, dozens of waveguide channels can be integrated on the optical waveguide plate, and the optical waveguides on the optical waveguide plate can be arranged in layers, thereby reducing the cross loss between the waveguides. Compared with an optical backplane configured with optical fibers, an optical backplane including an optical waveguide plate has a higher degree of integration and a lower cost.

[0039] In some examples, the network of optical links 603 may have a symmetrical wiring arrangement (e.g., Figure 2 The square optical backplane 600 is shown with a circular optical link network. In other examples, the network of optical links 603 may also have a random or irregular wiring pattern (not shown), thereby enabling complex cross-connection of multiple groups of optical fibers.

[0040] like Figure 2 As shown, the optical connector 601 can provide an externally pluggable optical interface for the optical backplane 600. The optical signals from each optical connector 601 can be transmitted between each interface through the network of optical links 603 in the optical backplane 600, thereby enabling optical signal transmission between multiple computing devices connected to each optical connector 601.

[0041] Additionally, in some examples, Figure 2The optical interface 201 of each computing device shown may include multiple optical input ports and multiple optical output ports, and each optical connector 601 of the optical backplane 600 may include corresponding multiple optical output ports and multiple optical input ports. By configuring each computing device with dedicated optical input and optical output ports corresponding to each computing device in the remaining computing devices, point-to-point all-optical interconnection of all computing devices in the computing system can be achieved.

[0042] For example, in Figure 2 In the case where the optical interface 201 of each computing device shown includes 16 optical input ports and 16 optical output ports, each optical connector 601 of the optical backplane 600 may include corresponding 16 optical output ports and 16 optical input ports. In this case, when the optical interface 201 of each computing device is connected to the corresponding optical interface 201 of the optical backplane 600 through the optical fiber 200, the 16 optical output ports of the corresponding optical connector 601 of the optical backplane 600 can be respectively connected to the 16 optical input ports of the optical interface 201 of the corresponding computing device, and the 16 optical output ports of the optical interface 201 of each computing device can be respectively connected to the corresponding 16 optical input and output ports of the corresponding optical connector 601 of the optical backplane 600, so that the computing device can receive 16 optical signals from the optical backplane 600 through the 16 optical input ports, and the backplane 600 can also receive 16 optical signals from the computing device through the 16 optical input ports in the optical connector 601.

[0043] In this case, if Figure 2 The corresponding optical link 603 between each two computing devices among the multiple computing devices shown (for example, computing devices 0-15) can be connected to a corresponding optical input port among the multiple optical input ports of the corresponding computing device and a corresponding optical output port among the multiple optical output ports through a corresponding optical connector 601, thereby providing a path for data transmission between different computing devices.

[0044] It should be noted that in Figure 2 In the example, if the optical interface 201 of each computing device includes 16 optical input ports and 16 optical output ports, one optical input port and one optical output port in the optical interface 201 of each computing device may also be idle or suspended (for example, not connected to the optical connector 601 of the optical backplane 600). This is because in a computing system with 16 computing devices, each computing device needs to establish two-way optical interconnections with the remaining 15 computing devices, that is, only 15 optical input ports and 15 optical output ports are needed for interconnection.

[0045] The above-described case where each optical interface 201 includes 16 optical input ports and 16 optical output ports and each optical connector 601 includes corresponding 16 optical output ports and 16 optical input ports is merely exemplary. According to actual needs, the optical interface 201 of each computing device may include any number of optical input or output ports, and each optical connector 601 of the optical backplane 600 may also include any number of optical input or output ports. For example, in order to avoid redundancy, the computing device may also be configured so that the number of optical input ports and optical output ports in the optical interface 201 is strictly equal to the number of computing devices to be interconnected with it in the computing system (e.g., 15).

[0046] by Figure 2 For example, for computing device 0, its optical interface 201 may include 15 optical input ports and 15 optical output ports, and these 15 optical input ports and 15 optical output ports are respectively connected to the corresponding optical output ports and corresponding optical input ports of computing devices 1-15 through corresponding optical links 603. For computing device 1, its optical interface 201 may include 15 optical input ports and 15 optical output ports, and these 15 optical input ports and 15 optical output ports are respectively connected to the corresponding optical output ports and corresponding optical input ports of computing devices 0 and 2-15 through corresponding optical links 603, and so on.

[0047] Alternatively, other numbers of optical input ports and optical output ports in the optical interface 201 of the computing device are also possible. For example, in some cases, the number of optical input ports and optical output ports in the optical interface 201 of the computing device may be much greater than the number of computing devices to be interconnected in the computing system.

[0048] For example, in Figure 2 In the computing system shown, the number of optical input ports and optical output ports in the optical interface 201 of some or all of the computing devices 0-15 may be equal to 18, 24, 32, 48, etc. In the case where the number of optical input ports and optical output ports in the optical interface 201 of a computing device is greater than the number of computing devices interconnected therewith, some ports may be set to a suspended or idle state, which is conducive to further expanding the number of computing devices in the system without modifying the hardware when the demand changes and the computing power needs to be increased.

[0049] In the case where it is necessary to consider increasing computing power in the future, the number of optical interfaces and the number of optical links in the optical backplane 2000 can also be set accordingly to be greater than the number of computing devices and the number of optical links corresponding to the current computing power. This allows the number of computing devices in the system to be further expanded without modifying the hardware, while still achieving point-to-point direct optical interconnection between different computing devices.

[0050] Combination of the above Figure 2 The present disclosure describes a computing system that uses an optical backplane to implement point-to-point fixed interconnection between computing devices. In this point-to-point all-optical interconnection computing system, there is a dedicated bidirectional data communication channel between any two computing devices, which is conducive to achieving direct and extremely low-latency data communication between different computing devices.

[0051] In addition, compared with the manual fiber connection method in traditional applications and some optical branch boards or optical circuit boards with complex non-fully interconnected optical fiber connections, this point-to-point fixed fully interconnected computing system using an optical backplane can greatly reduce the fiber jumper workload during system configuration and greatly reduce the possibility of fiber connection errors. In addition, the optical backplane proposed in the present disclosure has the characteristics of high stability and maintainability, and also helps to save a lot of space in data center applications.

[0052] The following will be combined Figures 3A to 5C Various embodiments of the computing device and its internal elements in the computing system 2000 as described above are described.

[0053] In order to solve the various problems caused by the electrical interconnection of computing devices through PCB wiring in traditional designs, the present disclosure proposes a computing device with a new direct-drive optical module. In the computing device, the optical module is arranged on the same PCB board with the computing chip in an on-board manner, and the direct-drive optical module is directly connected to the high-speed interface of the computing chip without any conversion of the physical layer and the protocol layer.

[0054] Since there is no conversion at the protocol layer and physical layer, the delay required for communication will be greatly reduced, and the transmission bandwidth of the computing chip can be flexibly configured so that the transmission bandwidth is no longer restricted by various protocols.

[0055] This new type of onboard direct-drive optical module does not require a retimer, and the number of ports and channels of the optical module can match the number of ports in the I / O high-speed interface of the computing chip. By directly connecting the computing chip and the onboard direct-drive optical module, the high-speed electrical signal on the computing chip can be directly transmitted to the onboard direct-drive optical module and then converted by electro-optical / photoelectrical conversion through the components in the onboard direct-drive optical module.

[0056] Optionally, the number of ports and channels of the optical module can also be greater than the number of ports in the I / O high-speed interface of the computing chip. In this case, some channels in the optical module can be redundant or idle, which does not affect the overall performance of the computing system.

[0057] Figure 3A-3B FIG. 3 is a schematic diagram showing an example configuration of a computing device 3000 according to an embodiment of the present disclosure. Figure 3AA top view of an example configuration of the computing device 3000 is shown, and Figure 3B A cross-sectional view of an example configuration of the computing device 3000 is shown.

[0058] like Figure 3A As shown in FIG. 3B , the computing device 3000 includes one or more optical modules 100 and a computing chip 300 . The one or more optical modules 100 and the computing chip 300 are arranged in the same PCB board 500 .

[0059] Each optical module 100 includes an electrical input / output interface and an optical input / output interface. The electrical input / output interface (e.g., an interface connected to wiring 304) includes at least one electrical input port and at least one electrical output port, or may be collectively referred to as an electrical input / output port. The optical input / output interface (e.g., an interface connected to optical fiber 200) includes at least one optical input port and at least one optical output port, or may be collectively referred to as an optical input / output port. It should be noted that the optical input / output interfaces of one or more optical modules 100 in the computing device 3000 together constitute the optical input / output interface (e.g., Figure 2 For simplicity, Figure 3A Further details and specific numbers of the various ports of the optical module 100 are not shown in detail.

[0060] The computing chip 300 and each optical module 300 are arranged on the same PCB board 500, and the computing chip 300 includes one or more input and output high-speed interfaces (for example, long-distance SerDes interfaces). Each input and output high-speed interface has one or more input high-speed ports and one or more output high-speed ports. For simplicity, Figure 3A Only four input and output high-speed interfaces (e.g., interfaces connected to wiring 304) of the computing chip 300 are exemplarily shown, and a port (not shown) in each input and output high-speed interface is respectively connected to a corresponding port in the electrical input and output interface of each optical module 100. Optionally, the computing chip 300 can be mounted on the PCB board 500 through the substrate 400.

[0061] In some embodiments, the computing chip 300 may be an artificial intelligence chip, for example, including but not limited to a graphics processing unit (GPU), a neural network processor (NPU), a tensor processing unit (TPU), an intelligent processing unit (IPU), a deep learning processor (DPU), etc.

[0062] It should be noted that the four input and output high-speed interfaces of the computing chip 300 shown above correspond to four optical modules only for the convenience of description. In practical applications, any number of input and output high-speed interfaces can be configured for the computing chip 300 according to specific needs, and any number of input high-speed ports and output high-speed ports can be configured for each input and output high-speed interface.

[0063] In the present disclosure, each high-speed output port of the computing chip 300 performs parallel-to-serial conversion on the parallel signals in the computing chip 300 to output a first electrical signal (not shown in the figure), and the first electrical signal is provided to the corresponding electrical input port of the corresponding optical module 100 for photoelectric conversion. The parallel-to-serial conversion operation can be performed, for example, by a serializer (SERializer circuit in a SerDes interface), so that multiple low-speed parallel signals in the computing chip 300 can be converted into high-speed serial signals.

[0064] In addition, each input high-speed port of the computing chip 300 performs serial-to-parallel conversion (not shown in the figure) on the second electrical signal received from the optical module 100 as a high-speed serial signal, thereby reconverting the high-speed serial signal into a low-speed parallel signal for use by the computing chip 300. The serial-to-parallel conversion operation can be performed, for example, by a deserializer (DESerializer circuit in a SerDes interface), so that the high-speed serial signal in the computing chip 300 can be converted into a low-speed parallel signal.

[0065] Each of the at least one electrical input port of each optical module 100 is electrically connected to one of the one or more output high-speed ports of the computing chip 300 through the wiring 304 in the PCB board 500, and each of the at least one electrical output port of each optical module 100 is electrically connected to one of the one or more input high-speed ports of the computing chip 300 through the wiring 304 in the PCB board 500.

[0066] That is, the high-speed serial signal (e.g., the first electrical signal described above) output from the electrical chip 300 is provided to the electrical input port of the optical module 100 through the wiring 304 in the PCB board 500. Similarly, the high-speed serial signal (e.g., the second electrical signal described above) output from the electrical output port of the optical module 100 is also provided to the electrical chip 300 through the wiring 304 in the PCB board 500.

[0067] It should be noted that the wiring 304 in the PCB board 500 is a general term for the electrical connection wiring between the optical module 100 and the computing chip 300, and is not intended to represent a specific wiring.

[0068] Functionally, each optical module 100 is used to perform electrical-optical conversion and optical-electrical conversion.

[0069] For example, the optical module 100 converts the first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output port. The first electrical signal is a high-speed serial electrical signal that the computing chip 300 directly transmits to the optical module 100 through the wiring 304 in the PCB board 500.

[0070] In addition, each optical module 100 also converts the second optical signal received from each of the at least one optical input port into a second electrical signal and outputs the second electrical signal. The second electrical signal is also a high-speed serial electrical signal, which is provided to the computing chip 300 through the wiring 304 in the PCB board 500, and then is converted into a multi-channel parallel signal through the input high-speed port of the computing chip 300 for further calculation or other processing by the computing chip 300.

[0071] For example, the optical module 100 may functionally include an optical emitting unit, an optical receiving unit, and a control unit. The optical emitting unit is used to convert a received electrical signal into an optical signal, and the optical receiving unit is used to convert a received optical signal into an electrical signal. The function of the control unit is to control the operation of the optical emitting unit and the optical receiving unit. For example, the control unit may control the optical emitting unit to convert an electrical signal into an optical signal, and control the optical receiving unit to convert an optical signal into an electrical signal.

[0072] More details about the optical module 100 will be described later in conjunction with the attached Figures 5A-5C Further description is given.

[0073] It should be noted that the input and output signals of each optical module 100 adopt the protocol of the computing chip 300. That is, the computing chip 300 and each optical module 100 do not perform communication protocol conversion processing on the input and output electrical signals thereof.

[0074] That is, the first electrical signal is an electrical signal obtained by performing parallel-to-serial conversion on an electrical signal that complies with its own protocol and is directly obtained from the computing process of the computing chip 300, and is directly output from the output high-speed port of the computing chip 300. The first electrical signal is then provided to the electrical input port of the optical module 100 through the wiring 304 in the PCB board 500, and the computing chip 300 does not need to perform any physical layer and protocol layer (for example, PCIe protocol, Ethernet protocol, etc.) conversion on the first electrical signal and directly outputs it.

[0075] Similarly, after the optical module 100 receives the first electrical signal at the corresponding electrical input port, it does not perform any physical layer and protocol layer (for example, PCIe protocol, Ethernet protocol, etc.) conversion on the first electrical signal, but directly performs electrical-to-optical conversion on the first electrical signal, thereby outputting the converted first optical signal at the corresponding optical output port.

[0076] Similarly, after converting the second optical signal received from the optical input port into a second electrical signal, the optical module 100 does not perform any physical layer and protocol layer conversion on the second electrical signal, but directly outputs the second electrical signal through the electrical output port of the optical module 100, and the directly output second electrical signal is transmitted through the wiring 304 in the PCB board 500 and provided to the corresponding input high-speed port of the computing chip 300.

[0077] After receiving the second electrical signal at the corresponding input high-speed port, the computing chip 300 performs no physical layer and protocol layer conversion on the second electrical signal except for the serial-to-parallel conversion as described above.

[0078] In other words, the electrical signals in the optical module 100 (including the first input electrical signal and the second output electrical signal) and the electrical signals input or output by the computing chip 300 (including the first output electrical signal and the second input electrical signal) are all electrical signals of the same computing chip's own protocol, and they have not been converted by the physical interface of various standard protocols (e.g., PCIe physical interface) or network card (e.g., Ethernet card) at any end, nor have they been subjected to various data encapsulation, conversion, and other operations of the protocol layer at any end. In other words, the signals between the optical module 100 and the computing chip 300 are transparent to each other, and without considering the inherent transmission loss or signal micro-deformation, the electrical signals provided to and received by the optical module 100 and the computing chip 300 are consistent in terms of bandwidth and transmission rate.

[0079] Through this direct and transparent transmission of electrical signals based on PCB wiring, the delay required for data transmission between the computing chip 300 and the optical module 100 will be greatly reduced. In addition, through reasonable wiring, the loss and noise of the PCB wiring 304 can be minimized, thereby further ensuring the signal-to-noise ratio requirements of the computing device.

[0080] At the same time, due to the direct and transparent transmission of electrical signals, there is no need to configure a traditional retimer on the optical module 100 to recover the clock, nor is there a need to configure a traditional analog-to-digital converter ADC or digital-to-analog converter DAC in the optical module 100 to further convert the input or output electrical signals. In addition, because the computing chips 300 are directly connected through the optical module 100, the computing chips 300's own protocol is used, and there is no need to transmit control signals, which greatly simplifies the design of the computing device and the optical module 100.

[0081] In addition, since no protocol conversion is introduced, the transmission bandwidth of the computing chip 300 can be flexibly configured, and the number of optical modules 100 or the number of signal channels in a single optical module 100 can be adaptively designed according to the transmission bandwidth and number of channels of the computing chip 300, so that the number of ports or the number of channels in the input and output high-speed interfaces of the computing chip 300 can be matched with (i.e., equal to) the number of electrical ports or the number of channels of one or more optical modules 300, respectively, thereby achieving a more compact packaging structure.

[0082] For example, in some embodiments, the number of output high-speed ports of the computing chip 300 can be equal to the total number of electrical input ports of one or more optical modules 100, and the number of input high-speed ports of the computing chip 300 can be equal to the total number of electrical output ports of one or more optical modules 100.

[0083] Assume that each input and output high-speed interface of the computing chip 300 has 8 input high-speed ports and 8 output high-speed ports. If the total input or output bandwidth of the computing chip 300 is 400Gb / s, this means that the computing chip can transmit 400G bits of data per second. In addition, assume that the computing chip 300 is configured with a total of 4 input and output high-speed interfaces, and the total bandwidth of 400Gb / s will be evenly distributed to the 4 input and output high-speed interfaces.

[0084] In this case, four optical modules 100 may be configured for the computing chip 300 and each optical module has eight electrical input ports and eight electrical output ports. The electrical input ports of the optical modules 100 are connected one-to-one with the output high-speed ports of the computing chip 300, and the electrical output ports of the optical modules 100 are connected one-to-one with the input high-speed ports of the computing chip 300, so each optical module 100 can perform electrical-optical conversion or optical-electrical conversion on 100Gb / s data.

[0085] Alternatively, assuming that each input and output high-speed interface of the computing chip 300 has 4 input high-speed ports and 4 output high-speed ports, and the computing chip 300 is configured with a total of 8 input and output high-speed interfaces, the total bandwidth of the computing chip will be evenly distributed to the 8 input and output high-speed interfaces. In this case, 8 optical modules 100 can be configured for the computing chip 300 and each optical module has 4 electrical input ports and 4 electrical output ports.

[0086] Alternatively, assuming that each input and output high-speed interface of the computing chip 300 has 16 input high-speed ports and 16 output high-speed ports, and the computing chip 300 is configured with 2 input and output high-speed interfaces in total, the total bandwidth of the computing chip will be evenly distributed to the 2 input and output high-speed interfaces. In this case, 2 optical modules 100 can be configured for the computing chip 300, and each optical module has 8 electrical input ports and 8 electrical output ports.

[0087] In the above example, the total number of output high-speed ports (8x4) of the computing chip 300 and the total number of electrical input ports (8x4) of the four optical modules 100 are equal and correspond one to one. Similarly, the total number of input high-speed ports (8x4) of the computing chip 300 and the total number of electrical output ports (8x4) of the four optical modules 100 are also equal and correspond one to one. This makes it possible to adaptively design the number of ports of the optical module 100 to match the number of ports of the computing chip, avoid the existence of some idle or redundant ports, and thus reduce the overall size of the optical module.

[0088] It should be noted that the number of input high-speed ports or output high-speed ports of the computing chip 300 mentioned above refers to the number of high-speed ports connected to the optical module 100. This does not mean that the computing chip 300 only includes input or output high-speed ports connected to the optical module 100 and excludes other types of high-speed ports. In actual applications, input or output high-speed ports for other purposes may also exist in the computing chip 300.

[0089] An embodiment of a computing device 3000 including a computing chip 300 and one or more optical modules 100 is introduced above.

[0090] In some embodiments, the computing device proposed in the present disclosure may also include other elements and components. Figure 4A-4B A schematic diagram showing an example configuration of a computing device 4000 according to an embodiment of the present disclosure is shown.

[0091] like Figure 4A or as shown in 4B, except Figure 3A-3BIn addition to the computing chip 300 and one or more optical modules 100 shown, the computing device 4000 also includes at least one high bandwidth memory (HBM) unit 302. For example, the HBM unit can cooperate with the computing chip 300 to perform various cache or storage functions.

[0092] In some embodiments, the plurality of HBM units 302 may be disposed on the substrate 400 together with the computing chip 300. Optionally, the plurality of HBM units are disposed on the substrate 400 and located on both sides of the computing chip 300.

[0093] Optionally, multiple HBM units 302 and computing chips 300 may be packaged on a substrate 400 through an interposer 303, and the substrate 400 is arranged on a PCB board 500, such as Figure 4B shown.

[0094] The interposer 303 may be a transfer board having various wiring and conductive structures, which may provide an electrical connection path between the plurality of HBM units 302 arranged thereon and the computing chip 300 .

[0095] Other details of computing device 4000 and Figure 3A-3B The computing device 3000 is similar to that in the embodiment and will not be described in detail here.

[0096] Since in the various computing devices described above, the optical signal obtained by the onboard direct-drive optical module for electrical-optical conversion can be directly connected to the onboard direct-drive optical module of another computing device through optical fiber transmission, point-to-point optical interconnection between different computing devices can be easily achieved.

[0097] In this configuration based on an onboard direct-drive optical module, high-speed electrical signals on a computing chip in one computing device can reach computing chips in other computing devices with minimal delay because they do not pass through any electrical switches.

[0098] Based on this configuration, multiple computing devices can be connected point-to-point through a series of onboard direct-drive optical modules and optical backplanes. This breaks through the limitations of PCB wiring-based network topology and maximizes network bisection bandwidth through optical interconnection.

[0099] In addition, since the onboard direct-drive optical module has the advantages of protocol transparency and low latency, the point-to-point interconnection between computing devices can achieve the goals of long distance, high bandwidth and low latency.

[0100] The following will describe by way of example Figure 2 The computing system 2000 shown in FIG. Figures 3A to 4B In the case of the computing devices shown, how data is transmitted between different computing devices.

[0101] For example, if Figure 2 The computing devices 0-15 in Figures 3A to 4B The computing device shown includes a computing chip 300 and one or more optical modules 100, and data transmission between computing device 0 and computing device 1 can be performed as follows.

[0102] First, assuming that computing device 0 wants to send data to computing device 1, for example, to send data generated or output by the computing chip 300 of computing device 0, the corresponding output high-speed port of the computing chip 300 in computing device 0 will output a first electrical signal corresponding to the data, and the first electrical signal will be provided to the corresponding electrical input port of the corresponding optical module in computing device 0 through the corresponding wiring 304 in the PCB board 500.

[0103] Then, the optical module performs electrical-optical conversion on the first electrical signal to generate a first optical signal, and outputs the first optical signal from the corresponding optical output port.

[0104] Since the optical interface 201 (composed of the optical input port and optical output port of each optical module 100) of computing device 0 and computing device 1 is connected to the corresponding optical connector 601 of the backlight panel 600, the first optical signal output by the corresponding optical output port of computing device 0 will be provided to the corresponding optical input port of the corresponding optical module of computing device 1 via the corresponding optical link in the optical backplane 600.

[0105] Afterwards, the corresponding optical module of the computing device 1 converts the received first optical signal into a corresponding electrical signal and provides it to the computing chip 300 of the computing device 1, thereby completing one transmission.

[0106] Reverse data transmission is also possible, for example, computing device 1 can send data to computing device 0 in a similar manner.

[0107] In some cases, for the convenience and simplicity of system configuration, you can consider Figure 2 The computing system 2000 shown is configured with 16 identical computing devices. Identical computing devices, for example, mean that all computing devices in computing devices 0-15 have the same computing chip 300, the same number of optical modules 100, and the optical modules 100 are also identical. In addition, identical computing devices can also mean that the optical interface 201 of the computing device has the exact same number of optical input ports and the exact same number of optical output ports. In addition, identical computing devices can also mean that the computing devices have the exact same packaging method, the exact same packaging size, and so on.

[0108] Alternatively, on the other hand, in order to improve the flexibility of system configuration, it is also possible to consider Figure 2The computing system 2000 shown is configured with 16 computing devices that are partially or completely different. For example, different computing devices may use different computing chips 300, different optical modules 100, or have completely different packaging structures or packaging sizes.

[0109] The following will be combined with the attached Figures 5A to 5C An embodiment of a specific structure of the optical module 100 used in the computing device or computing system as described above is described.

[0110] Figure 5A A schematic diagram showing the overall configuration of an optical module 100 according to an embodiment of the present disclosure.

[0111] like Figure 5A As shown, the optical module 100 functionally includes an electrical input / output interface EI / O, an optical input / output interface OI / O, an optical transmitting unit 101 , an optical receiving unit 102 , and a control unit 103 .

[0112] The optical transmitting unit 101 may also be referred to as a TX unit, and is used to convert an input electrical signal 110 received from the electrical input / output interface EI / O into an output optical signal 120 , that is, to perform electrical-to-optical conversion (also referred to as EO conversion).

[0113] The optical receiving unit 102 may also be referred to as an RX unit, and is used to convert an input optical signal 210 received from the optical input / output interface OI / O into an output electrical signal 220, that is, perform optical-to-electrical conversion (also referred to as OE conversion).

[0114] The control unit 103 may be any form of controller or microcontroller, and is used to control the optical emitting unit 101 to perform EO conversion from the input electrical signal 110 to the output optical signal 120. Similarly, the control unit 103 may also control the optical receiving unit 102 to perform OE conversion from the input optical signal 210 to the output electrical signal 220.

[0115] As mentioned above, the optical module proposed in the present disclosure does not perform communication protocol conversion processing on the input electrical signal and the output electrical signal.

[0116] That is to say, after the optical module 100 receives the input electrical signal 110 at the electrical input / output interface EI / O, it does not perform any physical layer and protocol layer conversion on the input electrical signal 110, but directly performs electrical-to-optical conversion on the input electrical signal 110, thereby outputting the converted output optical signal 120 in the corresponding optical input / output interface OI / O.

[0117] Similarly, after converting the input optical signal 210 received from the optical input / output interface OI / O into the output electrical signal 220 , the optical module 100 does not perform any physical layer and protocol layer conversion on the output electrical signal 220 , but directly outputs it through the electrical input / output interface EI / O of the optical module 100 .

[0118] For example, the optical module 100 does not include a physical interface of any standard protocol (e.g., a PCIe physical interface), nor does it perform data encapsulation / decapsulation, conversion, and other operations of various protocol layers on the input electrical signal 110 or the output electrical signal 220, but only performs electrical-to-optical conversion or optical-to-electrical conversion on the signal.

[0119] In some embodiments, in the direction of EO conversion, the input electrical signal 110 may be an electrical signal from an external device, using the external device's own protocol without protocol conversion, for example, an electrical signal from any device such as an external computing device, storage device, communication device, etc. In addition, the electrical signal 220 output from the optical module 100 may be provided to the same external device.

[0120] Converting the received input electrical signal 110 into the output optical signal 120 as described above actually means loading the information carried by the input electrical signal 110 onto the output optical signal 120 in a modulated manner.

[0121] Accordingly, in the direction of OE conversion, the input optical signal 210 may also be an optical signal from an external device. In addition, the optical signal 120 output from the optical module 100 may also be provided to the same external device.

[0122] The external device may, for example, provide the input optical signal 210 to the optical module 100 via an optical fiber, and the input optical signal 210 may carry specific information (e.g., "information A"). In other words, the input optical signal 210 may carry "information A" via a certain modulation technique. The optical receiving unit 102 in the optical module 100 performs OE conversion on such an optical signal carrying "information A" to obtain an electrical signal carrying the same "information A". Such an output electrical signal may then be provided to an external device such as the above, for example, the computing chip described above.

[0123] The following will be combined Figures 5B to 5C Some examples of the internal configuration of the optical module proposed in the present disclosure without performing communication protocol conversion are described.

[0124] Figure 5B FIG. 1 shows a structural diagram of an example of an optical module 100 according to an embodiment of the present disclosure. It should be noted that: Figure 5B The optical module 100 shown can be viewed as Figure 5AA more detailed embodiment of the light module 100 is shown.

[0125] For example, Figure 5A The light emitting unit 101 shown in FIG. 1 may include Figure 5B The optical transmitter 101A and the driver 101 - 2 are shown. The driver 101 - 2 is used to drive the optical transmitter 101A to transmit an optical signal as an output optical signal 120 .

[0126] In addition, if Figure 5A The light receiving unit 102 shown in FIG. 1 may include Figure 5B The optical detector 102 - 1 and the amplifier 102 - 2 are shown. The optical detector 102 - 1 can convert the detected input optical signal 210 into an electrical signal, and the amplifier 102 - 2 can further amplify the converted electrical signal and then output the amplified electrical signal as an output electrical signal 220 .

[0127] Figure 5B The illustrated optical transmitter 101A is a "directly modulated" optical transmitter, which may be, for example, a directly modulated vertical cavity surface laser (VCSEL) or a distributed feedback (DFB) laser.

[0128] The so-called "direct modulation" means that the control unit 103 can control the electrical signal provided by the driver 101-2 to the optical transmitter 101A according to the input electrical signal 110, thereby controlling the intensity of the optical signal emitted by the optical transmitter 101A, without using other modulators to load or modulate the information in the electrical signal into the emitted optical signal.

[0129] For example, the control unit 103 can directly control the magnitude of the current provided by the driver 101-2 according to the amplitude of the logic levels "1" and "0" of the input electrical signal 110, so that the intensity of the light emitted by the light emitter 101A can be linearly or substantially linearly related to the amplitude of the input current.

[0130] Optionally, the optical transmitter in the optical module of the present disclosure may also be an "external modulation" optical transmitter. As the name implies, an "external modulation" optical transmitter means that the optical transmitter itself cannot modulate light, but needs to rely on external equipment to modulate light.

[0131] Figure 5C FIG. 1 is a schematic diagram showing another example of the optical module 100 according to an embodiment of the present disclosure. Figure 5C In the embodiment, the optical transmitter 101B is, for example, an externally modulated laser, and in addition to the driver 101-2 and the optical transmitter 101B, Figure 5A The optical transmission unit 101 shown further needs to include a modulator 101 - 3 .

[0132] In this case, the optical transmitter 101B is in a stable light-emitting state and emits light with a uniform intensity. The light emitted by the optical transmitter 101B is provided to the modulator 101-3, and the control unit 103 can control the electrical signal input to the modulator 101-3 through the driver 101-2, thereby modulating the amplitude, phase and other characteristics of the light received from the optical transmitter 101B, so as to modulate the information carried in the input electrical signal 110 onto the light to form the output optical signal 120.

[0133] Typical examples of the modulator 101 - 3 include integrated photonic modulators based on silicon, indium phosphide, thin-film lithium niobate or polymer, and the structure may be a micro-ring modulator, a Mach-Zehnder modulator or an electro-absorption modulator.

[0134] For example, in the case where the modulator 101-3 is an electro-absorption modulator, the control unit 103 can control the switch of the modulator 101-3 through the driver 101-2 to make it absorb or not absorb light, thereby absorbing the light emitted by the optical transmitter 101B (for example, corresponding to the output logic "0"), or not absorbing the light emitted by the optical transmitter 101B (for example, corresponding to the output logic "1"). In this way, the intensity and phase of the final output light can be controlled, so that information can be modulated or loaded onto the output optical signal 120.

[0135] It should be noted that the modulation formats of the logic levels "1" and "0" of the input electrical signal 110 mentioned above are merely exemplary and not limiting. In practice, the input electrical signal 110 may have any suitable modulation format.

[0136] also, Figure 5B-5C The driver 101 - 2 , the photodetector 102 - 1 , and the amplifier 102 - 2 shown in FIG. 1 may be implemented using any suitable components in the art.

[0137] For example, the driver 101-2 can be implemented by a circuit composed of various electronic components such as transistors, resistors, capacitors, etc. For example, the light detector 102-1 can be various types of photodiodes with various sensitivities, such as a photomultiplier tube (PMT), an avalanche photodiode (APD), a silicon photomultiplier tube (SiPM), etc. In addition, the amplifier 102-2 can be a traditional transimpedance amplifier (TIA), or various types of amplifiers based on similar principles or other principles, which will not be elaborated in detail here.

[0138] In addition, it should be noted that the optical module proposed in the present disclosure that does not perform communication protocol conversion does not include a traditional retimer, a traditional analog-to-digital converter ADC or a digital-to-analog converter DAC. This is because the optical module proposed in the present disclosure only performs transparent electrical-to-optical conversion on the input electrical signal, and only performs transparent optical-to-electrical conversion on the input optical signal. The so-called transparency means that there is no need to recover the clock processing of the signal before and after the conversion, nor is there any need to perform digital-to-analog or analog-to-digital conversion processing on the signal before and after the conversion, that is, the input signal and the output signal are only different in form (electrical signal form or optical signal form), and no other conversion processing is performed to adapt it to the target protocol or format.

[0139] The optical module 100 proposed in the present disclosure does not include a processing channel for low-speed sideband control signals, that is, only a conversion channel for high-speed data signals is provided, but does not include a conversion channel corresponding to the low-speed sideband control signals, which also greatly simplifies the design of the optical module 100.

[0140] The above about FIG. 3A to FIG. 4B The various features of the optical module 100 described in the computing device are also applicable to FIG. 5A to FIG. 5C The optical module in the

[0141] In the above description, the embodiments of the present disclosure have been described in conjunction with the accompanying drawings. It should be understood that the above embodiments are merely illustrative, and those skilled in the art should understand that the combination of the constituent elements and processes of the present embodiments can be modified in various ways, and such modifications also fall within the scope of the present disclosure.

Claims

1. A computing system comprising: An optical backplane comprising a plurality of optical connectors and a network formed by optical links arranged between two of the plurality of optical connectors; as well as a plurality of computing devices, each computing device comprising an optical interface connected to one of the plurality of optical connectors, Wherein, every two computing devices among the plurality of computing devices are optically interconnected point-to-point via corresponding optical links in the network.

2. The computing system of claim 1, wherein: The optical backplane includes a carrier board, and the network includes a plurality of optical fiber pathways arranged in the carrier board and between pairs of the plurality of optical connectors.

3. The computing system of claim 1, wherein: The optical backplane includes an optical waveguide board, and the network includes a plurality of optical waveguide pathways arranged within the optical waveguide board and between pairs of the plurality of optical connectors.

4. The computing system of claim 1, wherein: The optical interface of each computing device includes a plurality of optical input ports and a plurality of optical output ports, and The corresponding optical link between every two computing devices in the plurality of computing devices is connected to a corresponding optical input port in the plurality of optical input ports and a corresponding optical output port in the plurality of optical output ports through a corresponding optical connector.

5. The computing system of any one of claims 1 to 4, wherein: Each of the computing devices comprises: PCB board; A computing chip is arranged on the PCB board, the computing chip includes one or more input and output high-speed interfaces, wherein each input and output high-speed interface has one or more input high-speed ports and one or more output high-speed ports, the Each output high-speed port performs parallel-to-serial conversion on a parallel signal within the computing chip to output a first electrical signal, and each input high-speed port performs serial-to-parallel conversion on a second electrical signal received as a high-speed serial signal; and One or more optical modules are arranged on the PCB board, each optical module includes an electrical input and output interface and an optical input and output interface, the electrical input and output interface includes at least one electrical input port and at least one electrical output port, the optical input and output interface includes at least one optical input port and at least one optical output port, wherein Each of the at least one electrical input port is electrically connected to a corresponding one of the one or more output high-speed ports through wiring in the PCB board, Each of the at least one electrical output port is electrically connected to a corresponding one of the one or more input high-speed ports through wiring in the PCB board, Each optical module converts the first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output port, and converts the second optical signal received from each of the at least one optical input port into the second electrical signal and outputs the second electrical signal, and The optical input and output interfaces of the one or more optical modules together constitute the optical interface of each computing device.

6. The computing system of claim 5, wherein: Data transmission is performed between a first computing device and a second computing device in the plurality of computing devices as follows: The first electrical signal output by the corresponding output high-speed port of the computing chip in the first computing device is provided to the corresponding electrical input port of the corresponding optical module in the first computing device; The corresponding optical module converts the first electrical signal into the first optical signal and outputs the first optical signal from the corresponding optical output port; The first optical signal is provided to a corresponding optical input port of a corresponding optical module of the second device via a corresponding optical link in the optical backplane; as well as The corresponding optical module of the second device converts the first optical signal into a corresponding electrical signal and provides the electrical signal to the computing chip of the second device.

7. The computing system of claim 6, wherein: The first computing device and the second computing device are the same computing device or different computing devices.

8. The computing system of claim 5, wherein: The number of output high-speed ports of the computing chip is equal to the total number of electrical input ports of the one or more optical modules, and the number of input high-speed ports of the computing chip is equal to the total number of electrical output ports of the one or more optical modules.

9. The computing system of claim 5, wherein: Each computing device further includes at least one high bandwidth memory (HBM) unit, wherein the at least one HBM unit and the computing chip are packaged on a substrate, and the substrate is arranged on the PCB board.

10. The computing system of claim 9, wherein: The at least one HBM unit and the computing chip are packaged on the substrate through an interposer.

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