Method for manufacturing semiconductor device and semiconductor device

By providing a cured resin layer on the semiconductor substrate to cover the terminal electrodes and using a chuck to adsorb the surface of the resin layer, the problem of easy deflection or cracking of the semiconductor die during installation is solved, and the reliable installation of semiconductor components is achieved and Improved stability.

CN119452472APending Publication Date: 2025-02-14RESONAC CORP
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202480002385.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-05-30
Filing Date
2024-05-29
Publication Date
2025-02-14

AI Technical Summary

Technical Problem

The prior art is prone to flexion or rupture when installing semiconductor dies. Especially in the context of thinner development, it is difficult to apply sufficient load on the central part of the back of the semiconductor dies, resulting in insufficient crimping or gaps. form.

Method used

The semiconductor component is mounted by providing a cured resin layer on the first surface of the semiconductor substrate, covering a plurality of terminal electrodes, and adsorbing and lifting the surface of the resin layer through the collet. This method can suppress deflection or rupture of semiconductor components and ensure sufficient load application.

Benefits of technology

Reliable installation of semiconductor components is achieved, and the conditions of deflection or cracking are avoided. At the same time, the stability and efficiency of the installation process are improved due to the protection of the resin layer.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119452472A_ABST
    Figure CN119452472A_ABST
Patent Text Reader

Abstract

As an example of a method for manufacturing a semiconductor device, disclosed is a method for mounting a bridge die (20) on a support such as a rewiring layer in a state in which a connection terminal faces upward (facing upward). In this method, a resin layer (23) is formed so that a plurality of terminal electrodes (22) on a semiconductor substrate (21) of a bridge die (20) are covered with a thermosetting resin film (e.g., DAF) or a thermosetting adhesive before an adhesive layer is formed on the back surface of the bridge die. Each bridge die (20) is mounted on a support such as a wiring layer (12) by vacuum-absorbing the entire surface of the cured resin layer (23) by a chuck, and a semiconductor device is manufactured. According to this method, since the entire surface (23a) can be adsorbed when the bridge die (20) is adsorbed by the chuck (C), bending of the bridge die can be suppressed compared with a method in which the bridge die (20) is adsorbed only at the outer edge while avoiding the terminal electrode. In addition, chip breakage when the chip is picked up and generation of voids when the chip is mounted by heating and crimping can be suppressed.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device. Background Art

[0002] In recent years, with the rapid advancement of high functionality of electronic devices such as AI / HPC, the size and density of semiconductor packages have been rapidly increasing. The packaging structure is not limited to high density surface mounting, but is also developing towards the complexity and diversification of packaging structures and mounting processes such as inorganic (silicon) or organic interposer (Bridge die / RDL) technology, 2.xD mounting using this technology, and 3D mounting using TSV (HBM / Chiplet) technology. For example, Resonac Holdings Corporation uses the "Packaging Solution Center" as its main base to develop the technology of the next generation semiconductor packaging process that combines mounting processes and materials from the perspective of customers (semiconductor manufacturers).

[0003] As a technology in the field of semiconductor packages, Patent Document 1 discloses a method for manufacturing a semiconductor device in which a semiconductor bare die is mounted face-up on a carrier and sealed, a wiring layer is formed on the sealing layer, and another semiconductor bare die is further mounted on the wiring layer. Patent Document 2 discloses another method for manufacturing a semiconductor device.

[0004] Previous technical literature

[0005] Patent Literature

[0006] Patent Document 1: U.S. Patent Application Publication No. 2021 / 0098421

[0007] Patent Document 2: U.S. Patent Application Publication No. 2022 / 0093526 Summary of the invention

[0008] Technical issues to be solved by the invention

[0009] In the manufacturing method described in Patent Document 1, in order to mount a semiconductor bare chip on a support, it is conceivable to mount the semiconductor bare chip on the support by sucking and lifting the terminal electrode side of the semiconductor bare chip with a chuck. Fig. 9As shown in (a), the outer periphery of the semiconductor die 120 is sucked by the chuck C1 so as to avoid the internal area where the terminal electrode 122 (copper pillar, etc.) is provided. However, as the thinning of semiconductor die progresses, such suction sometimes causes the semiconductor die to bend. In particular, when a semiconductor wafer is singulated to obtain a plurality of semiconductor die, when the semiconductor die is peeled off from the dicing tape, it is pushed up from the back with a needle or the like, but this sometimes promotes the bending of the semiconductor die or causes the semiconductor die to break depending on the situation. And, as Fig. 9 As shown in (b), when the semiconductor bare chip 120 is attracted and then mounted on a support for crimping, since the chuck C1 only applies load to the outer periphery of the semiconductor bare chip 120, it is difficult to apply load to the central part of the back side of the bare chip, and sometimes the crimping is insufficient or a gap is formed in the central part.

[0010] An object of the present invention is to provide a method for manufacturing a semiconductor device capable of reliably mounting a semiconductor component (semiconductor bare die).

[0011] Means for solving technical problems

[0012] [1] As one aspect of the present invention, there is provided a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device comprises: a step of preparing a semiconductor component, the semiconductor component comprising a semiconductor substrate having a first surface and a second surface on the opposite side, a plurality of terminal electrodes provided on the first surface of the semiconductor substrate, and a cured resin layer provided on the first surface in a manner covering the plurality of terminal electrodes; a step of sucking the surface of the cured resin layer of the semiconductor component by a holding member and lifting the semiconductor component; and a step of mounting the semiconductor component on a support.

[0013] In the manufacturing method of the semiconductor device, a cured resin layer is provided on the first surface of the semiconductor device in a manner covering a plurality of terminal electrodes. Furthermore, the surface of the cured resin layer is adsorbed and lifted for subsequent installation. In this case, the plurality of terminal electrodes are covered by the resin layer, and the semiconductor component is attracted and lifted by the holding component without avoiding the terminal electrodes, so that the semiconductor component (semiconductor bare chip) can be suppressed from bending or breaking. Furthermore, the plurality of terminal electrodes are covered by the resin layer, so when the semiconductor component is mounted on the support body, a load can be applied to the entirety of the planar direction of the semiconductor component and the semiconductor component can be reliably mounted on the support body. As can be seen from the above, according to the manufacturing method of the semiconductor device, the semiconductor component can be reliably installed. In addition, in the manufacturing method of the semiconductor device, the portion covering the terminal electrode is formed by the cured resin layer, so it is easy to manufacture. In addition, the "cured resin layer" mentioned here only needs to be cured to a degree that allows at least one of adsorption and additional load to be performed, and also includes the case of incomplete curing (the so-called C stage).

[0014] [2] In the method for manufacturing a semiconductor device of [1] above, the step of preparing a semiconductor component may include the steps of: forming a resin layer containing a curable resin composition on the first surface of the semiconductor substrate so as to cover the plurality of terminal electrodes; and curing the resin layer to obtain a cured resin layer. In this case, it is possible to easily form a resin layer that protects the plurality of terminal electrodes.

[0015] [3] In the method for manufacturing a semiconductor device according to [1] or [2] above, the cured resin layer is preferably formed by attaching a resin film comprising a curable resin composition to the first surface of the semiconductor substrate and then curing the resin film. In this case, a resin layer that protects a plurality of terminal electrodes can be easily formed.

[0016] [4] In the method for manufacturing a semiconductor device according to [1] or [2] above, the cured resin layer may be formed by applying a liquid adhesive containing a curable resin composition to the first surface of the semiconductor substrate and then curing the liquid adhesive. In this case, a resin layer that protects a plurality of terminal electrodes can be easily formed.

[0017] [5] In the method for manufacturing a semiconductor device according to any one of [1] to [4] above, the cured resin layer preferably contains an inorganic filler. In this case, the hardness (elastic modulus, etc.) of the resin layer can be increased, and deflection and cracking of the semiconductor component can be further suppressed. Furthermore, by containing an inorganic filler, warping of the semiconductor component including the resin layer can also be suppressed.

[0018] [6] In the method for manufacturing a semiconductor device of [5] above, the content of the inorganic filler in the cured resin layer may be 30% by mass or more based on the total solid content contained in the resin layer before curing. In this case, warping of the semiconductor component can be more reliably suppressed.

[0019] [7] In the method for manufacturing a semiconductor device of [5] or [6] above, the average particle size of the inorganic filler in the cured resin layer is preferably 20 μm or less. In this case, even when the terminal electrodes of the semiconductor component and the spacing therebetween are miniaturized, the resin and filler can be filled (filled) between the terminal electrodes, and the terminal electrodes can be reliably covered with the resin layer. Furthermore, warping of the cured resin layer can be suppressed.

[0020] [8] In the method for manufacturing a semiconductor device of any one of [1] to [7] above, the elastic modulus of the cured resin layer at room temperature may be greater than 10 MPa. In this case, the bending and cracking of the semiconductor component can be further suppressed. Furthermore, when the cured resin layer is ground to expose the head of the terminal electrode, the grinding work can be easily performed. The elastic modulus mentioned here refers to the Young's modulus. Furthermore, the room temperature refers to 25°C. The high elastic modulus of the cured resin layer makes it easy to grind the resin layer, copper pattern, etc. in subsequent steps. As described above, the cured resin layer also includes the case where it is not completely cured, and it is sufficient to be ground to a degree that can be ground during the grinding work.

[0021] [9] In the method for manufacturing a semiconductor device described in any one of [1] to [8] above, the step of preparing a semiconductor component preferably includes the following steps: preparing a semiconductor wafer including a semiconductor substrate and providing a plurality of electrodes including a plurality of terminal electrodes on the first surface of the semiconductor wafer; forming a wafer resin layer including a curable resin composition on the first surface of the semiconductor wafer in a manner covering the plurality of electrodes; curing the wafer resin layer; and singulating the semiconductor wafer by dicing to obtain the semiconductor component. In this case, a plurality of semiconductor components can be manufactured at once. Furthermore, according to this manufacturing method, even when singulated by dicing, the semiconductor component can be peeled off from the dicing tape without being bent or broken.

[0022]

[10] The method for manufacturing a semiconductor device according to any one of [1] to [9] above may further include the following step: after the semiconductor component is mounted on the support body, sealing the semiconductor component with a sealing material and forming a sealing material layer on the support body.

[0023]

[11] In the method for manufacturing a semiconductor device of

[10] above, the average particle size of the inorganic filler contained in the sealing material layer is preferably larger than the average particle size of the inorganic filler contained in the cured resin layer. By including a large-sized inorganic filler in the sealing material, it is possible to reliably suppress the warping of the sealing material layer due to heat. In particular, in a large-sized process, adsorption can be reliably performed in high-precision processing in the next process or later.

[0024]

[12] In the method for manufacturing a semiconductor device of

[10] or

[11] above, the difference between the linear expansion coefficient of the sealing material layer and the linear expansion coefficient of the cured resin layer is preferably within 150 ppm / K. In this case, the behavior of the sealing material layer and the resin layer when heat is applied to the manufactured semiconductor device becomes equal, and it is possible to reduce heat-induced problems such as deviation in expansion.

[0025]

[13] The method for manufacturing a semiconductor device according to any one of

[10] to

[12] may further include the step of grinding the cured resin layer together with the sealing material layer so that the front ends of the plurality of terminal electrodes are exposed from the cured resin layer. In this case, a fine wiring layer etc. can be formed with high precision on the surface of the ground sealing material layer etc.

[0026]

[14] In the method for manufacturing a semiconductor device according to any one of [1] to

[13] above, in at least one of the lifting step and the mounting step, the thickness of the cured resin layer may be 15 μm or more, or 30 μm or more. In this case, deflection and cracking of the semiconductor component can be more reliably suppressed.

[0027]

[15] In the method for manufacturing a semiconductor device according to any one of [1] to

[14] above, an adhesive member for mounting the semiconductor component on the support body may be provided on the second surface of the semiconductor substrate. In this case, the semiconductor component can be mounted on the support body more reliably. Furthermore, the semiconductor component can be easily mounted on the support body.

[0028]

[16] In the method for manufacturing a semiconductor device according to

[15] , an adhesive member may be provided on the second surface of the semiconductor substrate before the step of mounting the semiconductor component on the support body. In this case, the work of mounting the semiconductor component on the support body is simplified.

[0029]

[17] In the method for manufacturing a semiconductor device of

[15] or

[16] , the difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the adhesive member may be within 150 ppm / K. In this case, since the thermal expansion of the cured resin layer and the adhesive member sandwiching the semiconductor substrate is substantially the same, it is possible to prevent the position or parallelism of the semiconductor substrate from being damaged, and to suppress warping of the mounted chip.

[0030]

[18] In the method for manufacturing a semiconductor device according to any one of

[15] to

[17] above, the adhesive member is preferably the same member as the resin layer before curing.

[0031] In this case, since the components arranged above and below the semiconductor substrate are of the same type, they behave in the same manner even when heat is applied, and it is possible to reduce problems caused by differences in behavior.

[0032]

[19] In the method for manufacturing a semiconductor device according to any one of [1] to

[18] above, the thickness of the cured resin layer may be between 50% and 150% of the height of the plurality of terminal electrodes. In this case, since the thickness of the resin layer is substantially equal to the height of the terminal electrodes, the semiconductor component can be lifted and mounted more reliably. The height of the plurality of terminal electrodes referred to herein refers to the average height of the heights of the plurality of terminal electrodes.

[0033]

[20] In the method for manufacturing a semiconductor device according to any one of [1] to

[19] above, preferably, in the lifting step, the holding member sucks and lifts the entire surface of the cured resin layer, and in the mounting step, the holding member applies a load to the entire surface of the cured resin layer for mounting. In this case, it is possible to more reliably suppress the semiconductor component from being bent or broken, and to more reliably mount the semiconductor component on the support.

[0034]

[21] In the method for manufacturing a semiconductor device according to any one of [1] to

[20] above, the ionic impurity concentration of the cured resin layer is preferably 5 ppm or less. In this case, migration between the plurality of terminal electrodes covered by the cured resin layer can be prevented.

[0035]

[22] In the method for manufacturing a semiconductor device according to any one of [1] to

[21] above, the bonding strength between the cured resin layer and the first surface of the semiconductor substrate may be 1 MPa or more. In this case, in the manufactured semiconductor device, the resin layer of the semiconductor component is prevented from peeling off.

[0036]

[23] In the method for manufacturing a semiconductor device according to any one of [1] to

[22] above, the bonding strength between the cured resin layer and the first surface of the semiconductor substrate is preferably 3 MPa or more. In this case, in the manufactured semiconductor device, peeling of the resin layer of the semiconductor component can be more reliably prevented.

[0037]

[24] The method for manufacturing a semiconductor device according to any one of [1] to

[23] may further include a step of mounting a first semiconductor bare die and a second semiconductor bare die on the first surface side of the semiconductor component after mounting the semiconductor component on the support body, wherein the first semiconductor bare die and the second semiconductor bare die may be connected via the semiconductor component in the mounting step. In this case, the semiconductor bare die can function as a bridge die.

[0038]

[25] Another aspect of the present invention relates to a semiconductor device. The semiconductor device includes a semiconductor component and a support body on which the semiconductor component is mounted. The semiconductor component includes: a semiconductor substrate having a first surface and a second surface on the opposite side; a plurality of terminal electrodes provided on the first surface of the semiconductor substrate; and a cured resin layer provided on the first surface in a manner covering the plurality of terminal electrodes.

[0039]

[26] The semiconductor device of

[25] may further include an adhesive member for mounting the semiconductor component on a support body, and the difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the cured adhesive member is preferably within 150 ppm / K. In this case, since the thermal expansion of the cured resin layer and the cured adhesive member that sandwich the semiconductor substrate is substantially the same, in the semiconductor device, it is possible to prevent the position or parallelism of the semiconductor substrate from being damaged, and to suppress warping of the mounted chip.

[0040]

[27] The semiconductor device of

[25] or

[26] may further include a sealing material layer for sealing the semiconductor component.

[0041]

[28] In the semiconductor device of

[27] above, the average particle size of the inorganic filler contained in the sealing material layer may be larger than the average particle size of the inorganic filler contained in the cured resin layer. By including a large-sized inorganic filler in the sealing material layer, warping of the sealing material layer due to heat can be reliably suppressed.

[0042]

[29] In the semiconductor device of

[27] or

[28] above, the difference between the linear expansion coefficient of the sealing material layer and the linear expansion coefficient of the cured resin layer may be within 150 ppm / K. In this case, the sealing material layer and the resin layer behave in a uniform manner when heat is applied to the semiconductor device, and adverse effects caused by heat, such as deviation in expansion, can be reduced.

[0043]

[30] The semiconductor device of any one of

[25] to

[29] above may further include a first semiconductor bare chip and a second semiconductor bare chip disposed on the first surface side of the semiconductor substrate, and a plurality of terminal electrodes of the semiconductor component may be connected to the first semiconductor bare chip and the second semiconductor bare chip.

[0044] Effects of the Invention

[0045] According to the present invention, it is possible to provide a method for manufacturing a semiconductor device capable of reliably mounting a semiconductor component. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 It is a cross-sectional view showing an example of the cross-sectional structure of a semiconductor device according to an embodiment of the present invention.

[0047] Figure 2 middle, Figure 2 (a)~ Figure 2 (d) means Figure 1 A cross-sectional view of a method for manufacturing a semiconductor device is shown.

[0048] Figure 3 middle, Figure 3 (a) and Figure 3 (b) means Figure 1 A cross-sectional view of a method for manufacturing a semiconductor device is shown, and Figure 2 The process performed after the process shown.

[0049] Figure 4 middle, Figure 4 (a) and Figure 4 (b) means Figure 1 A cross-sectional view of a method for manufacturing a semiconductor device is shown, and Figure 3 The process performed after the process shown.

[0050] Figure 5 middle, Figure 5 (a)~ Figure 5 (c) means Figure 1 A cross-sectional view of a method for manufacturing a semiconductor device shown in Figure 4 The process performed after the process shown.

[0051] Figure 6 middle, Figure 6 (a) and Figure 6 (b) is a diagram for explaining the process of picking up the bridge tube core.

[0052] Figure 7 middle, Figure 7 (a)~ Figure 7 (e) is a cross-sectional view showing a method of manufacturing a plurality of bridge dies at once using a semiconductor wafer.

[0053] Figure 8 2 is a cross-sectional view showing a bridge core according to a modified example.

[0054] Fig. 9 middle, Fig. 9 (a) and Fig. 9 (b) is a diagram for explaining the process of picking up and crimping the bridge core in the conventional method. DETAILED DESCRIPTION

[0055] Hereinafter, the embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same or equivalent parts are marked with the same symbols, and repeated descriptions are omitted. In addition, unless otherwise specified, the positional relationships such as up, down, left, and right are based on the positional relationships shown in the accompanying drawings. In addition, the dimensional ratios of the accompanying drawings are not limited to the ratios shown in the drawings.

[0056] In this specification, the term "layer" includes not only a structure of a shape formed on the entire surface but also a structure of a shape formed on a portion when viewed from a top view. In this specification, the term "process" includes not only an independent process but also a process that achieves the desired effect of the process even if it cannot be clearly distinguished from other processes.

[0057] In this specification, the numerical range represented by "~" indicates a range including the numerical values ​​recorded before and after "~" as the minimum value and the maximum value, respectively. In the numerical range recorded in stages in this specification, the upper limit or lower limit of the numerical range of a certain stage may also be replaced by the upper limit or lower limit of the numerical range of other stages. In the numerical range recorded in this specification, the upper limit or lower limit of the numerical range may be replaced by the value shown in the embodiments.

[0058] Figure 1 FIG. 1 is a diagram showing an example of a semiconductor device manufactured by a manufacturing method according to an embodiment of the present invention. Figure 1 As shown, the semiconductor device 1 includes semiconductor bare chips 2a, 2b, a semiconductor bare chip 3, a substrate 4, wiring layers 5a, 5b, sealing material layers 6a, 6b, connection electrodes 7a, 7b, and bumps 8a, 8b. The semiconductor bare chips 2a, 2b (first semiconductor bare chip, second semiconductor bare chip) are, for example, semiconductor chips such as LSI chips, CMOS sensors, and memories. The semiconductor bare chip 3 is, for example, a bridge die or a silicon capacitor, and the semiconductor bare chip 2a and the semiconductor bare chip 2b are connected via the connection electrode 7a. In the semiconductor device 1, the wiring layer 5a including a part (lower part) of the connection electrode 7b, the sealing material layer 6a sealing the semiconductor bare chip 3, the wiring layer 5b including a part (upper part) of the connection electrode 7b and the connection electrode 7a, and the sealing material layer 6b sealing the semiconductor bare chips 2a, 2b are sequentially stacked on the substrate 4. The connection electrode 7b is connected to the substrate 4 via a plurality of bumps 8a. A plurality of other bumps 8 b for connecting to external devices are further provided on the substrate 4 .

[0059] In the semiconductor device 1, the semiconductor bare chip 3 is arranged in the sealing material layer 6a in a face-up state. The semiconductor bare chip 3 has a semiconductor substrate 3a, a plurality of terminal electrodes 3b arranged on the upper surface (first surface) of the semiconductor substrate 3a, a resin layer 3c formed in a manner of covering the plurality of terminal electrodes 3b on the upper surface of the semiconductor substrate 3a, and an adhesive component 3d arranged on the lower surface (second surface) of the semiconductor substrate 3a. The resin layer 3c is a resin film containing a thermosetting adhesive such as a die bonding film (DAF) or a liquid thermosetting adhesive, and is a cured resin layer formed by thermally curing one of them. That is, the material constituting the resin layer 3c is a material that has passed through a semi-cured (B stage) state and has become a fully cured (C stage) state through a subsequent curing treatment. However, as long as there is no problem as the semiconductor device 1, the resin layer 3c can be in a cured state that has not reached a fully cured state. The curable resin composition constituting the resin layer 3c contains a thermosetting resin, for example, it may contain at least one selected from the group consisting of epoxy resin, bismaleimide resin, triazine resin and phenolic resin. The curable resin composition may further contain a curing agent, a curing accelerator and an inorganic filler. The front ends of the plurality of terminal electrodes 3b are exposed on the surface of the resin layer 3c. The plurality of terminal electrodes 3b are connected to the semiconductor bare chips 2a and 2b via the connecting electrodes 7a. For example, the semiconductor bare chip 3 as a bridge die is an extremely thin semiconductor bare chip, for example, having a thickness of less than 100μm, or a thickness of less than 50μm. In addition, the terminal electrodes 3b of the semiconductor bare chip 3 and their spacing are also developing towards miniaturization, the diameter of the terminal electrode 3b is, for example, 10μm to 50μm, the terminal spacing (separation distance) between the terminal electrodes 3b is, for example, 5μm to 20μm, and the height of the terminal electrode 3b is, for example, 20μm to 50μm. However, the size of the terminal electrode 3b is not limited to them. The adhesive component 3d is a component for fixing the semiconductor bare chip 3 by bonding it to the wiring layer 5a, etc., and can be formed of the same material as the resin layer 3c (such as DAF, etc.). The adhesive component 3d can be formed of a material having a linear expansion coefficient equal to the linear expansion coefficient of the material (cured material) constituting the resin layer 3c. For example, it is preferred that the difference between the linear expansion coefficient of the cured resin layer 3c and the linear expansion coefficient of the cured adhesive component 3d is within 150ppm / K. In addition, the adhesive component 3d can have a thickness equal to that of the resin layer 3c, which can be thicker or thinner. Similarly, the difference between the linear expansion coefficient of the sealing material layer 6a and the linear expansion coefficient of the cured resin layer 3c can be within 150ppm / K. In addition, an inorganic filler can be included in the sealing material layer 6a, and the average particle size of the inorganic filler contained in the sealing material layer 6a can be larger than the average particle size of the inorganic filler contained in the cured resin layer 3c.

[0060] Next, refer to Figure 2 to Figure 5, an example of a method for manufacturing the semiconductor device 1 is described. Figure 2 to Figure 5 1 is a cross-sectional view sequentially showing the manufacturing method of the semiconductor device 1 as described above. Figure 2 As shown in (a), in the method for manufacturing the semiconductor device, first, a temporary fixing layer 11 is formed on a carrier substrate 10. The carrier substrate 10 is, for example, a glass substrate. The temporary fixing layer 11 is, for example, a curing adhesive layer, and is configured to be peeled off together with the carrier substrate 10 by light or heat in the process described later. If the temporary fixing layer 11 is formed, a wiring layer 12 is formed on the temporary fixing layer 11. The wiring layer 12 is configured to include a plurality of connecting electrodes 13 and an insulating portion. The wiring layer 12 is, for example, a redistribution layer (RDL). Each of the connecting electrodes 13 is, for example, composed of a copper column, and is formed so that the upper half protrudes from the surface of the insulating portion. The connecting electrode 13 is an electrode connected to the semiconductor bare chips 25 and 26 described later (refer to Figure 3 (b)) is formed on the outer side or the outer peripheral side in the plane direction of the wiring layer 12. Figure 1 In the semiconductor device manufacturing method shown in the figure, the connection electrode 13 is not formed on the inner side or the center portion in the planar direction of the wiring layer 12, but the connection electrode 13 may be formed.

[0061] Then, if Figure 2 (b) and Figure 6 As shown, a semiconductor bare chip 20 (semiconductor component) is prepared. The semiconductor bare chip 20 includes a semiconductor substrate 21, a plurality of terminal electrodes 22, a resin layer 23 (cured resin layer), and an adhesive component 24. The semiconductor substrate 21 includes an upper surface 21a (first surface) and an opposite lower surface 21b (second surface). The plurality of terminal electrodes 22 are, for example, copper pillars provided on the upper surface 21a of the semiconductor substrate 21, and are connected to wiring (not shown) in the semiconductor substrate 21. The diameter of each terminal electrode 22 is, for example, 10 μm to 50 μm, the terminal pitch (separation distance) between the terminal electrodes 3b is, for example, 5 μm to 20 μm, and the height of the terminal electrode 3b is, for example, 20 μm to 50 μm. However, the size of the terminal electrode 22 is not limited to these. The adhesive component 24 is a component for mounting and fixing the semiconductor bare chip 20 on a support such as a wiring layer 12, and is composed of, for example, a film component containing a thermosetting adhesive such as a die bonding film (DAF). At this stage, the adhesive member 24 is not yet cured, and is thermally cured in a step described later.

[0062] In the semiconductor bare chip 20, a resin layer 23 is provided on the upper surface 21a of the semiconductor substrate 21 in a manner covering a plurality of terminal electrodes 22. Such a resin layer 23 can be formed by, for example, attaching a resin film formed of a thermosetting adhesive (curable resin composition) to the upper surface 21a of the semiconductor substrate 21 and then thermally curing it. In this case, the same DAF as the adhesive member 24 can be used. The resin layer 23 can be formed to cover the entire terminal electrode 22, or it can be formed so that the front end of the terminal electrode 22 is exposed from the surface of the resin layer 23. The resin layer 23 can be formed by applying a liquid adhesive containing the same thermosetting adhesive (curable resin composition) as the resin film to the upper surface 21a of the semiconductor substrate 21 and then curing it. The resin layer 23 can be cured to the extent that at least one of adsorption and additional load can be performed, and then the polishing described later can be performed, including the case where it is not completely cured (the so-called C stage). However, it can also be completely cured. The thickness of the resin layer 23 may be, for example, 50 μm or less, 20 μm or less, 10 μm or less, 9 μm or less, 8 μm or less, or 7 μm or more, or 1 μm or more, 2 μm or more, 3 μm or more, 4 μm or more, 5 μm or more, or 10 μm or more. The thickness of the resin layer 23 may be between 50% and 150% or between 80% and 120% relative to the height of the plurality of terminal electrodes 22, and is preferably the same thickness as the height of the terminal electrodes 22. In addition, the thickness of the resin layer 23 referred to herein refers to the thickness after curing, and the height of the plurality of terminal electrodes 22 refers to the average height of the plurality of terminal electrodes 22. Furthermore, even after the resin layer 23 is polished in the process described later, the thickness of the resin layer 23 may be between 50% and 150% or between 80% and 120% relative to the height of the plurality of terminal electrodes 22. In this case, the thickness of the resin layer 23 before polishing may be thicker than the thickness of the adhesive member 24.

[0063] The thermosetting adhesive constituting the film contains, for example, a high molecular weight resin component and a thermosetting component. The high molecular weight resin component may contain, for example, at least one resin selected from the group consisting of acrylic rubber, polyimide and phenoxy resin. The high molecular weight resin component may have a reactive group such as an epoxy group. The weight average molecular weight (based on the standard polystyrene conversion value of the GPC method) of the high molecular weight resin component may be 100,000 to 3,000,000. The content of the high molecular weight resin component may be 30 to 80 parts by mass relative to 10 parts by mass of the total mass of the resin layer 23.

[0064] The thermosetting component contained in the resin layer 23 is a compound having a reactive group that forms a cross-linked structure by self-polymerization and / or reaction with a curing agent. The thermosetting component may, for example, include at least one selected from the group consisting of epoxy resin, bismaleimide resin, triazine resin and phenolic resin. The content of the thermosetting component may be 1 to 30 parts by mass relative to 100 parts by mass of the resin layer 23. The thermosetting adhesive constituting the resin layer 23 may contain other components as needed. As examples of other components, a curing agent that reacts with the thermosetting component, a curing accelerator that promotes the reaction of the thermosetting component with the curing agent, a coupling agent (e.g., a silane coupling agent) and a filler (e.g., silica) may be cited.

[0065] The resin layer 23 may contain an inorganic filler. As specific examples of inorganic fillers, glass, silica, aluminum oxide, titanium oxide, carbon black, mica, boron nitride, etc. can be cited, among which, from the viewpoint of operability and processability (versatility), silica, aluminum oxide, titanium oxide, and boron nitride are preferred, and from the viewpoint of dispersibility in the resin and easy particle size control, silica, aluminum oxide, and boron nitride are more preferred. They can be used alone or in combination of two or more. In addition, the average particle size of the inorganic filler contained in the resin layer 23 can be, for example, less than 20 μm, or less than 10 μm, and the maximum particle size of the inorganic filler can be, for example, less than 30 μm. It is preferred that the average particle size of the inorganic filler is less than 5 μm and the maximum particle size of the inorganic filler is less than 20 μm. By having an average particle size of less than 10 μm and a maximum particle size of less than 30 μm, when a resin layer is formed on the surface of the terminal, it is possible to fill the terminals without gaps, and it is possible to suppress warping after curing the resin layer. The lower limit of the average particle size and the lower limit of the maximum particle size of the inorganic filler are not particularly limited, but both may be 0.001 μm or more.

[0066] As a method for measuring the average particle size and the maximum particle size of the inorganic filler, for example, a method of measuring the particle size of about 20 inorganic fillers using a scanning electron microscope (SEM) can be cited. As a method for measuring using SEM, for example, the following method can be cited: a sample is prepared by heating and curing a resin composition containing an inorganic filler (preferably at 150 to 180° C. for 1 to 10 hours), cutting off the center portion of the sample, and observing its cross section with SEM. At this time, the probability of the presence of fillers with a particle size of 3 μm or less in the cross section is preferably more than 80% of the total fillers.

[0067] Furthermore, the content of the inorganic filler contained in the resin layer 23 may be 10% to 95% by mass based on the total solid content contained in the resin layer 23 before curing. Based on the total solid content contained in the resin layer 23 (adhesive) before curing, the content of the inorganic filler contained in the resin layer 23 is preferably 20% by mass or more, more preferably 30% by mass or more, particularly preferably 40% by mass or more, and preferably 40% to 95% by mass. The elastic modulus (Young's modulus) of such a resin layer 23 may be, for example, 10 MPa or more, or 1.0 GPa or more at room temperature (25°C). Furthermore, the linear expansion coefficient of the resin layer 23 below the glass transition temperature may be, for example, 10 ppm / K to 200 ppm / K. In addition, the adhesive member 24 may have the same structure as the resin layer 23, or may contain an inorganic filler as described above. In this case, the elastic modulus at room temperature in the adhesive member 24 may be 10 MPa or more, and the linear expansion coefficient may be, for example, 10 ppm / K to 200 ppm / K. The difference between the linear expansion coefficient of the resin layer 23 and the linear expansion coefficient of the adhesive member 24 is preferably within 150 ppm / K. The difference between the linear expansion coefficient of the resin layer 23 and the linear expansion coefficient of the adhesive member 24 may also be within 150 ppm / K after the adhesive member 24 is cured (i.e., after forming the semiconductor device 1).

[0068] In the material forming the resin layer 23, it is preferred to reduce the concentration of ionic impurities. Specifically, the ionic impurity concentration of the cured resin layer 23 is, for example, less than 5 ppm, can be less than 3 ppm, preferably less than 1 ppm, more preferably less than 0.5 ppm, and further preferably less than 0.3 ppm. Thus, migration between the plurality of terminal electrodes 22 covered by the resin layer 23 is prevented, and the resin layer 23 can ensure the insulation between the terminal electrodes 22. The resin layer 23 remains as a component of the manufactured semiconductor device 1 (because it is not peeled off during the manufacturing process), so it is preferred to have such a migration prevention function. As the ionic impurities mentioned here, sodium (Na), potassium (K), and chlorine (Cl) can be listed.

[0069] The resin layer 23 remains as a component of the manufactured semiconductor device 1, and is therefore preferably reliably fixed to the upper surface 21a of the semiconductor substrate 21 in a cured state. Specifically, the adhesive strength between the cured resin layer 23 and the upper surface 21a of the semiconductor substrate 21 is 1 MPa or more, preferably 3 MPa or more.

[0070] Next, when the preparation of the semiconductor bare chip 20 having the above structure is completed, Figure 6 (a) and Figure 6As shown in (b), the entire surface 23a of the resin layer 23 of the semiconductor bare chip 20 is vacuum-adsorbed and lifted by the chuck C. The chuck C is formed of an elastic component such as rubber. Then, the semiconductor bare chip 20 is vacuum-adsorbed by the chuck C and moved to a specified position of the wiring layer 12, and is fixed by installing it at a specified position of the wiring layer 12 by the adhesive component 24. During this installation, the terminal electrode 22 of the semiconductor bare chip 20 is covered by the resin layer 23, so that the entire surface 23a of the resin layer 23 can be pressed by the chuck C to fix it. Thus, it becomes Figure 2 The semiconductor bare chip 20 is arranged in a face-up state with the terminal electrode 22 facing upward.

[0071] Then, if Figure 2 As shown in (c), if the semiconductor bare chip 20 is mounted (set up) on the wiring layer 12, the semiconductor bare chip 20 and the connecting electrode 13 are sealed by a sealing material, and a sealing material layer 14 is formed on the wiring layer 12. The sealing material layer 14 is formed to contain a thermosetting resin such as an epoxy resin, and after sealing, it is cured by heat or the like. The adhesive component 24 of the semiconductor bare chip 20 can be cured by the thermal curing. The sealing material constituting the sealing material layer 14 is constituted to contain a thermosetting resin composition, for example, an epoxy resin and a curing agent. The sealing material constituting the sealing material layer 14 may further contain an inorganic filler, for example, a silica filler. The average particle size of the inorganic filler contained in the sealing material may be, for example, less than 50 μm, less than 25 μm, less than 10 μm, or less than 0.01 μm. The sealing material constituting the sealing material layer 14 suppresses warpage during or after the manufacture of the semiconductor device 1, and therefore preferably contains an inorganic filler with a large particle size, preferably an inorganic filler having an average particle size larger than the average particle size of the inorganic filler contained in the resin layer 23 of the semiconductor bare chip 20. In addition, when the terminal electrodes 22 of the semiconductor bare chip 20 are not covered by the resin layer 23, the terminal electrodes 22 are sealed by the sealing material layer 14, and an inorganic filler having a particle size smaller than the spacing between the terminal electrodes 22 is used. In this case, for example, there is a tendency for the sealing resin to have low elasticity, which may make it difficult to perform grinding in the subsequent grinding process or cause warpage during or after the manufacture of the semiconductor device 1. However, as in the present embodiment, when the terminal electrodes 22 of the semiconductor bare chip 20 are covered by the resin layer 23, it is possible to design a soft resin and filler that take into account warpage, etc., without considering the filling property between the terminal electrodes 22 in the material selection of the sealing material constituting the sealing material layer 14.

[0072] Next, if the sealing material layer 14 is formed, Figure 2As shown in (d), the sealing material layer 14 is polished by CMP or the like. As a result, the front end 13a of the connecting electrode 13 is exposed outside the sealing material layer 14a, and the front end 22a of the terminal electrode 22 of the semiconductor bare chip 20 is exposed outside from the surface 23a of the resin layer 23. As a result, the sealing material layer 14 is thinned to Figure 2 The sealing material layer 14a shown in (d). The elastic modulus (Young's modulus) of such sealing material layers 14, 14a can be, for example, 3.0 GPa or more. In addition, the linear expansion coefficient of the sealing material layers 14, 14a can be 5 ppm / K to 150 ppm / K, and the difference between the linear expansion coefficient of the sealing material layers 14, 14a and that of the resin layer 23 can be less than 150 ppm / K, preferably less than 100 ppm / K. The thickness of the ground resin layer 23 can be more than 20 μm. When the resin layer 23 is ground as described above, the front end of the terminal electrode 22 can also be ground in the same manner.

[0073] Next, if the sealing material layer 14a is formed, Figure 3 As shown in (a), a wiring layer 15 is formed on the sealing material layer 14a. The wiring layer 15 can be, for example, a redistribution layer (RDL). A plurality of connection electrodes 16 and a plurality of connection electrodes 17 are formed on the wiring layer 15. The portion other than the electrodes of the wiring layer 15 becomes an insulating portion. The connection electrode 16 is a connection electrode for connecting an external device and a semiconductor bare chip 25, 26 described later, for example, connected to the connection electrode 13. The connection electrode 17 is a connection electrode for connecting a semiconductor bare chip 20 and a semiconductor bare chip 25, 26 described later. The connection electrode 17 is respectively connected to the terminal electrode 22 of the semiconductor bare chip 20. Each connection electrode 16 and each connection electrode 17 is, for example, configured to include a copper column. The method for manufacturing each connection electrode 16 and each connection electrode 17 can use a known method.

[0074] Next, if the wiring layer 15 is formed, Figure 3 As shown in (b), semiconductor bare chips 25 and 26 are mounted on the wiring layer 15. The semiconductor bare chips 25 and 26 are, for example, semiconductor chips such as LSI chips, CMOS sensors, and memories. During this mounting, the connection electrode 16 is connected to the semiconductor bare chips 25 and 26, and the connection electrode 17 connects the semiconductor bare chip 20 and the semiconductor bare chips 25 and 26.

[0075] Next, if the semiconductor bare chips 25 and 26 are mounted, Figure 4 As shown in (a), semiconductor bare chips 25 and 26 are sealed by a sealing material on the wiring layer 15, and a sealing material layer 18 is formed on the wiring layer 15. Similar to the sealing material layer 14, the sealing material layer 18 is composed of a thermosetting resin such as epoxy resin, and is cured after sealing.

[0076] Next, if the semiconductor bare chips 25 and 26 are sealed by a sealing material to form a sealing material layer 18, Figure 4 As shown in (b), the surface of the semiconductor bare chips 25 and 26 can be ground until they are exposed from the surface of the sealing material layer. Figure 4 The sealing material layer 18a shown in (b).

[0077] Next, if the sealing material layer 18a is formed, Figure 5 As shown in (a), the temporary fixing layer 11 is subjected to laser irradiation or heat treatment to reduce the adhesiveness of the temporary fixing layer 11 and to separate the carrier substrate 10 from the wiring layer 12 .

[0078] Next, if the carrier substrate 10 is peeled off, Figure 5 As shown in (b), a connection bump 19 is formed at the lower end of the connection electrode 13 exposed from the lower surface of the wiring layer 12. Figure 5 The substrate 35 shown in (c) is provided with a substrate body 36, connection bumps 37 for connecting wiring electrodes in the substrate body 36 to the outside, an adhesive member 38, and other members 39 (for example, various electronic parts).

[0079] Then, if Figure 5 As shown in (c), the semiconductor device 30 provided with the connection bump 19 is mounted on the substrate 35. At this time, the semiconductor device 30 is fixed by bonding with the adhesive member 38 on the substrate 35. Then, the adhesive member 38 is cured by thermal curing, etc., thereby producing Figure 1 The semiconductor device 1 is shown.

[0080] Next, refer to Figure 7 , an example of a method for manufacturing the semiconductor bare die 20 used when manufacturing the semiconductor device 1 as described above will be described.

[0081] First, if Figure 7 As shown in (a), a semiconductor wafer 41 corresponding to each semiconductor substrate 21 of a plurality of semiconductor bare chips 20 is prepared. The semiconductor wafer 41 has a plurality of electrodes 42 corresponding to each semiconductor bare chip 20. If the semiconductor wafer 41 is prepared, Figure 7 As shown in (b), a wafer resin layer 43 containing a curable resin composition is formed on the upper surface 41a (first surface) of the semiconductor wafer 41 in a manner covering the plurality of electrodes 42. The wafer resin layer 43 is a wafer resin layer corresponding to the resin layer 23 (before curing) described above, and is formed by attaching a resin film containing the same thermosetting resin composition to the semiconductor wafer 41. Alternatively, a liquid adhesive containing the same thermosetting resin composition may be applied to the semiconductor wafer 41. Then, as Figure 7As shown in (c), the wafer resin layer 43 is cured by heat or the like to obtain a cured wafer resin layer 43a.

[0082] Then, if Figure 7 As shown in (d) of FIG. 4 , a DAF corresponding to the adhesive member 44 as described above is attached to the lower surface 41b (second surface) of the semiconductor wafer 41. Figure 7 As shown in (e), the semiconductor wafer 41 including the cured wafer resin layer 43a is singulated by dicing D to obtain a plurality of semiconductor bare chips 20. Such semiconductor bare chips 20 can be used as bridge dies when manufacturing various semiconductor devices. Figure 1 The semiconductor device shown is an example using the semiconductor bare chip 20 , but the present invention is not limited thereto.

[0083] Here, the method for manufacturing a semiconductor device according to the present embodiment, more specifically, the effects and advantages of the method for mounting the semiconductor bare chip 20, are described. Fig. 9 The method shown in the figure is compared to illustrate the above. Fig. 9 In the method shown in FIG. 1 , the resin layer 23 is not provided as in the method according to the present embodiment, so the plurality of terminal electrodes 122 (copper pillars) on the semiconductor substrate 121 are exposed. Fig. 9 As shown in (a), the clamp C1 with a protruding periphery (depressed in the center) to avoid the terminal electrode 122 is used for adsorption. Since the semiconductor bare chip is being thinned, if such suction is performed, the periphery of the semiconductor bare chip 120 is sometimes strongly attracted, causing the semiconductor bare chip 120 to bend. In particular, when a semiconductor wafer is singulated to obtain a plurality of semiconductor bare chips 120, when the semiconductor bare chip 120 is peeled off from the dicing tape, it is sometimes pushed up from the back with a needle P or the like, but this may promote the bending of the semiconductor bare chip 120 or cause the semiconductor bare chip 120 to break depending on the situation. In addition, as Fig. 9 As shown in (b), when the semiconductor die 120 is mounted on the support 110 for crimping after suction, since the load is only applied to the periphery (refer to the two arrows in the figure), it is sometimes difficult to apply a load to the central part of the back side of the semiconductor die 120, resulting in insufficient crimping or a gap formed in the central part.

[0084] In contrast, in the method for manufacturing a semiconductor device according to this embodiment, Figure 6As shown, when mounting the semiconductor bare chip 20, a cured resin layer 23 can be provided on the upper surface 21a of the semiconductor substrate 21 in a manner covering a plurality of terminal electrodes 22. Moreover, the surface 23a of the cured resin layer 23 is sucked and lifted by the chuck C, and the subsequent mounting is performed. In this way, the plurality of terminal electrodes 22 are covered by the resin layer 23, and the semiconductor bare chip 20 is sucked and lifted by the chuck C as a holding member without avoiding the terminal electrodes 22, so that the semiconductor bare chip can be prevented from being bent or broken. Moreover, the plurality of terminal electrodes 22 are covered by the resin layer 23, so when the semiconductor bare chip 20 is mounted on a support body such as a wiring layer 12, a load can be applied to the entirety of the semiconductor bare chip 20 in the plane direction, and the semiconductor bare chip 20 can be reliably mounted on the support body. As can be seen from the above, according to the manufacturing method of the semiconductor device, the semiconductor bare chip 20 can be reliably mounted. In addition, in the manufacturing method of the semiconductor device, the portion covering the terminal electrode 22 is formed by the cured resin layer 23, so it is easy to manufacture.

[0085] In the method for manufacturing a semiconductor device according to the present embodiment, when preparing a semiconductor bare chip 20, a resin layer including a curable resin composition is formed on the upper surface 21a of a semiconductor substrate 21 so as to cover a plurality of terminal electrodes 22, and the resin layer is cured to obtain a cured resin layer. Thus, a resin layer 23 that protects the plurality of terminal electrodes 22 can be easily formed.

[0086] In the method for manufacturing a semiconductor device according to the present embodiment, the cured resin layer 23 is formed by curing a resin film (e.g., DAF) containing a curable resin composition after being attached to the upper surface 21a of the semiconductor substrate 21. Thus, the resin layer 23 that protects the plurality of terminal electrodes 22 can be easily formed. In addition, the cured resin layer 23 can be formed by curing a liquid adhesive containing a curable resin composition after being applied to the upper surface 21a of the semiconductor substrate 21. In this case, the resin layer 23 that protects the plurality of terminal electrodes 22 can also be easily formed.

[0087] In the method for manufacturing a semiconductor device according to the present embodiment, the cured resin layer 23 preferably contains an inorganic filler. In this case, the hardness (elastic modulus, etc.) of the resin layer 23 can be increased, and the bending and cracking of the semiconductor bare die 20 can be further suppressed. In addition, by containing an inorganic filler, the warping of the semiconductor bare die 20 including the resin layer 23 can also be suppressed. In addition, by containing an inorganic filler, when the resin layer 23 is polished, the polishing process is easy.

[0088] In the method for manufacturing a semiconductor device according to the present embodiment, the content of the inorganic filler in the cured resin layer 23 may be 10% by mass or more based on the total solid content of the resin layer before curing. In this case, warping of the semiconductor die 20 can be more reliably suppressed.

[0089] In the method for manufacturing a semiconductor device according to the present embodiment, the average particle size of the inorganic filler in the cured resin layer 23 is preferably 20 μm or less. In this case, even when the terminal electrodes 22 and the pitch of the semiconductor bare chip 20 are miniaturized, the resin and the filler can be reliably filled between the terminal electrodes, and the terminal electrodes can be reliably covered with the resin layer.

[0090] In the method for manufacturing a semiconductor device according to the present embodiment, the elastic modulus of the cured resin layer 23 may be 10 MPa or more. In this case, the bending and cracking of the semiconductor die 20 can be further suppressed. Furthermore, when the cured resin layer 23 is polished to expose the head of the terminal electrode 22, the polishing work can be easily performed. In addition, the high elastic modulus of the cured resin layer 23 makes it easy to polish the resin layer, the copper pattern, etc.

[0091] In the method for manufacturing a semiconductor device according to the present embodiment, when preparing the semiconductor bare die 20, after preparing the semiconductor wafer 41 corresponding to the plurality of semiconductor substrates 21, a wafer resin layer 43 containing a curable resin composition is formed on the upper surface 41a of the semiconductor wafer 41 in a manner covering the plurality of electrodes 42. And, the wafer resin layer 43 is cured. Then, the semiconductor wafer 41 is singulated by dicing D to obtain a plurality of semiconductor bare dies 20. According to this method, a plurality of semiconductor bare dies 20 can be manufactured at once. And, according to this manufacturing method, even when singulated by dicing, the semiconductor bare die 20 can be peeled off from the dicing tape without bending or cracking.

[0092] In the method for manufacturing a semiconductor device according to the present embodiment, after the semiconductor bare chip 20 is mounted on the wiring layer 12 as a support, the semiconductor bare chip 20 can be sealed by a sealing material, and the sealing material layers 14 and 14a can be formed on the wiring layer 12. It is preferred that the average particle size of the inorganic filler contained in the sealing material layers 14 and 14a is larger than the average particle size of the inorganic filler contained in the resin layer 23. In this way, by including a larger inorganic filler in the sealing material, the warping of the sealing material layer 14 due to heat can be more reliably suppressed. Especially in a large-size process, adsorption can be reliably performed in high-precision processing after the next process.

[0093] In the method for manufacturing a semiconductor device according to the present embodiment, the difference between the linear expansion coefficient of the sealing material layers 14 and 14a and the linear expansion coefficient of the cured resin layer 23 is preferably within 150 ppm / K. In this case, the behaviors of the sealing material layer 14a and the resin layer 23 when heat is applied to the manufactured semiconductor device 1 become equal, and it is possible to reduce thermally-induced defects such as deviation in expansion.

[0094] In the method for manufacturing a semiconductor device according to the present embodiment, the cured resin layer 23 can be polished together with the sealing material layer 14a so that the front ends 22a of the plurality of terminal electrodes 22 are exposed from the cured resin layer 23. Thus, a fine wiring layer 15 and the like can be formed with high precision on the surface of the polished sealing material layer 14 and the like.

[0095] In the method for manufacturing a semiconductor device according to the present embodiment, the thickness of the cured resin layer 23 may be 15 μm or 30 μm when the semiconductor die 20 is lifted or mounted by the chuck C. In this case, the semiconductor die 20 can be more reliably prevented from being bent or cracked.

[0096] In the method for manufacturing a semiconductor device according to the present embodiment, an adhesive member 24 for attaching the semiconductor bare die 20 to a support such as the wiring layer 12 is provided on the lower surface 21b of the semiconductor substrate 21. Thus, the semiconductor bare die 20 can be more reliably attached to the wiring layer 12.

[0097] In the method for manufacturing a semiconductor device according to the present embodiment, the difference between the linear expansion coefficient of the cured resin layer 23 and the linear expansion coefficient of the adhesive member 24 may be within 150 ppm / K. In this case, since the thermal expansion of the cured resin layer and the adhesive member sandwiching the semiconductor substrate is substantially the same, it is possible to prevent the position or parallelism of the semiconductor substrate from being damaged, and to suppress the warping of the mounted chip.

[0098] In the method for manufacturing a semiconductor device according to the present embodiment, the thickness of the cured resin layer 23 may be between 50% and 150%, or between 80% and 120% relative to the height of the terminal electrode 22. In this case, since the thickness of the resin layer 23 is substantially equal to the height of the terminal electrode 22, the semiconductor bare chip 3 can be lifted and mounted more reliably.

[0099] In the method for manufacturing a semiconductor device according to the present embodiment, the adhesive member 44 is preferably the same member as the resin layer 23 before curing. In this case, since the members arranged above and below the semiconductor substrate 21 are the same type of members (for example, both are DAF), they behave in the same manner even when heat is applied, and thus it is possible to reduce problems caused by differences in behavior.

[0100] In the method for manufacturing a semiconductor device according to the present embodiment, when the semiconductor bare die 20 is lifted by the chuck C, the chuck C sucks and lifts the entire surface 23a of the cured resin layer 23, and when the semiconductor bare die 20 is mounted, a load is applied to the entire surface 23a of the cured resin layer 23 by the chuck C. Therefore, it is possible to more reliably suppress the semiconductor bare die 20 from being bent or broken, and to more reliably mount the semiconductor bare die 20 on a support such as the wiring layer 12.

[0101] In the method for manufacturing a semiconductor device according to the present embodiment, the ionic impurity concentration of the cured resin layer 23 is 5 ppm or less (or 3 ppm or less), thereby preventing migration between the plurality of terminal electrodes 22 covered by the cured resin layer 23 .

[0102] In the method for manufacturing a semiconductor device according to the present embodiment, the adhesive strength between the cured resin layer 23 and the upper surface 21 a of the semiconductor substrate 21 is 1 MPa or more, thereby preventing the resin layer 23 of the semiconductor bare die 20 from peeling off in the manufactured semiconductor device 1 .

[0103] The embodiments of the present invention have been described above, but the present invention is not limited to the embodiments described above and can be appropriately modified within the scope of the present invention. Figure 6 As shown in FIG. 1 , the semiconductor die 20 used has an adhesive component 24, but the present invention is not limited thereto. Figure 8 As shown, a semiconductor bare chip 20A without an adhesive component 24 can be used. In this case, when the semiconductor bare chip 20A is mounted on the wiring layer 12, solder can be provided on the wiring layer 12, and a metal layer can be provided on the back of the semiconductor bare chip 20 to join them. In addition, the semiconductor bare chip 20A can also be mounted on the wiring layer 12 using a silver paste. In addition, in the above-mentioned embodiment, an example of mounting the semiconductor bare chip 20 on the wiring layer 12 is shown, but it is not limited to this. For example, the wiring layer 12 may not be provided, and the semiconductor bare chips 20 and 20A may be directly mounted on the temporary fixing layer 11. In this case, if the temporary fixing layer 11 has adhesiveness, the semiconductor bare chip 20A can be directly mounted, and if it does not have adhesiveness, the semiconductor bare chip 20 can be mounted.

[0104] Description of Reference Numerals

[0105] 1-semiconductor device, 3-semiconductor bare chip (semiconductor component), 3a-semiconductor substrate, 3b-terminal electrode, 3c-resin layer, 5a-wiring layer (support body), 12-wiring layer (support body), 14, 14a-sealing material layer, 20, 20A-semiconductor bare chip (semiconductor component), 21-semiconductor substrate, 21a-upper surface (first surface), 21b-lower surface (second surface), 22-terminal electrode, 22a-front end, 23-resin layer, 24-adhesive component, 41-semiconductor wafer, 41a-upper surface (first surface), 41b-lower surface (second surface), 42-electrode, 43, 43a-wafer resin layer, 44-adhesive component.

Claims

1. A method for manufacturing a semiconductor device, comprising: A step of preparing a semiconductor component, the semiconductor component comprising a semiconductor substrate having a first surface and a second surface on the opposite side, a plurality of terminal electrodes provided on the first surface of the semiconductor substrate, and a cured resin layer provided on the first surface in a manner covering the plurality of terminal electrodes; A step of sucking the surface of the cured resin layer of the semiconductor component by a holding member and lifting the semiconductor component; and A step of mounting the semiconductor component on a support.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The process of preparing the semiconductor component includes the following steps: forming a resin layer including a curable resin composition on the first surface of the semiconductor substrate so as to cover the plurality of terminal electrodes; and The resin layer is cured to produce the cured resin layer.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The cured resin layer is formed by attaching a resin film including a curable resin composition to the first surface of the semiconductor substrate and then curing the resin film.

4. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The cured resin layer is formed by applying a liquid adhesive including a curable resin composition to the first surface of the semiconductor substrate and then curing the adhesive.

5. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein: The cured resin layer contains an inorganic filler.

6. The method for manufacturing a semiconductor device according to claim 5, wherein: The content of the inorganic filler is 30% by mass or more based on the total solid content contained in the resin layer before curing.

7. The method for manufacturing a semiconductor device according to claim 5 or 6, wherein: The average particle size of the inorganic filler is 20 μm or less.

8. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein: The elastic modulus of the cured resin layer at room temperature is 10 MPa or more.

9. The method for manufacturing a semiconductor device according to any one of claims 1 to 8, wherein: The process of preparing the semiconductor component includes the following steps: preparing a semiconductor wafer including the semiconductor substrate and providing a plurality of electrodes including the plurality of terminal electrodes on a first surface of the semiconductor wafer; forming a wafer resin layer including a curable resin composition on the first surface of the semiconductor wafer so as to cover the plurality of electrodes; curing the wafer resin layer; and The semiconductor components are obtained by singulating the semiconductor wafer by dicing.

10. The method for manufacturing a semiconductor device according to any one of claims 1 to 9, further comprising the following step: After the semiconductor component is mounted on the support body, the semiconductor component is sealed with a sealing material, and a sealing material layer is formed on the support body.

11. The method for manufacturing a semiconductor device according to claim 10, wherein: An average particle size of the inorganic filler contained in the sealing material layer is larger than an average particle size of the inorganic filler contained in the cured resin layer.

12. The method for manufacturing a semiconductor device according to claim 10 or 11, wherein: The difference between the linear expansion coefficient of the sealing material layer and the linear expansion coefficient of the cured resin layer is within 150 ppm / K.

13. The method for manufacturing a semiconductor device according to any one of claims 10 to 12, further comprising the following step: The cured resin layer is polished together with the sealing material layer so that the leading end of each of the plurality of terminal electrodes is exposed from the cured resin layer.

14. The method for manufacturing a semiconductor device according to any one of claims 1 to 13, wherein: In at least one of the lifting step and the mounting step, the cured resin layer has a thickness of 30 μm or more.

15. The method for manufacturing a semiconductor device according to any one of claims 1 to 14, wherein: An adhesive member for mounting the semiconductor component on the support is provided on the second surface of the semiconductor substrate.

16. The method for manufacturing a semiconductor device according to claim 15, wherein: The adhesive member is provided on the second surface of the semiconductor substrate before the step of mounting the semiconductor component on the support body.

17. The method for manufacturing a semiconductor device according to claim 15 or 16, wherein: The difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the adhesive member is within 150 ppm / K.

18. The method for manufacturing a semiconductor device according to any one of claims 15 to 17, wherein: The adhesive member is the same member as the resin layer before curing.

19. The method for manufacturing a semiconductor device according to any one of claims 1 to 18, wherein: The thickness of the cured resin layer is between 50% and 150% of the height of the plurality of terminal electrodes.

20. The method for manufacturing a semiconductor device according to any one of claims 1 to 19, wherein: In the lifting step, the holding member sucks and lifts the entire surface of the cured resin layer. In the mounting step, the holding member is mounted by applying a load to the entire surface of the cured resin layer.

21. The method for manufacturing a semiconductor device according to any one of claims 1 to 20, wherein: The cured resin layer has an ionic impurity concentration of 5 ppm or less.

22. The method for manufacturing a semiconductor device according to any one of claims 1 to 21, wherein: The adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is 1 MPa or more.

23. The method for manufacturing a semiconductor device according to any one of claims 1 to 22, wherein: The adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is 3 MPa or more.

24. The method for manufacturing a semiconductor device according to any one of claims 1 to 23, further comprising the step of mounting a first semiconductor bare die and a second semiconductor bare die on the first surface side of the semiconductor component after mounting the semiconductor component on the support body, In the mounting step, the first semiconductor bare die and the second semiconductor bare die are connected via the semiconductor component.

25. A semiconductor device comprising: A semiconductor component comprising a semiconductor substrate having a first surface and an opposite second surface, a plurality of terminal electrodes provided on the first surface of the semiconductor substrate, and a cured resin layer provided on the first surface so as to cover the plurality of terminal electrodes; and A support body is provided with the semiconductor component mounted thereon.

26. The semiconductor device according to claim 25, further comprising an adhesive member for mounting the semiconductor component on the support body. The difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the cured adhesive member is within 150 ppm / K. 27 . The semiconductor device according to claim 25 , further comprising a sealing material layer for sealing the semiconductor component.

28. The semiconductor device according to claim 27, wherein: An average particle size of the inorganic filler contained in the sealing material layer is larger than an average particle size of the inorganic filler contained in the cured resin layer.

29. The semiconductor device according to claim 27 or 28, wherein: The difference between the linear expansion coefficient of the sealing material layer and the linear expansion coefficient of the cured resin layer is within 150 ppm / K.

30. The semiconductor device according to any one of claims 25 to 29, further comprising a first semiconductor bare chip and a second semiconductor bare chip provided on the first surface side of the semiconductor substrate, The plurality of terminal electrodes of the semiconductor component are connected to the first semiconductor bare die and the second semiconductor bare die.

Citation Information

Patent Citations

  • Semiconductor package with redistribution structure and manufacturing method thereof

    US20220093526A1

  • Thermosetting resin composition and semiconductor device manufacturing method

    CN105143344A

  • Thermosetting resin film, first protective film forming sheet, kit, and method for manufacturing first protective film-attached workpiece

    CN113169082A

  • Manufacture of semiconductor device

    JP1994021219A

  • Package component, electronic device and manufacturing method thereof

    US20210098421A1