HTRB reliability detection circuit and detection method of three-level power device

Abstract

The invention discloses an HTRB reliability detection circuit and method for a three-level power device, and the circuit is connected with a detection sub-circuit at two ends of each chip to be detected, and the detection sub-circuit comprises a resistor, a first power switch tube, a second power switch tube and a voltage source. A resistor and a first power switch tube are sequentially connected in series between the collector electrode of the tested IGBT and the positive electrode of the voltage source, and a second power switch tube is connected between the collector electrode of the tested IGBT and the negative electrode of the voltage source; the method comprises the following steps: sampling the leakage current of a detected IGBT between a collector electrode and a resistor of the detected IGBT, generating a first PWM wave and a second PWM wave according to the magnitude of the leakage current, and respectively controlling the turn-off and turn-on of a first power switch tube and a second power switch tube, thereby carrying out HTRB reliability detection and protection on the detected IGBT; according to the invention, each chip in the three-level power device can be examined, the tested chip is protected in a PWM wave mode, verification of chip parameters is accelerated, device parameters are optimized, and the research and development application period is shortened.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductor detection, in particular to a HTRB reliability detection circuit and a detection method for a three-level power device. Background Art

[0002] Three-level power devices include NPC (Neutral Point Clamped) and ANPC (Active Neutral Point Clamped). Figure 1 The circuit topology is shown in Figure 1, which is mainly composed of IGBT (Insulate-Gate Bipolar Transistor). As voltage-driven devices, three-level power devices have been widely used in new energy converters such as wind power and photovoltaics. Their chip structure and packaging technology determine the overall performance of the device.

[0003] At present, one experimental method for evaluating the reliability of three-level power devices is HTRB (High Temperature Reverse Bias). The test method is to place the device under test on a PCB aging board, short-circuit the gate and emitter through a circuit, place the PCB aging board with IGBT power devices in a box of high-temperature equipment, add a DC voltage of 80% or more of the device withstand voltage between the IGBT collector and emitter, and finally test the IGBT device for 168 hours or 1000 hours according to national standards. During the test, the device is tested for leakage protection by detecting the voltage of the IGBT series resistor. However, for three-level power devices, there are generally four to six IGBT chips in the circuit, and similarly there are four to six FRD (Fast recovery diode) chips. If the chips are connected in parallel, there will be more IGBT and FRD chips. The traditional method requires the device under test to be in a long-term steady-state mode, and only one IGBT / FRD can be tested for reliability. The number of tests is small and it is impossible to simulate the requirements of actual applications. Summary of the invention

[0004] Purpose of the invention: The purpose of the present invention is to provide a HTRB reliability detection circuit and detection method that can detect and quickly protect each IGBT in a three-level power device.

[0005] Technical solution: The HTRB reliability detection circuit of the three-level power device of the present invention performs HTRB reliability detection and protection on each IGBT chip in the three-level power device through a detection subcircuit;

[0006] The detection subcircuit comprises a resistor, a first power switch tube, a second power switch tube and a voltage source, the resistor and the first power switch tube are connected in series in sequence between the collector of the IGBT under test and the positive electrode of the voltage source, and the second power switch tube is connected between the collector of the IGBT under test and the negative electrode of the voltage source;

[0007] The leakage current of the IGBT under test is sampled between the collector and the resistor of the IGBT under test, and a first PWM wave and a second PWM wave are generated according to the magnitude of the leakage current to control the turning off and on of the first power switch tube and the second power switch tube respectively, thereby performing HTRB reliability detection and protection on the IGBT under test.

[0008] Furthermore, the first PWM wave is a multi-pulse PWM wave, and the second PWM wave is a long-pulse PWM wave.

[0009] Furthermore, the first power switch tube and the second power switch tube are both high-voltage MOSFET devices; the collector of the IGBT under test is connected to one end of the resistor, the other end of the resistor is connected to the drain of the first power switch tube, the source of the first power switch tube is connected to the positive electrode of the voltage source, the negative electrode of the voltage source is connected to the source of the second power switch tube, and the drain of the second power switch tube is connected to the emitter of the IGBT under test; the gate of the first power switch tube is connected to the first PWM wave, and the gate of the second power switch tube is connected to the second PWM wave.

[0010] Furthermore, according to the magnitude of the leakage current, a control signal of a first PWM wave is generated by a first PWM control circuit, and a control signal of a second PWM wave is generated by a second PWM control circuit; the first PWM control circuit and the second PWM control circuit both include:

[0011] Sampling circuit, A / D conversion circuit, DSP processor, D / A conversion circuit and level conversion circuit; leakage current generates PWM wave through sampling circuit, A / D conversion circuit, DSP processor and D / A conversion circuit;

[0012] The DSP processor generates a corresponding first PWM wave or a second PWM wave according to the magnitude of the leakage current and the leakage current threshold;

[0013] The level conversion circuit generates a corresponding first PWM wave control signal or a second PWM wave control signal according to the first PWM wave or the second PWM wave.

[0014] Furthermore, at the beginning of the reliability test, the second MOS tube is turned on first, and then the first MOS tube is turned on. During the switching period of the second MOS tube, the first PWM wave is a PWM wave with an adjustable switching frequency.

[0015] When the reliability detection is completed or the leakage current exceeds the leakage current threshold, the first MOS tube is turned off first, and then the second MOS tube is turned off.

[0016] The HTRB reliability detection method of the three-level power device of the present invention comprises the following steps: connecting the collector and emitter of each IGBT chip in the three-level power device to a detection subcircuit to perform HTRB reliability detection and protection;

[0017] The detection subcircuit comprises a resistor, a first power switch tube, a second power switch tube and a voltage source, the resistor and the first power switch tube are connected in series in sequence between the collector of the IGBT under test and the positive electrode of the voltage source, and the second power switch tube is connected between the collector of the IGBT under test and the negative electrode of the voltage source;

[0018] The leakage current of the IGBT under test is sampled between the collector and the resistor of the IGBT under test, and a first PWM wave and a second PWM wave are generated according to the magnitude of the leakage current to control the turning off and on of the first power switch tube and the second power switch tube respectively, thereby performing HTRB reliability detection and protection on the IGBT under test.

[0019] Furthermore, in the detection sub-circuit, the first PWM wave is a multi-pulse PWM wave, and the second PWM wave is a long-pulse PWM wave.

[0020] Furthermore, in the detection subcircuit, the first power switch tube and the second power switch tube are both high-voltage MOSFET devices; the collector of the IGBT under test is connected to one end of the resistor, the other end of the resistor is connected to the drain of the first power switch tube, the source of the first power switch tube is connected to the positive electrode of the voltage source, the negative electrode of the voltage source is connected to the source of the second power switch tube, and the drain of the second power switch tube is connected to the emitter of the IGBT under test; the gate of the first power switch tube is connected to the first PWM wave, and the gate of the second power switch tube is connected to the second PWM wave.

[0021] Furthermore, in the detection subcircuit, according to the magnitude of the leakage current, a control signal of a first PWM wave is generated through a first PWM control circuit, and a control signal of a second PWM wave is generated through a second PWM control circuit;

[0022] The first PWM control circuit and the second PWM control circuit both include:

[0023] Sampling circuit, A / D conversion circuit, DSP processor, D / A conversion circuit and level conversion circuit; leakage current generates PWM wave through sampling circuit, A / D conversion circuit, DSP processor and D / A conversion circuit;

[0024] The DSP processor generates a corresponding first PWM wave or a second PWM wave according to the magnitude of the leakage current and the leakage current threshold;

[0025] The level conversion circuit generates a corresponding first PWM wave control signal or a second PWM wave control signal according to the first PWM wave or the second PWM wave.

[0026] Furthermore, at the beginning of the reliability test, the second MOS tube is turned on first, and then the first MOS tube is turned on. During the switching period of the second MOS tube, the first PWM wave is a PWM wave with an adjustable switching frequency.

[0027] When the reliability detection is completed or the leakage current exceeds the leakage current threshold, the first MOS tube is turned off first, and then the second MOS tube is turned off.

[0028] Beneficial effect: Compared with the prior art, the advantages of the present invention are: the present invention performs HTRB reliability assessment on power devices in the three-level topology through multi-channel PWM control voltage-type control switches while maintaining the same temperature assessment mode, detects the leakage size of the device under test, and controls the main circuit of the device under test according to the protection threshold result after processing the sampled signal through a digital chip. The present invention can assess each chip in the three-level topology circuit and screen out defective chips. At the same time, the present invention quickly protects each power device through a PWM wave cycle, thereby constantly detecting the leakage current of the IGBT power device under test and calculating through software, so that both ends of the device under test are in a safe assessment circuit. This circuit detection and protection method can well protect the device under test, which is of great significance to the process, design and practical application of the device. Similarly, this test method also speeds up the verification of chip parameters and optimizes device parameters, and shortens the cycle of research and development and application. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a topological diagram of a three-level power device in the prior art;

[0030] Figure 2 is a circuit diagram of an ANPC detection in an embodiment of the present invention;

[0031] Figure 3 is a circuit diagram of an ANPC sub-component detection circuit in an embodiment of the present invention;

[0032] Figure 4 is a structural diagram of a sampling circuit in an embodiment of the present invention;

[0033] Figure 5 is a structural diagram of an A / DD / A control circuit in an embodiment of the present invention;

[0034] Figure 6is a structural diagram of a level conversion circuit in an embodiment of the present invention;

[0035] Figure 7 4 is a leakage current determination logic flow chart in an embodiment of the present invention. DETAILED DESCRIPTION

[0036] The technical solution of the present invention is further described below in conjunction with the accompanying drawings.

[0037] like Figure 2 As shown, the HTRB reliability detection circuit of the three-level power device is described, including the three-level power device to be tested, and the detection circuit connected to each IGBT chip; this embodiment takes the ANPC circuit as an example. During the detection process, the gate and emitter of each IGBT chip are short-circuited, and a set voltage is applied in the high temperature box. When the temperature and voltage reach the set conditions, the ANPC under test is in a long-term steady-state mode for reliability detection.

[0038] The detection circuit structure connected to each IGBT chip is the same. This embodiment takes IGBT1 of ANPC as an example.

[0039] The detection circuit includes a detection subcircuit, and its structure is as follows Figure 3 As shown, the collector of IGBT1 is connected to one end of resistor R7, the other end of resistor R7 is connected to the drain of MOS1, the source of MOS1 is connected to the positive electrode of voltage source VDC1, the negative electrode of voltage source VDC1 is connected to the source of MOS5, and the drain of MOS5 is connected to the emitter of IGBT1.

[0040] The detection circuit also includes a first PWM control circuit and a second PWM control circuit, which respectively generate a first PWM wave drive signal and a second PWM wave drive signal, which are respectively used to control the switching on and off of MOS1 and MOS5. The control pulses of MOS1 and MOS5 are different. The control pulse of MOS1 is a multi-pulse PWM wave, and the control pulse of MOS5 is a long-pulse PWM wave, but the frequency of the PWM wave is adjustable.

[0041] The first PWM control circuit and the second PWM control circuit have the same structure. This embodiment takes the first PWM control circuit as an example. The first PWM control circuit includes a sampling circuit, an A / DD / A control circuit and a level conversion circuit.

[0042] like Figures 4 to 6As shown, the sampling circuit is used to collect the leakage current of IGBT1 between the collector of IGBT1 and resistor R7, and generate a voltage signal through the sampling circuit. The voltage signal is input into the A / DD / A control circuit to generate the first PWM wave, and finally the driving signal of the first PWM wave is generated through the level conversion circuit, which is loaded to the gate of MOS1 to control its shutdown and conduction. The A / DD / A control circuit includes a DSP processor, which generates the corresponding PWM wave according to the size of the leakage current and the leakage current threshold. The control process is as follows Figure 7 shown.

[0043] Before reliability detection, the DSP processor in the second PWM control circuit is initialized, and MOS5 is controlled to be turned on through a long pulse PWM wave. Then the DSP processor in the first PWM control circuit is initialized, and MOS1 is controlled to be turned on through a multi-pulse PWM wave, so that the detection circuit can operate normally.

[0044] During the reliability test, if the leakage current of the IGBT under test is too large and exceeds the set threshold, the DSP processor is controlled to issue instructions to block the PWM pulses of MOS1 and MOS5 in the detection circuit of the IGBT under test, first cutting off MOS1, then cutting off MOS5, and then cutting off the circuit. At the same time, if any IGBT chip has excessive leakage current, it will not affect the normal operation of other circuits after being cut off, thereby protecting the device and its circuit.

[0045] In terms of the switching sequence, MOS5 connected in series with the negative electrode of the power supply is turned on first and then turned off. During the switching period, the pulse of MOS1 connected in series with the resistor is a PWM wave with adjustable switching frequency.

[0046] The HTRB reliability detection method of the three-level power device of the present invention comprises the following steps: connecting the collector and emitter of each IGBT chip in the three-level power device to a detection subcircuit to perform HTRB reliability detection and protection;

[0047] The detection subcircuit comprises a resistor, a first power switch tube, a second power switch tube and a voltage source, the resistor and the first power switch tube are connected in series in sequence between the collector of the IGBT under test and the positive electrode of the voltage source, and the second power switch tube is connected between the collector of the IGBT under test and the negative electrode of the voltage source;

[0048] The leakage current of the IGBT under test is sampled between the collector and the resistor of the IGBT under test, and a first PWM wave and a second PWM wave are generated according to the magnitude of the leakage current to control the turning off and on of the first power switch tube and the second power switch tube respectively, thereby performing HTRB reliability detection and protection on the IGBT under test.

Claims

1. A HTRB reliability detection circuit for a three-level power device, characterized in that: For each IGBT chip in the three-level power device, HTRB reliability detection and protection are performed through the detection sub-circuit; The detection subcircuit comprises a resistor, a first power switch tube, a second power switch tube and a voltage source, the resistor and the first power switch tube are connected in series in sequence between the collector of the IGBT under test and the positive electrode of the voltage source, and the second power switch tube is connected between the collector of the IGBT under test and the negative electrode of the voltage source; The leakage current of the IGBT under test is sampled between the collector and the resistor of the IGBT under test, and a first PWM wave and a second PWM wave are generated according to the magnitude of the leakage current to control the turning off and on of the first power switch tube and the second power switch tube respectively, thereby performing HTRB reliability detection and protection on the IGBT under test.

2. The HTRB reliability detection circuit of the three-level power device according to claim 1, characterized in that: The first PWM wave is a multi-pulse PWM wave, and the second PWM wave is a long-pulse PWM wave.

3. The HTRB reliability detection circuit of the three-level power device according to claim 1, characterized in that: The first power switch tube and the second power switch tube are both high-voltage MOSFET devices; The collector of the IGBT under test is connected to one end of the resistor, the other end of the resistor is connected to the drain of the first power switch tube, the source of the first power switch tube is connected to the positive electrode of the voltage source, the negative electrode of the voltage source is connected to the source of the second power switch tube, and the drain of the second power switch tube is connected to the emitter of the IGBT under test; The gate of the first power switch tube is connected to the first PWM wave, and the gate of the second power switch tube is connected to the second PWM wave.

4. The HTRB reliability detection circuit of the three-level power device according to claim 1, characterized in that: According to the magnitude of the leakage current, a control signal of a first PWM wave is generated by a first PWM control circuit, and a control signal of a second PWM wave is generated by a second PWM control circuit; The first PWM control circuit and the second PWM control circuit both include: Sampling circuit, A / D conversion circuit, DSP processor, D / A conversion circuit and level conversion circuit; leakage current generates PWM wave through sampling circuit, A / D conversion circuit, DSP processor and D / A conversion circuit; The DSP processor generates a corresponding first PWM wave or a second PWM wave according to the magnitude of the leakage current and the leakage current threshold; The level conversion circuit generates a corresponding first PWM wave control signal or a second PWM wave control signal according to the first PWM wave or the second PWM wave.

5. The HTRB reliability detection circuit of the three-level power device according to claim 4, characterized in that: At the beginning of the reliability test, the second MOS tube is turned on first, and then the first MOS tube is turned on. During the switching period of the second MOS tube, the first PWM wave is a PWM wave with an adjustable switching frequency. When the reliability detection is completed or the leakage current exceeds the leakage current threshold, the first MOS tube is turned off first, and then the second MOS tube is turned off.

6. A HTRB reliability detection method for a three-level power device, characterized in that: The method comprises the following steps: connecting the collector and emitter of each IGBT chip in the three-level power device to a detection subcircuit to perform HTRB reliability detection and protection; The detection subcircuit comprises a resistor, a first power switch tube, a second power switch tube and a voltage source, the resistor and the first power switch tube are connected in series in sequence between the collector of the IGBT under test and the positive electrode of the voltage source, and the second power switch tube is connected between the collector of the IGBT under test and the negative electrode of the voltage source; The leakage current of the IGBT under test is sampled between the collector and the resistor of the IGBT under test, and a first PWM wave and a second PWM wave are generated according to the magnitude of the leakage current to control the turning off and on of the first power switch tube and the second power switch tube respectively, thereby performing HTRB reliability detection and protection on the IGBT under test.

7. The HTRB reliability detection method of a three-level power device according to claim 6, characterized in that: In the detection sub-circuit, the first PWM wave is a multi-pulse PWM wave, and the second PWM wave is a long-pulse PWM wave.

8. The HTRB reliability detection method of a three-level power device according to claim 6, characterized in that: In the detection subcircuit, the first power switch tube and the second power switch tube are both high-voltage MOSFET devices; The collector of the IGBT under test is connected to one end of the resistor, the other end of the resistor is connected to the drain of the first power switch tube, the source of the first power switch tube is connected to the positive electrode of the voltage source, the negative electrode of the voltage source is connected to the source of the second power switch tube, and the drain of the second power switch tube is connected to the emitter of the IGBT under test; The gate of the first power switch tube is connected to the first PWM wave, and the gate of the second power switch tube is connected to the second PWM wave.

9. The HTRB reliability detection circuit of the three-level power device according to claim 6, characterized in that: In the detection subcircuit, according to the magnitude of the leakage current, a control signal of a first PWM wave is generated through a first PWM control circuit, and a control signal of a second PWM wave is generated through a second PWM control circuit; The first PWM control circuit and the second PWM control circuit both include: Sampling circuit, A / D conversion circuit, DSP processor, D / A conversion circuit and level conversion circuit; leakage current generates PWM wave through sampling circuit, A / D conversion circuit, DSP processor and D / A conversion circuit; The DSP processor generates a corresponding first PWM wave or a second PWM wave according to the magnitude of the leakage current and the leakage current threshold; The level conversion circuit generates a corresponding first PWM wave control signal or a second PWM wave control signal according to the first PWM wave or the second PWM wave.

10. The HTRB reliability detection method of a three-level power device according to claim 9, characterized in that: At the beginning of the reliability test, the second MOS tube is turned on first, and then the first MOS tube is turned on. During the switching period of the second MOS tube, the first PWM wave is a PWM wave with an adjustable switching frequency. When the reliability detection is completed or the leakage current exceeds the leakage current threshold, the first MOS tube is turned off first, and then the second MOS tube is turned off.

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