Bootstrap program processing method and device, equipment, storage medium and program product

Abstract

The invention provides a bootstrap program processing method and device, equipment, a storage medium and a program product, and the bootstrap program processing method comprises the steps that a bootstrap program is compiled, firmware is generated, a first address and a second address are randomly distributed in the firmware in the compiling process, the first address is used for storing secret key information, and the second address is used for storing secret key information; the second address is used for storing verification information; generating secret key information of the firmware, overwriting the secret key information of the firmware to the first address, and generating the firmware after the secret key is overwritten; based on the firmware after the secret key is overwritten, verification information is generated, the verification information is overwritten to the second address, and firmware after overwriting verification is generated; and burning the firmware after overwriting verification to the target circuit board. The method and the device are used for solving the problem that in the process of burning the firmware compiled by the bootstrap program to the circuit board, the firmware compiled by the bootstrap program is easy to steal, so that the information security is poor.

Description

Technical Field

[0001] The present application relates to the field of information security technology, and in particular to a boot program processing method, device, equipment, storage medium and program product. Background Art

[0002] The boot program is the initial link of system startup, and the credibility of the boot program is directly related to the credibility of the entire system. In the process of implementing the present invention, the inventor found that the prior art has at least the following problems: during the process of burning the firmware compiled by the boot program to the circuit board, the firmware compiled by the boot program is easily stolen, which leads to information leakage. Summary of the invention

[0003] The present application provides a boot program processing method, device, equipment, storage medium and program product, which are used to solve the problem that the firmware compiled by the boot program is easily stolen during the process of burning the firmware compiled by the boot program to the circuit board, resulting in poor information security.

[0004] According to a first aspect of an embodiment of the present application, a boot program processing method is provided, including:

[0005] Compile the boot program to generate firmware, and randomly allocate a first address and a second address in the firmware during the compilation process, wherein the first address is used to store key information and the second address is used to store verification information;

[0006] Generate key information of the firmware, and overwrite the key information of the firmware to the first address to generate firmware after the key is overwritten;

[0007] Generate verification information based on the firmware after the key is overwritten, and overwrite the verification information to the second address to generate the firmware after the verification is overwritten;

[0008] The firmware after overwriting verification is burned into the target circuit board.

[0009] Optionally, the verification information includes first verification information and second verification information; the first verification information refers to the verification information corresponding to the firmware after the key is overwritten, and the second verification information is a default value when the firmware after the overwriting verification is not running in the target circuit board;

[0010] After burning the firmware after the overwrite verification to the target circuit board, the method further includes:

[0011] Running the overwritten verified firmware in the target circuit board, and after running, encrypting the identification of the target circuit board and storing it in a third address in the overwritten verified firmware to obtain the firmware bound with the identification;

[0012] The second verification information is generated based on the firmware after the binding identifier.

[0013] Optionally, the method further comprises:

[0014] When the target circuit board is started, reading the second verification information from the second address;

[0015] When the second verification information is a default value, verifying the target firmware based on the first verification information;

[0016] When the second verification information is not a default value, the target firmware is verified based on the second verification information; when it is determined that the target firmware is correct based on the second verification information, the information in the third address is decrypted to obtain a circuit board identifier; when the circuit board identifier is consistent with the identifier of the target circuit board, the target firmware is controlled to run in the target circuit board.

[0017] Optionally, burning the firmware after overwriting verification to a target circuit board includes:

[0018] Reading the identification of the target circuit board, encrypting the identification of the target circuit board and storing it in the third address in the firmware after overwriting verification, and obtaining the firmware bound with the identification;

[0019] Burn the firmware with the binding mark to the target circuit board.

[0020] Optionally, the method further comprises:

[0021] Acquire a converted feature value, wherein the converted feature value is generated by splitting the third address into multiple parts and dynamically combining the multiple parts;

[0022] The third address is obtained based on the converted feature value.

[0023] Optionally, the method further comprises:

[0024] After receiving the demotion instruction, running the demotion program;

[0025] Through the de-escalation program, the target firmware in the target circuit board is read and encrypted and then stored in an external storage device;

[0026] Executing read protection degradation of the main control chip in the target circuit board;

[0027] Decrypting the firmware in the external storage device and writing it into the target circuit board;

[0028] Restart the main control chip in the target circuit board to enable read protection.

[0029] Optionally, before running the demotion program, the method further includes:

[0030] Obtaining downgrade verification information in the downgrade instruction;

[0031] It is determined that the downgrade verification information is verified successfully.

[0032] According to a second aspect of an embodiment of the present application, a boot program processing device is provided, including:

[0033] A compiling unit, used to compile a boot program to generate firmware, and randomly allocate a first address and a second address in the firmware during the compiling process, wherein the first address is used to store key information, and the second address is used to store verification information;

[0034] A first generating unit, configured to generate key information of the firmware, and overwrite the key information of the firmware to the first address to generate firmware after the key is overwritten;

[0035] A second generating unit is used to generate verification information based on the firmware after the key is overwritten, and overwrite the verification information to the second address to generate the firmware after the verification is overwritten;

[0036] The burning unit is used to burn the firmware after the overwrite verification to the target circuit board.

[0037] According to a third aspect of an embodiment of the present application, there is provided an electronic device, including a memory and a processor;

[0038] The memory is connected to the processor and is used to store programs;

[0039] The processor is used to implement the boot program processing method as described in the first aspect by running the program in the memory.

[0040] According to a fourth aspect of an embodiment of the present application, a storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the boot program processing method as described in the first aspect is implemented.

[0041] According to a fifth aspect of an embodiment of the present application, a computer program product is provided, comprising computer program instructions, which, when executed by a processor, enable the processor to execute the boot program processing method as described in the first aspect.

[0042] In the present application, the boot program is compiled, the firmware is generated, and the first address and the second address are randomly allocated in the firmware during the compilation process, wherein the first address is used to store the key information, the second address is used to store the verification information, the key information of the firmware is generated, and the key information of the firmware is overwritten to the first address, the firmware after the key is overwritten is generated, based on the firmware after the key is overwritten, the verification information is generated, and the verification information is overwritten to the second address, the firmware after the verification is overwritten is generated, and the firmware after the verification is overwritten is burned to the target circuit board. By randomly allocating the first address and the second address in the firmware during the compilation process, wherein the first address is used to store the key information, and the second address is used to store the verification information, since the first address and the second address are randomly allocated during the compilation process, the key information and the verification information are not easy to be found and tampered, reducing the risk of the key information and the verification information being tampered with, and improving the security of the firmware compiled by the boot program. Moreover, the key information is not pre-packaged in the firmware, but the key information of the firmware is generated, and the key information of the firmware is overwritten to the first address, and the firmware after the key is overwritten is generated, which greatly reduces the risk of key information leakage and further improves the security of the firmware compiled by the boot program. The problem that the firmware compiled by the boot program is easily stolen during the process of burning the firmware into the circuit board, resulting in poor information security, is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0044] Figure 1 A flowchart of a boot program processing method provided in an embodiment of the present application;

[0045] Figure 2 A schematic diagram of the structure of verification information provided in an embodiment of the present application;

[0046] Figure 3 A flowchart of a boot program processing method provided in an embodiment of the present application;

[0047] Figure 4 A flowchart of a boot program processing method provided in an embodiment of the present application;

[0048] Figure 5 A schematic diagram of a process of step 104 provided in an embodiment of the present application;

[0049] Figure 6A flowchart of a boot program processing method provided in an embodiment of the present application;

[0050] Figure 7 A flowchart of a boot program processing method provided in an embodiment of the present application;

[0051] Figure 8 A schematic diagram of the structure of a boot program processing device provided in an embodiment of the present application;

[0052] Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0054] Exemplary Implementation Environment

[0055] According to the boot program processing method of the embodiment of the present application, it can be executed by an electronic device such as a terminal device or a server. The terminal device can be a user equipment (User Equipment, UE), a mobile device, a user terminal, a terminal, a cellular phone, a cordless phone, a personal digital assistant (Personal Digital Assistant, PDA), a handheld device, a computing device, a vehicle-mounted device, a wearable device, etc. The server can be an independent physical server, a server cluster composed of multiple physical servers, or a cloud server capable of cloud computing. The method can be implemented by a processor calling a computer-readable program instruction stored in a memory. In this application, the boot program processing method is explained by an example of being executed by a server, but it is not limited to this.

[0056] Exemplary Methods

[0057] See also Figure 1 In an exemplary embodiment, a boot program processing method is provided. Figure 1 As shown, the process of the boot program processing method mainly includes:

[0058] Step 101, compile the boot program to generate firmware, and randomly allocate the first address and the second address in the firmware during the compiling process.

[0059] The first address is used to store key information, and the second address is used to store verification information.

[0060] In an exemplary embodiment, compilation is the process of converting source code into code that can be directly executed by a computer.

[0061] In an exemplary embodiment, a boot loader refers to a program for booting an operating system.

[0062] In an exemplary embodiment, the bootloader is also referred to as a root of trust.

[0063] In the exemplary embodiment, firmware refers to the device "driver" stored inside the device. Through the firmware, the operating system can implement the operation of a specific machine according to the standard device driver. Firmware is the software that performs the most basic and lowest-level work of a system.

[0064] In an exemplary embodiment, step 101 can be that the server partially adjusts the software submitted by the developer to obtain a boot program, performs a full compilation process on the boot program, generates firmware, randomly allocates the first address and the second address in the firmware during the compilation process, and obtains compilation output information after compilation. The compilation output information includes the first address and the second address, the first address refers to the address of the variable corresponding to the key information in the firmware, and the second address refers to the address of the variable corresponding to the verification information in the firmware, and the firmware, the first address and the second address are stored in the server.

[0065] In an exemplary embodiment, the first address and the second address may be encrypted and stored in the server.

[0066] Verification information is the core of the entire trust. At present, the location of verification information is usually special or fixed, which is easy to find and tamper with. In this application, through the uncertainty of compilation, the first address and the second address are randomly assigned during the compilation process, so the key information and verification information are not easy to be found and tampered with, reducing the risk of tampering with the key information and verification information, and improving the security of the firmware compiled by the boot program.

[0067] Step 102, generate key information of the firmware, and overwrite the key information of the firmware to the first address to generate firmware after the key is overwritten.

[0068] In an exemplary embodiment, the key information of the firmware is generated by compiling a boot program to generate the firmware, and then the server dynamically generates the key information of the firmware based on the firmware.

[0069] In an exemplary embodiment, the server dynamically generates the key information of the firmware based on the firmware, and the server may randomly generate the key information of the firmware when downloading the firmware.

[0070] At present, firmware is generally pre-packaged, so once the firmware is leaked, there is a risk of key leakage. In this application, the key is not generated during the compilation process, but after the compilation is completed, the server generates the key when the server uses the firmware for the first time, and then distributes the key when the firmware is burned. The key information is not pre-packaged in the firmware, but the key information of the firmware is generated, and the key information of the firmware is overwritten to the first address to generate the firmware after the key is overwritten, which greatly reduces the risk of key information leakage and further improves the security of the firmware compiled by the boot program.

[0071] In an exemplary embodiment, after the key information of the firmware is generated, the key information may be stored in a database, and the user has no authority to view it.

[0072] In an exemplary embodiment, after compiling the boot program and generating the firmware, the firmware can be downloaded to the local cache. The key information of the firmware is overwritten to the first address to generate the firmware after the key is overwritten. The server can package the key information of the firmware and overwrite it to the first address of the firmware in the local cache to generate the firmware after the key is overwritten.

[0073] Step 103, based on the firmware after overwriting the key, generate verification information, and overwrite the verification information to the second address to generate the firmware after overwriting the verification.

[0074] Step 104, burning the firmware after overwriting verification to the target circuit board.

[0075] In some embodiments, Figure 2 The figure shows a schematic diagram of the structure of the verification information. Figure 2 In the example, the verification information includes first verification information (i.e., verification information 1) and second verification information (i.e., verification information 2). The first verification information refers to the verification information corresponding to the firmware after the key is overwritten, and the second verification information is the default value when the firmware after the overwriting verification is not running in the target circuit board.

[0076] In an exemplary embodiment, the first verification information refers to a CRC (Cyclic Redundancy Check) corresponding to the firmware after the key is overwritten.

[0077] In an exemplary embodiment, the default value may be all 0xFF.

[0078] In some embodiments, Figure 3 As shown, after step 104, the boot program processing method further includes:

[0079] Step 301, running the overwritten verified firmware in the target circuit board, after running, encrypting the identification of the target circuit board and storing it in the third address in the overwritten verified firmware, to obtain the firmware bound with the identification.

[0080] In an exemplary embodiment, the identifier of the target circuit board is used to uniquely identify the target circuit board. For example, the identifier of the target circuit board may be a UID (User Identification) of the target circuit board, and the UID is a unique code of a main control chip of the target circuit board.

[0081] In an exemplary embodiment, the third address may be a signature area.

[0082] Step 302: Generate second verification information based on the firmware after binding the identifier.

[0083] In an exemplary embodiment, the second verification information is verification information corresponding to the firmware after the overwriting verification has been run in the target circuit board at least once.

[0084] In an exemplary embodiment, after the overwritten verified firmware has been run in the target circuit board at least once, the second verification information is a CRC corresponding to the firmware after the binding mark.

[0085] In an exemplary embodiment, encrypting the identification of the target circuit board may be generating a digital signature according to the identification of the target circuit board. Encrypting the identification of the target circuit board may use an asymmetric encryption technology based on the UID.

[0086] The second verification information is the default value when the firmware after the overwrite verification is not running in the target circuit board. After the firmware after the overwrite verification has been run in the target circuit board at least once, it is the verification information corresponding to the firmware after the binding identifier. The second verification information can be used to determine whether the firmware after the overwrite verification is running in the target circuit board for the first time. If it is the first time that the firmware after the overwrite verification is running in the target circuit board, the second verification information is the default value. If it is not the first time that the firmware after the overwrite verification is running in the target circuit board, the second verification information is not the default value.

[0087] The first verification information refers to the verification information corresponding to the firmware after overwriting the key, and the second verification information is the default value when the firmware after overwriting the verification is not running in the target circuit board. After the firmware after overwriting the verification has been run in the target circuit board at least once, it is the verification information corresponding to the firmware after the binding mark. The firmware data of the two stages are verified respectively by two verification information. The first verification information is the verification information generated by the firmware data that has not yet bound the mark of the target circuit board, and the second verification information is the verification information generated by the firmware data that has bound the mark of the target circuit board. The integrity of the firmware of the two stages is guaranteed by the two verification information to prevent tampering to the maximum extent. Moreover, through the two verification information, the offline and online modes can be compatible. Offline means that the server does not need to participate in the process of firmware binding the mark and verification of the target circuit board, and the firmware can be directly executed through the target circuit board. The process of firmware binding the mark and verification of the target circuit board can be executed directly through the target circuit board. Online means that the firmware is executed through the server. Through the two verification information, the offline mode can be supported, and the burning process is simple.

[0088] After running, the identification of the target circuit board is encrypted and stored in the third address of the firmware after overwriting verification, and the firmware after the binding identification is obtained, and a strong binding is established with the hardware, ensuring the mandatory and exclusive binding of the boot program and the main control chip.

[0089] In some embodiments, Figure 4 As shown, the boot program processing method also includes:

[0090] Step 401, when the target circuit board is started, second verification information is read from a second address.

[0091] In an exemplary embodiment, step 401 includes: when the target circuit board is started, reading second verification information from a second address of the target firmware in the target circuit board.

[0092] Step 402, determine whether the second verification information is a default value, if so, execute step 403, otherwise, execute step 404.

[0093] Step 403: verify the target firmware based on the first verification information.

[0094] In an exemplary embodiment, verifying the target firmware based on the first verification information may be determining whether the target firmware is correct, consistent, or tampered with based on the first verification information.

[0095] Step 404: verify the target firmware based on the second verification information.

[0096] Step 405: When it is determined that the target firmware is correct based on the second verification information, the information in the third address is decrypted to obtain a circuit board identification.

[0097] In an exemplary embodiment, the third address may be a signature area.

[0098] Step 406: When the circuit board identifier is consistent with the identifier of the target circuit board, control the target firmware to run in the target circuit board.

[0099] When the second verification information is the default value, it indicates that the target firmware is running in the target circuit board for the first time, and the target firmware is verified based on the first verification information; when the second verification information is not the default value, it indicates that the target firmware is not running in the target circuit board for the first time. When the target firmware is determined to be correct based on the second verification information, a binding check of the operating environment is performed, the information in the third address is decrypted, the circuit board identification is obtained, and the circuit board identification is compared with the local target circuit board identification. When the circuit board identification is consistent with the target circuit board identification, the target firmware is controlled to run in the target circuit board. When the circuit board identification is inconsistent with the target circuit board identification, the target firmware is controlled to stop running in the target circuit board.

[0100] The firmware data of the two stages are verified respectively through two verification information. The first verification information is the verification information generated by the firmware data that has not yet been bound to the identification of the target circuit board, and the second verification information is the verification information generated by the firmware data that has been bound to the identification of the target circuit board. The integrity of the firmware of the two stages is guaranteed by the two verification information to prevent tampering to the greatest extent.

[0101] In some embodiments, step 104 includes: directly burning the overwritten and verified firmware to the target circuit board.

[0102] In other embodiments, Figure 5 As shown, step 104 includes:

[0103] Step 501, read the identification of the target circuit board, encrypt the identification of the target circuit board and store it in the third address of the firmware after overwriting verification, and obtain the firmware bound with the identification.

[0104] Step 502, burning the firmware with the binding mark to the target circuit board.

[0105] The identification of the target circuit board is actively read by the server, and the identification of the target circuit board is encrypted and stored in the third address in the firmware after overwriting verification, so as to obtain the firmware after the binding identification, thereby avoiding the leakage of the binding logic, making the authorization more controllable, and realizing the online solution. Moreover, there is no need to determine whether it is the first time to run through the server, and two verification information are not needed, and only one verification information can be used.

[0106] In some embodiments, Figure 6As shown, the boot program processing method also includes:

[0107] Step 601, obtaining a converted feature value, wherein the converted feature value is generated by splitting the third address into multiple parts and dynamically combining the multiple parts.

[0108] Step 602: Obtain a third address based on the converted feature value.

[0109] The third address is a characteristic value. The third address is split into multiple parts, and the multiple parts are dynamically combined to generate the converted characteristic value. The third address involved in this solution is converted by arithmetic operation. The user can only read the converted characteristic value, but cannot read the third address. It is impossible to locate the corresponding code position through the third address, and it is even more impossible to read the information encrypted by the circuit board identification through the third address. This ensures that even if the firmware is read out through bypass monitoring or forced disassembly of the main control chip, the verification logic cannot be cracked, which maximizes the difficulty of disassembly analysis. When the third address is needed, the third address is obtained by performing an inverse operation on the converted characteristic value, and then the encrypted information of the circuit board identification is read from the third address for verification.

[0110] In some embodiments, Figure 7 As shown, the boot program processing method also includes:

[0111] Step 701, after receiving the demotion instruction, run the demotion program.

[0112] In an exemplary embodiment, step 701 may be to decrypt, load and run an external downgrade program after receiving the downgrade instruction.

[0113] In some embodiments, before running the downgrade program in step 701, the boot program processing method further includes: obtaining downgrade verification information in the downgrade instruction; and determining whether the downgrade verification information is verified.

[0114] In an exemplary embodiment, the downgrade instruction may be a downgrade request sequence code, and the downgrade request sequence code includes the downgrade verification information.

[0115] In an exemplary embodiment, the fallback verification message may include a digital certificate or a digital signature.

[0116] Downgrade verification information is used to authorize downgrade and ensure the security of downgrade.

[0117] Step 702, through the de-escalation procedure, the target firmware in the target circuit board is read and encrypted and then stored in an external storage device.

[0118] In an exemplary embodiment, step 702 may be to read and encrypt the target firmware in the target circuit board with a fixed block size through a de-escalation procedure, and then store it in an external storage device.

[0119] Step 703, executing read protection downgrade of the main control chip in the target circuit board.

[0120] In an exemplary embodiment, step 703 may be to perform read out protection (RDP) downgrade of a main control chip (Micro Control Unit, MCU) in the target circuit board through a downgrade program after the target firmware in the target circuit board is read through the downgrade program.

[0121] Step 704: decrypt the firmware in the external storage device and write it into the target circuit board.

[0122] In an exemplary embodiment, step 704 may be to decrypt the firmware in the external storage device and write it into the boot program code area in the target circuit board after the read protection downgrade is successful.

[0123] In an exemplary embodiment, the boot program code area in the target circuit board may be a boot program code area in a ROM (Read-Only Memory) in the target circuit board.

[0124] In an exemplary embodiment, after step 704, the firmware in the external storage device may be deleted or may not be deleted.

[0125] Step 705: restart the main control chip in the target circuit board to enable read protection.

[0126] After receiving the demotion instruction, the read protection demotion of the main control chip in the target circuit board is executed, the main control chip no longer turns on the read protection, and the read protection is turned on by restarting the main control chip in the target circuit board.

[0127] At present, most read protection does not support smooth downgrade, and the firmware will be automatically erased after downgrade, which is not convenient for subsequent maintenance. In this application, a fixed downgrade program is used to unlock the read protection, so as to solve the problem of being unable to maintain the trusted root due to the unreadable protection of the boot program. The downgrade logic is implemented to ensure that the needs of subsequent maintenance are met while ensuring the security of the trusted root, which makes it convenient to check the problems in the target firmware in the target circuit board and maintain the target firmware in the target circuit board.

[0128] The read protection can be unlocked through a separate downgrade procedure, without relying on the server, and an offline solution can be implemented.

[0129] In some embodiments, after the server identity authentication is passed, the server sends a demotion instruction to the target circuit board, the server reads the target firmware in the target circuit board and encrypts it and stores it in an external storage device, executes the read protection demotion of the main control chip in the target circuit board, decrypts the firmware in the external storage device and writes it to the target circuit board through the server, and restarts the main control chip in the target circuit board to enable read protection. Implement an online solution.

[0130] In summary, in this application, the boot program is compiled, the firmware is generated, and the first address and the second address are randomly allocated in the firmware during the compilation process, wherein the first address is used to store the key information, the second address is used to store the verification information, the key information of the firmware is generated, and the key information of the firmware is overwritten to the first address, the firmware after the key is overwritten is generated, based on the firmware after the key is overwritten, the verification information is generated, and the verification information is overwritten to the second address, the firmware after the verification is overwritten is generated, and the firmware after the verification is overwritten is burned to the target circuit board. By randomly allocating the first address and the second address in the firmware during the compilation process, wherein the first address is used to store the key information and the second address is used to store the verification information, since the first address and the second address are randomly allocated during the compilation process, the key information and the verification information are not easy to be found and tampered, reducing the risk of tampering with the key information and the verification information, and improving the security of the firmware compiled by the boot program. Moreover, the key information is not pre-packaged in the firmware, but the key information of the firmware is generated, and the key information of the firmware is overwritten to the first address, and the firmware after the key is overwritten is generated, which greatly reduces the risk of key information leakage and further improves the security of the firmware compiled by the boot program. The problem that the firmware compiled by the boot program is easily stolen during the process of burning the firmware into the circuit board, resulting in poor information security, is solved.

[0131] Exemplary Devices

[0132] Accordingly, the present application also provides a boot program processing device, such as Figure 8 As shown, the boot program processing device includes:

[0133] A compiling unit 801 is used to compile a boot program to generate a firmware, and randomly allocate a first address and a second address in the firmware during the compiling process, wherein the first address is used to store key information, and the second address is used to store verification information;

[0134] A first generating unit 802 is used to generate key information of the firmware, and overwrite the key information of the firmware to the first address to generate firmware after the key is overwritten;

[0135] The second generating unit 803 is used to generate verification information based on the firmware after the key is overwritten, and overwrite the verification information to the second address to generate the firmware after the verification is overwritten;

[0136] The burning unit 804 is used to burn the firmware after the overwrite verification to the target circuit board.

[0137] The bootstrap processing device provided in this embodiment belongs to the same application concept as the bootstrap processing method provided in the above embodiments of this application, and can execute the bootstrap processing method provided in any of the above embodiments of this application, and has the corresponding functional modules and beneficial effects of executing the bootstrap processing method. For technical details not fully described in this embodiment, please refer to the specific processing content of the bootstrap processing method provided in the above embodiments of this application, and will not be repeated here.

[0138] The functions implemented by the above compiling unit 801, the first generating unit 802, the second generating unit 803 and the burning unit 804 may be implemented by the same or different processors respectively, which is not limited in the embodiment of the present application.

[0139] It should be understood that the units in the above devices can be implemented in the form of a processor calling software. For example, the device includes a processor, the processor is connected to a memory, and instructions are stored in the memory. The processor calls the instructions stored in the memory to implement any of the above methods or realize the functions of each unit of the device, wherein the processor can be a general-purpose processor, such as a CPU or a microprocessor, etc., and the memory can be a memory in the device or a memory outside the device. Alternatively, the units in the device can be implemented in the form of hardware circuits, and the functions of some or all units can be realized by designing the hardware circuits. The hardware circuit can be understood as one or more processors; for example, in one implementation, the hardware circuit is an ASIC, and the functions of some or all of the above units are realized by designing the logical relationship of the components in the circuit; for another example, in another implementation, the hardware circuit can be implemented by PLD, taking FPGA as an example, which can include a large number of logic gate circuits, and the connection relationship between the logic gate circuits is configured by the configuration file, so as to realize the functions of some or all of the above units. All units of the above devices can be implemented in the form of a processor calling software, or in the form of hardware circuits, or in part by a processor calling software, and the remaining part is implemented in the form of hardware circuits.

[0140] In an embodiment of the present application, a processor is a circuit with the ability to process signals. In one implementation, the processor may be a circuit with the ability to read and run instructions, such as a CPU, a microprocessor, a GPU, or a DSP; in another implementation, the processor may implement certain functions through the logical relationship of a hardware circuit, and the logical relationship of the hardware circuit is fixed or reconfigurable, such as a hardware circuit implemented by an ASIC or PLD, such as an FPGA. In a reconfigurable hardware circuit, the process of the processor loading a configuration document to implement the hardware circuit configuration can be understood as the process of the processor loading instructions to implement the functions of some or all of the above units. In addition, it can also be a hardware circuit designed for artificial intelligence, which can be understood as an ASIC, such as an NPU, TPU, DPU, etc.

[0141] It can be seen that each unit in the above device can be one or more processors (or processing circuits) configured to implement the above method, such as: CPU, GPU, NPU, TPU, DPU, microprocessor, DSP, ASIC, FPGA, or a combination of at least two of these processor forms.

[0142] In addition, all or part of the units in the above device can be integrated together, or can be implemented independently. In one implementation, these units are integrated together and implemented in the form of a SOC. The SOC may include at least one processor for implementing any of the above methods or implementing the functions of each unit of the device. The type of the at least one processor may be different, for example, including a CPU and an FPGA, a CPU and an artificial intelligence processor, a CPU and a GPU, etc.

[0143] Exemplary Electronic Devices

[0144] An embodiment of the present application provides an electronic device, see Fig. 9 As shown, the device includes:

[0145] Memory 200 and processor 210;

[0146] The memory 200 is connected to the processor 210 and is used to store programs;

[0147] The processor 210 is used to implement the boot program processing method disclosed in any of the above embodiments by running the program stored in the memory 200.

[0148] Specifically, the electronic device may further include: a bus, a communication interface 220 , an input device 230 and an output device 240 .

[0149] The processor 210, the memory 200, the communication interface 220, the input device 230 and the output device 240 are connected to each other via a bus.

[0150] A bus may include a pathway that transfers information between components of a computer system.

[0151] The processor 210 may be a general-purpose processor, such as a general-purpose central processing unit (CPU), a microprocessor, etc., or an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the scheme of the present invention. It may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0152] The processor 210 may include a main processor, and may also include a baseband chip, a modem, and the like.

[0153] The memory 200 stores a program for executing the technical solution of the present invention, and may also store an operating system and other key services. Specifically, the program may include a program code, and the program code includes a computer operation instruction. More specifically, the memory 200 may include a read-only memory (ROM), other types of static storage devices that can store static information and instructions, a random access memory (RAM), other types of dynamic storage devices that can store information and instructions, a disk storage, a flash, and the like.

[0154] The input device 230 may include a device for receiving data and information input by a user, such as a keyboard, a mouse, a camera, a scanner, a light pen, a voice input device, a touch screen, a pedometer, or a gravity sensor.

[0155] Output device 240 may include devices that allow information to be output to a user, such as a display screen, printer, speaker, etc.

[0156] The communication interface 220 may include any transceiver or the like to communicate with other devices or communication networks, such as Ethernet, Radio Access Network (RAN), Wireless Local Area Network (WLAN), etc.

[0157] The processor 210 executes the program stored in the memory 200 and calls other devices, which can be used to implement each step of any boot program processing method provided in the above embodiments of the present application.

[0158] Exemplary computer program products and storage media

[0159] In addition to the above-mentioned methods and devices, an embodiment of the present application may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the boot program processing method according to various embodiments of the present application described in any of the above embodiments of this specification.

[0160] The computer program product may be written in any combination of one or more programming languages ​​to write program codes for performing the operations of the embodiments of the present application, including object-oriented programming languages, such as Java, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as an independent software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0161] In addition, the embodiment of the present application may also be a storage medium on which a computer program is stored. The computer program is executed by a processor to execute the steps of the boot program processing method according to various embodiments of the present application described in any of the above embodiments of this specification, and specifically the following steps may be implemented:

[0162] Step 101, compile the boot program to generate firmware, and randomly allocate the first address and the second address in the firmware during the compiling process.

[0163] The first address is used to store key information, and the second address is used to store verification information.

[0164] Step 102, generate key information of the firmware, and overwrite the key information of the firmware to the first address to generate firmware after the key is overwritten.

[0165] Step 103, based on the firmware after overwriting the key, generate verification information, and overwrite the verification information to the second address to generate the firmware after overwriting the verification.

[0166] Step 104, burning the firmware after overwriting verification to the target circuit board.

[0167] For the aforementioned method embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the order of the actions described, because according to the present application, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0168] It should be noted that each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0169] The steps in the methods of each embodiment of the present application can be adjusted in order, combined and deleted according to actual needs, and the technical features recorded in each embodiment can be replaced or combined.

[0170] The modules and sub-modules in the devices and terminals in the various embodiments of the present application can be combined, divided and deleted according to actual needs.

[0171] In the several embodiments provided in the present application, it should be understood that the disclosed terminals, devices and methods can be implemented in other ways. For example, the terminal embodiments described above are only schematic, for example, the division of modules or submodules is only a logical function division, and there may be other division methods in actual implementation, for example, multiple submodules or modules can be combined or integrated into another module, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules, which can be electrical, mechanical or other forms.

[0172] The modules or submodules described as separate components may or may not be physically separated, and the components of the modules or submodules may or may not be physical modules or submodules, that is, they may be located in one place, or they may be distributed on multiple network modules or submodules. Some or all of the modules or submodules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0173] In addition, each functional module or submodule in each embodiment of the present application may be integrated into one processing module, or each module or submodule may exist physically separately, or two or more modules or submodules may be integrated into one module. The above-mentioned integrated modules or submodules may be implemented in the form of hardware or in the form of software functional modules or submodules.

[0174] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0175] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly by hardware, software units executed by a processor, or a combination of the two. The software units may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0176] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0177] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A boot program processing method, characterized in that: include: Compile the boot program to generate firmware, and randomly allocate a first address and a second address in the firmware during the compilation process, wherein the first address is used to store key information and the second address is used to store verification information; Generate key information of the firmware, and overwrite the key information of the firmware to the first address to generate firmware after the key is overwritten; Generate verification information based on the firmware after the key is overwritten, and overwrite the verification information to the second address to generate the firmware after the verification is overwritten; The firmware after overwriting verification is burned into the target circuit board.

2. The boot program processing method according to claim 1, characterized in that: The verification information includes first verification information and second verification information; the first verification information refers to the verification information corresponding to the firmware after the key is overwritten, and the second verification information is a default value when the firmware after the overwriting verification is not running in the target circuit board; After burning the firmware after the overwrite verification to the target circuit board, the method further includes: Running the overwritten verified firmware in the target circuit board, and after running, encrypting the identification of the target circuit board and storing it in a third address in the overwritten verified firmware to obtain the firmware bound with the identification; The second verification information is generated based on the firmware after the binding identifier.

3. The boot program processing method according to claim 2, characterized in that: The method further comprises: When the target circuit board is started, reading the second verification information from the second address; When the second verification information is a default value, verifying the target firmware based on the first verification information; When the second verification information is not a default value, the target firmware is verified based on the second verification information; when it is determined that the target firmware is correct based on the second verification information, the information in the third address is decrypted to obtain a circuit board identifier; when the circuit board identifier is consistent with the identifier of the target circuit board, the target firmware is controlled to run in the target circuit board.

4. The boot program processing method according to claim 1, characterized in that: The step of burning the firmware after the overwrite verification to the target circuit board comprises: Reading the identification of the target circuit board, encrypting the identification of the target circuit board and storing it in the third address in the firmware after overwriting verification, and obtaining the firmware bound with the identification; Burn the firmware with the binding mark to the target circuit board.

5. The boot program processing method according to any one of claims 2 to 4, characterized in that: The method further comprises: Acquire a converted feature value, wherein the converted feature value is generated by splitting the third address into multiple parts and dynamically combining the multiple parts; The third address is obtained based on the converted feature value.

6. The boot program processing method according to claim 1, characterized in that: The method further comprises: After receiving the demotion instruction, running the demotion program; Through the de-escalation program, the target firmware in the target circuit board is read and encrypted and then stored in an external storage device; Executing read protection degradation of the main control chip in the target circuit board; Decrypting the firmware in the external storage device and writing it into the target circuit board; Restart the main control chip in the target circuit board to enable read protection.

7. The boot program processing method according to claim 6, characterized in that: Before running the demotion program, the method further includes: Obtaining downgrade verification information in the downgrade instruction; It is determined that the downgrade verification information is verified successfully.

8. A boot program processing device, characterized in that: include: A compiling unit, used to compile a boot program to generate firmware, and randomly allocate a first address and a second address in the firmware during the compiling process, wherein the first address is used to store key information, and the second address is used to store verification information; A first generating unit, configured to generate key information of the firmware, and overwrite the key information of the firmware to the first address to generate firmware after the key is overwritten; A second generating unit is used to generate verification information based on the firmware after the key is overwritten, and overwrite the verification information to the second address to generate the firmware after the verification is overwritten; The burning unit is used to burn the firmware after the overwrite verification to the target circuit board.

9. An electronic device, characterized in that: including memory and processor; The memory is connected to the processor and is used to store programs; The processor is used to implement the boot program processing method according to any one of claims 1 to 7 by running the program in the memory.

10. A storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by the processor, the boot program processing method according to any one of claims 1 to 7 is implemented.

11. A computer program product, characterized in that The method comprises computer program instructions, which, when executed by a processor, enable the processor to execute the boot program processing method according to any one of claims 1 to 7.

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