Damascus structure and manufacturing method and application thereof

By adopting Damascus structure and its production method in semiconductor packaging technology, and using photosensitive materials and photolithography development technology, the lamination peeling and warping problems caused by traditional ABF materials are solved, and an embedded fine line layer with a thin line width spacing of less than 8/8 μm is achieved, which shortens the substrate production cycle, reduces costs, and improves line density and morphology optimization.

CN119517745APending Publication Date: 2025-02-25AKM MEADVILLE ELECTRONICS (XIAMEN) CO LTD
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Patent Information

Application Number
CN202411154061.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-21
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

The ABF materials used in the traditional improved semi-addition method (mSAP) process have low ductility and high expansion coefficient, resulting in lamination peeling and warping problems. The substrate process period is long and the cost is high, and the linear or pore forms formed are poor, which affects the precision of the buried circuit.

Method used

The Damascus structure and its production method are adopted, and the photosensitive material is used as the insulating material for the layered insulation material, and the hole groove is formed using photolithography development technology to realize the embedded fine circuit layer with a thin line width spacing of less than 8/8 μm, shorten the substrate production cycle, improve the line density, and reduce costs.

Benefits of technology

The embedded fine line layer with a thin line width spacing of less than 8/8μm is realized, which shortens the substrate production cycle, reduces costs, increases line density, and avoids the copper circuit side corrosion problem in traditional processes. The product line layer line type is better and the loss is lower.

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Abstract

The invention discloses a Damascus structure and a manufacturing method and application thereof. The manufacturing method comprises the following steps: forming a first layer of photosensitive material covering an inner layer circuit pattern; exposing, developing and post-curing the first layer of photosensitive material; forming a second layer of photosensitive material covering the first layer of photosensitive material; exposing, developing and post-curing the second layer of photosensitive material; forming a conductive material which fills the cavity and covers the top of the first layer of photosensitive material and the inner layer bonding pad; the conductive material is thinned, polished, and etched such that the top of the second layer of photosensitive material is coplanar with the top of the conductive material. The manufactured Damascus structure is not limited by the analysis and attachment capability of the anti-corrosion layer, and an embedded fine circuit layer with a fine line width interval within 8 / 8 microns can be realized; the manufacturing period of the substrate can be shortened, packaging with higher line density is achieved, cost is saved, the line type of a product line layer is better, and loss is lower.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a Damascus structure and a manufacturing method and application thereof. Background Art

[0002] With the continuous development and application of new technologies such as artificial intelligence, 5G technology, and the Internet of Things, the functions and application scenarios of products such as smartphones, tablets, and laptops will continue to expand. At the same time, 5G technology also requires compact substrate structure, short signal path, and almost no loss when processing high-frequency signals. However, the dielectric layer ABF material used in the traditional modified semi-additive process (mSAP) process has characteristics such as low ductility and high coefficient of thermal expansion (CTE). The typical mSAP process usually faces lamination peeling and warping problems during substrate manufacturing; and its substrate has a long process cycle, high cost, and the formed line or hole morphology is poor, which has a great adverse effect on the production of more precise buried circuits. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems in the above-mentioned technology to a certain extent. To this end, the purpose of the present invention is to propose a Damascus structure and its manufacturing method and application, which can realize an embedded fine circuit layer with a fine line width spacing within 8 / 8μm without being limited by the analytical adhesion ability of the anti-etching layer; it can shorten the substrate manufacturing cycle, realize higher circuit density packaging, save costs, and the product circuit layer has a better line shape and lower loss.

[0004] To achieve the above object, the first aspect of the present invention provides a method for manufacturing a Damascus structure, which comprises:

[0005] Forming a first layer of photosensitive material covering an inner circuit pattern; the inner circuit pattern is made on a double-sided carrier or a carrier that can be made on a single side, and the inner circuit pattern includes at least one inner pad;

[0006] Exposing, developing, and post-curing the first layer of photosensitive material to form at least one blind hole cavity penetrating the first layer of photosensitive material, wherein the blind hole cavity exposes the top of the pad;

[0007] forming a second layer of photosensitive material covering the first layer of photosensitive material;

[0008] Exposing, developing, and post-curing the second layer of photosensitive material to form a pad cavity and a circuit cavity penetrating the second layer of photosensitive material, wherein the pad cavity communicates with the blind hole cavity to expose the top of the inner pad, and the circuit cavity exposes the top of the first layer of photosensitive material;

[0009] Forming a conductive material that fills the blind hole cavity, the pad cavity and the circuit cavity and covers the top of the first layer of photosensitive material and the inner pad;

[0010] The conductive material is thinned, polished, and etched so that the top of the second layer of photosensitive material is coplanar with the top of the conductive material.

[0011] According to a method for manufacturing a Damascus structure of the present invention, the method uses a photosensitive material as an insulating material for an added layer, which can avoid the monopoly of ABF materials. Since the photosensitive material used has better physical properties, thermal stability, mechanical strength and structural stability, low loss can be achieved. The Damascus structure uses photolithography to form holes and grooves, which is more efficient and can obtain a good physical morphology. The limit aperture can reach 5μm to produce a circuit layer with a better line type. The manufacturing method of the Damascus structure does not require dry etching, wet copper etching and film stripping processes, and is not limited by the analytical adhesion ability of the anti-corrosion layer. The photosensitive material can be used to achieve an embedded fine circuit layer with a fine line width spacing of less than 8 / 8μm, and a multi-layer buried wire layer structure can be achieved. The manufacturing cycle is short, and the problem of copper circuit side etching in traditional processes can be avoided, so that the fine circuit manufacturing capacity is improved while achieving greater cost savings. In addition, the Damascus structure can be manufactured on one side or on both sides at one time, and the structure is more flexible and the production capacity is larger. Compared with semiconductors, it can be applied to PLP board-level packaging.

[0012] In addition, the method for manufacturing a Damascus structure according to the present invention may also have the following additional technical features:

[0013] Optionally, the exposure dose of the first layer of photosensitive material and the second layer of photosensitive material are both 100%. Since each exposure is 100% exposure dose, the line type or hole type formed in one time is better; and the required photolithography depth can be adjusted according to the thickness of the photosensitive material, and the photolithography can be in place in one time, and the required size can be obtained without adjusting the exposure dose; and there is no need to use a mask, and a single wavelength can be directly exposed each time. Even if the exposure graphic design is changed, there is no need to re-make the mask, which greatly saves the mask production cost.

[0014] Optionally, the first layer of photosensitive material is any one of photosensitive polyimide, photosensitive phenolic resin, photosensitive epoxy resin, photosensitive benzocyclobutene or photosensitive poly(p-phenylene benzobisoxazole); the second layer of photosensitive material is any one of photosensitive polyimide, photosensitive phenolic resin, photosensitive epoxy resin, photosensitive benzocyclobutene or photosensitive poly(p-phenylene benzobisoxazole), but is not limited thereto.

[0015] Furthermore, the photosensitive material includes a dry film state or a liquid state; the photosensitive material in the dry film state adopts a vacuum lamination process to form the first layer of photosensitive material and the second layer of photosensitive material; the liquid photosensitive material adopts a wet slit coating process to form the first layer of photosensitive material and the second layer of photosensitive material.

[0016] Optionally, the method of forming the conductive material includes:

[0017] forming a metal seed material layer on the surface of the second layer of photosensitive material and the surfaces of the blind hole cavity, the pad cavity, the circuit cavity and the inner pad;

[0018] A metal interconnect material layer is formed on the surface of the metal seed material layer, and the metal interconnect material layer fills the blind hole cavity, the pad cavity and the line cavity and covers the top of the first layer of photosensitive material and the top of the inner layer pad.

[0019] Furthermore, the metal seed material layer is formed by a physical vapor deposition process.

[0020] Furthermore, the metal seed material layer includes a titanium layer and a copper layer covering the titanium layer; and the method of thinning, polishing and etching the conductive material includes:

[0021] After thinning the metal interconnect material layer, polish the metal interconnect material layer and the metal seed material layer on top of the second photosensitive material layer to the titanium layer of the metal seed material layer, and then wet etch away the titanium layer.

[0022] To achieve the above object, the second aspect of the present invention provides a method for manufacturing a packaging substrate, which comprises:

[0023] Provide double-sided substrate or single-sided substrate;

[0024] Fabricating an inner layer circuit pattern on the double-sided carrier or the carrier that can be fabricated on one side, wherein the inner layer circuit pattern includes at least one inner layer pad;

[0025] The above-mentioned manufacturing method is used to manufacture a Damascus structure on the inner layer circuit pattern.

[0026] According to the method for manufacturing the packaging substrate of the present invention, the manufacturing method of the Damascus structure adopted is not limited by the analytical adhesion capability of the anti-corrosion layer, and can realize an embedded fine circuit layer with a fine line width spacing of less than 8 / 8μm; it can shorten the packaging substrate manufacturing cycle, realize higher circuit density packaging, save costs, and the product circuit layer has a better line shape and lower loss, and can be applied to the production of PLP board-level packaging substrates.

[0027] In addition, the method for manufacturing a packaging substrate according to the present invention may also have the following additional technical features:

[0028] Optionally, the double-sided carrier is a double-sided organic copper-clad carrier or an inorganic substrate; the carrier that can be manufactured on one side is a metal carrier or a ceramic carrier with a separation layer.

[0029] Furthermore, the method for making inner layer circuit patterns on the double-sided organic copper clad substrate includes:

[0030] Drilling holes in the double-sided organic copper-clad substrate to form interconnecting holes that penetrate the double-sided organic copper-clad substrate;

[0031] forming a conductive layer that fills the interconnection holes and covers the first surface and the second surface opposite to the double-sided organic copper-clad substrate;

[0032] The inner layer circuit pattern is manufactured on the conductive layer on the first surface and the conductive layer on the second surface.

[0033] To achieve the above-mentioned purpose, a third aspect of the present invention proposes a Damascus structure, which is manufactured by the above-mentioned Damascus structure manufacturing method.

[0034] To achieve the above object, a fourth aspect of the present invention provides a packaging substrate, which is manufactured by the above packaging substrate manufacturing method.

[0035] Optionally, the packaging substrate includes:

[0036] A double-sided organic copper-clad substrate, having a first surface and a second surface opposite to each other, the double-sided organic copper-clad substrate being provided with metal interconnection holes penetrating the first surface and the second surface; an inner layer circuit pattern being formed on both the first surface and the second surface, the metal interconnection holes being connected to the inner layer circuit pattern, the inner layer circuit pattern having conductive inner layer pads and inner layer circuits; and

[0037] Two Damascus structures are covered on two inner circuit patterns one by one, and each of the Damascus structures includes a first photosensitive polyimide layer, a second photosensitive polyimide layer, an outer pad and an outer circuit. The first photosensitive polyimide layer is covered on the inner circuit pattern, and the second photosensitive polyimide layer is covered on the first photosensitive polyimide layer. The outer circuit is arranged on the second photosensitive polyimide layer and is connected to the outer pad. The outer pad penetrates the first photosensitive polyimide layer from the second photosensitive polyimide layer downward and is connected to the inner pad of the inner circuit pattern. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1The process flow chart of the manufacturing method of the Damascus structure according to the embodiment of the present invention;

[0039] Figure 2 It is a structural schematic diagram of a cut double-sided copper-clad carrier board in an embodiment of the present invention;

[0040] Figure 3 It is a schematic diagram of the structure of the double-sided copper-clad carrier board after mechanical drilling and desmearing in an embodiment of the present invention;

[0041] Figure 4 It is a schematic diagram of the structure of a double-sided copper-clad carrier board after copper plating and electroplating in an embodiment of the present invention;

[0042] Figure 5 It is a schematic diagram of the structure of the double-sided copper-clad carrier board after dry film pre-treatment, film lamination, exposure and development in an embodiment of the present invention;

[0043] Figure 6 Schematic diagram of the structure of the double-sided copper-clad carrier after etching in an embodiment of the present invention;

[0044] Figure 7 It is a schematic structural diagram of a double-sided copper-clad substrate in an embodiment of the present invention after film removal to form an inner layer circuit pattern;

[0045] Figure 8 It is a schematic diagram of the structure after laminating the first photosensitive material layer on the inner circuit pattern in an embodiment of the present invention;

[0046] Fig. 9 It is a schematic diagram of the structure after the first photosensitive material layer is exposed and developed in an embodiment of the present invention;

[0047] Fig.10 It is a schematic diagram of the structure after laminating the second photosensitive material layer on the first photosensitive material layer in an embodiment of the present invention;

[0048] Fig.11 It is a schematic diagram of the structure after the second photosensitive material layer is exposed and developed in an embodiment of the present invention;

[0049] Fig.12 It is a schematic diagram of the structure after the conductive material is formed by electroplating in an embodiment of the present invention;

[0050] Fig.13 It is a schematic diagram of the structure of the packaging substrate produced after thinning and chemical mechanical polishing in an embodiment of the present invention;

[0051] Description of labels:

[0052] Double-sided organic copper-clad substrate 1, interconnection holes 101;

[0053] Conductive layer 2;

[0054] Inner layer circuit pattern 3;

[0055] Anti-corrosion layer 4;

[0056] A first layer of photosensitive material 5, a blind hole cavity 501;

[0057] The second layer of photosensitive material 6, pad cavity 601, circuit cavity 602;

[0058] Conductive material 7, metal interconnect layer 701;

[0059] Outer circuit pattern 8. DETAILED DESCRIPTION

[0060] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0061] In order to better understand the above technical solution, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0062] Please refer to Figures 1 to 13 . The embodiments described in the present application provide a technology that can help to make a packaging substrate for a Damascus structure and board-level packaging. The Damascus structure includes a first photosensitive polyimide layer, a second photosensitive polyimide layer, an outer pad, and an outer circuit. The first photosensitive polyimide layer covers the inner circuit pattern, the second photosensitive polyimide layer covers the first photosensitive polyimide layer, the outer circuit is arranged on the second photosensitive polyimide layer and is connected to the outer pad, and the outer pad passes through the first photosensitive polyimide layer from the second photosensitive polyimide layer downward and is connected to the inner pad of the inner circuit pattern.

[0063] Among them, the method of making at least one of the Damascus structures, please refer to Figure 1 , which is shown as a process flow chart of the manufacturing method, comprising the following steps:

[0064] S1: forming a first layer of photosensitive material covering an inner circuit pattern; the inner circuit pattern is made on a double-sided carrier or a carrier that can be made on a single side, and the inner circuit pattern includes at least one inner pad;

[0065] S2: exposing, developing, and post-curing the first layer of photosensitive material to form at least one blind hole cavity penetrating the first layer of photosensitive material, wherein the blind hole cavity exposes the top of the inner layer pad;

[0066] S3: forming a second layer of photosensitive material covering the first layer of photosensitive material;

[0067] S4: exposing, developing, and post-curing the second layer of photosensitive material to form a pad cavity and a circuit cavity penetrating the second layer of photosensitive material, wherein the pad cavity communicates with the blind hole cavity to expose the top of the inner pad, and the circuit cavity exposes the top of the first layer of photosensitive material;

[0068] S5: forming a conductive material that fills the blind hole cavity, the pad cavity and the line cavity and covers the top of the first layer of photosensitive material and the pad;

[0069] S6: Thinning, polishing and etching the conductive material so that the top of the second layer of photosensitive material is coplanar with the top of the conductive material.

[0070] This method uses a photosensitive material (e.g., photosensitive polyimide) when making a Damascus structure. In the Damascus structure, two layers of photosensitive polyimide are superimposed on each other (e.g., laminated), and the first photosensitive polyimide layer is located below the second photosensitive polyimide layer; each layer of photosensitive polyimide is exposed and developed separately to produce the required pattern. Afterwards, the outer pads and outer circuits of the outer circuit pattern are electroplated at the same time and the excess conductive material is removed by thinning, polishing and etching processes. One advantage of this method is that the outer pads and outer circuits of the Damascus structure can be formed simultaneously in one step, and the outer pads, grooves of the outer circuits and holes of the first layer of photosensitive material are made by exposing and developing each layer of the photosensitive polyimide layer once, and engraving them in place at one time. It is more efficient and can obtain good physical morphology. The limit aperture can reach 5μm to produce a circuit layer with better line type. Without the need for dry etching, wet copper etching and film stripping processes, and without being limited by the analytical adhesion capabilities of the anti-etching layer, the photosensitive material can be used to achieve a buried fine line layer with a fine line width spacing of less than 8 / 8μm. It can achieve a multi-layer buried line layer structure with a short production cycle and avoid the side etching problem of copper lines in traditional processes, achieving greater cost savings while improving the fine line production capabilities. In addition, the Damascus structure is flexible and can be produced on one side or on both sides at one time, with greater production capacity.

[0071] In this embodiment, the damascene structure is fabricated on a carrier board having an inner layer circuit pattern.

[0072] First, see Figure 2-Figure 7 The step of providing a carrier board having an inner layer circuit pattern comprises:

[0073] (1) Provide a double-sided carrier or a carrier that can be made on one side; specifically, prepare a double-sided carrier or a carrier that can be made on one side. The double-sided carrier is an organic copper-clad plate or an inorganic glass substrate. The single-sided carrier can be a carrier with a certain rigid support such as a glass or ceramic substrate, wherein the single-sided carrier can also be a temporary carrier such as a metal carrier or a glass substrate with a separation layer, such as a stainless steel carrier, an aluminum plate, a copper plate or an aluminum alloy plate, etc., depending on the product requirements, but not limited thereto. In this embodiment, a double-sided organic copper-clad carrier is used.

[0074] See also Figure 2 As an example, the thickness of the double-sided organic copper clad substrate 1 is 0.2 mm.

[0075] (2) Drilling holes in the double-sided organic copper-clad substrate 1 to form interconnection holes 101 that penetrate the double-sided organic copper-clad substrate 1. Specifically, for the double-sided organic copper-clad substrate 1, the upper and lower layers need to be connected after cutting, so mechanical drilling is required, such as Figure 3 , are drilling plate edge positioning holes and interconnection holes 101. The diameter of the interconnection hole 101 is determined according to product design and plate thickness. The diameter of the interconnection hole in this embodiment is 0.15 mm.

[0076] (3) Filling holes in the double-sided organic copper-clad substrate 1. Specifically, there are two types of hole filling processes for double-sided substrates. The thinner organic copper-clad substrates and glass substrates are: drilling → chemical desmear → copper plating → electroplating → baking → grinding. The double-sided organic copper-clad substrate 1 used in this embodiment has a relatively small thickness, so the electroplating hole filling method is adopted to form a conductive layer (2a, 2b) that fills the interconnection holes 101 and covers the first and second opposite surfaces of the double-sided organic copper-clad substrate 1. The conductive layer 2 is surface copper, and the surface copper is electroplated to 15-20μm, such as Figure 4 shown.

[0077] In other examples, the thicker organic core board (>0.3mm) is: drilling → chemical desmear → copper plating → electroplating → resin plugging → baking board → grinding board.

[0078] Among them, the processes of drilling, chemical desmear removal, copper plating, electroplating, resin plugging, plate baking, plate grinding, etc. adopt existing technologies and will not be described in detail here.

[0079] (4) An inner layer circuit pattern 3 is formed on the conductive layer 2a of the first surface and the conductive layer 2b of the second surface. Specifically, the inner layer circuit pattern is transferred by a subtractive method: pre-filming treatment → filming → exposure → development → etching → film removal. Among them, the pre-filming treatment is to remove oxidation and oil stains on the copper surface, clean and roughen the copper surface, so as to increase the adhesion of the anti-corrosion layer on the copper surface. The photoresist layer is also called a dry film, and the materials include acrylic acid, resin-type polymer adhesives, photoactive substances, and other solvents and additives, etc., which are not specifically limited in this application. Development generally uses a weak base series, such as Na 2 CO 3 or K 2 CO 3 Dissolve the unpolymerized dry film. After development, the pattern position where copper needs to be etched is exposed, and the other positions are protected by the anti-etching layer 4 left after development, such as Figure 5 As shown. After development, the exposed copper needs to be removed by acid etching. After etching, the resist layer 4 that originally protected the copper pattern position needs to be removed so that the inner circuit pattern 3 can be made. When removing the film, NaOH film removal solution is generally used to strip off the remaining resist layer 4, and the remaining copper forms the inner circuit pattern 3. The inner circuit pattern 3 includes multiple inner pads and inner circuits, and the inner pads and inner circuits are conductive.

[0080] See also Figure 7 Thus, a double-sided organic copper-clad carrier board 1 with an inner-layer circuit pattern 3 can be provided. The double-sided organic copper-clad carrier board 1 has a first surface and a second surface opposite to each other, and the double-sided organic copper-clad carrier board 1 is provided with a metal interconnection hole 2c penetrating the first surface and the second surface; an inner-layer circuit pattern 3 is formed on both the first surface and the second surface, and the metal interconnection hole 2c is connected to the inner-layer circuit pattern 3, and the inner-layer circuit pattern 3 has a conductive inner-layer pad and an inner-layer circuit.

[0081] Next, see Figure 8 , execute step S1 to form a first layer of photosensitive material 5 covering the inner layer circuit pattern 3.

[0082] Specifically, the photosensitive material is a photosensitive medium layer, including liquid and dry film types, and is classified according to the main components such as polyimide (PI), phenolic resin (Phenolic), epoxy resin (Epoxy), benzocyclobutene (BCB), poly (p-phenylene benzobisoxazole) (PBO), etc. If the photosensitive material is a photosensitive medium layer in a dry film state, a vacuum lamination method is used; if the photosensitive material is a liquid photosensitive medium layer photoresist, a wet slit coating method is used. This embodiment uses a dry film PI, and the structural schematic diagram after lamination is as follows Figure 8As shown. Lamination uses a vacuum lamination method, and the material is a photosensitive medium layer in a dry film state. The thickness can be selected according to different line width and spacing designs; while coating uses a wet slit coating method, and the material is a liquid photosensitive medium layer photoresist, which can be made thinner. Since the Damascus process often produces more delicate buried circuits, this embodiment uses an insulating layer with good thermal stability, mechanical strength, and structural stability, namely, photosensitive polyimide PI. The use of photosensitive materials can break the supply monopoly of ABF (Ajinomoto Build-up Film).

[0083] As an example, Figure 8 As shown, two first layers of photosensitive materials 5 are laminated one by one on the inner circuit patterns 3 on the first and second surfaces opposite to each other on the double-sided organic copper clad substrate 1 .

[0084] Afterwards, see Fig. 9 , execute step S2, expose, develop, and post-cure the first layer of photosensitive material 5 to produce at least one blind hole cavity 501 penetrating the first layer of photosensitive material 5, and the blind hole cavity 501 exposes the top of the inner layer pad.

[0085] Specifically, the first layer of photosensitive material 5 is used to make blind hole cavities 501, which are exposed and developed without laser drilling. After development, holes are formed directly, and the hole shape is good (such as stable aperture capacity and smooth hole wall). Compared with traditional laser hole forming technologies, the use of photolithography hole forming technology can form high-density miniaturized holes without subsequent dry etching / wet Desmear processing. It should be noted that this step is to vertically interconnect the outer layer circuit pattern with the inner layer circuit pattern.

[0086] As an example, the exposure in this step uses 100% exposure dose, so the line or hole type formed in one time is better; and the required lithography depth can be adjusted according to the thickness of the photosensitive material laminate, and the required pattern size can be obtained in one time without adjusting the exposure dose; in addition, there is no need to use a mask, and a single wavelength can be directly exposed each time. Even if the exposure graphic design is changed, there is no need to remake the mask, which further saves production costs.

[0087] The development generally uses an organic developer, such as tetramethylammonium hydroxide (2.38% TMAH) developer.

[0088] It should be noted that the first layer of photosensitive material 5 can be a negative photoresist or a positive photoresist. If it is a negative photoresist, the non-exposed area ( Fig. 9The non-porous area of ​​the first layer of photosensitive material 5 undergoes photochemical reaction and thermal curing and remains, that is, the non-porous area of ​​the first layer of photosensitive material 5 has undergone the photocuring and thermal curing process, so that it has been fixed. When the second layer of photosensitive material 6 is subsequently exposed and developed, the first layer of photosensitive material 5 is not affected. If it is a positive photoresist, the exposed area ( Fig. 9 The photosensitive material 5 of the first layer undergoes a photochemical or thermal curing reaction and is easily removed by the developer, that is, the pore area of ​​the first layer of photosensitive material 5 becomes easily soluble in the developer after the photocuring and thermal curing process, and the other parts become insoluble in the developer after thermal curing. When the second layer of photosensitive material 6 is exposed and developed again, the first layer of photosensitive material 5 is not affected. Specifically, post-curing is generally a thermal curing process. In this embodiment, the post-curing is performed at a temperature of 200° C. for 60 minutes, and the oxygen content is less than 100 ppm.

[0089] Optionally, the blind hole cavity manufactured in this embodiment has a hole diameter of 20 μm.

[0090] Next, see Fig.10 , perform step S3 to form a second layer of photosensitive material 6 covering the first layer of photosensitive material 5.

[0091] Specifically, the second layer of photosensitive material 6 is formed in the same manner as the first layer of photosensitive material 5, which can be vacuum lamination or wet coating, depending on the selected photosensitive material. In this embodiment, the second layer of photosensitive material 6 is also made of dry film PI, and the structure diagram after lamination is as shown in FIG. Fig.10 As shown. Lamination uses vacuum lamination, and the thickness can be selected according to different line width and spacing designs.

[0092] As an example, Fig.10 As shown, two second layers of photosensitive material 6 are laminated on the two first layers of photosensitive material 5 in a one-to-one correspondence.

[0093] Then, see Fig.11 , execute step S4, expose, develop, and post-cure the second layer of photosensitive material 6 to produce a pad cavity 601 and a line cavity 602 that penetrate the second layer of photosensitive material 6, the pad cavity 601 communicates with the blind hole cavity 501 to expose the top of the inner pad, and the line cavity 602 exposes the top of the first layer of photosensitive material 5.

[0094] Specifically, the exposure, development, and post-curing operations of the second layer of photosensitive material 6 are the same as those of the first layer of photosensitive material 5, and the exposure is also 100% of the exposure dose. After the first layer of photosensitive material 5 is post-cured as described above, the first layer of photosensitive material 5 is not affected during the exposure and development of the second layer of photosensitive material 6. The difference is that the pad cavity 601 and the circuit cavity 602 formed in this step are to realize the lateral interconnection between the outer pad of the outer circuit pattern and the outer circuit, and the pad cavity 601 is communicated with the blind hole cavity 501, which can enable the first layer of photosensitive material 5 to realize the longitudinal interconnection between the outer circuit pattern and the inner circuit pattern.

[0095] As an example, the lines of this embodiment are 5 / 5 μm and the pads are 30 μm.

[0096] Next, see Fig.12 , perform step S5 to form a conductive material that fills the blind hole cavity 501, the pad cavity 601 and the line cavity 602 and covers the top of the first layer of photosensitive material 5 and the inner pad.

[0097] As an example, the method for forming the conductive material 7 includes: forming a metal seed material layer on the surface of the second layer of photosensitive material 6 and the surfaces of the blind hole cavity 501, the pad cavity 601, the line cavity 602 and the inner pad; forming a metal interconnection material layer on the surface of the metal seed material layer, the metal interconnection material layer fills the blind hole cavity 501, the pad cavity 601 and the line cavity 602 and covers the top of the first layer of photosensitive material 5 and the top of the inner pad.

[0098] Specifically, the metal seed material layer can be realized by chemical copper deposition or physical vapor deposition. The latter can produce fine circuits less than 8 / 8μm, and the deposited copper layer has finer grains, which is more conducive to the subsequent flash etching process. This method is a dry method and will not cause environmental and chemical problems. It is green and environmentally friendly. Therefore, this embodiment adopts PVD to produce the metal seed material layer.

[0099] More specifically, the metal seed material layer is generally a 50-100nm titanium layer, which is relatively stable and has excellent bonding strength with various organic and inorganic substrates. After the titanium layer is formed, a 100-500nm copper layer is made on the titanium layer. The copper layer can adjust the electroplating impedance and make the copper on the surface of the carrier more uniform after electroplating.

[0100] After the metal seed material layer is manufactured, a metal interconnect material layer 701 is formed on the metal seed material layer.

[0101] It should be noted that in the process of forming the metal interconnect material layer 701, the double-sided substrate process adopts double-sided whole-board electroplating, and the single-sided substrate adopts single-sided electroplating. The structure after electroplating is as follows: Fig.12As shown. Among them, this fine line line generally requires high current density and low sulfur element (<9.6ppm) electroplating. Due to the different depths in the electroplated structure, if the electroplating is to be filled with copper, it needs to be thicker than the actual electroplated copper, for example Fig.12 In the embodiment, the surface of copper is higher than the top of the second layer of photosensitive material 6; thinning and polishing can be performed later.

[0102] Finally, see Fig.13 , perform step S6, thinning, polishing and etching the conductive material 7 so that the top of the second layer of photosensitive material 6 is coplanar with the top of the conductive material 7.

[0103] Specifically, in step S5, it is explained that the electroplating needs to make the copper of the metal interconnect material layer 701 thicker to ensure the integrity of the hole filling and pad filling, that is, in step S6, it is necessary to first mechanically grind or chemically thin the surface copper to 8-10μm, and then perform CMP. The CMP polishing can stop when the titanium layer in the metal seed material layer is reached, and then the surface nano-level titanium layer can be etched away with liquid medicine. Thinning first and then CMP is because the cost of CMP is higher than the thinning process, and CMP is suitable for polishing finer layers. CMP can obtain better uniformity, and the embedded line pattern can also be very good. At this point, a packaging substrate with a Damascus structure is completed.

[0104] Combination Fig.13 The package substrate comprises a double-sided organic copper-clad carrier 1, which has a first surface and a second surface opposite to each other, and the double-sided organic copper-clad carrier 1 is provided with metal interconnection holes penetrating the first surface and the second surface; an inner layer circuit pattern 3 is formed on both the first surface and the second surface, and the metal interconnection hole is connected to the inner layer circuit pattern 3, and the inner layer circuit pattern 3 has a conductive inner layer pad and an inner layer circuit; and two damascene structures are covered on the two inner layer circuit patterns 3 in a one-to-one correspondence, and each damascene structure comprises a first photosensitive polymer Imide layer (first photosensitive material 5), second photosensitive polyimide layer (second photosensitive material 6), outer pad and outer circuit (outer circuit pattern 8), the first photosensitive polyimide layer covers the inner circuit pattern 3, the second photosensitive polyimide layer covers the first photosensitive polyimide layer, the outer circuit is arranged on the second photosensitive polyimide layer and is connected to the outer pad, the outer pad passes through the first photosensitive polyimide layer from the second photosensitive polyimide layer downward, and is connected to the inner pad of the inner circuit pattern 3.

[0105] In summary, for the Damascus structure, this application saves a lot of processes, equipment and materials compared to the traditional substrate process by combining the PVD process (smaller grain size) and the photolithography development process of photosensitive materials. The processes include laser drilling, chemical copper deposition, dry film pattern transfer, film stripping and flash etching processes; equipment such as laser drilling equipment, chemical copper deposition lines and flash etching lines; materials such as copper deposition solutions and fine line anti-etching layers, which shorten the production cycle and save a lot of costs. Not only that, this application also improves the capacity of the line. This Damascus structure does not need to be limited by the analytical adhesion ability of the anti-etching layer, and can use photosensitive polyimide to achieve a buried fine line layer with a fine line width spacing of less than 8 / 8μm. In addition, this insulating layer has good thermal stability, mechanical strength, and structural stability, which can improve the reliability of the entire substrate structure.

[0106] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0107] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0108] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0109] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0110] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms should not be understood as necessarily being directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

[0111] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A method for making a Damascus structure, characterized in that: include: forming a first layer of photosensitive material covering the inner layer circuit pattern; The inner layer circuit pattern is made on a double-sided carrier or a carrier that can be made on a single side, and the inner layer circuit pattern includes at least one inner layer pad; Exposing, developing, and post-curing the first layer of photosensitive material to form at least one blind hole cavity penetrating the first layer of photosensitive material, wherein the blind hole cavity exposes the top of the inner layer pad; forming a second layer of photosensitive material covering the first layer of photosensitive material; Exposing, developing, and post-curing the second layer of photosensitive material to form a pad cavity and a circuit cavity penetrating the second layer of photosensitive material, wherein the pad cavity communicates with the blind hole cavity to expose the top of the inner pad, and the circuit cavity exposes the top of the first layer of photosensitive material; Forming a conductive material that fills the blind hole cavity, the pad cavity and the circuit cavity and covers the top of the first layer of photosensitive material and the inner pad; The conductive material is thinned, polished, and etched so that the top of the second layer of photosensitive material is coplanar with the top of the conductive material.

2. The method for making a Damascus structure according to claim 1, characterized in that: The exposure doses of the first layer of photosensitive material and the second layer of photosensitive material are both 100%.

3. The method for making a Damascus structure according to claim 1, characterized in that: The first layer of photosensitive material is any one of photosensitive polyimide, photosensitive phenolic resin, photosensitive epoxy resin, photosensitive benzocyclobutene or photosensitive poly(p-phenylene benzobisoxazole); the second layer of photosensitive material is any one of photosensitive polyimide, photosensitive phenolic resin, photosensitive epoxy resin, photosensitive benzocyclobutene or photosensitive poly(p-phenylene benzobisoxazole).

4. The method for making a Damascus structure according to claim 1, characterized in that: The photosensitive material includes a dry film state or a liquid state; the photosensitive material in the dry film state adopts a vacuum lamination process to form the first layer of photosensitive material and the second layer of photosensitive material; the liquid photosensitive material adopts a wet slit coating process to form the first layer of photosensitive material and the second layer of photosensitive material.

5. The method for manufacturing a Damascus structure according to claim 1, characterized in that: The method of forming the conductive material includes: forming a metal seed material layer on the surface of the second layer of photosensitive material and the surfaces of the blind hole cavity, the pad cavity, the circuit cavity and the inner pad; A metal interconnect material layer is formed on the surface of the metal seed material layer, and the metal interconnect material layer fills the blind hole cavity, the pad cavity and the line cavity and covers the top of the first layer of photosensitive material and the top of the inner layer pad.

6. The method for manufacturing a Damascus structure according to claim 5, characterized in that: The metal seed material layer is formed by a physical vapor deposition process.

7. The method for manufacturing a Damascus structure according to claim 5, characterized in that: The metal seed material layer includes a titanium layer and a copper layer covering the titanium layer; The method of thinning, polishing and etching the conductive material comprises: After thinning the metal interconnect material layer, polish the metal interconnect material layer and the metal seed material layer on top of the second photosensitive material layer to the titanium layer of the metal seed material layer, and then wet etch away the titanium layer.

8. A method for manufacturing a packaging substrate, characterized in that: include: Provide double-sided substrate or single-sided substrate; Fabricating an inner layer circuit pattern on the double-sided carrier or the carrier that can be fabricated on one side, wherein the inner layer circuit pattern includes at least one inner layer pad; A damascene structure is fabricated on the inner layer circuit pattern using the fabrication method described in any one of claims 1 to 7.

9. The method for manufacturing a packaging substrate according to claim 8, wherein: The double-sided carrier is a double-sided organic copper-clad carrier or an inorganic substrate; the carrier that can be made on one side is a metal carrier or a ceramic carrier with a separation layer.

10. The method for manufacturing a packaging substrate according to claim 9, wherein: The method for making inner layer circuit patterns on the double-sided organic copper clad substrate comprises: Drilling holes in the double-sided organic copper-clad substrate to form interconnecting holes that penetrate the double-sided organic copper-clad substrate; forming a conductive layer that fills the interconnection holes and covers the first surface and the second surface opposite to the double-sided organic copper-clad substrate; The inner layer circuit pattern is manufactured on the conductive layer on the first surface and the conductive layer on the second surface.

11. The method for manufacturing a packaging substrate according to claim 8, wherein: The inner layer circuit pattern is formed on the first surface and the second surface opposite to each other of the double-sided carrier; The damascene structure is fabricated on both the inner circuit pattern of the first surface and the inner circuit pattern of the second surface.

12. A Damascus structure, characterized in that: It is manufactured by the Damascus structure manufacturing method as described in any one of claims 1-7.

13. A packaging substrate, characterized in that: It is manufactured by the method for manufacturing a packaging substrate as described in any one of claims 8 to 11.

14. The packaging substrate according to claim 13, wherein: include: A double-sided organic copper-clad substrate, having a first surface and a second surface opposite to each other, the double-sided organic copper-clad substrate is provided with a metal interconnection hole penetrating the first surface and the second surface; an inner layer circuit pattern is formed on both the first surface and the second surface, the metal interconnection hole is connected to the inner layer circuit pattern, and the inner layer circuit pattern has a conductive inner layer pad and an inner layer circuit; as well as Two Damascus structures are covered on two inner circuit patterns one by one, and each of the Damascus structures includes a first photosensitive polyimide layer, a second photosensitive polyimide layer, an outer pad and an outer circuit. The first photosensitive polyimide layer is covered on the inner circuit pattern, and the second photosensitive polyimide layer is covered on the first photosensitive polyimide layer. The outer circuit is arranged on the second photosensitive polyimide layer and is connected to the outer pad. The outer pad penetrates the first photosensitive polyimide layer from the second photosensitive polyimide layer downward and is connected to the inner pad of the inner circuit pattern.