Method for etching polycrystalline silicon
By using a composition of choline hydroxide, an oxidant and a surfactant, the selectivity and safety of polysilicon film etching in the presence of silicon nitride and silicon oxide films are solved, and a high-efficiency and low-residue polysilicon etching effect is achieved.
Patent Information
- Application Number
- CN202380053968.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-06-16
- Filing Date
- 2023-06-16
- Publication Date
- 2025-03-04
AI Technical Summary
In the prior art, when removing polycrystalline silicon films, it is difficult to selectively etch, especially in the presence of silicon nitride and silicon oxide films, and commonly used etchants such as TMAH and KOH have problems with safety hazards and non-uniform etching rates.
The polycrystalline silicon film is chemically selectively etched by chemically selectively using a composition containing choline hydroxide, an oxidizing agent (such as periodic acid) and a surfactant to reduce the selectivity of silicon etching and reduce the roughness and residual silicon after etching.
High selective etching of the polycrystalline silicon film in the presence of silicon nitride and silicon oxide is achieved, reducing the roughness and residual silicon after the etching step, and avoiding the use of harmful TMAH and KOH.
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Figure CN119563000A_ABST
Abstract
Description
Technical Field
[0001] The present invention generally relates to compositions and methods for selectively etching polysilicon films in the presence of silicon nitride and silicon oxide films.
[0002] Related Documents
[0003] The present invention claims priority to U.S. Provisional Patent No. 63 / 352,917, filed on June 16, 2022. The priority document is incorporated herein by reference. Background Art
[0004] Processing semiconductor and microelectronic devices involves various steps of depositing layers of material and removing material through a chemical process called "etching". With etching, a thin mask layer is placed over the deposited material layer. Openings are then formed in the mask, and selected portions of the substrate are exposed. The masked substrate is then contacted with an etchant, which contacts the material of the underlying substrate through the openings in the mask and chemically degrades and removes the material of the substrate to form openings (three-dimensional spaces) in the substrate.
[0005] One such sacrificial material is polysilicon. Typical removal methods for polysilicon include dry etching and wet etching methods. In the case of anisotropic wet etching, bases such as tetramethylammonium hydroxide (TMAH) and alkali metal hydroxides have been used. However, it is undesirable to have any residual alkali metal ions at the surface of the final device product, and TMAH is not preferred because it is a neurotoxin. In addition, TMAH and KOH also exhibit higher etching rates for n-doped polysilicon than for p-doped polysilicon; this phenomenon is undesirable because the removal rate of all polysilicon species is critical for certain applications where a variety of polysilicon surfaces are present.
[0006]
[0006] Thus, there continues to be a need for etching compositions for removing polysilicon material from microelectronic device substrates, especially for selectively removing polysilicon in such device substrates that also contain silicon nitride and silicon oxide surfaces. Summary of the invention
[0007] In general, the present invention provides a composition suitable for etching polysilicon in the presence of silicon oxide and silicon nitride. The composition comprises choline hydroxide, an oxidant such as periodic acid, and an optional surfactant, and is generally suitable for etching polysilicon, and is particularly suitable for polysilicon trimming and polysilicon stripping operations. It is found that the selectivity of silicon etching based on silicon crystal orientation can be reduced by the added oxidant, which is found to reduce the roughness and residual silicon residues after the etching step, such as the presence of silicon (111) residues. In certain embodiments, the device substrate contains polysilicon, silicon nitride, and silicon oxide surfaces, and the etch selectivity of polysilicon relative to silicon nitride and silicon oxide is greater than about 1000:1.
[0008] In some applications, 1-10 microns of polysilicon are completely removed from the trench. For these applications, a high removal rate is required to complete the process in an acceptable time. Temperatures between 30°C and 90°C can be used to achieve greater than 100 microns per minute. The process time is between 15 and 360 minutes.
[0009] In other applications, it is necessary to partially remove polysilicon from a microelectronic device. In this case, as little as Removal rate per minute The range of 0.04 to 0.06 is required to facilitate control of the amount of etching removed. These lower rates can be achieved by processing at lower temperatures and by controlling the etching formulation composition.
[0010] The compositions of the present invention also serve to avoid the use of TMAH, which is known to be a neurotoxin, and the use of alkali metal hydroxides such as KOH, which can contaminate surfaces with mobile ions. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 is a graph of polysilicon etch rate versus process temperature for a composition consisting of 14.5 weight percent choline hydroxide in water.
[0012] Figure 2 is a graph of PETEOS etch rates for a composition consisting of 14.5 weight percent choline hydroxide in water.
[0013] Figure 3 Graph showing selectivity versus process temperature for substrates consisting of polysilicon and PETEOS surfaces.
[0014] Figure 4 For etching The time required for polysilicon to react with the concentration of choline hydroxide and Triton TM X-100 contour plot. It shows that at low Triton TM The shortest times were required for X-100 (polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether; CAS No. 9002-93-1) (Dow) and high choline hydroxide concentrations.
[0015] Figure 5 is the contour map of roughness (Ra), which is The polysilicon was then measured by ellipsometry as the ratio of periodic acid to choline hydroxide and the surfactant (Triton TM It shows that when there is a higher content of surfactant (Triton X-100) in the solution TMX-100) has a lower roughness of polysilicon.
[0016] Figure 6 is the contour map of roughness (Ra), which is The polysilicon was then measured by ellipsometry as the ratio of choline hydroxide and the surfactant (Triton TM The concentration of X-100 is a function of the concentration of choline hydroxide and Triton X-100. TM After etching with the solution of X-100 concentration, polysilicon has the lowest roughness.
[0017] Figure 7 a shows the desired device cross section of the process for complete polysilicon removal (polysilicon stripping). Figure 7 b shows the desired cross section of the process with partial polysilicon removal (polysilicon trimming). DETAILED DESCRIPTION
[0018] As used in this specification and the following claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. As used in this specification and the following claims, the term "or" is generally used in its sense including "and / or" unless the context clearly dictates otherwise.
[0019] The term "about" generally refers to a range of values that are considered equivalent to the recited value (eg, having the same function or result). In many cases, the term "about" may include numbers that are rounded to the nearest significant figure.
[0020] Numerical ranges expressed as endpoints include all numbers subsumed within that range (e.g., 1 to 5 includes 1, 1.5, 2, 2.75, 3, 3.80, 4, and 5). In a first aspect, the present invention provides a composition comprising:
[0021] a. Choline hydroxide;
[0022] b. Water;
[0023] c. an oxidizing agent; and optionally
[0024] d. Surfactant.
[0025] In certain embodiments, the oxidant is selected from oxidants such as iodates and periodic acid, permanganates, and persulfates. In one embodiment, the oxidant is present in an amount of no more than about 15 weight percent. In another embodiment, the oxidant is periodic acid and is present in an amount of about 0.1 to about 1 weight percent based on the total weight of the composition.
[0026] In one embodiment, the iodine-containing oxidant is selected from H5IO6, HIO4 or a mixture thereof.
[0027] In certain embodiments, the composition further comprises at least one surfactant. As used herein, the term "surfactant" refers to an organic compound that reduces the surface tension (or interfacial tension) between two liquids or between a liquid and a solid, typically an amphiphilic organic compound containing a hydrophobic group (e.g., a hydrocarbon (e.g., alkyl) "tail") and a hydrophilic group. When present, suitable surfactants for use in the compositions described herein include, but are not limited to, amphoteric salts, cationic surfactants, anionic surfactants, zwitterionic surfactants, nonionic surfactants, and combinations thereof. Exemplary surfactants include decylphosphonic acid, dodecylphosphonic acid (DDPA), dodecylbenzenesulfonic acid (DDBSA), other R 1 Benzenesulfonic acid or its salt (wherein R 1 Straight or branched C8-C 18The nonionic surfactants include, but are not limited to, polyoxyethylene lauryl ether, dodecenyl succinic acid monodiethanolamide, ethylenediaminetetra(ethoxylate-capped-propoxylate)tetraol, polyethylene glycol, polypropylene glycol, polyethylene glycol ether or polypropylene glycol ether, block copolymers based on ethylene oxide and propylene oxide, polyoxypropylene sucrose ether, tertiary octylphenoxypolyethoxyethanol, 10-ethoxy-9,9-dimethyldec-1-amine, polyoxyethylene (9) nonylphenyl ether, branched polyoxyethylene (40) nonylphenyl ether, branched dinonylbenzene Polyoxyethylene, nonylphenol alkoxylate, polyoxyethylene sorbitan hexaoleate, polyoxyethylene sorbitan tetraoleate, polyethylene glycol sorbitan monooleate, sorbitan monooleate, alcohol alkoxylate, alkyl-polyglucosides, ethyl perfluorobutyrate, 1,1,3,3,5,5-hexamethyl-1,5-bis[2-(5-norbornene-2-yl)ethyl]trisiloxane, monomeric octadecylsilane derivatives, siloxane-modified polysilazanes, silicone-polyether copolymers and ethoxylated fluorine surfactants. Cationic surfactants include, but are not limited to, cetyl trimethylammonium bromide (CTAB), heptadecanefluorooctane sulfonic acid, tetraethylammonium, octadecanoyl trimethylammonium chloride, 4-(4-diethylaminophenylazo)-1-(4-nitrobenzyl)pyridinium bromide, cetylpyridinium chloride monohydrate, benzalkonium chloride, benzethonium chloride, benzyl dimethyl dodecyl ammonium chloride, benzyl dimethyl hexadecyl ammonium chloride, hexadecyl trimethyl ammonium bromide, dimethyl dioctadecyl ammonium chloride, dodecyl trimethyl ammonium chloride, hexadecyl trimethyl ammonium chloride, p-toluene sulfonate, didodecyl dimethyl ammonium bromide, dihydrogenated tallow dimethyl ammonium chloride, tetraheptyl ammonium bromide, tetradecyl ammonium bromide, and oxyphenonium bromide. bromide), guanidine hydrochloride (C(NH2)3Cl) or trifluoromethanesulfonates such as tetrabutylammonium trifluoromethanesulfonate, dimethyldioctadecylammonium chloride, dimethyldihexadecylammonium bromide, di(hydrogenated tallow) dimethylammonium chloride and polyoxyethylene(16)tallow ethylmonium ethosulfate.Anionic surfactants contemplated include, but are not limited to, poly(acrylic acid sodium salt), ammonium polyacrylate, sodium polyethylene oxide lauryl ether, sodium dihexylsulfosuccinate, sodium dodecyl sulfate, dioctyl sulfosuccinate, 2-sulfosuccinate, 2,3-dimercapto-1-propanesulfonate, dicyclohexylsulfosuccinate sodium salt, sodium 7-ethyl-2-methyl-4-undecyl sulfate, phosphate ester fluorosurfactants, fluorosurfactants, and polyacrylates. Zwitterionic surfactants include, but are not limited to, acetylenic diols or modified acetylenic diols, ethylene oxide alkylamines, N,N-dimethyldodecylamine N-oxide, sodium cocoamine propionate, 3-(N,N-dimethyltetradecylammonio)propanesulfonate, and (3-(4-heptyl)phenyl-3-hydroxypropyl)dimethylammoniopropanesulfonate. In one embodiment, the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
[0028] The amount of surfactant in the etching composition can be an amount that will provide the desired overall properties in combination with the other materials of the etching composition. For example, the composition can contain an amount of surfactant that can range from about 0.001 to about 10 weight percent.
[0029] In certain embodiments, the composition further comprises one or more amines, particularly amines such as primary and secondary amines. Exemplary amines include diethylenetriamine (CAS No. 111-40-0), triethylenetetramine (CAS No. 112-24-3), tetramethylenepentamine (CAS No. 112-57-2), piperazine (CAS No. 110-85-0) and piperidine (CAS No. 110-89-4).
[0030] As used herein, the term "microelectronic device" (or "microelectronic device substrate" or simply "substrate") is used in a manner consistent with the generally understood meaning of such term in the electronics, microelectronics, and semiconductor manufacturing arts, e.g., to refer to any of a wide variety of different types of: semiconductor substrates; integrated circuits; solid-state memory devices; rigid memory disks; read, write, and read-write heads and their mechanical or electronic components; flat panel displays; phase change memory devices; solar panels and other products, including one or more solar cell devices; photovoltaics; and microelectromechanical systems (MEMS) fabricated for microelectronics, integrated circuits, energy harvesting, or computer chip applications. It should be understood that the term "microelectronic device" may refer to any in-process microelectronic device or microelectronic device substrate that contains or is prepared to contain functional electronic (current carrying) structures, functional semiconductor structures, and insulating structures for ultimate electronic use in a microelectronic device or microelectronic assembly.
[0031] As used herein, the term "silicon nitride" is given a meaning consistent with that term as used in the microelectronics and semiconductor manufacturing industries. Consistent with this, silicon nitride refers to materials including thin films made of amorphous silicon nitride, which have commercially low levels of other materials or impurities and may have some variation with respect to the nominal stoichiometry of Si3N4. Silicon nitride may be present as part of a microelectronic device substrate, as a functional component of the device, such as as a barrier layer or insulating layer, or may serve as a material that facilitates a multi-step manufacturing process for preparing a microelectronic device.
[0032] As used herein, the term "silicon oxide" is given a meaning consistent with that used in the microelectronics and semiconductor manufacturing industries. Consistent with this, silicon oxide refers to a material composed of silicon oxide SiO x The silicon oxide can be placed on the substrate by any method, such as deposition from TEOS or another source by chemical vapor deposition or by oxidation of silicon. The silicon oxide can advantageously contain commercially low levels of other materials or impurities. The silicon oxide can be present as part of a microelectronic device substrate, as a component of the microelectronic device, such as as an insulating layer.
[0033] As used herein, "polysilicon" or poly-Si or multi-Si should be understood by those skilled in the art as a polycrystalline form of silicon composed of multiple small silicon crystals. It is typically deposited using low pressure chemical vapor deposition (LPCVD) and is typically doped n-type polysilicon or p-type polysilicon. As is readily understood by those skilled in the art, the degree of doping can range from lightly doped (e.g., at 10 13 cm -3 Up to 10 18 cm -3 range) to heavily doped (e.g., greater than 10 18 cm -3 ). Examples of p-doped materials include polysilicon doped with dopant species from Group IIIA of the periodic table (e.g., boron, aluminum, gallium, and / or indium). The n-doped material may, for example, be polysilicon doped with dopant species from Group IV (silicon, germanium, or tin) or Group V (phosphorus, arsenic, antimony, or bismuth) of the periodic table.
[0034] Embodiments of certain etching compositions include compositions in the form of aqueous solutions comprising, consisting essentially of, or consisting of: choline hydroxide, an oxidizing agent in an amount effective to increase the etching rate of polysilicon relative to silicon nitride or silicon nitride; and an optional surfactant. These and other exemplary compositions may comprise, consist of, or consist essentially of the listed ingredients and optional ingredients. As a general convention throughout this specification, a composition of matter such as an etching composition or its ingredients or components as described, i.e., "consisting essentially of a set of specified ingredients or materials", refers to a composition containing a specified ingredient or material, which has no more than a lower or insignificant amount of other ingredients or materials, such as no more than 5, 2, 1, 0.5, 0.1 or 0.05 parts by weight of other ingredients or materials.
[0035] In certain embodiments, the compositions of the present invention do not require and may not include other types of ingredients that are not typically included in etching compositions, such as pH adjusters and solid materials such as abrasives.
[0036] The compositions of the present invention may be prepared by any method that would be suitable for producing an etching composition as described. By one method, the aqueous or solid ingredients may be combined, optionally with heat, and mixed to achieve homogeneity.
[0037] In a second aspect, the present invention provides a method of etching polysilicon on a microelectronic device having silicon nitride and polysilicon surfaces, the method comprising contacting the device with a composition comprising:
[0038] a. Choline hydroxide;
[0039] b. Water;
[0040] c. oxidizing agents; and
[0041] d. an optional surfactant;
[0042] The contact is made under conditions effective to etch the polysilicon.
[0043] In certain embodiments, the microelectronic device substrate will further contain an exposed silicon oxide surface.
[0044] As noted above, the compositions as described can be suitable for use in methods of removing polysilicon from the surface of a microelectronic device substrate. The substrate can contain other materials suitable for use in a microelectronic device, such as one or more of the following: an insulator, a barrier layer, a conductive material, a semiconductive material, or a material suitable for use in processing a microelectronic device (e.g., photoresists, masks, and others). Exemplary substrates have surfaces including silicon nitride, silicon oxide, and PETEOS (oxide deposited using plasma enhanced tetraethyl orthosilicate), as well as polysilicon.
[0045] When used, the compositions of the present invention can provide suitable etching performance based on commercial performance requirements and expectations, and can provide improved performance with respect to etch rate and selectivity of polysilicon relative to silicon dioxide and silicon nitride compared to comparative etching compositions.
[0046] This method can be performed on known and commercially available equipment. Generally, to etch a substrate to selectively remove material at the substrate surface, an etching composition can be applied to the surface and allowed to contact the surface structures to chemically selectively remove certain structures.
[0047] In the etching step, the composition can be applied to the surface in any suitable manner, such as by spraying the composition onto the surface; by immersing the substrate (in a static or dynamic volume of the composition) into the etching composition; by contacting the surface with another material (such as a pad or fibrous adsorbent applicator element) onto which the etching composition is absorbed; by contacting the substrate with a volume of the etching composition in a circulating bath; or by any other suitable means, means or technique whereby the etching composition is brought into removal contact with the surface of a microelectronic substrate containing silicon-germanium and silicon. Applications can be in batch or single wafer equipment for dynamic or static cleaning.
[0048] The conditions (e.g., time and temperature) of the applicable etching process may be any conditions found to be effective or advantageous. In general, the etching composition is contacted with the surface, for example, by being immersed in a bath of the etching composition for a period of time sufficient to selectively remove silicon nitride. The time of exposure to the etching composition and the temperature of the etching composition may be effective for removing the desired amount of silicon nitride from the substrate surface. The amount of time for the etching step should not be too short, because this means that the etching rate of polysilicon may be too high, which may lead to process control difficulties and reduce the quality of the microelectronic device at the end of the etching step. Of course, the required amount of time for the etching step is preferably not too long, so that the efficiency and delivery volume of the etching process and the semiconductor manufacturing line are good. Examples of the applicable time for the trimming operation may be in the range of about 1 minute to about 30 minutes, and for the stripping operation, about 30 minutes to about 360 minutes at the temperature range described herein. Such contact time and temperature are illustrative, and any other suitable time and temperature conditions effective for obtaining the desired removal selectivity may be adopted.
[0049] The etching steps of the present specification can be applied to etching polysilicon materials from the surface of any type of substrate. The exemplary etching process can exhibit significantly improved polysilicon etching rates and high selectivities of greater than about 150 and in some embodiments at least about 2000 or at least about 4000 relative to silicon oxide and silicon nitride.
[0050] After the desired amount of polysilicon selective etching is completed, the etching composition remaining on the surface of the etched microelectronic device can be removed from the surface by any desired and applicable method, such as by rinsing, washing or other removal steps. For example, after etching, the microelectronic device substrate can be rinsed with a deionized water rinse (e.g., at a temperature in the range of about 20° C. to about 90° C.), followed by drying, such as spin drying, N2, steam drying, etc. After rinsing, the substrate surface can be measured for the presence and amount of particles at the surface.
[0051] The compositions described herein can be easily prepared by simply adding the corresponding ingredients and mixing to a homogeneous state. In addition, the composition can be easily prepared as a single-package formulation or a multi-component formulation, preferably a multi-component formulation, which is mixed at the time of use or before. The individual components of the multi-component formulation can be mixed at the tool or in a mixing zone / region, such as an inline mixer or in a storage tank upstream of the tool. It is considered that the various components of the multi-component formulation can contain any combination of ingredients / ingredients, and when mixed together, the desired removal composition is formed. The concentration of the corresponding ingredients can be widely varied in specific multiples of the semi-aqueous composition, i.e., more diluted or more concentrated, and it should be understood that the semi-aqueous composition can be variously and alternatively comprised of any combination of ingredients consistent with the disclosure herein, consisting of it or consisting essentially of it. Therefore, in a third aspect, the present invention provides a kit, which includes two or more of choline hydroxide, an oxidant, an optional surfactant, and optionally an amine in two or more containers.
[0052] The container of the kit must be suitable for storing and shipping the semi-aqueous composition components, e.g. Containers (Entegris, Inc.). The one or more containers containing the components of the composition preferably include means for placing the components in the one or more containers in fluid communication for admixture and dispensing. For example, see Containers, gas pressure can be applied to the exterior of the liner in the one or more containers to cause at least a portion of the contents of the liner to be expelled and thereby enable fluid communication for blending and dispensing. Alternatively, gas pressure can be applied to the headspace of a conventional pressurizable container or pump that can be used to enable fluid communication. In addition, the system preferably includes a dispensing port for dispensing the blended composition to a process tool.
[0053] Substantially chemically inert, free of impurities, flexible and elastic polymer film materials, such as high density polyethylene, can be used to make the liner of the one or more containers. Typically, the liner material required for processing does not require a co-extrusion layer or barrier layer, and does not require any pigment, UV inhibitor or treatment agent, which may adversely affect the purity requirements of the components to be placed in the liner. A list of desirable liner materials includes films comprising virgin (additive-free) polyethylene, virgin polytetrafluoroethylene (PTFE), polypropylene, polyurethane, polyvinylidene chloride, polyvinyl chloride, polyacetal, polystyrene, polyacrylonitrile, polybutylene, etc. The preferred thickness of the liner material is in the range of about 5 mils (0.005 inches) to about 30 mils (0.030 inches), for example, a thickness of 20 mils (0.020 inches).
[0054] With respect to containers for use in kits, the disclosures of the following patents and patent applications are each incorporated herein by reference in their entirety: U.S. Patent No. 7,188,644, entitled “APPARATUS AND METHOD FOR MINIMIZING THE GENERATION OF PARTICLES IN ULTRAPURE LIQUIDS” and U.S. Patent No. 6,698,619, entitled “RETURNABLE AND REUSABLE, BAG-IN-DRUM FLUID STORAGE AND DISPENSING CONTAINER SYSTEM.”
[0055] Examples
[0056] Example 1. Reference Figures 1 to 3 The data presented in , used a 12.5 weight percent solution of choline hydroxide in water. The etch rates of polysilicon, silicon oxide, and silicon nitride were measured using spectroscopic ellipsometry on blanket films before and after exposure to the choline hydroxide solution.
[0057] This data shows that silicon oxide and silicon nitride selectivity is satisfactory at all temperatures (silicon nitride etch rate <0.1 A / min up to 80° C.). The polysilicon etch rate is adequate for applications requiring bulk polysilicon removal at T>25° C. For applications requiring small amounts of polysilicon removal, lower temperatures are preferred so that the amount of removal can be adequately controlled.
[0058] Example 2. Reference Figures 4 to 6 The data presented in this study were obtained by testing a mixture of choline hydroxide, periodic acid, and the surfactant Triton at ambient temperature. TM The composition of the invention of X-100 is used in polysilicon trimming applications. The polysilicon etch rate is measured over a series of time periods so that the interpolation In addition, the film is treated to remove The roughness (Ra) was measured by ellipsometry. The data showed that the most preferred results were 2-2.4 weight percent choline hydroxide, 0.04-0.05 weight percent Triton TM X-100 and 0.03-0.045 weight percent periodic acid.
[0059] aspect
[0060] In a first aspect, the present invention provides a composition comprising:
[0061] a. Choline hydroxide;
[0062] b. Water;
[0063] c. oxidizing agents; and
[0064] d. Optional surfactant.
[0065] In a second aspect, the present invention provides the composition of the first aspect, wherein the oxidant is selected from the group consisting of iodine-containing oxidants, permanganates and persulfates.
[0066] In a third aspect, the present invention provides the composition of the second aspect, wherein the iodine-containing oxidant is selected from H5IO6, HIO4 or a mixture thereof.
[0067] In a fourth aspect, the present invention provides the composition of any one of the first to third aspects, wherein the surfactant is present and is a nonionic surfactant.
[0068] In a fifth aspect, the present invention provides the composition of any one of the first to fourth aspects, wherein the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
[0069] In a sixth aspect, the present invention provides the composition of any one of the first to fifth aspects, wherein the oxidant is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
[0070] In a seventh aspect, the present invention provides the composition of any one of the first to sixth aspects, wherein the composition further comprises one or more amines.
[0071] In an eighth aspect, the present invention provides the composition of the seventh aspect, wherein the amine is selected from diethylenetriamine, triethylenetetramine, tetramethylenepentamine, piperazine and piperidine.
[0072] In a ninth aspect, the present invention provides the composition of any one of the first to sixth aspects, comprising about 2 to about 2.4 weight percent of choline hydroxide, about 0.04 to about 0.05 weight percent of polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and about 0.03 to about 0.045 weight percent of periodic acid, based on the total weight of the composition.
[0073] In a tenth aspect, the present invention provides a method of etching polysilicon on a microelectronic device having silicon nitride and polysilicon surfaces, the method comprising contacting the device with a composition comprising:
[0074] a. Choline hydroxide;
[0075] b. Water;
[0076] c. oxidizing agents; and
[0077] d. an optional surfactant;
[0078] The contact is made under conditions effective to etch the polysilicon.
[0079] In an eleventh aspect, the present invention provides the method of the tenth aspect, wherein the oxidant is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
[0080] In a twelfth aspect, the present invention provides the method of the tenth aspect, wherein the composition comprises about 2 to about 2.4 weight percent choline hydroxide, about 0.04 to about 0.05 weight percent polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and about 0.03 to about 0.045 weight percent periodic acid.
[0081] In a thirteenth aspect, the present invention provides the method of the tenth, eleventh or twelfth aspect, wherein the composition further comprises one or more amines.
[0082] In a fourteenth aspect, the invention provides the method of the thirteenth aspect, wherein the amine is selected from the group consisting of diethylenetriamine, triethylenetetramine, tetramethylenepentamine, piperazine, and piperidine.
[0083] In a fifteenth aspect, the present invention provides the method of any one of the tenth to thirteenth aspects, wherein the method is performed at a temperature of less than about 30°C.
[0084] In a sixteenth aspect, the present invention provides the method of any one of the tenth to thirteenth aspects, wherein the method is performed at a temperature of about greater than about 30°C to about 90°C.
[0085] In a seventeenth aspect, the present invention provides the method of any one of aspects ten to thirteen, wherein the microelectronic device further comprises a silicon oxide surface, and the etch selectivity of polysilicon relative to silicon nitride and silicon oxide is greater than about 1000:1.
[0086] In an eighteenth aspect, the present invention provides the method of any one of aspects ten to thirteen, wherein the polysilicon is doped with phosphorus.
[0087] In a nineteenth aspect, the present invention provides the method of any one of aspects ten to thirteen, wherein only a portion of the polysilicon is removed and the roughness (Ra) of the resulting polysilicon surface does not exceed about 1 nm as measured by atomic force microscopy (AFM).
[0088] In a twentieth aspect, the present invention provides a kit comprising one or more of choline hydroxide, water, an oxidizing agent, a surfactant, and an amine in two or more containers.
[0089] In a twenty-first aspect, the present invention provides the kit of the twentieth aspect, wherein the oxidizing agent is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
[0090] Thus, having described several illustrative embodiments of the invention, it will be readily apparent to those skilled in the art that other embodiments may be made and used within the scope of the appended claims. The numerous advantages of the invention encompassed by this document have been set forth in the foregoing description. However, it should be understood that the invention is in many respects merely illustrative. Of course, the scope of the invention is defined in the language in which the appended claims are expressed.
Claims
1. A composition comprising: a. Choline hydroxide; b. Water; c. oxidizing agents; and d. Optional surfactant.
2. The composition of claim 1, wherein the oxidizing agent is selected from the group consisting of iodine-containing oxidizing agents, permanganates and persulfates.
3. The composition of claim 2, wherein the iodine-containing oxidizing agent is selected from H5IO6, HIO4 or a mixture thereof.
4. The composition of claim 1, wherein the surfactant is present and is a nonionic surfactant.
5. The composition of claim 1, wherein the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
6. The composition of claim 1, wherein the oxidant is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
7. The composition of claim 1, wherein the composition further comprises one or more amines.
8. The composition of claim 7, wherein the amine is selected from the group consisting of diethylenetriamine, triethylenetetramine, tetramethylenepentamine, piperazine and piperidine.
9. The composition of claim 1, comprising from about 2 to about 2.4 weight percent choline hydroxide, from about 0.04 to about 0.05 weight percent polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and from about 0.03 to about 0.045 weight percent periodic acid, based on the total weight of the composition.
10. A method of etching polysilicon on a microelectronic device having silicon nitride and polysilicon surfaces, the method comprising contacting the device with a composition comprising: a. Choline hydroxide; b. Water; c. oxidizing agents; and d. an optional surfactant; The contact is made under conditions effective to etch the polysilicon.
11. The method according to claim 10, wherein the oxidant is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is present and is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
12. The method of claim 10, wherein the composition comprises about 2 to about 2.4 weight percent choline hydroxide, about 0.04 to about 0.05 weight percent polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether, and about 0.03 to about 0.045 weight percent periodic acid.
13. The method of claim 10, wherein the composition further comprises one or more amines selected from diethylenetriamine and triethylenetetramine.
14. The method of claim 10, wherein the method is performed at a temperature below about 30°C.
15. The method of claim 10, wherein the method is performed at a temperature of from about greater than about 30°C to about 90°C.
16. The method of claim 10, wherein the microelectronic device further comprises a silicon oxide surface, and the etch selectivity of polysilicon relative to silicon nitride and silicon oxide is greater than about 1000:
1. The method of claim 10 , wherein the polysilicon is doped with phosphorus.
18. The method of claim 10, wherein only a portion of the polysilicon is removed and the resulting polysilicon surface has a roughness (Ra) of no greater than about 1 nm as measured by atomic force microscopy (AFM).
19. A kit comprising one or more of choline hydroxide, water, an oxidizing agent, a surfactant, and an amine in two or more containers.
20. The kit according to claim 19, wherein the oxidizing agent is selected from H5IO6, HIO4 or a mixture thereof, and the surfactant is polyethylene glycol p-(1,1,3,3-tetramethylbutyl)phenyl ether.
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