Data processing method, data processing device, filter and readable medium

By performing Booth encoding and calculating part product on large bit width data, the problem of large power consumption in the filter calculation process in the prior art is solved, and the effect of reducing the power consumption of multiplier and filter is achieved.

CN119577305APending Publication Date: 2025-03-07SANECHIPS TECH CO LTD
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Patent Information

Application Number
CN202311133377.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-31
Publication Date
2025-03-07

AI Technical Summary

Technical Problem

When using filters to implement data convolution operations in the prior art, multiple multipliers and adders are required during the calculation process, resulting in large power consumption.

Method used

By performing Booth encoding on large bit width data, encoded data is generated, and partial product is calculated based on the encoded data and small bit width data, the number of effective partial product is reduced, thereby reducing the power consumption of the multiplier and filter.

Benefits of technology

In the case where the large bit width data has more target data segments than the small bit width data, the effective number of partial products can be greatly reduced and the power consumption of the multiplier and filter can be reduced.

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Abstract

The invention provides a data processing method which is applied to a data processing device, the data processing device is used for carrying out data processing on first data and second data, and the bit width of the first data is larger than that of the second data. The method comprises the steps that under the condition that the number of target data segments in first data is larger than the number of target data segments in second data, the first data are coded to obtain coded data, and partial products corresponding to the coded data are generated according to the coded data and the second data. According to the embodiment of the invention, the coding mode is adjusted, and the number of effective partial products can be greatly reduced under the condition that the data with large bit width has more target data segments compared with the data with small bit width, so that the power consumption of a multiplier and a filter is reduced. The invention also provides a multiplier, a filter and a readable medium.
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Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a data processing method, a data processing device, a filter, and a readable medium. Background Art

[0002] The convolution operation of data is realized by using filters. The implementation method is to delay the input signal of the filter for a certain period of time, multiply it with a series of coefficients, and then add all the products to obtain the output signal. The main part is the multiplication and accumulation operation of a data and a coefficient. This operation requires the use of multiple multipliers and adders at the same time, and it is a multi-bit multiplication and addition operation. The calculation process consumes a lot of power. Summary of the invention

[0003] The present disclosure provides a data processing method, a data processing device, a filter and a readable medium.

[0004] In a first aspect, an embodiment of the present disclosure provides a data processing method, the method is applied to a data processing device, the data processing device is used to perform data processing on first data and second data, wherein the bit width of the first data is greater than the bit width of the second data, the method comprising:

[0005] When the number of target data segments in the first data is greater than the number of target data segments in the second data, encoding the first data to obtain encoded data;

[0006] A partial product corresponding to each of the encoded data is generated based on the each of the encoded data and the second data.

[0007] In yet another aspect, an embodiment of the present disclosure further provides a data processing device, the data processing device being used to perform data processing on first data and second data, the data processing device comprising an encoding module and a processing module;

[0008] The encoding module is used to encode the first data to obtain encoded data when the number of target data segments in the first data is greater than the number of target data segments in the second data;

[0009] The processing module is used for generating a partial product corresponding to each coded data according to each coded data and the second data.

[0010] On the other hand, an embodiment of the present disclosure further provides a filter, which includes the data processing device as described above.

[0011] On the other hand, an embodiment of the present disclosure further provides a computer-readable medium having a computer program stored thereon, wherein the program implements the data processing method as described above when executed.

[0012] The data processing method provided by the embodiment of the present disclosure is applied to a data processing device, and the data processing device is used to perform data processing on first data and second data, wherein the bit width of the first data is greater than the bit width of the second data, and the method includes: when the number of target data segments in the first data is greater than the number of target data segments in the second data, encoding the first data to obtain encoded data, and generating partial products corresponding to each encoded data according to each encoded data and the second data. By adjusting the encoding method, the embodiment of the present disclosure can significantly reduce the number of effective partial products when large bit width data has more target data segments than small bit width data, thereby reducing the power consumption of multipliers and filters. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 The data processing flow diagram provided by the embodiment of the present disclosure is as follows: Figure 1 ;

[0014] Figure 2 A schematic diagram of a process of performing Booth encoding provided in an embodiment of the present disclosure;

[0015] Figure 3 A schematic diagram of generating partial products corresponding to coded data provided by an embodiment of the present disclosure;

[0016] Figure 4 The data processing flow diagram provided by the embodiment of the present disclosure is as follows: Figure 2 ;

[0017] Figure 5 A schematic diagram of the structure of a data processing device provided in an embodiment of the present disclosure;

[0018] Figure 6a A schematic diagram of Booth encoding rules for 14-bit data provided in a specific example of the present disclosure;

[0019] Figure 6b A schematic diagram of the Booth encoding rule for 15-bit data provided in a specific example of the present disclosure;

[0020] Figure 7a A schematic diagram of a data selection unit provided for a specific example of the present disclosure Figure 1 ;

[0021] Figure 7b A schematic diagram of a data selection unit provided for a specific example of the present disclosure Figure 2 . DETAILED DESCRIPTION

[0022] Example embodiments will be described more fully below with reference to the accompanying drawings, but the example embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, the purpose of providing these embodiments is to make the present disclosure thorough and complete and to enable those skilled in the art to fully understand the scope of the present disclosure.

[0023] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0024] The terms used herein are only used to describe specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It will also be understood that when the terms "comprising" and / or "made of" are used in this specification, the presence of the features, wholes, steps, operations, elements and / or components is specified, but the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof is not excluded.

[0025] The embodiments described herein may be described with reference to plan views and / or cross-sectional views by means of idealized schematic diagrams of the present disclosure. Therefore, the example illustrations may be modified according to manufacturing techniques and / or tolerances. Therefore, the embodiments are not limited to the embodiments shown in the accompanying drawings, but include modifications of the configurations formed based on the manufacturing process. Therefore, the regions illustrated in the accompanying drawings have schematic properties, and the shapes of the regions shown in the figures illustrate the specific shapes of the regions of the elements, but are not intended to be limiting.

[0026] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined as such herein.

[0027] In the related art, multiplication operations implemented by hardware are all processed in the form of complement codes, and the current bottom-level coding operations of multipliers are all implemented in the form of Booth coding and Wallace tree compression.

[0028] Booth coding is to encode one multiplier of the multiplier, and the other multiplier generates a partial product. The multiplier is a string of binary digits starting from the lowest bit. For Booth coding with continuous 0 and 1, the number of effective partial products generated is small.

[0029] Wallace tree compression processes the partial products generated after Booth encoding, that is, compresses the partial products in groups of three using half adders and full adders. It is a tree algorithm for simplifying partial products.

[0030] When using Booth encoding and Wallace tree compression to implement multiplier functions, if the bit widths of the two multipliers are different, the compiler will default to Booth encoding for the data with a smaller bit width. Since consecutive 0s or 1s in Booth encoding will reduce the number of valid partial products, if there are consecutive 0s or 1s in the data with a larger bit width, this default operation of the compiler currently cannot reflect the advantage of reducing partial products.

[0031] To solve the above technical problems, an embodiment of the present disclosure provides a data processing method, which is applied to a data processing device, and the data processing device is used to process first data and second data, wherein the bit width of the first data is greater than the bit width of the second data, and the data processing device may include a multiplier in a filter, that is, the data processing method of the embodiment of the present disclosure can be applied in a filter scenario.

[0032] like Figure 1 As shown, the data processing method comprises the following steps:

[0033] Step S11, when the number of target data segments in the first data is greater than the number of target data segments in the second data, encode the first data to obtain encoded data.

[0034] In the embodiment of the present disclosure, the encoding rule refers to the Booth encoding rule.

[0035] If there are more target data segments in the first data with a larger bit width than in the second data with a smaller bit width, Booth encoding is performed on the first data with a larger bit width to obtain a plurality of encoded data.

[0036] Step S12, generating a partial product corresponding to each coded data according to each coded data and the second data.

[0037] Each partial product is generated based on the encoded data obtained in step S11 and the second data with a small bit width.

[0038] According to the Booth coding rule, taking the number of coding bits as 3 (i.e., 3-bit coding) as an example, the adjacent 3 bits of the coded data constitute a Booth code, which can generate a partial product, so the bit width of the coded data determines the total number of partial products. When the 3 bits of the coded data are all 0 or all 1, the generated partial product is 0, and the partial product of 0 can reduce the amount of partial product calculation and the amount of Wallace tree compression calculation, thereby reducing the power consumption of the multiplier and the filter. Therefore, the distribution of the bit 0 / 1 of the coded data (i.e., the first data) determines the number of effective partial products generated.

[0039] The data processing method provided by the embodiment of the present disclosure is applied to a data processing device, and the data processing device is used to perform data processing on first data and second data, wherein the bit width of the first data is greater than the bit width of the second data, and the method includes: when the number of target data segments in the first data is greater than the number of target data segments in the second data, encoding the first data to obtain encoded data, and generating partial products corresponding to each encoded data according to each encoded data and the second data. By adjusting the encoding method, the embodiment of the present disclosure can significantly reduce the number of effective partial products when large bit width data has more target data segments than small bit width data, thereby reducing the power consumption of multipliers and filters.

[0040] In some embodiments, when the number of target data segments in the first data is greater than the number of target data segments in the second data, before encoding the first data (i.e., step S11), the data processing method further includes the following steps: comparing the bit width of the first data with the bit width of the second data, and taking the larger bit width of the first data and the second data as the first data; and, comparing the number of target data segments in the first data with the number of target data segments in the second data.

[0041] In most filter scenarios, the two data input to the data processing device are first data and second data, and the bit widths of the two data are different, one has a larger bit width and the other has a smaller bit width. It should be noted that the larger bit width and the smaller bit width mentioned here are relative to the two multipliers, not the absolute size.

[0042] In some embodiments, one of the first data and the second data is a filter coefficient of a filter to which the data processing device belongs, and the other of the first data and the second data is link data of the filter, that is, the filter coefficient and link data of the filter are used as two data to be processed by the multiplier. In the filter scenario, once the filter is determined, the filter coefficient and the link data of the filter are known, and accordingly, the bit widths of the two can be compared, and the data with the larger bit width can be used as the first data.

[0043] The target data segment is a data segment including continuous 0 or 1, wherein the number of continuous 0 or 1 is the number of coding bits corresponding to the preset coding rule. Exemplarily, if the coding rule is 3-bit coding, the target data segment includes 3 continuous 0 or 3 continuous 1.

[0044] In some embodiments, Figure 2 As shown, encoding the first data to obtain the encoded data includes the following steps:

[0045] Step S21, expanding the first data according to the number of coding bits corresponding to the preset coding rule and the bit width of the first data.

[0046] If the bit width of the first data cannot just meet the coding grouping of the Booth coding rule, that is, the bit width cannot divide the number of coding bits corresponding to the Booth coding rule, the first data needs to be expanded, and the expansion is the low bit of the first data. Taking the 14-bit first data encoded according to 3 bits as an example, the low bit of the 14-bit data is expanded by 1 bit (the data value of this bit is 0); taking the 15-bit first data encoded according to 3 bits as an example, the low bit of the 15-bit data is expanded by 2 bits (the data value of the 2 bits is 0).

[0047] Step S22: Booth encoding is performed on the expanded first data according to the encoding rule to obtain a plurality of encoded data.

[0048] First, the first data to be expanded is expanded to complete its bit data, so that Booth encoding can be implemented.

[0049] In some embodiments, Figure 3 As shown, the step of generating the partial product corresponding to each coded data according to each coded data and the second data (i.e., step S12) includes the following steps:

[0050] Step S31, querying the encoding rules according to each encoding data to obtain the partial product coefficients corresponding to each encoding data.

[0051] Taking the Booth coding rule of 3-digit code as an example, the Booth coding rule of 3-digit code is shown in Table 1:

[0052] Table 1

[0053] <![CDATA[B i+1 ]]> <![CDATA[B i ]]> <![CDATA[B i-1 ]]> Pi 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 2 1 0 0 -2 1 0 1 -1 1 1 0 -1 1 1 1 0

[0054] B i Indicates the data value of the i-th bit, Pi represents B i+1 B i B i-1 The partial product coefficient corresponding to the coded data can be obtained by querying Table 1 according to the coded data. Exemplarily, when the coded data is 000, the corresponding partial product coefficient is 0, and the corresponding partial product is 0; when the coded data is 001, the corresponding partial product coefficient is 1, and if the second data is X, the corresponding partial product is X.

[0055] Step S32, generating partial products corresponding to each coded data according to the partial product coefficients corresponding to each coded data and the second data.

[0056] For each coded data, after the corresponding partial product coefficient is determined, the partial product coefficient is multiplied by the second data to obtain the partial product corresponding to the coded data, thereby obtaining the partial products corresponding to all the coded data.

[0057] As shown in Table 1, the partial product coefficients corresponding to the coded data 000 and 111 are 0, and the corresponding generated partial products are also 0, that is, invalid partial products are obtained.

[0058] In some embodiments, in the case where the first data after expansion includes a low extension bit, the encoding rules may include a first encoding rule and a second encoding rule. Since the data value of the low-order extension can only be 0, taking the encoding rule of 3-bit encoding as an example, the valid data of the encoded data including the low-order extension bit is 2-bit or 1-bit data, and the valid data of other encoded data are all 3-bit data. Therefore, a special 2-bit or 1-bit Booth encoding rule (i.e., the first encoding rule) can be configured for the encoded data including the low-order extension bit, and a normal 3-bit Booth encoding rule (i.e., the second encoding rule) can be configured for other encoded data.

[0059] Correspondingly, the method of querying the coding rule according to each coded data to obtain the partial product coefficient corresponding to each coded data includes the following steps: querying the first coding rule according to the first coded data including the low extension bit to obtain the partial product coefficient corresponding to the first coded data; and querying the second coding rule according to the second coded data to obtain the partial product coefficient corresponding to the second coded data; the second coded data is the other coded data in each coded data except the first coded data, that is, the coded data not including the low extension bit.

[0060] In some embodiments, Figure 4 As shown, after generating the partial product corresponding to each coded data according to each coded data and the second data (i.e., step S12), the data processing method may further include the following steps:

[0061] Step S13, simplifying the partial products corresponding to each coded data to obtain data processing results of the first data and the second data.

[0062] In the disclosed embodiment, the simplified processing of partial products can be achieved through the Wallace tree compression algorithm. Specifically, the multiple partial products generated in step S12 are divided into multiple groups, each with three partial products, and Wallace tree compression is performed using half adders and full adders, and finally the sum is performed to obtain the final data processing result.

[0063] The present disclosure also provides a data processing device, which is used to process first data and second data. Figure 5As shown, the data processing device includes an encoding module 101 and a processing module 102, and the encoding module 101 and the processing module 102 can form a multiplier.

[0064] The encoding module 101 is used to encode the first data to obtain encoded data when the number of target data segments in the first data is greater than the number of target data segments in the second data.

[0065] The coding data module 102 is used to generate a partial product corresponding to each coding data according to each coding data and the second data.

[0066] In some embodiments, the encoding module 101 is used to expand the first data according to the number of encoding bits corresponding to a preset encoding rule and the bit width of the first data, and encode the expanded first data according to the encoding rule to obtain encoded data.

[0067] In some embodiments, the data processing device may further include a comparison module, which is used to compare the bit width of the first data and the bit width of the second data, and take the data with the larger bit width of the first data and the second data as the first data; and compare the number of target data segments in the first data with the number of target data segments in the second data.

[0068] In some embodiments, the processing module 102 includes N data selection units, where N is the number of encoded data, and N≥2.

[0069] The data selection unit is used to query the encoding rule according to each encoded data to obtain the partial product coefficient corresponding to each encoded data; and generate the partial product corresponding to each encoded data according to the partial product coefficient corresponding to each encoded data and the second data.

[0070] The data selection unit may be a data selector, the signal input to the data selector includes a selection signal and an input signal, the selection signal is the encoded data of the first data with a large bit width, the input signal is the second data, and the output signal of the data selector is the partial product corresponding to the encoded data.

[0071] In some embodiments, when the expanded first data includes a low extension bit, the N data selection units include 1 first data selection unit and (N-1) second data selection units, and the first data selection unit is used to query the first coding rule according to the first coded data including the low extension bit, obtain the partial product coefficient corresponding to the first coded data, and generate the partial product corresponding to the first coded data according to the partial product coefficient corresponding to the first coded data and the second data.

[0072] The second data selection unit is used to query the second coding rule according to each second coded data, obtain the partial product coefficient corresponding to each second coded data, and generate the partial product corresponding to each second coded data according to the partial product coefficient corresponding to each second coded data and the second data; the second coded data is other coded data in each coded data except the first coded data.

[0073] That is to say, if the expanded first data has a low-order extension bit, two data selectors can be set, one of which is used to select the second data according to the first encoded data to generate a corresponding partial product; and the other data selector is used to select the second data according to the second encoded data to generate a corresponding partial product.

[0074] The embodiment of the present disclosure further provides a filter, which includes the data processing device as described above.

[0075] In order to clearly illustrate the solution of the embodiment of the present disclosure, the following Figure 6a-Figure 6b , Figure 7a-Figure 7b , through a specific example, the process of the data processing method is explained in detail.

[0076] For example, the first data and the second data input to the multiplier are 14-bit data and 15-bit data respectively. In the related art, Booth encoding is performed on the second data with a small bit width, i.e., 14-bit data, and the 15-bit data is used to generate a partial product. Figure 6a As shown, the 14-bit data is first extended in the low order by 1 bit, that is, the "-1" bit, and the value of this bit is 0. The extended 14-bit data is subjected to Booth encoding to obtain 7 encoded data. By using the 7 encoded data to query Table 1, 7 partial products C0-C6 can be obtained.

[0077] The embodiment of the present disclosure performs Booth encoding on the first data with a large bit width, i.e., 15-bit data, and the 14-bit data is used to generate a partial product. Figure 6b As shown, the low-order bits of the 15-bit data are first extended by 2 bits, namely, "-1" and "-2" bits, and the values ​​of the 2 bits are 0. Booth encoding is performed on the extended 15-bit data to obtain 8 coded data. By using the 8 coded data to query Table 1, 8 partial products C0-C7 can be obtained.

[0078] It can be seen that when Booth encoding is performed in a traditional manner, a total of 7 partial products C0-C6 can be generated, while when Booth encoding is performed on the first data with a large bit width using the solution of the embodiment of the present disclosure, a total of 8 partial products C0-C7 can be generated, which will lead to an increase in the number of partial products. However, because in the Booth encoding rule, when there is a target data segment including continuous 0 / 1, the partial product corresponding to the target data segment is 0, which is an invalid partial product. Therefore, when the large bit width data participating in the multiplication includes more target data segments, the solution of the embodiment of the present disclosure can be adopted, and the number of partial products generated thereby increases but the valid partial products decrease.

[0079] Figure 7a and Figure 7b The hardware structure diagram of the data selection unit for realizing the above specific example is as follows: Figure 7a The data selection unit includes a schematic diagram of a data selector, Figure 7b FIG. 1 is a schematic diagram showing a data selection unit including two data selectors. Figure 7a As shown, i_d in_a is the first data with a large bit width of 15 bits. Figure 6b According to the Booth encoding rule shown in Table 1, i_d in_a is encoded to generate 8 encoded data as the selection signal of the data selector, and i_d in_b is the second data with a small bit width of 14 bits, which serves as the input signal of the data selector. The data selector is an 8-to-1 data selector, and the partial product (0, b, b, 2b, -2b, -b, -b, 0) generated by the second data i_d in_b is selected according to the Booth encoding rule shown in Table 1. Among them, the encoded data of i_d in_a including 2 extended bits is 100, and the corresponding partial product (-2b) can be obtained by querying Table 1. The multiple partial products output by the data selector are input to the data processing module (CAS) for Wallace tree compression processing to obtain the final multiplication calculation result and output it. It should be noted that Figure 7a One data selector is shown, but actually the data selection unit includes a total of eight data selectors of eight-to-one selection, and the remaining seven data selectors are not shown.

[0080] Figure 7b The scheme shown is similar to Figure 7a The difference of the scheme shown is that a data selector is set up separately for processing the coded data 100 including 2 extended bits of i_d in_a, and the data selector is a 2-to-1 data selector. The remaining 7 coded data of i_d in_a are still processed by the 8-to-1 data selector and the selection result is output. It should be noted that Figure 7bTwo data selectors are shown (one 2-to-1 data selector and one 8-to-1 data selector), but in fact the data selection unit includes a total of 8 data selectors, including 7 8-to-1 data selectors and 1 2-to-1 data selector, and the remaining 6 8-to-1 data selectors are not shown.

[0081] The disclosed embodiments relate to a solution of a multiplier micro-architecture in a filter structure, which can be widely used in multipliers and filters in various scenarios. In hardware implementation, a multiplier is an electronic device that performs the multiplication of two unrelated analog signals. It can be widely used in electronic communication systems to realize modulation, demodulation, mixing, phase detection and automatic gain control. It can also be used in filtering, waveform formation and frequency control. Filters have very wide applications in the fields of speech and image processing, pattern recognition, wireless communications, etc. Through filtering operations, a set of input data sequences are converted into another set of output data sequences, thereby achieving the purpose of correcting signal properties in the time domain or frequency domain.

[0082] The disclosed embodiment is based on the underlying architecture of the multiplier in the filter, and by optimizing the Booth coding rule, various applications using the multiplier can also be optimized according to the present invention. If the application scenario of the multiplier meets the requirements that the two multipliers have different bit widths, and the data with a large bit width has more data segments including continuous 0s or 1s than the data with a small bit width, the solution of the disclosed embodiment can also be applied.

[0083] The disclosed embodiment makes a change to the implementation method of Booth coding, using the large bit width data in the multiplier as the encoded data, and the small bit width data to generate partial products. When the large bit width data in the multiplier has a particularity, that is, there are more continuous target data segments of 0 or 1 compared to the small bit width data, although the number of partial products generated will increase, the number of effective partial products will be greatly reduced. Since the convolution operation in the filter requires the use of a large number of multipliers and adders, if the number of effective partial products is reduced during the implementation of the multiplier, the power consumption of the multiplier can be reduced, which is reflected in the filter as a reduction in the overall power consumption of the filter, which can effectively improve the competitiveness of the filter in terms of low power consumption.

[0084] The embodiments of the present disclosure further provide a computer-readable medium on which a computer program is stored, wherein the computer program, when executed, implements the data processing method provided in the aforementioned embodiments.

[0085] It will be appreciated by those skilled in the art that all or some of the steps in the method disclosed above, the functional modules / units in the device may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0086] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly stated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

Claims

1. A data processing method, characterized in that: The method is applied to a data processing device, the data processing device is used to perform data processing on first data and second data, wherein the bit width of the first data is greater than the bit width of the second data, and the method includes: When the number of target data segments in the first data is greater than the number of target data segments in the second data, encoding the first data to obtain encoded data; A partial product corresponding to each of the encoded data is generated based on the each of the encoded data and the second data.

2. The method according to claim 1, characterized in that In a case where the number of target data segments in the first data is greater than the number of target data segments in the second data, before encoding the first data, the method further includes: comparing the bit width of the first data and the bit width of the second data, and taking the data with the larger bit width between the first data and the second data as the first data; The number of target data segments in the first data is compared with the number of target data segments in the second data.

3. The method according to claim 1, characterized in that The target data segment is a data segment including continuous 0s or 1s, wherein the number of continuous 0s or 1s is the number of coding bits corresponding to a preset coding rule.

4. The method according to claim 1, characterized in that The step of encoding the first data to obtain encoded data includes: Expanding the first data according to the number of coding bits corresponding to a preset coding rule and the bit width of the first data; The expanded first data is encoded according to the encoding rule to obtain encoded data.

5. The method according to claim 4, characterized in that Generating a partial product corresponding to each of the encoded data according to each of the encoded data and the second data comprises: Querying the encoding rule according to each of the encoding data to obtain a partial product coefficient corresponding to each of the encoding data; A partial product corresponding to each of the encoded data is generated based on the partial product coefficient corresponding to each of the encoded data and the second data.

6. The method according to claim 5, characterized in that In the case where the extended first data includes a low extension bit, the encoding rule includes a first encoding rule and a second encoding rule; and querying the encoding rule according to each of the encoded data to obtain a partial product coefficient corresponding to each of the encoded data includes: Querying the first encoding rule according to the first encoded data including the low extension bit to obtain partial product coefficients corresponding to the first encoded data; and The second encoding rule is queried according to the second encoded data to obtain the partial product coefficient corresponding to the second encoded data; the second encoded data is the other encoded data in each of the encoded data except the first encoded data.

7. The method according to claim 1, characterized in that One of the first data and the second data is a filter coefficient of a filter to which the data processing device belongs, and the other of the first data and the second data is link data of the filter.

8. The method according to any one of claims 1 to 7, characterized in that: After generating a partial product corresponding to each of the encoded data according to each of the encoded data and the second data, the method further includes: The partial products corresponding to the respective encoded data are simplified to obtain data processing results of the first data and the second data.

9. A data processing device, characterized in that: The data processing device is used to process the first data and the second data, and the data processing device includes an encoding module and a processing module; The encoding module is used for encoding the first data to obtain encoded data when the number of target data segments in the first data is greater than the number of target data segments in the second data; The processing module is used for generating a partial product corresponding to each coded data according to each coded data and the second data.

10. The data processing device according to claim 9, characterized in that The encoding module is used to expand the first data according to the number of encoding bits corresponding to a preset encoding rule and the bit width of the first data, and encode the expanded first data according to the encoding rule to obtain encoded data.

11. The data processing device according to claim 10, characterized in that The processing module includes N data selection units, where N is the number of the encoded data, and N≥2; The data selection unit is used to query the encoding rule according to each encoded data to obtain the partial product coefficient corresponding to each encoded data; and generate the partial product corresponding to each encoded data according to the partial product coefficient corresponding to each encoded data and the second data.

12. The data processing device according to claim 11, characterized in that In a case where the expanded first data includes a low extension bit, the N data selection units include 1 first data selection unit and (N-1) second data selection units; The first data selection unit is used to query the first encoding rule according to the first encoded data including the low extension bit, obtain the partial product coefficient corresponding to the first encoded data, and generate the partial product corresponding to the first encoded data according to the partial product coefficient corresponding to the first encoded data and the second data; The second data selection unit is used to query the second encoding rule according to each second encoded data to obtain a partial product coefficient corresponding to each second encoded data, and generate a partial product corresponding to each second encoded data according to the partial product coefficient corresponding to each second encoded data and the second data; The second coded data is other coded data among the coded data except the first coded data.

13. A filter, characterized in that: The method comprises a data processing device as claimed in any one of claims 9 to 12.

14. A computer readable medium having a computer program stored thereon, wherein: When the program is executed, the data processing method according to any one of claims 1 to 8 is implemented.