Package structure

Abstract

A package structure includes a substrate, an electronic device, an underfill, and an underfill guide structure. The electronic device is mounted over the substrate. The underfill is surrounded by the substrate and the electronic device. The underfill guide structure is disposed outside a vertical projection of a circuit structure and horizontally overlaps a gap between the substrate and the electronic device, and is configured to reduce extension of a portion of the underfill outside the vertical projection along a side of the electronic device.

Description

Technical Field

[0001] The present disclosure relates to a package structure and a manufacturing method, and to a semiconductor package structure including a substrate, a circuit structure, and an underfill disposed therebetween, and a method for manufacturing the package structure. Background Art

[0002] Underfill materials are commonly used in semiconductor packaging structures to protect the interconnection between the substrate and the circuit structure. The amount or volume of underfill material is a critical issue because excessive or insufficient underfill material will adversely affect the yield of the semiconductor packaging structure. Summary of the invention

[0003] In some embodiments, a packaging structure includes a substrate, an electronic device, an underfill, and an underfill guide structure. The electronic device is mounted above the substrate. The underfill is surrounded by the substrate and the electronic device. The underfill guide structure is disposed outside a vertical projection of a circuit structure and horizontally overlaps a gap between the substrate and the electronic device, and is configured to reduce an extension of a portion of the underfill outside the vertical projection along a side of the electronic device.

[0004] In some embodiments, a packaging structure includes a substrate, an electronic device, an underfill, and an underfill guiding structure. The substrate has a first surface. The electronic device is disposed above the first surface of the substrate. The underfill is surrounded by the substrate and the electronic device. The underfill guiding structure is disposed on the first surface of the substrate and outside a vertical projection of the electronic device, and is configured to increase a contact area between a portion of the underfill outside the vertical projection and the first surface of the substrate.

[0005] In some embodiments, a packaging structure includes a first substrate, a second substrate, an underfill, and a first protrusion. The first substrate has a first top surface. The second substrate is disposed above the first top surface of the first substrate and has a second bottom surface facing the first top surface of the first substrate. The first top surface of the first substrate and the second bottom surface of the second substrate jointly define a gap of inconsistent height. The underfill is surrounded by the first substrate and the second substrate. The first protrusion is disposed outside the gap and horizontally overlaps the gap, and is configured to provide a guide surface to increase the flow of the underfill. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Aspects of some embodiments of the present disclosure are readily understood from the following detailed description when read in conjunction with the accompanying drawings.It should be noted that various structures may not be drawn to scale, and that the sizes of various structures may be arbitrarily increased or reduced for clarity of discussion.

[0007] Figure 1A A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0008] Figure 1B A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0009] Figure 1C A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0010] Figure 1D One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0011] Figure 1E One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0012] Figure 1F One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0013] Figure 1G One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0014] Figure 1H One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0015] Fig. 1I One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0016] Figure 1J One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0017] Figure 1K One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0018] Figure 1L One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0019] Figure 1MOne or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0020] Figure 2A A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0021] Figure 2A-1 illustrate Figure 2A An enlarged view of area "2A-1" is shown in FIG.

[0022] Figure 2A-2 illustrate Figure 2A An enlarged view of area "2A-2" of FIG.

[0023] Figure 2A-3 illustrate Figure 2A-1 Three types of cross-sectional views (a), (b) and (c) of enlarged views of the region “2A-3”.

[0024] Figure 2B A top view of a package structure according to some embodiments of the present disclosure is illustrated.

[0025] Figure 2C A top view of a package structure according to some embodiments of the present disclosure is illustrated.

[0026] Figure 2D A top view of a package structure according to some embodiments of the present disclosure is illustrated.

[0027] Figure 2E A top view of a package structure according to some embodiments of the present disclosure is illustrated.

[0028] Figure 2F A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0029] Figure 3A A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0030] Figure 3B A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0031] Figure 3C A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0032] Figure 3D A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0033] Figure 3E A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0034] Figure 3FA cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0035] Figure 3G A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0036] Figure 3H A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0037] Fig. 3I A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0038] Figure 3J A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0039] Figure 4A One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0040] Figure 4B One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0041] Figure 4C One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0042] Figure 4D One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0043] Figure 4E One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0044] Figure 4F One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0045] Figure 4G One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0046] Figure 4H One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0047] Figure 5A One or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0048] Figure 5BOne or more stages of an exemplary method for manufacturing a package structure according to some embodiments of the present disclosure are shown.

[0049] Fig. 6A A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure.

[0050] Figure 6B A cross-sectional view illustrating a package structure according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0051] Common reference numerals are used throughout the drawings and detailed description to indicate the same or similar components. Embodiments of the present disclosure will be easily understood based on the following detailed description taken in conjunction with the accompanying drawings.

[0052] Figure 1A A cross-sectional view of a package structure 100A according to some embodiments of the present disclosure is illustrated. The package structure 100A may include a substrate 10 , an electronic device 11 , a plurality of connection elements 12 , and an underfill 13 .

[0053] The substrate 10 may have a surface (or first surface or upper surface or top surface) 101 facing the electronic device 11 and a surface (or second surface or lower surface or bottom surface) 102 opposite to the surface 101. The substrate 10 may have a side 104 extending between the surfaces 101 and 102. The substrate 10 may include an interposer. The substrate 10 may include, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate.

[0054] The substrate 10 (e.g., the first substrate 10) may include a solder resist layer 10s at the upper surface (e.g., surface 101) of the substrate 10 to fully expose the conductive pad or expose at least a portion of the conductive pad for electrical connection. The substrate 10 may include a plurality of conductive vias 10v and a plurality of conductive layers 10c disposed in the solder resist layer 10s. One of the conductive vias 10v is connected to the corresponding conductive layer 10c. The connecting element 12 may be connected to the conductive layer 10c through the conductive vias 10v.

[0055] The electronic device 11 may include a circuit structure or a second substrate. The electronic device 11 may be disposed above the surface 101 of the substrate 10. The electronic device 11 may have a surface (or a lower surface or a bottom surface) 111 facing the upper surface (e.g., the surface 101) of the substrate 10 and a surface (or an upper surface or a top surface) 112 opposite to the surface 111. The electronic device 11 may include a plurality of semiconductor devices 11c, a plurality of redistribution layers (RDL) 11r1 and 11r2, and a plurality of conductive pads (or pads) 11p1 and 11p2. In some embodiments, the electronic device 11 may include a semiconductor die and an RDL disposed at the surface 111 and connected to the semiconductor die.

[0056] The number of semiconductor devices 11c may be three, such as Figure 1A As shown in . In some embodiments, the number of semiconductor devices 11c may be less than or more than three. The semiconductor devices 11c may form an array, such as a 3*3, 4*4, ... N*M array, where N and M are positive integers. The semiconductor device 11c may be configured to emit an optical signal (or light) from the surface 112. The semiconductor device 11c may include an LED. The semiconductor device 11c may include a semiconductor doping layer 11c1 having a first type of dopant, an intermediate layer 11c2, and a semiconductor doping layer 11c3 having a second type of dopant different from the first type of dopant. The semiconductor doping layer 11c1, the intermediate layer 11c2, and the semiconductor doping layer 11c3 are stacked together. The semiconductor doping layer 11c1 may be an N-type doping layer, such as an N-type GaN layer. The semiconductor doping layer 11c3 may be a P-type doping layer, such as a P-type GaN layer. The intermediate layer 11c2 may be referred to as an active region. The intermediate layer 11c2 may include one or more quantum wells. In some embodiments, the intermediate layer 11c2 may include one or more barrier layers interlaced with the quantum wells. In some embodiments, when a voltage is applied to the semiconductor device 11c, electrons (from the semiconductor doping layer 11c1) and holes (from the semiconductor doping layer 11c3) are injected into the quantum wells of the intermediate layer 11c2 and recombine, thereby emitting light.

[0057] The RDL 11r1 may extend along the inclined sidewalls of the intermediate layer 11c2 and the semiconductor doping layer 11c3. The isolation layer 11i may be disposed between the RDL 11r1 and the intermediate layer 11c2 and the semiconductor doping layer 11c3 so that the RDL 11r1 is isolated from the intermediate layer 11c2 and the semiconductor doping layer 11c3. The semiconductor doping layer 11c1 may be electrically connected to one of the connection elements 12 through the RDL 11r1. The semiconductor doping layer 11c3 may be electrically connected to one of the connection elements 12 through the RDL 11r2. Different potentials may be applied to the semiconductor doping layers 11c1 and 11c3. The substrate 10 may be configured to apply a voltage to the semiconductor device 11c through the connection element 12 to control the semiconductor device 11c (e.g., turn on or off the semiconductor device 11c, or adjust the light intensity of the semiconductor device 11c).

[0058] The semiconductor device 11c may include a passivation layer 11a disposed over the RDLs 11r1 and 11r2. The passivation layer 11a may be disposed at a surface 111 of the electronic device 11. The passivation layer 11a may define a plurality of openings for accommodating conductive pads 11p1 and 11p2. The RDL 11r1 may be electrically connected to one of the connection elements 12 through the conductive pad 11p1. The RDL 11r2 may be electrically connected to one of the connection elements 12 through the conductive pad 11p2. The conductive pads 11p1 and 11p2 may each include an Under Bump Metallurgy (UBM).

[0059] The connection element 12 may be disposed between the electronic device 11 and the substrate 10. The connection element 12 may be disposed above the surface 101 of the substrate 10. The connection element 12 may be electrically connected to the substrate 10 (or the conductive via 10v and / or the conductive layer 10c). The connection element 12 may be electrically connected to the electronic device 11 (or the conductive pads 11p1 and 11p2). The thickness T of the connection element 12 11 The thickness T of the electronic device 11 in a direction perpendicular to the surface 101 of the substrate 10 is greater than 12The connection elements 12 may each include a solder 121 and a conductive pillar 122 connected to the solder 121. The thickness of the conductive pads 11p1 and 11p2 may be smaller than the thickness of the solder 121 of the connection element 12. The solder 121 is closer to the electronic device 11 than the conductive pillar 122. The solder 121 is farther away from the substrate 10 than the conductive pillar 122. The solder 121 may have a surface 1211 connected to the conductive pillar 122 and a surface 1212 connected to the conductive pad 11p1 or 11p2, and a curved side 1213 connected between the surfaces 1211 and 1212. There may be an intermetallic structure formed along a boundary between the conductive pad 11p1 (or 11p2) and the solder 121. The conductive pillar 122 is farther away from the electronic device 11 than the solder 121. The conductive pillar 122 may have a curved side 1221. The curved side 1221 of the conductive pillar 122 may be concave, i.e., the width of the middle portion of the conductive pillar 122 is smaller than the width of the bottom / upper portion of the conductive pillar 122. The conductive pillar 122 and the conductive via 10v may be formed in the same process and integrally formed as a single body structure.

[0060] The solder 121 of the connecting element 12 may have different thicknesses T in a direction perpendicular to the surface 101 of the substrate 10 . 13 The solder 121 of the connecting element 12 may have different widths W in a direction parallel to the surface 101 of the substrate 10. 11 The width W of one of the solders 121 is 11 Greater than the thickness T of the solder 121 13 The conductive pillars 122 of the connecting element 12 may have different thicknesses T in a direction perpendicular to the surface 101 of the substrate 10 . 14 .

[0061] The connecting elements 12 may each include a first portion 123 and a second portion 124 disposed between the solder 121 and the conductive pillar 122. The first portion 123 may be disposed on the conductive pillar 122 and may include a first metal such as nickel. The second portion 124 may be disposed on the first portion 123 and may include a second metal such as a SnAg alloy or Ni, Sn. In some embodiments, the solder 121 may include Ag. The conductive pillar 122 may include a third metal such as copper. The solder 121 may include a fourth metal such as Sn. The width W of the first portion 123 may be 12 Greater than the width W of the conductive pillar 122 13 .

[0062] The bottom filler 13 may be outflanked by the substrate 10 and the electronic device 11. The bottom filler 13 may be disposed between the substrate 10 and the electronic device 11. In other words, the bottom filler 13 may be disposed in the space between the substrate 10 and the electronic device 11 to cover and protect the joint formed by the conductive pads 11p1, 11p2 and the solder 121, and the joint formed by the solder 121 and the conductive pillar 122. The bottom filler 13 may be in contact with the passivation layer 11a and / or the solder resist layer 10s. In some embodiments, the bottom filler 13 may include an epoxy resin containing a filler, a molding compound (e.g., an epoxy molding compound or another molding compound), a polyimide, a phenolic compound or material, a material including a silicone resin dispersed therein, or a combination thereof.

[0063] The underfill 13 may have a side surface 131 and a side surface 132 opposite to the side surface 131. The side surface 131 may define a recessed portion 13r1 and the side surface 132 may define a recessed portion 13r2. The recessed portions 13r1 and 13r2 may be different in shape / size / curvature.

[0064] In some cases, semiconductor devices may be manufactured on wafers having relatively small sizes (e.g., 4-inch wafers). The bumping process encounters difficulties because its equipment is incompatible with small wafers. In the present disclosure, instead of processing small wafers of semiconductor devices in the bumping process, a connecting element 12 is formed (and therefore disposed) on a substrate 10, and then an electronic device 11 having a plurality of semiconductor devices 11c may be attached to the connecting element 12 by a flip-chip bonding technique. The conductive pillars 122 of the connecting element 12 are farther away from the semiconductor device 11c, so that the conductive pillars 122 may be referred to as "inverted conductive pillars" relative to those conductive pillars formed on a larger wafer. That is, the "inverted conductive pillars" 122 may solve the problem that small wafers are not compatible with the bumping process.

[0065] In some embodiments, residues 9 of adhesive material may be disposed over the surface 112 of the electronic device 11. The residues 9 may be at the edge of the surface 112. The residues 9 may be formed during a de-carrier process of a temporary carrier.

[0066] Figure 1B A cross-sectional view illustrating a package structure 100B according to some embodiments of the present disclosure. Figure 1B The package structure 100B is similar to Figure 1ATherefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated hereinafter for the sake of brevity, and the differences therebetween are as follows.

[0067] like Figure 1B As shown in FIG. , the amount or volume of the bottom filler 13 is greater than Figure 1A . Therefore, the bottom filler 13 may have portions 13a and 13b disposed outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. The portion 13a of the bottom filler 13 may creep or extend onto the sides 113 and 114 of the electronic device 11. The highest end 13h1 of the portion 13a may be higher than the surface 112 of the electronic device 11. The portion 13a may have a fracture surface 13s1 formed during the de-carrier process of the temporary carrier. The excess portion 13a of the bottom filler 13 may hook the temporary carrier, which will cause problems during the de-carrier process.

[0068] Figure 1C A cross-sectional view illustrating a package structure 100C according to some embodiments of the present disclosure. Figure 1C The package structure 100C is similar to Figure 1A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated hereinafter for the sake of brevity, and the differences therebetween are as follows.

[0069] like Figure 1C As shown in , the package structure 100C may include more semiconductor devices 11c than the package structure 100A. The group 12a of the connecting elements 12 may be disposed close to the sides 113 and 114 of the electronic device 11. This arrangement of the connecting elements 12 of the package structure 100C may change the shape of the portion 13a of the bottom filler 13 by the capillary effect between the group 12a of the connecting elements 12. For example, the capillary effect may suppress the flow of the bottom filler 13 in a direction perpendicular to the surface 101 of the substrate 10 and guide the flow along the surface 101 of the substrate 10. Therefore, the portion 13a of the package structure 100C may be lower than the surface 112 of the electronic device 11. The group 12a of the connecting elements 12 is close to the sides 113 and 114 (or has a sidewall coplanar with the sides 113, 114). In some embodiments, there may be a variety of materials disposed close to the sides 113 and 114 and may cause a variety of material problems in the singulation process.

[0070] Figures 1D to 1J A method for manufacturing a semiconductor package structure according to some embodiments of the present disclosure is described. In some embodiments, the method is used to manufacture Figure 1A The package structure 100A shown in FIG.

[0071] refer to Figure 1D , provide a carrier (or substrate) 10. The substrate 10 may be a wafer type or a strip type. The substrate 10 may include Figure 1A The solder resist layer 10s, the plurality of conductive vias 10v and the plurality of conductive layers 10c discussed in the relevant paragraphs of

[0072] refer to Figure 1E , a plurality of connection elements 12 may be formed above the conductive via 10v. The formation of the connection elements 12 may include forming a plurality of conductive pillars 122 on the conductive via 10v, forming first portions 123 and second portions 124 on corresponding ones of the conductive pillars 122, and forming a plurality of solders 121 on the second portions 124. In an alternative embodiment, the conductive pillars 122 and the conductive via 10v may be formed in the same process and integrally formed as a single body structure.

[0073] refer to Figure 1F , the electronic device 11 may be attached to the connection element 12. In some embodiments, before the step of attaching the electronic device 11 to the connection element 12, the method further includes: forming the electronic device 11 on the carrier 95. The electronic device 11 may have a surface 111 and a surface 112 opposite to the surface 111. The surface 112 may contact the carrier 95.

[0074] refer to Figure 1G , applying the bottom filler 13 to the space S1 between the substrate 10 and the electronic device 11 by, for example, jetting, spraying, or a screw pump. The application of the bottom filler 13 may be performed by droplets 98 generated from an apparatus 99. The apparatus 99 may be a jetting apparatus, a spraying apparatus, or a screw pump. Applying the bottom filler 13 to the space S1 between the substrate 10 and the electronic device 11 includes: dispensing the bottom filler 13 outside the space S1. The bottom filler 13 flows over a portion of the surface 101 outside the space S1 to enter the space S1 between the substrate 10 and the electronic device 11 by a capillary effect.

[0075] refer to Figure 1H , the application of the underfill 13 may be completed and the underfill 13 may be flowable or in a flow stage. The highest end of the underfill 13 may be lower than the surface 111 of the electronic device 11 relative to the surface 101 of the substrate 10 .

[0076] refer to Fig. 1I , the bottom filler 13 is cured in a thermal process. The shape of the bottom filler 13 may change due to the reflow that occurs in the curing process. In other words, the bottom filler 13 may shrink due to the thermal process. Therefore, recessed portions 13r1 and 13r2 may be formed in the side surfaces 131 and 132 of the bottom filler 13.

[0077] refer to Figure 1J , remove the carrier 95 from the electronic device 11. The carrier 95 may be removed by a carrier removal process, such as a laser lift-off process. The substrate 10 may then be singulated to form Figure 1A During the removal of the carrier 95 , if the volume of the underfill 13 is insufficient to fix the electronic device 11 , the electronic device 11 may peel off from the weak point between the underfill 13 and the electronic device 11 , usually at the edge of the circuit structure.

[0078] Figure 1K to Figure 1M A method for manufacturing a semiconductor package structure according to some embodiments of the present disclosure is described. Figure 1K to Figure 1M The initial stages of the method are Figure 1D to Figure 1G The stages shown in are the same or at least similar. Figure 1K Depicted in Figure 1D In some embodiments, the method is used to manufacture Figure 1B The package structure 100B shown in FIG.

[0079] refer to Figure 1K , the application of the underfill 13 may be completed and the underfill 13 may flow or be in a flow stage. The highest end of the underfill 13 may be higher than the surface 112 of the electronic device 11 relative to the surface 101 of the substrate 10 .

[0080] refer to Figure 1L , the bottom filler 13 is cured during the thermal process. The shape of the bottom filler 13 may change due to the reflow that occurs during the curing process. In other words, the bottom filler 13 may shrink due to the thermal process. In other words, the bottom filler 13 may shrink due to the thermal process. The bottom filler 13 may have a portion 13a, which is located outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. The portion 13a of the bottom filler 13 may climb or extend onto the sides 113 and 114 of the electronic device 11. The highest end 13h1 of the portion 13a may be higher than the surface 112 of the electronic device 11.

[0081] refer to Figure 1M , removing the carrier 95 from the electronic device 11. The substrate 10 may then be singulated to form Figure 1B During the removal of the carrier 95, the excess portion 13a of the underfill 13 may hook the carrier 95, which will cause problems during the decarrier process. The portion 13a may have a fracture surface 13s1 formed during the decarrier process of the temporary carrier.

[0082] Figure 2AA cross-sectional view illustrating a package structure 200A according to some embodiments of the present disclosure. Figure 2B illustrate Figure 2A A top view of the packaging structure 200A. Figure 2A The cross-sectional view of the package structure 200A is taken along Figure 2B The line 2A-2A' is intercepted.

[0083] The package structure 200A may include a substrate 10, an electronic device 11, a plurality of connection elements 12, an underfill 13, an underfill guide structure 14a, and an underfill guide structure 14b. The underfill guide structure 14a may be a first underfill guide structure 14a, and may include a first protrusion 14a or a first pillar 14a. The underfill guide structure 14b may be a second underfill guide structure 14b, and may include a second protrusion 14b or a second pillar 14b. Alternatively, the underfill guide structure may include an underfill guide structure 14a and an underfill guide structure 14b.

[0084] The substrate 10 may have a surface (or upper surface) 101 facing the electronic device 11 and a surface (or bottom surface) 102 opposite to the surface 101. The substrate 10 may have a side surface 104 extending between the surfaces 101 and 102. The substrate 10 may include an interposer. The substrate 10 of the package structure 200A may be similar to or the same as the substrate 10 of the package structure 100A.

[0085] The electronic device 11 may be disposed above the surface 101 of the substrate 10. The electronic device 11 may have a surface (or lower surface) 111 facing the substrate 10 and a surface (or upper surface) 112 opposite to the surface 111. The electronic device 11 of the package structure 200A may be similar to or the same as the electronic device 11 of the package structure 100A, which includes a plurality of semiconductor devices 11c, a plurality of redistribution layers (RDL) 11r1 and 11r2, and a plurality of conductive pads 11p1 and 11p2. The surface 111 of the electronic device 11 and the surface 101 of the substrate 10 may jointly define a gap G11 therebetween. The width W5 of the substrate 10 is greater than the width W6 of the electronic device 11.

[0086] The connection element 12 may be disposed between the electronic device 11 and the substrate 10. The connection element 12 may be disposed above the surface 101 of the substrate 10. The connection element 12 may be electrically connected to the substrate 10 (or the conductive via 10v and / or the conductive layer 10c). The connection element 12 of the package structure 200A may be similar or identical to the connection element 12 of the package structure 100A, which includes solder 121, conductive pillars 122, a first portion 123, and a second portion 124.

[0087] like Figure 2B As shown in , the connecting elements 12 may form an array. The connecting elements 12 may each have a width (or diameter) W1. The connecting elements 12 may have a pitch P1, which may be defined by a first edge of one connecting element 12 to a second edge of the connecting element 12 that is most adjacent to the connecting element 12, and the second edge faces away from the first edge.

[0088] An underfill 13 may be disposed between the substrate 10 and the electronic device 11. The underfill 13 of the package structure 200A may be similar or identical to the underfill 13 of the package structure 100A.

[0089] The conductive pillars 122 of the connecting element 12 are further away from the semiconductor device 11c, so that the conductive pillars 122 can be called "reverse conductive pillars" relative to those formed on a larger wafer. That is, the "reverse conductive pillars" 122 can solve the problem that small wafers are not compatible with the bump process.

[0090] In some embodiments, residue 9 of adhesive material may be disposed over surface 112 of electronic device 11. The residue may be at the edge of surface 112. The residue may be formed during the decarrier process of the temporary carrier. In some embodiments, no residue is present over surface 112.

[0091] The underfill guide structure 14a may be disposed on the surface 101 of the substrate 10. The underfill guide structure 14a is disposed outside a projection area (e.g., a vertical projection) A1 of the electronic device 11 on the surface 101 of the substrate 10. The underfill guide structure 14a is closer to the side 113 of the electronic device 11 than the side 114 of the circuit structure. The underfill guide structure 14a may be disposed above the surface 101 of the substrate 10. The underfill guide structure 14a may horizontally overlap with the gap G11 between the substrate 10 and the electronic device 11.

[0092] In some embodiments, the underfill guide structure 14a may be dummy. That is, the underfill guide structure 14a may not have an electrical function and may not be used to transmit signals. In addition, the size and structure of the underfill guide structure 14a may be similar or identical to the size and structure of the connection element 12, and they may be formed in the same process. The difference between the underfill guide structure 14a and the connection element 12 may be that the solder 141 of the underfill guide structure 14a is not connected to the conductive pad, thereby producing the solder 141 having a rounded upper portion.

[0093] The thickness T of the underfill guiding structure 14 a in the direction perpendicular to the surface 101 is 15 Greater than the thickness T of the electronic device 11 in a direction perpendicular to the surface 10112 In addition, the thickness T 15 Greater than the thickness of the pad 11p1 of the electronic device 11. Thickness T 15 The thickness T may be greater than the gap G11 between the substrate 10 and the electronic device 11. 15 can be greater than the thickness T of the connecting element 12 in the direction perpendicular to the surface 101 11 . The bottom filler guide structure 14a may include a solder 141 and a conductive pillar 142 (e.g., a first metal) connected to the solder 141. The conductive pillar 142 may be disposed above the substrate 10. The solder 141 is farther away from the substrate 10 than the conductive pillar 142. The solder 141 may have a surface 1411 connected to the conductive pillar 142 and a rounded surface 1412 opposite to the surface 1411 and exposed by the bottom filler 13. The conductive pillar 142 is closer to the substrate 10 than the solder 141. The conductive pillar 142 may have a curved side (or first sidewall) 1421. The curved side 1421 of the conductive pillar 142 may be concave, that is, the width of the middle portion of the conductive pillar 142 is less than the width of the bottom portion / upper portion of the conductive pillar 142. The conductive pillar 142 and the conductive via 10v may be formed in the same process and integrally formed as a single body structure.

[0094] Thickness T 11 The thickness T may be greater than or equal to 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, or greater. 12 It can be in the range of 5μm to 10μm.

[0095] The bottom filler guide structure 14a may further include a first portion 143 (e.g., a second metal) and a second portion 144 disposed between the solder 141 and the conductive pillar 142. The bottom filler guide structure 14a may include a pillar including a first metal (e.g., the conductive pillar 142) and a second metal (e.g., the first portion 143) disposed on the first metal. A side 1421 of the first metal (e.g., the conductive pillar 142) is recessed from a side of the second metal (e.g., the first portion 143). The first portion 143 may be disposed on the conductive pillar 142 and may include a first metal such as nickel. The second portion 144 may be disposed on the first portion 143 and may include a second metal such as a SnAg alloy. The conductive pillar 142 may include a third metal such as copper. The solder 141 may include a fourth metal such as Sn. The width W of the first portion 143 may be greater than or equal to 0.01 mm. 15 Greater than the width W of the conductive pillar 142 16 .

[0096] The underfill guide structure 14a may be configured to reduce the extension of the portion 13a of the underfill 13 along the side 113 of the electronic device 11. The underfill guide structure 14a may be configured to increase the contact area between the portion 13a and the surface 101 of the substrate 10. The underfill 13 may contact the underfill guide structure 14a. The underfill 13 may extend beyond the underfill guide structure 14a in a direction substantially parallel to the surface 101 of the substrate 10. The underfill guide structure 14a is configured to expand the contact area between the underfill 13 and the substrate 10. The underfill guide structure 14a is configured to increase or promote the horizontal distribution (or horizontal extension) of the portion 13a of the underfill 13 on the surface 101 of the substrate 10 and inhibit the vertical distribution (or vertical extension) of the underfill 13 on the side 113 of the electronic device 11.

[0097] In addition, the electronic device 11 may have a warpage ( Figure 3J ). That is, the gap G11 may have an inconsistent height or may have a varying height. During the formation of the bottom filler 13, the uneven height of the gap G11 may hinder the control of the flow of the bottom filler 13. The bottom filler guide structure 14a may be configured to provide a guide surface to increase the flow of the bottom filler 13. Therefore, the extension of the bottom filler 13 along the side 113 of the electronic device 11 can be suppressed.

[0098] Figure 2A-1 illustrate Figure 2A An enlarged view of area "2A-1" is shown in FIG. Figure 2A-1 More details regarding portion 13 a of underfill 13 and underfill guiding structure 14 a are described.

[0099] The portion 13a of the bottom filler 13 may also be referred to as the "first portion 13a of the bottom filler 13". The first portion 13a of the bottom filler 13 may be disposed outside a projection area (or vertical projection) A1 of the electronic device 11 on the surface 101 of the substrate 10. In a cross section, a first length a1 of the first portion 13a along the surface 101 of the substrate 10 is greater than a second length c of the first portion 13a in contact with the side 113 of the electronic device 11. The first portion 13a of the bottom filler 13 may include a first inner portion (or first portion) 13a1 and a first outer portion (or second portion) 13a2 separated from the first inner portion 13a1 by an underfill guide structure 14a. The curvature of a surface 13a1s of the first inner portion 13a1 may be discontinuous with the curvature of a surface 13a2s of the first outer portion 13a2. The portion 13a may have a surface (or top surface) 13a1s and a surface 13a2s. First inner portion 13a1 is disposed between electronic device 11 and underfill guide structure 14a. In the cross-sectional view, length b1 of the contact surface between first outer portion 13a2 and substrate 10 is greater than second length c of first portion 13a in contact with side 113 of electronic device 11.

[0100] In some embodiments, the first portion 13 a of the underfill 13 may have a top portion 13 a 3 disposed between a surface 111 (eg, a top surface) and a surface 112 (eg, a bottom surface) of the electronic device 11 .

[0101] In some embodiments, in cross section, the bottom filler guide structure 14a has a second sidewall 1422 opposite to the first sidewall 1421. In cross section, a first contact length y1 of the first outer portion 13a2 of the bottom filler 13 at the first sidewall 1421 is different from a second contact length y2 of the first inner portion 13a1 of the bottom filler 13 at the second sidewall 1422. The second contact length y2 may be greater than the first contact length y1. In some embodiments, a first height of a first contact surface between the first portion 13a1 and the protrusion 14a (e.g., the second contact length y2) is greater than a second height of a second contact surface between the second portion 13a2 and the first protrusion 14a (e.g., the first contact length y1).

[0102] Additionally, the upper surface 1241 of the second portion 124 may define a recess 129 , and the solder 121 may extend into the recess 129 .

[0103] Return to reference Figure 2A, the bottom filler guide structure 14b (e.g., the second protrusion 14b) is disposed outside the projection area (or vertical projection) A1 of the electronic device 11 on the surface 101 of the substrate 10. The bottom filler guide structure 14b may overlap horizontally with the gap G11 between the substrate 10 and the electronic device 11. The bottom filler 13 may extend between the first protrusion 14a and the second protrusion 14b. The bottom filler guide structure 14b is closer to the side 114 of the electronic device 11 than the side 113 of the circuit structure. The bottom filler guide structure 14b may be disposed above the surface 101 of the substrate 10. The bottom filler guide structure 14b is opposite to the bottom filler guide structure 14a relative to the electronic device 11. The size and structure of the bottom filler guide structure 14b may be similar or identical to the size and structure of the bottom filler guide structure 14a, and they may be formed in the same process. For example, the bottom filler guide structure 14b may include solder 141, conductive pillars 142, a first portion 143, and a second portion 144. Underfill guiding structure 14 b may have surfaces 1411 and 1412 , and sidewalls 1421 and 1422 .

[0104] In some embodiments, the underfill guide structure 14b may be dummy. That is, the underfill guide structure 14b may not have an electrical function and may not be used to transmit signals. In addition, the size and structure of the underfill guide structure 14b may be similar or identical to the size and structure of the connection element 12, and they may be formed in the same process. The difference between the underfill guide structure 14b and the connection element 12 may be that the solder 141 of the underfill guide structure 14b is not connected to the conductive pad, thereby producing the solder 141 having a rounded upper portion.

[0105] The underfill guide structure 14b may be configured to reduce the extension of the portion 13b of the underfill along the side 114 of the electronic device 11. The underfill guide structure 14b may be configured to increase the contact area between the portion 13b and the surface 101 of the substrate 10. The underfill 13 may contact the underfill guide structure 14b. The underfill guide structure 14b may be configured to affect the distribution of the underfill 13 in a manner similar to the underfill guide structure 14a. The underfill 13 may extend beyond the underfill guide structure 14b in a direction substantially parallel to the surface 101 of the substrate 10. The underfill guide structure 14b is configured to expand the contact area between the underfill 13 and the substrate 10. The underfill guide structure 14b is configured to increase or promote the horizontal distribution (or horizontal extension) of the portion 13b of the underfill 13 on the surface 101 of the substrate 10 and inhibit the vertical distribution (or vertical extension) of the underfill 13 on the side 114 of the electronic device 11.

[0106] Figure 2A-2 illustrate Figure 2A An enlarged view of area "2A-2" of FIG. Figure 2A-2 More details regarding portion 13 b of underfill 13 and underfill guiding structure 14 b are described.

[0107] The portion 13b of the bottom filler 13 may also be referred to as the "second portion 13b of the bottom filler 13". The second portion 13b of the bottom filler 13 may be disposed outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. In the cross section, a first length a2 of the second portion 13b along the surface 101 of the substrate 10 is greater than a fourth length d of the second portion 13b in contact with the side 114 of the electronic device 11. The second portion 13b of the bottom filler 13 may include a second inner portion 13b1 and a second outer portion 13b2 separated from the second inner portion 13b1 by a bottom filler guide structure 14b. The curvature of a surface 13b1s of the second inner portion 13b1 may be discontinuous with the curvature of a surface 13b2s of the second outer portion 13b2. The second inner portion 13b1 is disposed between the electronic device 11 and the bottom filler guide structure 14b. In the cross-sectional view, a length b2 of a contact surface between the second outer portion 13b2 of the second portion 13b and the substrate 10 is greater than a fourth length d of the second inner portion 13b1 of the second portion 13b in contact with the side surface 114 of the electronic device 11 .

[0108] In some embodiments, a second length c of the first portion 13 a in contact with the side 113 of the electronic device 11 is different from a fourth length d of the second portion 13 b in contact with the side 114 of the electronic device 11 .

[0109] The portions 13a and 13b of the bottom filler 13 of the package structure 300A may be asymmetric. For example, the highest points of the portions 13a and 13b may be at different elevations relative to the surface 101 of the substrate 10. The length a1 of the first portion 13a along the surface 101 of the substrate 10 is different from the length a2 of the second portion 13b along the surface 101 of the substrate 10. The curvature of the surface 13a1s is different from the curvature of the surface 13b1s.

[0110] In some embodiments, the second portion 13 b of the underfill 13 may have a top portion 13 b 3 disposed between the surface 111 (eg, top surface) and the surface 112 (eg, bottom surface) of the electronic device 11 .

[0111] In some embodiments, in the cross section, the bottom filler guide structure 14b has a second sidewall 1422 opposite to the first sidewall 1421. In the cross section, a first contact length y3 of the bottom filler 13 at the first sidewall 1421 is different from a second contact length y4 of the bottom filler 13 at the second sidewall 1422. The second contact length y4 may be greater than the first contact length y3. In some embodiments, a first height of a first contact surface between the first portion 13b1 and the protrusion 14b (e.g., the second contact length y4) is greater than a second height of a second contact surface between the second portion 13b2 and the protrusion 14b (e.g., the first contact length y3).

[0112] like Figure 2B As shown in , the bottom filler guide structures 14a and 14b may collectively include a plurality of protrusions 14 disposed around the electronic device 11. Each of the protrusions 14 may be surrounded by the bottom filler 13. Each of the protrusions 14 may include a solder 141, a conductive pillar 142, a first portion 143, and a second portion 144. The bottom filler 13 may extend between a first protrusion and a second protrusion of the protrusions 14. The bottom filler 13 may extend through a gap between at least one of the plurality of protrusions 14. In a top view, the protrusions 14 may have a width (or diameter) W2. The protrusions 14 may have a pitch P2. The width W2 of the protrusions 14 may be substantially the same as the width W1 of the connecting element 12. The pitch P1 of the connecting element 12 may be substantially the same as the pitch P2 of the protrusions 14.

[0113] Return to reference Figure 2A-1 , the first portion 13a1 may be closer to the gap G11 than the second portion 13a2. The thickness (or height) T of the first portion 13a1 is 51 Greater than the thickness (or height) T of the second portion 13a2 52 The thickness T of the first portion 13a1 is 51 The height of the gap G11 between the substrate 10 and the electronic device 11 is greater than that of the gap G11 between the substrate 10 and the electronic device 11. The top surface 13a1s of the first portion 13a1 is lower than the top surface 112 of the electronic device 11.

[0114] Return to reference Figure 2A, the cross-sectional view shows a protrusion of the bottom filler guide structure 14a, and for the sake of simplicity, the protrusion is referred to using the same reference numeral 14a. The protrusion 14a may be disposed above the surface 101 of the substrate 10. The protrusion 14a may be spaced apart from the electronic device 11. The bottom filler 13 may contact the protrusion 14a. The bottom filler 13 may define a first concave portion 13a outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. The first concave portion 13a is recessed from the space between the top portion of the protrusion 14a (e.g., the solder 141) and the top portion of the electronic device 11 (e.g., the semiconductor doping layer 11c1). In some embodiments, the first concave portion 13a opens toward the space between the top portion of the protrusion 14a and the top portion of the electronic device 11. In some embodiments, the first concave portion 13a may be substantially open upward. The outer surface 131 of the first concave portion 13a is concave toward the space between the top portion of the protrusion 14 and the top edge (e.g., the side 113) of the electronic device 11. In some embodiments, the outer surface (or side) 131 of the first concave portion 13a is concave upward. In some embodiments, the central axis of the first concave portion 13a extends through the space between the top portion of the protrusion 14 and the top edge of the electronic device 11.

[0115] In some embodiments, the elevation of the highest end 13h2 (or highest point) of the first concave portion 13a contacting the side surface 113 of the electronic device 11 is between the surface 112 of the electronic device 11 and the surface 111 of the electronic device 11 .

[0116] In some cases, before the temporary carrier is removed from the circuit structure, the bottom filler is filled and cured in the space defined by the carrier and the circuit structure. However, during the bottom filler dispensing process, the process window for volume control of the bottom filler may have a limited margin. For example, insufficient volume of the bottom filler may cause the circuit structure to peel off from the weak point between the bottom filler and the circuit structure (usually at the edge of the circuit structure). For example, the excess volume of the bottom filler may climb over or extend over the side of the temporary carrier, thus forming a fillet (a portion of the bottom filler adhering to the side of the temporary carrier). The fillet may hook the temporary carrier in the carrier removal process, thus hindering the process. For example, more momentum is required to remove the temporary carrier from the carrier, which results in pulling the circuit structure to a position with an unacceptable tilt angle.

[0117] In the present disclosure, the package structure 200A includes an underfill guide structure 14a and / or 14b disposed outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. The guide structure (or underfill diffusion structure) 14a and / or 14b is configured to increase or promote the horizontal distribution (or horizontal extension) of the underfill 13 on the surface 101 of the substrate 10 and suppress the vertical distribution (or vertical extension) of the underfill 13 on the sides 113 and 114 of the electronic device 11. The underfill guide structure 14a and / or 14b can guide the underfill having a relatively small volume toward the edge (defined by an imaginary line aligned with and below the side 113 or 114) of the electronic device 11 through a capillary effect. The underfill guide structure 14a and / or 14b ensures that the portions 13a and 13b of the underfill 13 remain outside the projection area A1. The bottom filler guide structures 14a and / or 14b change the distribution of the bottom filler 13 to support or fix the thin electronic device 11 during the carrier removal process, thereby achieving a thin electronic device 11 (thickness T 12 ) and a relatively thick (or taller) connecting element 12 (thickness T 11 ) arrangement.

[0118] In addition, the elevation of the highest point where the portions 13a and 13b contact the sides 113 and 114 of the electronic device 11 may be between the upper surface 112 and the lower surface 111 of the electronic device 11. Therefore, the bottom filler 13 having a relatively large volume (which would hinder the carrier removal process if the guide structure is not present) does not reach the sides of the temporary carrier. The bottom filler guide structures 14a and / or 14b make the process window wider because a slightly higher volume of the bottom filler 13 can be dispensed without overflowing the bottom filler toward the temporary carrier. The bottom filler guide structures 14a and / or 14b can retain the bottom filler 13 in the presence of excessive chamfers (which may jeopardize the carrier removal process). The bottom filler guide structures 14a and / or 14b ensure good bottom filler support for the flip chip bonding process.

[0119] Figure 2A-3 illustrate Figure 2A-1 Three types of cross-sectional views (a), (b) and (c) of enlarged views of the region “2A-3”. Figure 2A-3 More details about the connecting element 12 are explained.

[0120] The underfill 13 may have a portion (or a clamping portion) 13p contacting the step structure 126 of the connection element 12. Since the width W of the first portion 123 after the etching process 12 The width W of the conductive pillar 122 13The difference between the first portion 123 and the conductive pillar 122 may form a step structure 126. The side 1221 of the conductive pillar 122 and the edge of the first portion 123 may define a slot portion 127 that is recessed toward the solder 121. Therefore, the step structure 126 may include a hook 128. The lower surface of the hook 128 is an extension of the interface between the first portion 123 and the conductive pillar 122. The hook 128 has a side 1281 that is recessed from the side 1221 of the conductive pillar 122.

[0121] The slot portion 127 and the hook 128 may be configured to fix the portion 13p of the underfill 13 so that the adhesion between the connection element 12 and the underfill 13 may be improved. The protection of the connection formed by the solder 121 and the conductive pillar 122 may be improved. Figure 2A-3 In the cross-sectional view (a), the narrow groove portion 127 is filled with the portion 13p of the bottom filler 13. Figure 2A-3 In the cross-sectional view (b) of FIG. 1 , a void 127v1 exists in the slot portion 127. The lower surface of the hook 128 may not contact the portion 13p of the bottom filler 13. The void 127v1 may have a concave periphery. Figure 2A-3 In the cross-sectional view (c) of FIG. 1 , there is a void 127v2 in the slot portion 127. The lower surface of the hook 128 may not contact the portion 13p of the underfill 13. The void 127v2 may have a convex periphery.

[0122] Figure 2C A cross-sectional view illustrating a package structure 200A' according to some embodiments of the present disclosure. Figure 2C The package structure 200A' is similar to Figure 2B Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0123] like Figure 2C As shown in , the protrusions 14' of the package structure 200A' may be similar to the protrusions 14 of the package structure 200A, except that the protrusions 14' have a pitch P3. The pitch P1 between the connecting elements 12 may be different from the pitch P3 between the protrusions 14'. The pitch P3 of the protrusions 14' may be smaller than the pitch P1 of the connecting elements 12, so that the capillary effect between the protrusions 14 is stronger than the capillary effect between the connecting elements 12. The stronger capillary effect may promote the distribution of the bottom filler 13 along the surface 101 of the substrate 10. The protrusions 14' may include pillars similar to the pillars of the protrusions 14.

[0124] Figure 2D 2 illustrates a cross-sectional view of a package structure 200A" according to some embodiments of the present disclosure. Figure 2D The package structure 200A in is similar to Figure 2BTherefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0125] like Figure 2D As shown in , the protrusion 14" of the package structure 200A" may be similar to the protrusion 14 of the package structure 200A, except that the protrusion 14" has a width (or diameter) W3 different from the width W1 of the protrusion 14. The width W3 may be greater than the width W1. The protrusion 14" has a pitch P4. The pitch P1 of the connecting elements 12 may be different from the pitch P4 of the protrusion 14". The gap g1 between the protrusions 14" may be smaller than the gap g2 between the connecting elements 12, so that the capillary effect between the protrusions 14 is stronger than the capillary effect between the connecting elements 12. The stronger capillary effect may promote the distribution of the bottom filler 13 along the surface 101 of the substrate 10. The protrusion 14" may include pillars similar to the pillars of the protrusion 14.

[0126] Figure 2E A cross-sectional view illustrating a package structure 200A'" according to some embodiments of the present disclosure. Figure 2E The package structure 200A" is similar to Figure 2B Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0127] The side surfaces 113 and 114 of the electronic device 11 of the package structure 200A''' may be non-parallel to the direction of the row of protrusions 14 . The side surfaces 114 and the direction of the row of protrusions 14 may define an acute angle θ1 .

[0128] Figure 2F A cross-sectional view illustrating a package structure 200B according to some embodiments of the present disclosure. Figure 2F The package structure 200B is similar to Figure 2B Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0129] The conductive pillars 122 of the connection element 12 may be directly connected to the RDLs 11r1 and 11r2. In other words, the connection element 12 of the package structure 200B may not include the solder 121, the first portion 123, and the second portion 124.

[0130] The underfill guide structures 14a and 14b may include only the conductive pillar 142. In other words, the connection element 12 of the package structure 200B may not include the solder 141, the first portion 143, and the second portion 144.

[0131] Figure 3AA cross-sectional view illustrating a package structure 300A according to some embodiments of the present disclosure. Figure 3A The package structure 300A is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0132] The portions 13a and 13b of the bottom filler 13 of the package structure 300A may be symmetrical. For example, the highest points of the portions 13a and 13b may be at substantially the same elevation relative to the surface 101 of the substrate 10. The length of the portion 13a along the surface 101 of the substrate 10 is substantially the same as the length of the portion 13b along the surface 101 of the substrate 10. The curvature of the side 131 is substantially the same as the curvature of the side 132.

[0133] Figure 3B A cross-sectional view illustrating a package structure 300B according to some embodiments of the present disclosure. Figure 3B The package structure 300B is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0134] The underfill guiding structures 14 a and 14 b may not include solder 141 .

[0135] Figure 3C A cross-sectional view of a package structure 300C according to some embodiments of the present disclosure is illustrated. Figure 3C The package structure 300C is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0136] The bottom filler 13 of the package structure 300C defines a first concave portion (or recess) 13c1, which is outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. The first concave portion 13c1 is recessed from the space between the top portion (or solder 141) of the bottom filler guide structure 14a and the top portion (or semiconductor doping layer 11c1) of the electronic device 11. The portion 13a has a top surface 13a1s, which defines a recess (or concave portion) 13c1 extending between the electronic device 11 and the pillar 14a. The bottom filler 13 may further define a first concave portion 13r1 opposite to the first concave portion 13c1 relative to the bottom filler guide structure 14a. The curvature of the surface of the first concave portion 13r1 is different from the curvature of the surface of the first concave portion 13c1.

[0137] The bottom filler 13 of the package structure 300C defines a second concave portion 13c2, which is outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. The second concave portion 13c2 is recessed from the space between the top portion (or solder 141) of the bottom filler guide structure 14b and the top portion (or semiconductor doping layer 11c1) of the electronic device 11. The curvature of the surface of the second concave portion 13c2 is different from the curvature of the surface of the first concave portion 13c1. The opening direction of the first concave portion 13c1 is different from the opening direction of the second concave portion 13c2.

[0138] Figure 3D A cross-sectional view illustrating a package structure 300D according to some embodiments of the present disclosure. Figure 3D The package structure 300D is similar to Figure 3C Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, the differences between which are as follows.

[0139] The bottom filler 13 of the package structure 300D defines a convex portion 13c3 outside the projection area A1 of the electronic device 11 on the surface 101 of the substrate 10. The convex portion 13c3 is between the bottom filler guide structure 14a and the electronic device 11. The curvature of the surface of the convex portion 13c3 is different from that of the concave portion 13c2 (or Figure 3C The convex portion 13c3 protrudes from the outer peripheral portion of the bottom filler 13.

[0140] Figure 3E A cross-sectional view illustrating a package structure 300E according to some embodiments of the present disclosure. Figure 3E The package structure 300E is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0141] The height T of the underfill guiding structure (or protrusion) 14a relative to the surface 101 of the substrate 10 is 16 The height T of the underfill guiding structure (or protrusion) 14b may be different from 17 .

[0142] Figure 3F A cross-sectional view illustrating a package structure 300F according to some embodiments of the present disclosure. Figure 3F The package structure in 300F is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0143] The package structure 300F may further include a molding material 151 to cover the electronic device 11. The molding material 151 may be configured to protect the semiconductor device 11c of the electronic device 11 and allow light from the semiconductor device 11c to pass through. The molding material 151 may cover a portion of the surface 101 of the substrate 10, and another portion of the surface 101 may be exposed by the molding material 151. The molding material 151 may be transparent.

[0144] Figure 3G A cross-sectional view illustrating a package structure 300G according to some embodiments of the present disclosure. Figure 3G The packaging structure in 300G is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0145] The package structure 300G may further include a molding compound 152 to cover the electronic device 11. The molding compound 152 may be configured to protect the semiconductor device 11c of the electronic device 11 and allow light from the semiconductor device 11c to pass through. The molding compound 152 may cover a portion of the surface 101 of the substrate 10 outside the bottom filler 13. The molding compound 152 may have a side 152s substantially aligned with the side 104 of the substrate 10. The molding compound 152 may be transparent.

[0146] Figure 3H A cross-sectional view illustrating a package structure 300H according to some embodiments of the present disclosure. Figure 3H The package structure in 300H is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0147] The lower surface 111 of the electronic device 11 is not parallel to the surface 101 of the substrate 10. The conductive pads 11p1 and 11p2 may be tilted relative to the connecting element 12. The lower surface 111 of the electronic device 11 and the surface 101 of the substrate 10 define an acute angle θ2, as shown by Figure 3H As shown by the two dotted lines in FIG. 1 , relative to the surface 101 of the substrate 10 , the first side of the electronic device 11 (eg, the portion closer to the side 113 ) is higher than the second side of the electronic device 11 (eg, the portion closer to the side 114 ).

[0148] A group of conductive pads 11p1 may be misaligned with the corresponding connection element 12. The corresponding connection element 12 means that the connection element 12 is electrically connected to the group of conductive pads 11p1. For example, the central axis C1 of one conductive pad 11p1 is misaligned with the central axis C2 of the corresponding connection element 12. A group of conductive pads 11p2 may be misaligned with the corresponding connection element 12. The solder 121 connected to the corresponding connection element 12 of the inclined conductive pad 11p1 or 11p2 may have an asymmetric shape. The portion 13b contacts the side 114 of the electronic device 11, and the portion 13a contacts the side 113 of the electronic device 11.

[0149] Fig. 3I A cross-sectional view illustrating a package structure 300I according to some embodiments of the present disclosure. Fig. 3I The package structure 300I is similar to Figure 2A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0150] The electronic device 11 may have a protruding end 11b1 caused by the momentum of the carrier removal process of the temporary carrier attached to the surface 112 of the electronic device 11. A group of conductive pads 11p1 may be misaligned with the corresponding connection elements 12. A group of conductive pads 11p2 may be misaligned with the corresponding connection elements 12. The solder 121 connected to the corresponding connection elements 12 of the inclined conductive pads 11p1 or 11p2 may have an asymmetric shape. The portion 13b contacts the side 114 of the electronic device 11, and the portion 13a contacts the side 113 of the electronic device 11.

[0151] The first side of the electronic device 11 (eg, the protruding end 11b1) is higher than the second side of the electronic device 11 (eg, the portion closer to the side surface 114) relative to the surface 101 of the substrate 10. The first side of the electronic device 11 may be curved.

[0152] Figure 3J A cross-sectional view illustrating a package structure 300I according to some embodiments of the present disclosure. Figure 3J The package structure 300J is similar to Fig. 3I Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0153] The electronic device 11 may have a warp. The electronic device 11 may further have a second protruding end 11b2 opposite to the protruding end 11b1. With respect to the surface 101 of the substrate 10, the elevation of the protruding end 11b1 is higher than the elevation of the second protruding end 11b2.

[0154] 4A to 4HA method for manufacturing a semiconductor package structure according to some embodiments of the present disclosure is described. In some embodiments, the method is used to manufacture Figure 3F The package structure 300F shown in FIG.

[0155] refer to Figure 4A , a carrier (or substrate) 10 is provided. Figure 4A The steps can be Figure 1D The barrier 97 may be formed on the surface 101 of the substrate 10 .

[0156] refer to Figure 4B , a plurality of connecting elements 12 may be formed above the conductive vias 10v to define a flip chip bonding area. Figure 4B The steps can be Figure 1E The steps are similar or identical.

[0157] like Figure 4B As shown in , underfill guiding structures 14a and 14b may be formed over surface 101 of substrate 10. Underfill guiding structures 14a and 14b may surround connection element 12. Underfill guiding structures 14a and 14b may be outside the flip chip bonding area defined by connection element 12. Underfill guiding structures 14a and 14b and connection element 12 may be formed in the same process.

[0158] refer to Figure 4C , the electronic device 11 can be attached to the connecting element 12. The underfill guide structures 14a and 14b do not overlap with the electronic device 11. In some embodiments, before the step of attaching the electronic device 11 to the connecting element 12, the method further includes: forming the electronic device 11 on the carrier 95. The electronic device 11 can have a surface 111 and a surface 112 opposite to the surface 111. The surface 112 can contact the carrier 95.

[0159] refer to Figure 4D, the bottom filler 13 is applied to the space S1 between the substrate 10 and the electronic device 11 by, for example, jetting, spraying or a screw pump. The application of the bottom filler 13 may be performed by droplets 98 generated from an apparatus 99. Applying the bottom filler 13 to the space S1 between the substrate 10 and the electronic device 11 includes: dispensing the bottom filler 13 outside the bottom filler guide structure 14b (or 14a). The bottom filler 13 may be dispensed between the bottom filler guide structure 14b and the barrier 97. The bottom filler 13 flows through the bottom filler guide structure 14b (or 14a) to enter the space S1 between the substrate 10 and the electronic device 11 by a capillary effect. The bottom filler guide structures 14a and 14b promote the horizontal flow of the bottom filler 13 and inhibit the vertical flow of the bottom filler 13. The underfill guide structures 14a and / or 14b may guide the underfill having a relatively small volume toward the edge (defined by an imaginary line aligned with and below the side 113 of the electronic device 11) of the electronic device 11 by a capillary effect. The underfill 13 may have portions 13a and 13b outside of a projection area A1 of the electronic device 11 on the surface 101 of the substrate 10.

[0160] refer to Figure 4E , the application of the underfill 13 may be completed and the underfill 13 may flow or be in a flow stage. The highest end of the underfill 13 may be lower than the surface 112 of the electronic device 11 relative to the surface 101 of the substrate 10 .

[0161] refer to Figure 4F , the bottom filler 13 is then cured in the thermal process. The shape of the bottom filler 13 may change due to the reflow that occurs during the curing process. The bottom filler guide structures 14a and / or 14b ensure that the portions 13a and 13b of the bottom filler 13 remain outside the projection area A1. In addition, the elevation of the highest point at which the portions 13a and 13b contact the sides 113 and 114 of the electronic device 11 may be between the upper surface 112 and the lower surface 111 of the electronic device 11. Therefore, the bottom filler 13 with a relatively large volume (which would hinder the carrier removal process if the guide structure is not present) does not reach the side of the carrier 95. The bottom filler guide structures 14a and / or 14b make the process window wider because a slightly higher volume of the bottom filler 13 can be dispensed without overflowing the bottom filler toward the carrier 95. The bottom filler guide structures 14a and / or 14b can hold the bottom filler 13 in the case of excessive rounding (excessive rounding may jeopardize the subsequent carrier removal process). The underfill guiding structures 14a and / or 14b ensure good underfill support for the flip chip bonding process.

[0162] refer to Figure 4G , the carrier 95 is removed from the electronic device 11 to form Figure 2AThe package structure 200A shown in FIG. 9A can be removed by a carrier removal process, such as a laser lift-off process. The bottom filler guide structure 14a and / or 14b changes the distribution of the bottom filler 13 to support or fix the thin electronic device 11 during the carrier removal process, thereby achieving a thin electronic device 11 (thickness T 12 ) and a relatively thick (or taller) connecting element 12 (thickness T 11 ) arrangement.

[0163] refer to Figure 4H , a molding material 151 may be formed to cover the circuit structure. The molding material 151 may be a transparent layer. The molding material 151 may be configured to protect the semiconductor device 11c of the electronic device 11 and allow light from the semiconductor device 11c to pass through.

[0164] like Figure 4H As shown in FIG. 1 , the substrate 10 is singulated and the barrier 97 can be removed together with the removed portion of the substrate 10, thereby forming Figure 3F The package structure 300F shown in FIG.

[0165] Figure 5A and Figure 5B A method for manufacturing a semiconductor package structure according to some embodiments of the present disclosure is described. In some embodiments, the method is used to manufacture Figure 3G The package structure 300G is shown in FIG.

[0166] Corresponds to Figure 5A and Figure 5B The initial stages of the method are FIG. 4A to FIG. 4G The stages shown in are the same or at least similar, except that FIG. 4A to FIG. 4G The barrier 97 is not included in the step. Figure 5A Describe the stage following the stage depicted in 4G.

[0167] like Figure 5A As shown in , a molding material 152 may be formed to cover the circuit structure. The molding material 152 may be a transparent layer. The molding material 152 may be configured to protect the semiconductor device 11c of the electronic device 11 and allow light from the semiconductor device 11c to pass through. Since there is no barrier on the surface 101 of the substrate, the molding material 152 may cover the entire portion of the surface 101 except for the portion below the projection A1.

[0168] like Figure 5B As shown in FIG. 1 , the substrate 10 and the molding material 152 are singulated along the line SL1 in the same process, thereby forming Figure 3G The package structure 300G shown in FIG. 1 may include a side surface 152 s coplanar with the side surface 104 of the substrate 10 .

[0169] Fig. 6A 6 is a cross-section of a package structure 600A according to some embodiments of the present disclosure. The package structure 600A may include an electronic device 1 (or an electronic component), a second circuit structure 2 (e.g., a redistribution layer (RDL) structure), a first circuit structure 3 (e.g., a carrier or substrate), a plurality of second connection elements 4, a second bottom filler 6, a first bottom filler 7, a plurality of first connection elements 16, and a bottom filler guide structure 17.

[0170] The electronic device 1 may include a semiconductor chip. The electronic device 1 may also be referred to as a second electronic component. The electronic device 1 may be disposed on a second circuit structure 2. For example, the electronic device 1 may be electrically connected and bonded to the second circuit structure 2 via a second connection element 4 (e.g., a solder bump or other conductive bump). A plurality of second connection elements 4 may be disposed between the electronic device 1 and the second circuit structure 2.

[0171] The second bottom filler 6 may be disposed between the electronic device 1 and the second circuit structure 2. The second bottom filler 6 may cover at least a portion of the side 1003 (or edge) of the electronic device 1. The second bottom filler 6 may encapsulate the second connecting element 4. The second bottom filler 6 may cover the top surface 201 of the second circuit structure 2. The second bottom filler 6 may contact the top surface 201 of the second circuit structure 2.

[0172] The second underfill 6 may cover the side surface 203 of the second circuit structure 2 . The second underfill 6 may contact the first underfill 7 .

[0173] The second circuit structure 2 may be disposed on the first circuit structure 3 or disposed above the first circuit structure 3. The second circuit structure 2 may also be referred to as a first electronic component. The second circuit structure 2 may include at least one dielectric layer (including, for example, a first dielectric layer 20, a second dielectric layer 21, a third dielectric layer 22, and a fourth dielectric layer 24), and at least one circuit layer in contact with the dielectric layer (including, for example, a first circuit layer 24, a second circuit layer 25, a third circuit layer 26, and a fourth circuit layer 27). The circuit layer may be formed of a metal, a metal alloy, or other conductive materials. In some embodiments, the second circuit structure 2 may be similar to a coreless substrate and may be a bumping level redistribution structure. Each of the circuit layers 24, 25, 26, and 27 of the second circuit structure 2 may also be referred to as a "high-density circuit layer". The second circuit structure 2 may be referred to as a high-density circuit structure. In some embodiments, the density of the circuit lines (including, for example, traces or pads) of the high-density circuit layer is greater than the density of the circuit lines of the low-density circuit layer. That is, the number of circuit lines (including, for example, traces or pads) per unit area of ​​the high-density circuit layer is greater than the number of circuit lines per equal unit area of ​​the low-density circuit layer, for example, 1.2 times or greater, about 1.5 times or greater, or about 2 times or greater, or about 3 times or greater. Alternatively or in combination, the line width / line spacing (L / S) of the high-density circuit layer is less than the L / S of the low-density circuit layer, for example, about 90% or less, about 50% or less, or about 20% or less.

[0174] The second circuit structure 2 has a top surface 201, a bottom surface 202 opposite to the top surface 201, and a side surface 203 extending between the top surface 201 and the bottom surface 202. Fig. 6A As shown in FIG. 1 , dielectric layers 20 , 21 , 22 , and 23 are stacked.

[0175] The first circuit layer 24 may be a fan-out circuit layer or a redistribution layer (RDL), and the L / S of the circuit layer 24 may be less than about 10 μm / 10 μm, less than or equal to 8 μm / 8 μm, less than or equal to 5 μm / 5 μm, less than or equal to 3 μm / 3 μm, less than or equal to about 2 μm / about 2 μm, or less than or equal to about 1.8 μm / about 1.8 μm. In some embodiments, the circuit layer 24 is embedded in the corresponding dielectric layer 20, 21. In some embodiments, the circuit layer 24 may include a seed layer and a conductive material (e.g., a plated metal material) disposed on the seed layer. Fig. 6A As shown in FIG. 1 , the topmost circuit layer 24 is covered by the second dielectric layer 21. The topmost circuit layer 24 may contact one of the second connecting elements 4. Therefore, the electronic device 1 may be electrically connected and bonded to the circuit layer 24 of the second circuit structure 2 through the second connecting element 4. Fig. 6AAs described in the embodiment of FIG. 1 , the circuit layers that are horizontally connected or extended may be omitted from the first dielectric layer 20 .

[0176] The second circuit layer 25 may be a fan-out circuit layer or a redistribution layer (RDL), and the L / S of the circuit layer 25 may fall into a similar range as the first circuit layer 24. In some embodiments, the circuit layer 25 is embedded in the corresponding dielectric layers 21, 22. In some embodiments, the circuit layer 25 may include a seed layer and a conductive material similar to the seed layer and conductive material of the circuit layer 24. Fig. 6A As shown in FIG. 2 , the circuit layer 25 may be covered by the third dielectric layer 22. The circuit layer 25 may include at least one inner via 255 that is gradually narrowed upward.

[0177] The third circuit layer 26 may be a fan-out circuit layer or a redistribution layer (RDL), and the L / S of the circuit layer 26 may fall into a similar range of the first circuit layer 24. In some embodiments, the circuit layer 26 is embedded in the corresponding dielectric layer 22,23.

[0178] The fourth circuit layer 27 may be a fan-out circuit layer or a redistribution layer (RDL), and the L / S of the circuit layer 27 may fall into a similar range of the first circuit layer 24. In some embodiments, a portion of the circuit layer 27 may be embedded in the corresponding fourth dielectric layer 23, and another portion of the circuit layer 27 may be exposed from the corresponding fourth dielectric layer 23.

[0179] The first circuit structure 3 includes at least one dielectric layer (including, for example, one first upper dielectric layer 30, two second upper dielectric layers 36, one first lower dielectric layer 30a, two second lower dielectric layers 36a) and at least one circuit layer (including, for example, one first upper circuit layer 34, three second upper circuit layers 38, one first lower circuit layer 34a and three second lower circuit layers 38a, which are formed of metal, metal alloy or other conductive materials) in contact with the dielectric layer (for example, one first upper dielectric layer 30, two second upper dielectric layers 36, one first lower dielectric layer 30a, two second lower dielectric layers 36a). In some embodiments, the first circuit structure 3 may be similar to a core substrate, which further includes a core portion 37. The core portion 37 may include an organic substrate. The circuit layers of the first circuit structure 3 (including, for example, the first upper circuit layer 34, the second upper circuit layer 38, the first lower circuit layer 34a and the second lower circuit layer 38a) may also be referred to as "low-density circuit layers". The first circuit structure 3 can be referred to as a low-density circuit structure. Fig. 6AAs shown in , the first circuit structure 3 has a top surface 31, a bottom surface 32 opposite to the top surface 31, and a side surface 33 extending between the top surface 31 and the bottom surface 32. The first circuit structure 3 may include a plurality of dielectric layers 30, 36, 30a, 36a, a plurality of circuit layers 34, 38, 34a, 38a, and at least one inner conductive via (including, for example, a plurality of upper interconnection vias 35 and a plurality of lower interconnection vias 35a). Fig. 6A As shown in , the side 203 of the upper circuit structure 2 may be offset or recessed from the side 33 of the first circuit structure 3 .

[0180] like Fig. 6A As shown in FIG. 1 , the first circuit structure 3 may have a first thickness T1 and the second circuit structure 2 may have a second thickness T2. The second thickness T2 may be less than the first thickness T1.

[0181] The core portion 37 has a top surface 371 and a bottom surface 372 opposite to the top surface 371, and defines a plurality of through-holes 373 extending through the core portion 37. An interconnection via 39 is disposed or formed in each through-hole 373 for vertical connection. In some embodiments, the interconnection via 39 includes a base metal layer 391 and an insulating material 392.

[0182] The first upper dielectric layer 30 is disposed on the top surface 371 of the core portion 37. The second upper dielectric layer 36 is stacked or disposed on the first upper dielectric layer 30. In addition, the first lower dielectric layer 30a is disposed on the bottom surface 372 of the core portion 37. The second lower dielectric layer 36a is stacked or disposed on the first lower dielectric layer 30a. In some embodiments, the first circuit structure 3 may further include a top protective layer 301 and a bottom protective layer 302. The top protective layer 301 may be a solder resist layer and cover the second upper dielectric layer 36. In addition, the top protective layer 301 may define a plurality of openings to expose a portion of the second upper circuit layer 38. The bottom protective layer 302 may be a solder resist layer and cover the second lower dielectric layer 36a. In addition, the bottom protective layer 302 may define a plurality of openings to expose a portion of the second lower circuit layer 38a.

[0183] The L / S of the first upper circuit layer 34 may be greater than or equal to about 10 μm / about 10 μm. Therefore, the L / S of the first upper circuit layer 34 may be greater than or equal to about five times the L / S of the circuit layer 24 of the second circuit structure 2. In some embodiments, the first upper circuit layer 34 is formed or disposed on the top surface 371 of the core portion 37 and is covered by the first upper dielectric layer 30. In some embodiments, the first upper circuit layer 34 may include a first metal layer disposed on the top surface 371 of the core portion 37, and may be formed of copper foil (e.g., may constitute part of the copper foil).

[0184] The L / S of the second upper circuit layer 38 may be greater than or equal to about 10 μm / about 10 μm. In some embodiments, the second upper circuit layer 38 is formed or disposed on the first upper dielectric layer 30 and is covered by the second upper dielectric layer 36. In some embodiments, the second upper circuit layer 38 is electrically connected to the first upper circuit layer 34 through the upper interconnection vias 35. Each upper interconnection via 35 is gradually narrowed downward in a direction from the top surface 31 of the first circuit structure 3 toward the bottom surface 32. In some embodiments, the second upper circuit layers 38 are electrically connected to each other through the upper interconnection vias 35.

[0185] The L / S of the first lower circuit layer 34a may be greater than or equal to about 10 μm / about 10 μm. In some embodiments, the first lower circuit layer 34a is formed or disposed on the bottom surface 372 of the core portion 37 and is covered by the first lower dielectric layer 30a. In some embodiments, the first lower circuit layer 34a may include a first metal layer disposed on the bottom surface 372 of the core portion 37, and may be a copper foil.

[0186] The L / S of the second lower circuit layer 38a may be greater than or equal to about 10 μm / about 10 μm. In some embodiments, the second lower circuit layer 38a is formed or arranged on the first lower dielectric layer 30a and is covered by the second lower dielectric layer 36a. In some embodiments, the second lower circuit layer 38a is electrically connected to the first lower circuit layer 34a through the lower interconnection through hole 35a. The lower interconnection through hole 35a gradually narrows upward along the direction from the bottom surface 32 of the first circuit structure 3 toward the top surface 31. In some embodiments, the second lower circuit layers 38a are electrically connected to each other through the lower interconnection through hole 35a. The second lower circuit layer 38a can be electrically connected and bonded to a carrier (e.g., a mainboard of a printed circuit board (PCB)) by a connecting element (e.g., a solder bump or other conductive bump).

[0187] In some embodiments, each interconnection via 39 may electrically connect the first upper circuit layer 34 and the first lower circuit layer 34 a .

[0188] A plurality of first connection elements 16 may be disposed between the first circuit structure 3 and the second circuit structure 2. The fourth circuit layer 27 (e.g., the bottommost circuit layer 27) of the second circuit structure 2 may contact one of the first connection elements 16. The second upper circuit layer 38 of the first circuit structure 3 may contact one of the first connection elements 16. Therefore, the first circuit structure 3 (e.g., the second upper circuit layer 38) may be electrically connected and bonded to the second circuit structure 2 (e.g., the bottommost circuit layer 27) through the first connection elements 16.

[0189] The first bottom filler 7 may be disposed between the second circuit structure 2 and the first circuit structure 3. The first bottom filler 7 may at least partially encapsulate a portion of the side 203 (or edge) of the second circuit structure 2. The first bottom filler 7 may encapsulate the first connecting element 16. The first bottom filler 7 may cover the bottom surface 202 of the second circuit structure 2. The first bottom filler 7 may contact the bottom surface 202 of the second circuit structure 2. The first bottom filler 7 may cover the top surface 31 of the first circuit structure 3. The first bottom filler 7 may contact the top surface 31 of the first circuit structure 3. In some embodiments, the first bottom filler 7 may include epoxy resin, molding materials (e.g., epoxy molding materials or other molding materials), polyimide, phenolic compounds or materials, materials containing silicone dispersed therein, or combinations thereof. The material of the second bottom filler 6 may be different from the material of the first bottom filler 7.

[0190] The first connection elements 16 may each include a solder 161 and a conductive pillar 162 surrounded by a first bottom filler 7. The bottom portion of the conductive pillar 162 is disposed in the opening of the top protective layer 301 of the first circuit structure 3. The solder 161 may have a surface 1611 connected to the conductive pillar 162 and a surface 1612 connected to the fourth circuit layer 27, and a curved side 1613 connected between the surfaces 1611 and 1612. The conductive pillar 162 is farther from the first circuit structure 3 than the solder 161. The conductive pillar 162 may have a curved side 1621. The curved side 1621 of the conductive pillar 162 may be concave, that is, the width of the middle portion of the conductive pillar 162 is less than the width of the bottom portion / upper portion of the conductive pillar 162.

[0191] The solders 161 of the first connection element 16 may have different thicknesses in a direction perpendicular to the surface 101 of the substrate 10. The solders 161 of the first connection element 16 may have different widths in a direction parallel to the surface 31. The width of one of the solders 161 is greater than the thickness of the solder 161. The conductive pillars 162 of the first connection element 16 may have different thicknesses in a direction perpendicular to the surface 31.

[0192] The first connection elements 16 may each include a first portion 163 and a second portion 164 disposed between the solder 161 and the conductive pillar 162. The first portion 163 may be disposed on the conductive pillar 162 and may include a first metal such as nickel. The second portion 164 may be disposed on the first portion 163 and may include a second metal such as a SnAg alloy. The conductive pillar 162 may include a third metal such as copper. The solder 161 may include a fourth metal such as Sn. The width of the first portion 163 is greater than the width of the conductive pillar 162.

[0193] Underfill guide structure 17 is disposed outside projection area (eg, vertical projection) B1 of second circuit structure 2 on surface 31 and overlaps a gap between upper circuit structure 2 and first circuit structure 3. Underfill guide structure 17 may be disposed above surface 31 of first circuit structure 3.

[0194] In some embodiments, the underfill guide structure 17 may be dummy. That is, the underfill guide structure 17 may not have an electrical function and may not be used to transmit signals. In addition, the size and structure of the underfill guide structure 17 may be similar or identical to the size and structure of the first connection element 16, and they may be formed in the same process. The difference between the underfill guide structure 17 and the first connection element 16 may be that the solder 171 of the underfill guide structure 17 is not connected to the conductive pad, thereby producing a solder with a rounded upper portion.

[0195] The thickness T4 of the underfill guide structure 17 is greater than the thickness T2 of the second circuit structure 2 in the direction perpendicular to the surface 31. The thickness T4 may be greater than the gap between the first circuit structure 3 and the second circuit structure 2. The thickness T4 may be greater than the thickness T3 of the first connection element 16 in the direction perpendicular to the surface 31. The thickness T3 of the first connection element 16 is greater than the thickness T2 of the second circuit structure 2. The underfill guide structure 17 may include a solder 171 and a conductive pillar 172 connected to the solder 171. The solder 171 is farther away from the carrier (or substrate) 10 than the conductive pillar 172. The solder 171 may have a surface 1711 connected to the conductive pillar 172 and a rounded surface 1712 opposite to the surface 1711 and exposed by the first underfill 7. The conductive pillar 172 is closer to the first circuit structure 3 than the solder 171. The conductive pillar 172 may have a curved side (or first sidewall) 1721. The curved side 1721 of the conductive pillar 172 may be concave, ie, the width of the middle portion of the conductive pillar 172 is smaller than the width of the bottom / upper portion of the conductive pillar 172 .

[0196] The underfill guide structure 17 may include a first portion 173 and a second portion 174 disposed between the solder 171 and the conductive pillar 172. The underfill guide structure 17 may include a pillar including a first metal (e.g., the conductive pillar 172) and a second metal (e.g., the first portion 173) disposed on the first metal. The side of the first metal is recessed from the side of the second metal. The first portion 173 may be disposed on the conductive pillar 172 and may include a first metal such as nickel. The second portion 174 may be disposed on the first portion 173 and may include a second metal such as SnAg alloy. The conductive pillar 172 may include a third metal such as copper. The solder 171 may include a fourth metal such as Sn. The width of the first portion 173 is greater than the width of the conductive pillar 172.

[0197] The underfill guide structure 17 may be configured to reduce the extension of the portion 7a of the underfill along the side 203 of the circuit structure 2. The underfill guide structure 17 may be configured to increase the contact area between the portion 7a and the surface 31 of the circuit structure 3. The first underfill 7 may be in contact with the underfill guide structure 17. The first underfill 7 may extend beyond the underfill guide structure 17 in a direction substantially parallel to the surface 31 of the first circuit structure 3. The underfill guide structure 17 is configured to expand the contact area between the first underfill 7 and the first circuit structure 3. The underfill guide structure 17 is configured to increase or promote the horizontal distribution (or horizontal extension) of the first underfill 7 on the surface 31 of the first circuit structure 3 and inhibit the vertical distribution (or vertical extension) of the first underfill 7 on the side 203 of the second circuit structure 2.

[0198] The portion (or first portion) 7a of the first bottom filler 7 may be disposed outside the projection area B1 of the second circuit structure 2 on the surface 31 of the first circuit structure 3. In the cross section, the first length of the portion 7a along the surface 31 of the first circuit structure 3 is greater than the second length of the portion 7a in contact with the side 203 of the second circuit structure 2. The portion 7a of the first bottom filler 7 may include a first inner portion and a first outer portion separated from the first inner portion by the bottom filler guide structure 17. The curvature of the surface of the first inner portion may be discontinuous with the curvature of the surface of the first outer portion. The first inner portion is disposed between the second circuit structure 2 and the bottom filler guide structure 17. In the cross-sectional view, the length of the contact surface between the first outer portion and the first circuit structure 3 is greater than the second length of the portion 7a in contact with the side 203 of the second circuit structure 2.

[0199] In some embodiments, portion 7 a of underfill 7 may have a top portion disposed between surface 201 and surface 202 of second circuit structure 2 .

[0200] In some embodiments, in the cross section, the bottom filler guide structure 17 has a second side wall 1722 opposite to the first side wall 1721. In the cross section, the first contact length of the bottom filler 7 at the first side wall 1721 is different from the second contact length of the bottom filler 13 at the second side wall 1722. The first contact length may be greater than the second contact length. In some embodiments, the first height of the first contact surface between the first portion and the protrusion 17 (e.g., the first contact length) is greater than the second height of the second contact surface between the second portion 13a2 and the protrusion 17 (e.g., the second contact length).

[0201] The portion (or second portion) 7b of the first bottom filler 7 may be disposed outside the projection area B1 of the second circuit structure 2 on the surface 31 of the first circuit structure 3. The portion 7b is opposite to the portion 7a relative to the second circuit structure 2. In the cross section, the first length of the portion 7b along the surface 31 of the first circuit structure 3 is greater than the second length of the portion 7b in contact with the side 203 of the second circuit structure 2. The portion 7b of the first bottom filler 7 may include a second inner portion and a second outer portion separated from the second inner portion by the bottom filler guide structure 17. The curvature of the surface of the second inner portion may be discontinuous with the curvature of the surface of the second outer portion. The second inner portion is disposed between the second circuit structure 2 and the bottom filler guide structure 17. In the cross-sectional view, the length of the contact surface between the second outer portion and the first circuit structure 3 is greater than the second length of the portion 7b in contact with the side 203 of the second circuit structure 2.

[0202] In some embodiments, portion 7 b of underfill 7 may have a top portion disposed between surface 201 and surface 202 of second circuit structure 2 .

[0203] The portion 7a and the portion 7b of the bottom filler 7 may be asymmetrical. For example, the highest points of the portions 7a and 7b may be at different elevations relative to the surface 31 of the first circuit structure 3. The length of the first portion 7a along the surface 31 of the first circuit structure 3 is different from the length of the second portion 7b along the surface 31 of the first circuit structure 3. The curvature of the surface 71 of the portion 7a is different from the curvature of the surface 72 of the portion 7b.

[0204] The underfill guide structure 17 may include one or more protrusions 17 (used with the same reference numerals for simplicity). The protrusions 17 may be disposed above the surface 31 of the first circuit structure 3. The protrusions 17 may be spaced apart from the second circuit structure 2. The first underfill 7 may contact the protrusions 17. The first underfill 7 may define a first concave portion 7a that is outside the projection area B1 of the second circuit structure 2 on the surface 31 of the first circuit structure 3. The first concave portion 7a is recessed from the space between the top portion of the protrusion 17 (e.g., solder 171) and the top portion of the second circuit structure 2. In some embodiments, the first concave portion 7a opens toward the space between the top portion of the protrusion 17 and the top portion of the second circuit structure 2. In some embodiments, the first concave portion 7a may be substantially open upward. The outer surface 71 of the first concave portion 7a is recessed toward the space between the top portion of the protrusion 17 and the top edge (e.g., side 203) of the second circuit structure 2. In some embodiments, the outer surface 71 of the first concave portion 7a is recessed upward. In some embodiments, the central axis of the first concave portion 7 a extends through a space between a top portion of the protrusion 17 and a top edge of the second circuit structure 2 .

[0205] In some embodiments, the highest point of the first concave portion 7 a contacting the side surface 203 of the second circuit structure 2 is at an elevation between the surface 202 of the second circuit structure 2 and the surface 201 of the second circuit structure 2 .

[0206] In the present disclosure, the package structure 600A includes an underfill guide structure 17 disposed outside the projection area B1 of the second circuit structure 2 on the surface 31 of the first circuit structure 3. The underfill guide structure 17 is configured to increase or promote the horizontal distribution (or horizontal extension) of the underfill 7 on the surface 31 of the first circuit structure 3 and suppress the vertical distribution (or vertical extension) of the underfill 7 on the side 203 of the second circuit structure 2. The underfill guide structure 17 can guide the underfill having a relatively small volume to the edge (defined by an imaginary line aligned with the side 203 and below the side) of the second circuit structure 2 by a capillary effect. The underfill guide structure 17 ensures that a portion 7a of the underfill 7 remains outside the projection area B1. The underfill guide structure 17 changes the distribution of the underfill 7 to support or fix the thin circuit structure 2 during the carrier removal process, thereby achieving an arrangement of the thin circuit structure 2 (thickness T2) and the relatively thick (or taller) connecting element 16 (thickness T3).

[0207] In addition, the elevation of the highest point where the portions 7a and 7b contact the side 203 of the second circuit structure 2 may be between the upper surface 201 and the lower surface 202 of the second circuit structure 2. Therefore, the underfill 7 having a relatively large volume, which would hinder the carrier removal process if the guide structure is not present, does not reach the side of the temporary carrier. The underfill guide structure 17 makes the process window wider because a slightly higher volume of the underfill 7 can be dispensed without overflowing the underfill toward the temporary carrier. The underfill guide structure 17 can hold the underfill 7 in the presence of excessive fillets, which may compromise the carrier removal process. The underfill guide structure 17 ensures good underfill support for the flip chip bonding process.

[0208] Figure 6B A cross-sectional view illustrating a package structure 600B according to some embodiments of the present disclosure. Figure 6B The package structure 600B is similar to Fig. 6A Therefore, some detailed descriptions may refer to the corresponding preceding paragraphs and will not be repeated below for the sake of brevity, and the differences therebetween are as follows.

[0209] The underfill 7 of the package structure 600B defines a first concave portion 7c1 outside the projection area B1. The first concave portion 13c1 is recessed from a space between a top portion of the underfill guide structure 17 (or solder 171) on the right side and a top portion of the second circuit structure 2. The underfill 7 may further define a first recessed portion 7r1 opposite to the first concave portion 17c1 relative to the underfill guide structure 17. The curvature of the surface of the first recessed portion 7r1 is different from the curvature of the surface of the first concave portion 7c1.

[0210] The bottom filler 7 of the package structure 600B defines a second concave portion 7c2 outside the projection area B1. The second concave portion 7c2 is recessed from the space between the top portion of the bottom filler guide structure 17 (or solder 171) on the left side and the top portion of the second circuit structure 2. The curvature of the surface of the second concave portion 7c2 is different from the curvature of the surface of the first concave portion 7c1. The opening direction of the first concave portion 7c1 is different from the opening direction of the second concave portion 7c2.

[0211] Unless otherwise specified, spatial descriptions such as "above", "below", "up", "left", "right", "lower", "top", "bottom", "vertical", "horizontal", "side", "above", "below", "upper", "above", "below", etc. are indicated relative to the orientation shown in the figure. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and that embodiments of the structures described herein may be spatially arranged in any orientation or manner, provided that the advantages of the embodiments of the present disclosure are not deviated by such arrangements.

[0212] As used herein, the terms "approximately," "substantially," "generally," "about," and "about" are used to describe and explain minor variations. When used in conjunction with an event or circumstance, these terms may refer to instances where the event or circumstance occurred exactly as well as instances where the event or circumstance occurred very approximately. For example, when used in conjunction with a numerical value, these terms may refer to a range of variation of less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, if a first value is within a variation range of less than or equal to ±10% of a second value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the first value can be considered to be "substantially" the same as or equal to the second value.

[0213] Two surfaces may be considered coplanar or substantially coplanar if the displacement between them is no greater than 5 μm, no greater than 2 μm, no greater than 1 μm, or no greater than 0.5 μm.

[0214] As used herein, the singular forms "a," "an," and "the" may include plural or plural referents unless the context clearly indicates otherwise.

[0215] As used herein, the terms "conductive," "electrically conductive," and "conductivity" refer to the ability to carry an electric current. Conductive materials are materials that present little or no resistance to the flow of electric current. One unit of measurement for conductivity is Siemens per meter (S / m). Typically, a conductive material is one that has a conductivity greater than about 10 4 S / m, for example at least 10 5 S / m or at least 10 6 S / m of a material. The conductivity of a material sometimes varies with temperature. Unless otherwise specified, the conductivity of a material is measured at room temperature.

[0216] In addition, amounts, ratios and other numerical values ​​are sometimes presented herein in a range format. It should be understood that such a range format is used for the sake of convenience and brevity, and should be flexibly construed to include not only the values ​​explicitly specified as the limits of the range, but also all individual values ​​or sub-ranges encompassed within the range, as if each value and sub-range were explicitly specified.

[0217] Although the present disclosure has been described and illustrated with reference to the specific embodiments of the present disclosure, these descriptions and illustrations are not restrictive. It should be understood by those skilled in the art that various changes may be made and equivalents may be replaced without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not necessarily be drawn to scale. Due to manufacturing processes and tolerances, there may be differences between the process reproduction in the present disclosure and the actual equipment. There may be other embodiments that are not specifically described in the present disclosure. The description and drawings should be regarded as illustrative rather than restrictive. Modifications may be made to make specific situations, materials, material compositions, methods or processes suitable for the goals, spirit and scope of the present disclosure. All such modifications are deemed to be included within the scope of the appended claims. Although the disclosed method has been described herein with reference to specific operations performed in a specific order, it should be understood that these operations may be combined, subdivided or reordered to form equivalent methods without departing from the teachings of the present disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations are not limitations of the present disclosure.

Claims

1. A packaging structure, comprising: substrate; an electronic device disposed above the substrate; an underfill surrounded by the substrate and the electronic device; as well as An underfill guiding structure is disposed outside a vertical projection of the electronic device and horizontally overlaps a gap between the substrate and the electronic device, and is configured to reduce extension of a portion of the underfill outside the vertical projection along a side of the electronic device. 2 . The package structure of claim 1 , wherein the underfill guide structure is configured to increase a horizontal extension of the portion of the underfill. 3 . The package structure according to claim 1 , wherein the underfill guiding structure comprises a first protrusion surrounded by the underfill.

4. The packaging structure according to claim 3, wherein the portion of the bottom filler includes a first portion contacting the first protrusion and a second portion contacting the first protrusion, and wherein the first portion is closer to the gap than the second portion, and a thickness of the first portion is greater than a thickness of the second portion. 5 . The package structure according to claim 4 , wherein the first protrusion comprises a first pillar disposed on the substrate, and a width of the substrate is greater than a width of the electronic device. 6 . The package structure according to claim 5 , wherein the first pillar comprises a first metal and a second metal disposed on the first metal, and a side surface of the first metal is recessed from a side surface of the second metal. 7 . The package structure according to claim 5 , wherein the electronic device comprises a pad electrically connected to the substrate, and a height of the first protrusion is greater than a thickness of the pad. 8 . The package structure of claim 3 , wherein the underfill guide structure further comprises a second protrusion, and a height of the first protrusion is different from a height of the second protrusion. 9 . The package structure according to claim 4 , wherein in a cross section, a first height of a first contact surface between the first portion and the first protrusion is greater than a second height of a second contact surface between the second portion and the first protrusion. 10 . The package structure of claim 1 , further comprising a plurality of connection elements electrically connecting the electronic device to the substrate, wherein the underfill guide structure and the connection elements are formed in a same process. The package structure according to claim 3 , wherein a thickness of the first protrusion is greater than a thickness of the electronic device.

12. A packaging structure, comprising: a substrate having a first surface; an electronic device disposed over the first surface of the substrate; an underfill surrounded by the substrate and the electronic device; as well as An underfill guiding structure is disposed on the first surface of the substrate and outside a vertical projection of the electronic device and is configured to increase a contact area between a portion of the underfill outside the vertical projection and the first surface of the substrate. 13 . The package structure of claim 12 , wherein the underfill guide structure comprises a pillar, and a top surface of the portion of the underfill defines a recess extending between the electronic device and the pillar. The package structure according to claim 13 , wherein an elevation of the top surface of the portion is lower than an elevation of a top surface of the electronic device. 15 . The package structure of claim 13 , wherein a thickness of a first portion of the portion of the underfill is greater than a height of a gap between the substrate and the electronic device.

16. The packaging structure according to claim 12 further comprises a plurality of connecting elements disposed above the substrate and configured to electrically connect the substrate and the electronic device, wherein the bottom filler guiding structure comprises a plurality of pillars, wherein in a top view, the connecting elements have a first pitch, the pillars have a second pitch, and the first pitch is different from the second pitch. 17 . The package structure of claim 16 , wherein in a top view, a diameter of one of the pillars is larger than a diameter of one of the connecting elements.

18. A packaging structure, comprising: a first substrate having a first top surface; a second substrate disposed over the first top surface of the first substrate and having a second bottom surface facing the first top surface of the first substrate, wherein the first top surface of the first substrate and the second bottom surface of the second substrate collectively define a gap of non-uniform height; a bottom filler surrounded by the first substrate and the second substrate; as well as A first protrusion is disposed outside the gap and horizontally overlaps the gap and is configured to provide a guide surface to increase the flow of the underfill. 19 . The package structure of claim 18 , further comprising a second protrusion disposed outside the gap and horizontally overlapping the gap, wherein the underfill extends between the first protrusion and the second protrusion. 20 . The package structure of claim 18 , further comprising a plurality of connection elements electrically connecting the first substrate and the second substrate, wherein the second substrate comprises a plurality of pads, wherein one of the pads is misaligned with a corresponding one of the connection elements.

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