Non-resistance welding windowing control type FC bonding pad processing method and circuit substrate

Abstract

The invention discloses a non-resistance welding windowing control type FC bonding pad processing method and a circuit substrate. The processing method comprises the following steps: providing an operation board with a circuit pattern; a solder resist pattern is formed on the operation board, the solder resist pattern does not cover a preset area on the circuit pattern, and the preset area comprises an FC bonding pad forming area; coating an anti-plating photosensitive film on the working plate, exposing and developing so as to process and form a photosensitive film pattern of which the film width is greater than or equal to 5 microns and the film distance is greater than or equal to 25 microns on the preset area; the FC bonding pad forming area is exposed out of the photosensitive film pattern; performing gold plating operation on the operation plate so as to process and form an FC bonding pad with the diameter being greater than or equal to 40 microns on the FC bonding pad forming area; and then removing the film and coarsening the exposed part of the circuit pattern to finish the processing and manufacturing of the FC bonding pad. The processing method is simple and flexible, the FC bonding pads of various sizes can be manufactured, the FC bonding pads of small sizes can also be manufactured, and the market requirements of chips are met.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a non-solder resist window-controlled FC pad processing method and a circuit substrate. Background Art

[0002] The traditional circuit board processing technology generally includes: cutting → drilling → copper plating → electroplating → circuit making → solder mask → pre-electroplating circuit → surface treatment → film stripping →...

[0003] However, in the traditional circuit board processing technology, since the size of the FC pad is controlled by solder mask opening, the following problems will occur: ① In order to ensure that the height difference between the FC pad and the solder mask ink layer is less than 5μm, the requirements for solder mask and electroplating operations are extremely high, such as: the thickness uniformity of the solder mask ink layer and the electroplating gold layer is required to be extremely high, and the solder mask ink thickness is required to be less than 15μm, etc.; not only is the processing difficult, but also because the solder mask ink thickness is less than 15μm, it is very easy to cause false copper exposure and short circuit, which seriously affects the yield of circuit board products. ② Based on the existing solder mask opening technology, it is impossible to realize the production of small-sized FC pads, that is, it cannot meet the needs of the chip market well.

[0004] In view of this, the present invention is proposed. Summary of the invention

[0005] In order to overcome the above-mentioned defects, the present invention provides a non-solder mask window controlled FC pad processing method and a circuit substrate. The processing method is simple and flexible, and can not only realize the production of FC pads of various sizes, but also realize the production of small-sized FC pads, so that the obtained circuit substrate can well meet the chip market demand.

[0006] The technical solution adopted by the present invention to solve the technical problem is: a non-solder mask window control type FC pad processing method, comprising:

[0007] Provide a work sheet with line graphics;

[0008] Processing and forming a solder resist pattern on the operation board according to the operation data, wherein the solder resist pattern does not cover a preset area on the circuit pattern, and the preset area includes an FC pad forming area;

[0009] The working board is sequentially coated with a photosensitive film, exposed and developed to form a photosensitive film pattern with a film width of ≥5 μm and a film distance of ≥25 μm on the preset area; and the FC pad forming area is exposed outside the photosensitive film pattern;

[0010] The working board is subjected to electro-gold plating to form an FC pad with a diameter of ≥40 μm on the FC pad forming area; then the film is stripped and the exposed part of the circuit pattern is roughened to complete the processing and production of the FC pad.

[0011] As a further improvement of the present invention, a photosensitive wet film with a thickness of 38 to 42 μm is coated on the surface of the working board and the surface of the solder mask pattern by wet film printing technology, and then the photosensitive wet film is exposed and developed to form the photosensitive film pattern; wherein the specific processing parameters of the above exposure operation are: using a 21-grid exposure ruler, the number of exposure grids is 7 to 9 grids, and the exposure energy is 120 to 200 mJ / cm 2 , the exposure alignment accuracy is controlled within 30μm; the specific processing parameters of the above-mentioned development operation are: the development window accuracy is controlled within ±30μm, the development point is controlled at 35%~45%, and the development line speed is controlled at 60~120m / min.

[0012] As a further improvement of the present invention, after the photosensitive film pattern is produced, the photosensitive film pattern needs to be subjected to a thermal curing treatment and / or a UV light curing treatment.

[0013] As a further improvement of the present invention, the specific processing parameters used in the above-mentioned electroplating gold operation are: current of 0.1-0.3A, electroplating time of 90-120min, nickel plating layer thickness of 3-15μm, and gold plating layer thickness ≥0.1μm.

[0014] As a further improvement of the present invention, the photosensitive film pattern is removed by using a NaOH solution with a temperature of 50±5° C. and a concentration of 4% to 6%.

[0015] As a further improvement of the present invention, the surface roughness of the roughened circuit pattern Ra≥0.3 μm.

[0016] As a further improvement of the present invention, there is a distance between the peripheral edge of the FC pad molding area and the edge of the preset area.

[0017] As a further improvement of the present invention, the thickness of the solder resist pattern after curing is 15-25 μm.

[0018] The present invention also provides a circuit substrate, comprising an insulating base layer, a circuit pattern arranged on two opposite sides of the insulating base layer and connected to each other, a solder resist pattern covering a part of the surface of the circuit pattern, and an FC pad plated on a preset position of the circuit pattern, wherein the FC pad is manufactured using the non-solder resist window controlled FC pad processing method as described in the present invention.

[0019] As a further improvement of the present invention, the thickness of the solder resist pattern is 15-25 μm, and the diameter of the FC pad is ≥40 μm.

[0020] The beneficial effects of the present invention are as follows: ① When making the FC pad, the size of the FC pad is controlled by the photosensitive film pattern, rather than by the solder mask opening in the prior art. Therefore, the FC pad processing method provided by the present application is simpler and more flexible, and can not only realize the production of FC pads of various sizes, but also realize the production of small-sized FC pads (such as 40μm), which well meets the use requirements of the chip market. ② Because the present application is not affected by the constraints of the solder mask ink layer when making the FC pad, the thickness of the solder mask ink layer in the present application can be designed to be thicker, such as: the thickness of the solder mask pattern after curing is 15 to 25μm; thereby effectively avoiding the undesirable phenomena such as false copper exposure and short circuit caused by the thin thickness of the solder mask ink layer in the prior art, and effectively ensuring the yield of the circuit board product. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a flow chart of the non-solder mask window controlled FC pad processing method described in Example 1 of the present invention;

[0022] Figure 2 is a schematic cross-sectional structural diagram of the work plate described in Example 1 of the present invention;

[0023] Figure 3 is a schematic cross-sectional structural diagram of a first intermediate plate obtained after the solder resist operation is completed on the operation plate in Example 1 of the present invention;

[0024] Figure 4 It is a schematic cross-sectional structure diagram of a second intermediate plate obtained after the photosensitive film pattern is fabricated on the first intermediate plate obtained in Example 1 of the present invention;

[0025] Figure 5 It is a schematic cross-sectional structure diagram of a third intermediate plate obtained after the second intermediate plate obtained in Example 1 of the present invention is subjected to electro-gold plating;

[0026] Figure 6 It is a schematic cross-sectional structure diagram of the third intermediate plate obtained after the film stripping operation is completed in Example 1 of the present invention;

[0027] Figure 7 It is a schematic diagram of the cross-sectional structure of the circuit substrate obtained after the third intermediate plate obtained in Example 1 of the present invention has been roughened.

[0028] Combined with the accompanying drawings, the following description is given:

[0029] 1. Work board; 10. Circuit pattern; 100. FC pad forming area; 11. Insulation base layer; 2. Solder mask pattern; 3. Photosensitive film pattern; 4. FC pad; DETAILED DESCRIPTION

[0030] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0031] Embodiment 1:

[0032] Please see attached Figures 1 to 7 As shown, this embodiment 1 provides a non-solder mask window control type FC pad processing method, which mainly includes the following processing steps:

[0033] S1: A work plate 1 with a circuit pattern 10 is provided.

[0034] Specifically, regarding the processing method and specific structure of the work plate 1, this embodiment 1 does not impose any restrictions, and it can be determined according to product design requirements. An example is given below as an explanation.

[0035] The processing method of the work board 1 is: provide a double-sided copper-clad laminate, and perform drilling, copper plating, lamination pretreatment, plating resist photosensitive film, exposure, development, electroplating and film removal on the double-sided copper-clad laminate in sequence to obtain the work board 1. It can be understood that the specific structure of the work board 1 is as follows: Please refer to the attached Figure 2 As shown, the working board 1 includes an insulating base layer 11 and two groups of circuit patterns 10 which are respectively arranged on two opposite sides of the insulating base layer 11 and are connected.

[0036] Note: The above-mentioned "drilling, copper plating, ..., electroplating and film stripping" processes are all common technical means in the field of circuit board processing technology, so they will not be described in detail here.

[0037] S2: Form solder resist patterns 2 on the opposite sides of the work board 1 according to the work data. Figure 3 As shown, the solder resist pattern 2 does not cover the preset area on the circuit pattern 10 , and the preset area includes the FC pad forming area 100 .

[0038] Specifically, in this embodiment 1, when performing solder mask / solder resist operation, an ink dry film may be used as a solder mask medium, or an ink wet film may be used as a solder mask medium. When an ink dry film is used as a solder mask medium, the ink dry film may be pasted on a designated position on the surface of the working board 1 through a vacuum lamination process to form the solder mask pattern 2; and when an ink wet film is used as a solder mask medium, the ink wet film may be printed on a designated position on the surface of the working board 1 through a screen printing process to form the solder mask pattern 2.

[0039] In addition, after the solder resist pattern 2 is formed, the preset area on the circuit pattern 10 including the FC pad forming area 100 is not covered by the solder resist pattern 2; and, in order to better promote the FC pad forming, the present embodiment 1 also makes the following technical optimization: there is a gap between the peripheral edge of the FC pad forming area 100 and the edge of the preset area, that is, the peripheral edge of the FC pad forming area 100 does not overlap with the edge of the preset area, and the peripheral edge of the FC pad forming area 100 does not contact the solder resist pattern 2 (see the attached Figure 4 As shown), so as to avoid the solder resist pattern 2 affecting the production of the FC pad.

[0040] In addition, after forming the solder resist pattern 2, the present embodiment 1 also needs to perform a thermal curing treatment and / or a UV light curing treatment on the solder resist pattern 2 to cure the solder resist pattern 2, so as to facilitate the subsequent process. Furthermore, the present embodiment 1 preferably adopts a UV light curing treatment with a light curing rate of ≥85% on the solder resist pattern 2, and the thickness of the cured solder resist pattern 2 is 15 to 25 μm, which can effectively avoid the undesirable phenomena such as false copper exposure and short circuit caused by the thin thickness of the solder resist pattern in the prior art, and effectively ensure the yield of the circuit board product.

[0041] Note: To facilitate the description of subsequent processes, the present embodiment 1 also defines the board obtained after the solder mask / solder resist operation is completed on the work board 1 as the first intermediate board (its specific structure can be found in the attached Figure 3 shown).

[0042] S3: The working board 1 is sequentially coated with a photosensitive film, exposed and developed to form a photosensitive film pattern 3 with a film width ≥5μm and a film distance ≥25μm on the preset area; and the FC pad forming area 100 is exposed outside the photosensitive film pattern 3.

[0043] Specifically, based on the above definition of the first intermediate plate, the specific processing steps of S3 are:

[0044] S31: Print a plating-resistant photosensitive wet film with a thickness of 38 to 42 μm (preferably 40 μm) on a surface of the first intermediate plate and having the preset area by wet film printing technology (i.e., screen printing technology); it is understandable that if a surface of the working board 1 and having the preset area is defined as the front side, then the front side of the working board 1 and the surface of the solder mask pattern 2 arranged on the front side of the working board 1 are both covered by the plating-resistant photosensitive wet film.

[0045] S32: Expose and develop the resist photosensitive wet film to form the photosensitive film pattern 3 in the preset area. Figure 4The specific processing parameters of the above exposure operation are optimized as follows: a 21-grid exposure ruler is used, the number of exposure grids is 7 to 9 grids, and the exposure energy is 120 to 200 mJ / cm 2 , the exposure alignment accuracy is controlled within 30μm; the specific processing parameters of the above-mentioned development operation are optimized as follows: the development window accuracy is controlled within ±30μm, the development point is controlled at 35%~45%, and the development line speed is controlled at 60~120m / min.

[0046] Based on the above preferred exposure and development processing parameters, this embodiment 1 can produce the photosensitive film pattern 3 with a film width ≥5μm and a film distance ≥25μm, with high precision, which provides a very good technical guarantee for the subsequent accurate production of FC pads.

[0047] Furthermore, after the photosensitive film pattern 3 is made, the present embodiment 1 further needs to perform a heat curing treatment and / or a UV light curing treatment on the photosensitive film pattern 3 to cure the photosensitive film pattern 3, so as to facilitate the subsequent electroplating gold operation. Furthermore, the present embodiment 1 preferably uses a heat curing treatment with a heat curing rate of ≥95% on the photosensitive film pattern 3.

[0048] Note: To facilitate the description of subsequent processes, in this embodiment 1, the board obtained after the photosensitive film pattern is formed on the first intermediate board is defined as the second intermediate board (its specific structure can be found in the attached Figure 4 shown).

[0049] S4: performing electro-gold plating on the working board 1 to form an FC pad 4 with a diameter of ≥40 μm on the FC pad forming area 100; then stripping the film and roughening the exposed part of the circuit pattern 10 to complete the processing of the FC pad 4.

[0050] Specifically, based on the above definition of the second intermediate plate, the specific processing steps of S4 are:

[0051] S41: The FC pad forming area 100 on the second intermediate plate is subjected to gold plating. The gold plating operation essentially includes two processing steps of nickel plating and gold plating. It is a conventional technical means in the field of circuit board processing technology, so it will not be described in detail here; but in order to improve the uniformity of the nickel plating layer and the gold plating layer (that is, to improve the uniformity of the FC pad 4), the specific processing parameters of the gold plating operation are optimized in this embodiment 1 as follows: the current is 0.1~0.3A, the electroplating time is 90~120min, the nickel plating layer thickness is 3~15μm, and the gold plating layer thickness is ≥0.1μm.

[0052] Based on the above preferred electroplating gold processing parameters, the present embodiment 1 can produce the FC pad 4 with a diameter of ≥40 μm on the FC pad forming area 100. For details, please refer to the attached Figure 5 shown.

[0053] It can be understood that in this embodiment 1, the size of the FC pad 4 is controlled by the photosensitive film pattern 3. Compared with the prior art of controlling the size of the FC pad by opening a solder resist window, the operation of this embodiment is simpler and more flexible, and is not constrained by the solder resist ink layer. Therefore, this embodiment can not only realize the production of FC pads of various sizes, but also realize the production of small-sized FC pads (such as 40μm), which well meets the usage requirements of the chip market.

[0054] Note: To facilitate the description of subsequent processes, in this embodiment 1, the board obtained after the second intermediate board is plated with gold is defined as the third intermediate board (the specific structure of which can be found in the attached Figure 5 shown).

[0055] S42: After the third intermediate plate is obtained, in this embodiment 1, the photosensitive film pattern 3 on the third intermediate plate is removed using a NaOH solution with a temperature of 50±5°C and a concentration of 4% to 6%. Figure 6 shown.

[0056] S43: roughening the exposed portion of the circuit pattern 10 close to the FC pad 4, so that the surface roughness Ra of the exposed portion is greater than or equal to 0.3 μm. It is understandable that roughening the surface of the exposed portion of the circuit pattern 10 makes it easier to subsequently tin the surface of the FC pad 4.

[0057] S44: Perform surface treatment (i.e., tinning), appearance inspection, and electrical test on the FC pad 4 according to product design requirements, thus completing the processing and manufacturing of the FC pad 4 and obtaining a circuit substrate. For details, please refer to the attached Figure 7 shown.

[0058] From the above, it can be seen that ① when making FC pads in this application, the size of the FC pads is controlled by the photosensitive film pattern, rather than by the solder mask opening in the prior art. Therefore, the FC pad processing method provided by this application is simpler and more flexible, and can not only realize the production of FC pads of various sizes, but also realize the production of small-sized FC pads (such as 40μm), which well meets the use needs of the chip market. ② Because this application is not affected by the constraints of the solder mask ink layer when making FC pads, the thickness of the solder mask ink layer in this application can be designed to be thicker, such as: the thickness of the solder mask pattern after curing is 15 to 25μm; thereby effectively avoiding the false copper exposure, short circuit and other undesirable phenomena caused by the thin thickness of the solder mask ink layer in the prior art, and effectively ensuring the yield of the circuit board product.

[0059] Embodiment 2:

[0060] The second embodiment provides a circuit substrate, which includes an insulating base layer 11, a circuit pattern 10 arranged on two opposite sides of the insulating base layer 11 and connected to each other, a solder resist pattern 2 covering a part of the surface of the circuit pattern 10, and an FC pad 4 plated on a preset position of the circuit pattern 10, and the FC pad 4 is manufactured by the non-solder resist window control type FC pad processing method described in the first embodiment; for details, please refer to the attached Figure 7 shown.

[0061] Furthermore, the thickness of the solder resist pattern 2 is 15-25 μm; the diameter of the FC pad 4 is ≥40 μm.

[0062] As can be seen from the above, the thickness of the solder resist pattern 2 in the circuit substrate of the present embodiment 2 is relatively thick, and the size of the FC pad 4 is small, which satisfies the use requirements of the chip market very well.

[0063] Finally, the prefixes "first", "second", etc. in the component names in this application specification (such as the first middle plate, the second middle plate, etc.) are only for the convenience of description and are not used to limit the scope of implementation of the patent of this invention.

[0064] Many specific details are described in the above description to facilitate a full understanding of the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person familiar with the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A non-solder mask window controlled FC pad processing method, characterized in that: include: Providing a work board (1) with a circuit pattern (10); Processing and forming a solder resist pattern (2) on the operation board (1) according to the operation data, wherein the solder resist pattern (2) does not cover a preset area on the circuit pattern (10), and the preset area includes an FC pad forming area (100); The working board (1) is sequentially subjected to resist coating, exposure and development operations to form a photosensitive film pattern (3) with a film width of ≥5 μm and a film distance of ≥25 μm on the preset area; and the FC pad forming area (100) is exposed outside the photosensitive film pattern (3); The working board (1) is subjected to an electro-gold plating operation to form an FC pad (4) with a diameter of ≥40 μm on the FC pad forming area (100); then the film is stripped and the exposed portion of the circuit pattern (10) is roughened to complete the processing and production of the FC pad (4).

2. The non-solder mask window controlled FC pad processing method according to claim 1, characterized in that: A photosensitive wet film with a thickness of 38 to 42 μm is coated on the surface of the work board (1) and the surface of the solder mask pattern (2) by wet film printing technology, and then the photosensitive wet film with a thickness of 38 to 42 μm is exposed and developed to form the photosensitive film pattern (3); wherein the specific processing parameters of the above exposure operation are: using a 21-grid exposure ruler, the number of exposure grids is 7 to 9 grids, and the exposure energy is 120 to 200 mJ / cm 2 , the exposure alignment accuracy is controlled within 30μm; the specific processing parameters of the above-mentioned development operation are: the development window accuracy is controlled within ±30μm, the development point is controlled at 35%~45%, and the development line speed is controlled at 60~120m / min.

3. The non-solder mask window controlled FC pad processing method according to claim 2, characterized in that: After the photosensitive film pattern (3) is produced, the photosensitive film pattern (3) needs to be subjected to a thermal curing treatment and / or a UV light curing treatment.

4. The non-solder mask window controlled FC pad processing method according to claim 1, characterized in that: The specific processing parameters used in the above-mentioned electroplating gold operation are: current of 0.1-0.3A, electroplating time of 90-120min, nickel plating layer thickness of 3-15μm, and gold plating layer thickness ≥0.1μm.

5. The non-solder mask window controlled FC pad processing method according to claim 1, characterized in that: The photosensitive film pattern (3) is removed by using a NaOH solution with a temperature of 50±5° C. and a concentration of 4% to 6%.

6. The non-solder mask window controlled FC pad processing method according to claim 1, characterized in that: The surface roughness Ra of the roughened circuit pattern (10) is ≥ 0.3 μm.

7. The non-solder mask window controlled FC pad processing method according to claim 1, characterized in that: There is a distance between the peripheral edge of the FC pad forming area (100) and the edge of the preset area.

8. The non-solder mask window controlled FC pad processing method according to claim 1, characterized in that: The thickness of the solder resist pattern (2) after curing is 15 to 25 μm.

9. A circuit substrate, characterized in that: The invention comprises an insulating base layer (11), a circuit pattern (10) arranged on two opposite sides of the insulating base layer (11) and connected to each other, a solder resist pattern (2) covering a part of the surface of the circuit pattern (10), and an FC pad (4) plated at a preset position of the circuit pattern (10), wherein the FC pad (4) is manufactured by a non-solder resist window-controlled FC pad processing method as described in any one of claims 1 to 8.

10. The circuit substrate according to claim 9, characterized in that: The thickness of the solder resist pattern (2) is 15-25 μm, and the diameter of the FC pad (4) is ≥40 μm.

Images