Chip module, self-test method thereof and laser radar

Abstract

The invention discloses a chip module and a self-test method thereof, and a laser radar, the chip module comprises a system-on-chip and a cover plate, the system-on-chip comprises a substrate layer and a device layer which are stacked, one side, away from the substrate layer, of the device layer is provided with a first surface, the substrate layer comprises a second surface and a side surface, the second surface is the surface of the side, away from the device layer, of the substrate layer, the second surface is provided with a heat dissipation groove, the heat dissipation groove extends on the second surface and penetrates through the side face, the cover plate is arranged on the second surface and blocks an opening of the heat dissipation groove in the second surface, and the chip module further comprises a transmitting chip, a first receiving chip and a second receiving chip which are arranged on the first surface. According to the laser radar, heat is brought out of the chip module in the area away from the transmitting chip, the first receiving chip and the second receiving chip through the refrigerant in the heat dissipation groove, the transmitting chip, the first receiving chip and the second receiving chip are integrated into the same system-level chip, and the size of the laser radar is effectively reduced.

Description

Technical Field

[0001] The present application relates to the field of laser radar technology, and in particular to a chip module, a self-testing method thereof, and a laser radar. Background Art

[0002] In the fields of smart transportation and unmanned driving, the road, vehicle position and obstacle information can be sensed by sensor equipment to improve the quality and efficiency of road management, assist in the decision-making of unmanned vehicles, adjust the safe distance between unmanned vehicles, and ensure that vehicles can travel safely and reliably on the road. As one of the most important autonomous driving sensors, LiDAR can provide the decision-making system with the most important information about the location, size and movement of traffic participants in the fields of smart transportation and unmanned driving. As the most important device in LiDAR, the safety of LiDAR chip data collection and transmission is extremely important, and it is directly related to the life safety of the driver and passengers on the vehicle. Summary of the invention

[0003] In related technologies, the optical transceiver of laser radar can be used for data collection and transmission. The optical transceiver includes laser emitting chip, laser receiving chip and image sensor, etc. If these components in the optical transceiver can be integrated into the same chip, the size of the laser radar can be effectively reduced. However, due to problems such as heat dissipation, it is difficult to integrate these chips inside the laser radar.

[0004] The embodiments of the present application provide a chip module and a self-test method thereof, as well as a laser radar, aiming to improve the current situation in related technologies where it is difficult to integrate the chip inside the laser radar due to problems such as heat dissipation.

[0005] In a first aspect, the present application provides a chip module, the chip module comprising a system-level chip and a cover plate; The system-level chip comprises a substrate layer and a device layer stacked along the thickness direction of the system-level chip, the device layer has a first surface on a side away from the substrate layer, the substrate layer comprises a second surface and a side surface, the second surface is a surface of the substrate layer on a side away from the device layer, the side surface is connected to the second surface and is arranged around the second surface, the second surface is provided with a heat dissipation groove, the heat dissipation groove extends on the second surface and passes through the side surface; The cover plate is disposed on the second surface and blocks the opening of the heat dissipation slot on the second surface; The chip module also includes: a transmitting chip, disposed on the first surface and in communication connection with the system-level chip, the transmitting chip being used to generate a detection laser to detect a target object; and / or, A first receiving chip is disposed on the first surface and is in communication connection with the system-level chip, and the first receiving chip is used to receive the echo laser formed by the detection laser being reflected by the target object; and / or, The second receiving chip is disposed on the first surface and is communicatively connected with the system-level chip. The second receiving chip is used to acquire image information.

[0006] In some embodiments, the inner wall surface of the heat dissipation slot is an insulating surface.

[0007] In some embodiments, the system-on-chip satisfies at least one of the following conditions: The substrate layer comprises a silicon substrate and a first insulating material layer, the surface of the silicon substrate facing away from the device layer is the second surface, the second surface is provided with a through groove penetrating the side surface, and the inner wall surface of the through groove is provided with the first insulating material layer to form the heat dissipation groove; or, The substrate layer includes a first material layer and a second material layer, the first material layer is a silicon layer, the device layer is arranged on the surface of the first material layer, the second material layer is a silicon dioxide layer, the second material layer is arranged on the side of the first material layer away from the device layer, the surface of the second material layer away from the first material layer is the second surface, and the second material layer is provided with the heat dissipation groove on the second surface.

[0008] In some embodiments, the cover plate has a third surface fixed to the second surface, and the third surface is an insulating surface.

[0009] In some embodiments, the cover plate satisfies at least one of the following conditions: The cover plate comprises a cover plate substrate and a second insulating material layer provided on the cover plate substrate, and a surface of the second insulating material layer away from the cover plate substrate is the third surface; or, The cover plate is a silicon dioxide cover plate.

[0010] In some embodiments, the chip module includes the transmitting chip and the first receiving chip; Observed along the thickness direction, at least one of the heat dissipation slots passes through the transmitting chip, and at least one of the heat dissipation slots passes through the first receiving chip; and / or, When viewed along the thickness direction, at least one of the heat dissipation slots passes through both the transmitting chip and the first receiving chip.

[0011] In some embodiments, the chip module includes the transmitting chip, the first receiving chip and the second receiving chip; Along a first preset direction, the first receiving chip and the second receiving chip are disposed on two sides of the transmitting chip.

[0012] In some embodiments, the substrate layer is provided with at least two heat dissipation slots, and the at least two heat dissipation slots include a first heat dissipation slot and a second heat dissipation slot; The first heat dissipation slot includes a first part, a second part and a third part. When viewed along the thickness direction, one end of the first part is located at the side surface, and the other end extends to intersect with the first receiving chip, or extends to between the first receiving chip and the transmitting chip; one end of the second part is connected to the first part, and the other end extends to intersect with the transmitting chip, or extends to between the first receiving chip and the transmitting chip; one end of the third part is connected to the second part, and the other end extends to the side surface; and The second heat dissipation slot includes a fourth part, a fifth part and a sixth part. When observed along the thickness direction: one end of the fourth part is located on the side, and the other end extends to intersect with the second receiving chip, or extends to between the second receiving chip and the transmitting chip; one end of the fifth part is connected to the fourth part, and the other end extends to intersect with the transmitting chip, or extends to between the second receiving chip and the transmitting chip; one end of the sixth part is connected to the fifth part, and the other end extends to the side.

[0013] In some embodiments, the substrate layer is provided with at least three heat dissipation slots, and the at least three heat dissipation slots include a third heat dissipation slot, a fourth heat dissipation slot, and a fifth heat dissipation slot; Observed along the thickness direction: the third heat dissipation slot passes through the transmitting chip, the fourth heat dissipation slot passes through the first receiving chip, and the fifth heat dissipation slot passes through the second receiving chip.

[0014] In some embodiments, the side surface of the substrate layer includes a first side surface and a second side surface, the first side surface and the second side surface are arranged opposite to each other along a second preset direction, and the first preset direction, the second preset direction and the thickness direction of the system-level chip are perpendicular to each other; The inlet of the heat dissipation slot is arranged on the first side surface, and the outlet of the heat dissipation slot is arranged on the second side surface.

[0015] In some embodiments, the chip module further includes a chip junction temperature sensor, the chip junction temperature sensor is disposed in the device layer, and the chip junction temperature sensor is used to sense the temperature of at least one of the system-level chip, the transmitting chip, the first receiving chip, and the first receiving chip; The device layer includes an integrated circuit, and the integrated circuit is electrically connected to the chip junction temperature sensor.

[0016] In a second aspect, the present application provides a laser radar, comprising a shell and a chip module as described above, wherein the shell defines a receiving cavity, and the chip module is disposed in the receiving cavity of the shell.

[0017] In some embodiments, the laser radar further includes: a refrigerant pump, one end of which is connected to one end of the heat sink; and a radiator, one end of the radiator being connected to the other end of the heat dissipation tank, and the other end of the radiator being connected to the other end of the refrigerant pump; The refrigerant pump is used to drive the refrigerant to circulate between the refrigerant pump, the heat dissipation tank and the radiator, and the heat dissipation device is used to cool the refrigerant entering the inside thereof.

[0018] In a third aspect, the present application provides a self-test method for a chip module, which is applied to the chip module as described above, wherein the chip module includes the system-level chip, the first receiving chip and the second receiving chip, and the method includes: Outputting a first preset excitation signal to enable the transmitting chip to emit a detection laser toward a first preset scene; Receiving first excitation data outputted by the first receiving chip, wherein the first excitation data is data obtained by the first receiving chip receiving the echo laser and performing photoelectric conversion; Determining whether the transmitting chip, the first receiving chip, and the system-on-chip communicate normally according to a comparison result between the first excitation data and the pre-stored first expected data, wherein the first expected data is point cloud data obtained based on the first preset scenario; Receiving second excitation data outputted by the second receiving chip, wherein the second excitation data is excitation data pre-stored in the second receiving chip; According to the comparison result between the second excitation data and the second expected data, it is determined whether the second receiving chip communicates normally with the system-level chip, wherein the second excitation data and the second expected data are respectively image data obtained based on the same second preset scene.

[0019] In a fourth aspect, the present application provides a chip module self-test method, which is applied to the chip module as described above, wherein the chip module includes the system-level chip, the transmitting chip, the first receiving chip and the second receiving chip, and the method includes: Receiving third excitation data outputted by the first receiving chip, wherein the third excitation data is point cloud data pre-stored in the first receiving chip and obtained based on a third preset scene; receiving fourth excitation data outputted by the second receiving chip, wherein the fourth excitation data is image data pre-stored in the second receiving chip and obtained based on a third preset scene; fusing the third excitation data with the fourth excitation data to obtain fused data; According to the comparison result of the fused data and the third expected data, it is determined whether the first receiving chip, the second receiving chip and the system-level chip communicate normally.

[0020] Based on the chip module and its self-test method and laser radar of the embodiments of the present application, a heat dissipation groove is opened on the surface of the substrate layer away from the device layer. The heat generated by the transmitting chip, the first receiving chip and the second receiving chip, as well as the heat transferred to the device layer and the substrate layer can be transmitted to the refrigerant in the heat dissipation groove, and the chip module is brought out of the area away from the transmitting chip, the first receiving chip and the second receiving chip through the refrigerant, thereby effectively reducing the heat of the entire chip module, thereby realizing the integration of the transmitting chip, the first receiving chip and the second receiving chip into the same system-level chip. When the chip module is applied to the laser radar, the volume of the laser radar can be effectively reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 This is a schematic side view of the structure of a chip module according to an embodiment of the present application; Figure 2 A schematic diagram of a top view of a chip module according to an embodiment of the present application; Figure 3 This is a schematic side view of the structure of a chip module according to another embodiment of the present application; Figure 4 This is a schematic diagram of a top view of a first heat dissipation slot passing through a first receiving chip according to an embodiment of the present application; Figure 5 This is a schematic diagram of a top view of the structure of an embodiment of the present application in which the first heat dissipation slot does not pass through the first receiving chip; Figure 6 This is a schematic diagram of a top view of a first heat dissipation slot passing through a first receiving chip in another embodiment of the present application; Figure 7 This is a schematic diagram of a top view of a second heat dissipation slot passing through a second receiving chip according to an embodiment of the present application; Figure 8 This is a schematic diagram of a top view of the structure in which the second heat dissipation slot does not pass through the second receiving chip according to an embodiment of the present application; Fig. 9 This is a schematic diagram of a top view of the structure in which a substrate layer has a third heat dissipation slot, a fourth heat dissipation slot and a fifth heat dissipation slot in an embodiment of the present application; Fig.10 A block diagram of an integrated circuit according to an embodiment of the present application; Fig.11 This is a structural schematic diagram of an embodiment of the present application in which a refrigerant pump and a radiator are respectively connected to a heat dissipation tank.

[0023] Reference numerals: 10. Chip module; 100, system-level chip; 110, device layer; 111, first surface; 120, substrate layer; 121, second surface; 122, side; 1221, first side; 1222, second side; 123, heat sink; 123a, first heat sink; 123b, second heat sink; 123c, third heat sink; 123d, fourth heat sink; 123e, fifth heat sink; 1231, first part; 1232, second part; 1233, third part; 1234, fourth part; 1235, fifth part; 1236, sixth part; 124, first insulating material layer; 1201, first material layer; 1202, second material layer; 130, cover plate; 131, second insulating material layer; 200, transmitting chip; 300, first receiving chip; 400, second receiving chip; 500, refrigerant pump; 600, radiator; X, thickness direction; A, first preset direction; B, second preset direction. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0025] The inventors found that the system-on-chip (SOC) of the laser radar, also known as the system on chip, is the core component of the laser radar, which is responsible for the collection, processing and transmission of all laser radar information. Especially in the vehicle-mounted system, the system-on-chip of the laser radar assumes the important object sensing function. Therefore, it is feasible to integrate the laser transmitting chip of the laser radar, the laser receiving chip that receives the laser, and the light receiving devices such as the image sensor into the same system-level chip, and it can also effectively reduce the size of the laser radar. However, since some chips in the laser radar have high power consumption and some chips have low power consumption, the chip with higher power consumption will have thermal interference with the chip with lower power consumption. For example, the power consumption of the laser transmitting chip and the laser receiving chip is high. If the laser transmitting chip, the laser receiving chip and the light receiving devices such as the image sensor are to be integrated into the same system-level chip, due to the close distance, the heat generated by the laser transmitting chip and the laser receiving chip will affect each other's work and will also affect the normal use of the image sensor. Based on this, the embodiments of the present application provide a chip module and its self-test method as well as a laser radar, which can integrate multiple chips including a laser emission chip into the same system-level chip, while also solving the problem of thermal interference of devices with high heat generation on other devices.

[0026] like Figure 1 and Figure 2 As shown, it is a schematic diagram of the structure of a chip module 10 according to an embodiment of the present application, wherein the chip module 10 includes a system-level chip 100, wherein the system-level chip 100 includes a device layer 110 and a substrate layer 120 stacked along a thickness direction X of the system-level chip 100; wherein the substrate layer 120 is a base of the system-level chip 100, the device layer 110 is stacked on the surface of the substrate layer 120, and an integrated circuit for collecting, processing and transmitting information is provided inside the device layer 110.

[0027] The device layer 110 has a first surface 111 on the side facing away from the substrate layer 120. The substrate layer 120 includes a second surface 121 and a side surface 122. The second surface 121 is the surface of the substrate layer 120 on the side facing away from the device layer 110. The side surface 122 is connected to the second surface 121 and is arranged around the second surface 121. The second surface 121 is provided with a heat dissipation groove 123. The chip module 10 also includes a cover plate 130, which is arranged on the second surface 121 and blocks the opening of the heat dissipation groove 123 on the second surface 121. A coolant can be passed into the heat dissipation groove 123, and the coolant can receive the heat entering the substrate layer 120 to cool the substrate layer 120 and the structure arranged on the substrate layer 120. The heat dissipation slot 123 extends from the second surface 121 and passes through the side surface 122 , so that the coolant can enter and exit the heat dissipation slot 123 from the opening of the heat dissipation slot 123 located on the side surface 122 , and then the coolant can flow in the heat dissipation slot 123 to promptly take away the heat of the substrate layer 120 and cool down the entire chip module 10 .

[0028] The chip module 10 also includes at least one of a transmitting chip 200, a first receiving chip 300 and a second receiving chip 400. The transmitting chip 200, the first receiving chip 300 and the second receiving chip 400 can all be arranged on the first surface 111 of the device layer 110. The transmitting chip 200 is used to generate a detection laser to detect a target object, the first receiving chip 300 is used to receive an echo laser formed by the detection laser being reflected by the target object, and the second receiving chip 400 is used to obtain image information.

[0029] Exemplarily, the transmitting chip 200 adopts a vertical-cavity surface-emitting laser (Vertical-Cavity Surface-Emitting Laser, VSCEL) array chip, the first receiving chip 300 adopts a single-photon avalanche diode (Single Photon Avalanche Diode, SPAD) array chip, and the second receiving chip 400 adopts a CMOS image sensor (CMOS Image Sensor, CIS).

[0030] When the transmitting chip 200, the first receiving chip 300 or the second receiving chip 400 is disposed on the first surface 111 of the device layer 110, they are respectively connected to the system-on-chip 100 for communication. Exemplarily, the integrated circuit has a transmitting pin, a first receiving pin and a second receiving pin extending to the first surface 111, the transmitting chip 200 is electrically connected to the transmitting pin, the first receiving chip 300 is electrically connected to the first receiving pin, and the second receiving chip 400 is electrically connected to the second receiving pin, so that each chip disposed on the first surface 111 is connected to the system-on-chip 100 for communication.

[0031] It is understandable that the transmitting chip 200, the first receiving chip 300 or the second receiving chip 400 is arranged on the first surface 111 of the device layer 110, which facilitates the smooth transmission and reception of light. As a result, it is not convenient to set a heat dissipation structure in the area adjacent to the first surface 111, resulting in heat dissipation difficulties. In the embodiment of the present application, by opening a heat dissipation groove 123 on the surface of the substrate layer 120 away from the device layer 110, whether it is the heat generated by the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400, or the heat transferred to the device layer 110 and the substrate layer 120, it can be transmitted to the refrigerant in the heat dissipation groove 123, and the heat is transferred to the area away from the first surface 111, and is taken out of the chip module 10 through the refrigerant, effectively reducing the heat of the entire chip module 10, making it possible to integrate the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400 into the same system-level chip 100. Furthermore, when the transmitting chip 200 , the first receiving chip 300 and the second receiving chip 400 are working, the heat dissipation slot 123 is connected to the outside, so that the cooling medium can enter and exit the heat dissipation slot 123 , thereby taking away the heat in time and dissipating the heat efficiently.

[0032] The device layer 110 includes a semiconductor material, and the integrated circuit is disposed in the semiconductor material layer of the device layer 110. The embodiment of the present application does not limit the type of semiconductor material of the device layer 110, and any semiconductor material that can be used for the system-level chip 100 in the art is applicable to the present application. For example, the semiconductor material of the device layer 110 may include silicon, silicon nitride, etc.

[0033] In the embodiments of the present application, there is no limitation on the type of refrigerant, and any refrigerant that can be used in the art is applicable to the present application. For example, the refrigerant may be a liquid medium or a gaseous medium, or the refrigerant may be a phase change material.

[0034] When the refrigerant is introduced into the heat dissipation groove 123 of the substrate layer 120, if the substrate layer 120 also includes semiconductor materials, the refrigerant is in direct contact with the semiconductor materials of the substrate layer 120, and there may be an abnormal situation in which the refrigerant and the substrate layer 120 are electrically conductive. Based on this, the inner wall surface of the heat dissipation groove 123 is set as an insulating surface to prevent the refrigerant from directly contacting the semiconductor materials of the substrate layer 120. At the same time, it can also prevent the refrigerant from corroding the semiconductor materials of the substrate layer 120.

[0035] In some embodiments, Figure 1As shown, the substrate layer 120 includes a silicon substrate and a first insulating material layer 124. The device layer 110 is provided on one surface of the silicon substrate, and the surface of the silicon substrate away from the device layer 110 is the second surface 121; the second surface 121 is provided with a through groove penetrating the side surface 122, and the inner wall surface of the through groove is provided with a first insulating material layer 124 to form the heat dissipation groove 123, so that the inner wall surface of the heat dissipation groove 123 has an insulating property. For example, in some embodiments, a groove can be first etched on the second surface 121 of the silicon substrate, and then the first insulating material layer 124 can be sprayed on the surface of the groove; or, a groove can be directly etched on the second surface 121 of the silicon substrate by etching, and the silicon material on the surface of the groove is oxidized to obtain a silicon dioxide layer, that is, the first insulating material layer 124; or, a groove can be first etched on the second surface 121 of the silicon substrate, an insulating material is filled in the groove, and then the insulating material in the groove is etched to form the first insulating material layer 124.

[0036] In some embodiments, Figure 3 As shown, the substrate layer 120 includes a first material layer 1201 and a second material layer 1202; wherein the first material layer 1201 is a silicon layer, the device layer 110 is disposed on the surface of the first material layer 1201, and the second material layer 1202 is a silicon dioxide layer, and the second material layer 1202 is disposed on a side of the first material layer 1201 away from the device layer 110. The surface of the second material layer 1202 away from the first material layer 1201 is the above-mentioned second surface 121, and the second material layer 1202 is provided with the above-mentioned heat dissipation groove 123 on the second surface 121; since the silicon dioxide layer itself has insulating properties, the inner wall surface of the heat dissipation groove 123 directly formed on the second material layer 1202 has insulating properties.

[0037] In some embodiments, the cover plate 130 has a third surface fixed to the second surface 121, and the cover plate 130 can be bonded and fixed to the second surface 121 of the substrate layer 120 by filling an adhesive material between the second surface 121 and the third surface. The third surface covers the heat dissipation slot 123, so that the heat dissipation slot 123 has an opening only on the side, so the refrigerant can enter and exit the heat dissipation slot through the opening. It should be noted that the refrigerant enters the heat dissipation slot 123 and also contacts the third surface; preferably, the third surface is an insulating surface to prevent the refrigerant from being electrically conductive with the cover plate 130 and to prevent the refrigerant from corroding the cover plate 130. Optionally, the cover plate 130 is a silica cover plate, and the surface of the silica cover plate is the above-mentioned third surface. Optionally, the cover plate 130 includes a cover plate substrate and a second insulating material layer 131 disposed on the cover plate substrate; wherein the cover plate substrate can be made of a conductor or semiconductor material, the second insulating material layer 131 is disposed on the surface of the cover plate substrate and is disposed toward the substrate layer 120, and the second insulating material layer 131 is away from the surface of the cover plate substrate to form a third surface to avoid electrical conduction between the cover plate 130 and the refrigerant. For example, a silicon wafer with a first pre-thickness can be oxidized to a second preset thickness to obtain a silicon layer and a silicon dioxide layer that are stacked in a structure; wherein the second preset thickness is less than the first preset thickness, the silicon layer constitutes the cover plate substrate of the cover plate 130, and the silicon dioxide layer constitutes the second insulating material layer 131 of the cover plate 130. The embodiment of the present application does not limit the material of the second insulating material layer 131, and all insulating materials that can be used for the chip module 10 in the art are applicable to the present application. Exemplarily, the second insulating material layer 131 can be a silicon dioxide layer.

[0038] It is understandable that the transmitting chip 200 consumes a large amount of power when emitting the detection laser, and the transmitting chip 200 generates a large amount of heat. When the transmitting chip 200, the first receiving chip 300, and the second receiving chip 400 are arranged on the same surface of the device layer 110, the first receiving chip 300 and the second receiving chip 400 will be very easily disturbed by the heat generated by the transmitting chip 200, especially when the second receiving chip 400 is collecting image information, the effect of the image information collected by the second receiving chip 400 will be affected by the thermal interference. Therefore, it is necessary to take away the heat generated by the transmitting chip 200 in time. At the same time, it should be noted that in order to prevent the heat of the refrigerant in the heat dissipation slot 123 from being brought to the first receiving chip 300 and the second receiving chip 400 again, the embodiment of the present application can further improve the heat dissipation slot 123 based on this.

[0039] In some embodiments, a heat dissipation slot 123 is provided on the second surface 121 of the substrate layer 120, and when observed along the thickness direction X of the system-level chip 100, the heat dissipation slot 123 at least passes through the chip that generates heat, so as to take away the heat of the chip in time. Optionally, the chip module 10 includes a transmitting chip 200 and a first receiving chip 300, and when observed along the thickness direction X of the system-level chip 100, the heat dissipation slot 123 passes through the transmitting chip 200 and is spaced from the first receiving chip 300, or the heat dissipation slot 123 passes through the first receiving chip 300 and the transmitting chip 200 in sequence. For another example, the chip module 10 includes a transmitting chip 200 and a second receiving chip 400, and when observed along the thickness direction X of the system-level chip 100, the heat dissipation slot 123 passes through the transmitting chip 200 and is spaced from the second receiving chip 400, or the heat dissipation slot 123 passes through the second receiving chip 400 and the transmitting chip 200 in sequence. For another example, the chip module 10 includes a transmitting chip 200, a first receiving chip 300 and a second receiving chip 400. When observed along the thickness direction X of the system-level chip 100, the heat dissipation slot 123 passes through the first receiving chip 300 and the transmitting chip 200 in sequence, or the heat dissipation slot 123 passes through the second receiving chip 400 and the transmitting chip 200 in sequence.

[0040] It is understandable that the larger the area covered by the heat dissipation slot 123, the larger the amount of refrigerant filled in the heat dissipation slot 123, and the corresponding heat exchange area is also larger, which can dissipate heat more efficiently. In some embodiments, the second surface 121 of the substrate layer 120 is provided with a plurality of heat dissipation slots 123, so that the plurality of heat dissipation slots 123 can cover more areas in the thickness direction X of the system-level chip 100, thereby improving the heat dissipation efficiency.

[0041] In some embodiments, the chip module 10 includes two of the transmitting chip 200, the first receiving chip 300, and the second receiving chip 400, and the second surface 121 of the substrate layer 120 is provided with at least two heat dissipation slots 123. For each heat dissipation slot 123, when observed along the thickness direction of the system-level chip 100, the heat dissipation slot 123 may not pass through any chip, may pass through one chip, or may pass through multiple chips in sequence. For example, in some embodiments, the chip module 10 includes a transmitting chip 200 and a first receiving chip 300; based on this, the above-mentioned heat dissipation slots 123 can be configured as follows: when observed along the thickness direction X of the system-level chip 100, one heat dissipation slot 123 passes through the transmitting chip 200, and another heat dissipation slot 123 passes through the first receiving chip 300; or, the number of the heat dissipation slots 123 is more than two, and when observed along the thickness direction of the system-level chip 100, one heat dissipation slot 123 passes through the transmitting chip 200, another heat dissipation slot 123 passes through the first receiving chip 300, and the remaining heat dissipation slots 123 are arranged in parallel with any one of the above-mentioned two heat dissipation slots; or, at least one heat dissipation slot 123 passes through the first receiving chip 300 and the transmitting chip 200 in sequence, and the extension direction of the remaining heat dissipation slots 123 is parallel to the main extension direction (the extension direction of the longest part) of the former. When the chip module 10 includes a transmitting chip 200 and a second receiving chip 400, similarly, the chip module 10 can include a transmitting chip 200 and a first receiving chip 300, and the positions of the plurality of heat dissipation slots 123 relative to the transmitting chip 200 and the second receiving chip 400 can be set, which will not be elaborated here.

[0042] In some embodiments, the chip module 10 includes a transmitting chip 200, a first receiving chip 300 and a second receiving chip 400. Along a first preset direction A, the first receiving chip 300 and the second receiving chip 400 are disposed on both sides of the transmitting chip 200. It should be noted that the "first preset direction A" described in the present application document is perpendicular to the thickness direction X of the system-level chip 100. For example, in this embodiment, the first preset direction A is Figure 2 The long side direction of the first surface 111 of the system-on-chip 100 is shown; of course, in other embodiments of the present application, the first preset direction A may also be any other direction parallel to the first surface 111, such as Figure 2The wide side direction of the first surface 111 shown in the figure, etc. Compared with the first receiving chip 300 and the second receiving chip 400, the heat generated by the transmitting chip 200 is generally higher. After the refrigerant in the heat dissipation slot 123 receives the heat of the transmitting chip 200, if it continues to pass through the first receiving chip 300 and the second receiving chip 400, the heat of the transmitting chip 200 may be transferred to the first receiving chip 300 or the second receiving chip 400, resulting in thermal interference. By arranging the transmitting chip 200 between the first receiving chip 300 and the second receiving chip 400, it is convenient to set the shape of the heat dissipation slot 123, so that the refrigerant in the heat dissipation slot 123 no longer passes through the first receiving chip 300 and the second receiving chip 400 after passing through the transmitting chip 200, preventing the refrigerant from bringing the heat of the transmitting chip 200 to the first receiving chip 300 or the second receiving chip 400, and the refrigerant flow path is smooth, which is convenient for efficiently taking away the heat.

[0043] When the chip module 10 includes the transmitting chip 200 , the first receiving chip 300 and the second receiving chip 400 , the second surface 121 of the substrate layer 120 is provided with at least two heat dissipation slots 123 , and the at least two heat dissipation slots 123 include a first heat dissipation slot 123 a and a second heat dissipation slot 123 b .

[0044] like Figure 4 , Figure 5 and Figure 6 As shown, specifically, the first heat dissipation slot 123a includes a first part 1231, a second part 1232 and a third part 1233, and when observed along the thickness direction X of the system-level chip 100: one end of the first part 1231 is located on the side 122, and the other end extends to intersect with the first receiving chip 300, or extends to between the first receiving chip 300 and the transmitting chip 200; one end of the second part 1232 is connected to the first part 1231, and the other end extends to intersect with the transmitting chip 200, or extends to between the first receiving chip 300 and the transmitting chip 200; one end of the third part 1233 is connected to the second part 1232, and the other end extends to the side 122. The refrigerant can enter from the first portion 1231 of the first heat dissipation slot 123a, and after passing through the second portion 1232, flow out from the third portion 1233; when observed along the thickness direction X of the system-level chip 100, the refrigerant in the first heat dissipation slot 123a can successively pass through the transmitting chip 200 (below or near) and the first receiving chip 300 (below or near), so that the refrigerant in the first heat dissipation slot 123a can take away the heat at the transmitting chip 200 and the first receiving chip 300.

[0045] like Figure 6 , Figure 7 and Figure 8As shown, specifically, the second heat dissipation slot 123b includes a fourth part 1234, a fifth part 1235 and a sixth part 1236, and when observed along the thickness direction X: one end of the fourth part 1234 is located on the side 122, and the other end extends to intersect with the second receiving chip 400, or extends to between the second receiving chip 400 and the transmitting chip 200, one end of the fifth part 1235 is connected to the fourth part 1234, and the other end extends to intersect with the transmitting chip 200, or extends to between the second receiving chip 400 and the transmitting chip 200, and one end of the sixth part 1236 is connected to the fifth part 1235, and the other end extends to the side 122. The refrigerant can enter from the fourth portion 1234 of the second heat dissipation slot 123b, and after passing through the fifth portion 1235, flow out from the sixth portion 1236; when observed along the thickness direction X of the system-level chip 100, the refrigerant in the second heat dissipation slot 123b can successively pass through the second receiving chip 400 (below or near) and the transmitting chip 200 (below or near), so that the refrigerant in the second heat dissipation slot 123b can take away the heat from the transmitting chip 200 and the second receiving chip 400.

[0046] Among them, when the second surface 121 of the substrate layer 120 is provided with a first heat dissipation groove 123a and a second heat dissipation groove 123b, the refrigerant in the first heat dissipation groove 123a and the second heat dissipation groove 123b flows out of the substrate layer 120 after passing through the transmitting chip 200 or passing near the transmitting chip 200, thereby preventing the refrigerant from bringing heat to the first receiving chip 300 or the second receiving chip 400.

[0047] In some other embodiments, when the second surface 121 of the substrate layer 120 is provided with a first heat dissipation groove 123a and a second heat dissipation groove 123b, the second surface 121 of the substrate layer 120 may also be provided with other heat dissipation grooves 123, and when observed along the above-mentioned thickness direction X, these heat dissipation grooves 123 are respectively spaced apart from the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400, or pass through one of the first receiving chip 300 and the second receiving chip 400 to increase the heat exchange area and improve the heat dissipation efficiency.

[0048] In other embodiments, when the chip module 10 includes a transmitting chip 200, a first receiving chip 300 and a second receiving chip 400, the substrate layer 120 is provided with at least three heat dissipation slots 123, and the at least three heat dissipation slots 123 include a third heat dissipation slot 123c, a fourth heat dissipation slot 123d and a fifth heat dissipation slot 123e. Fig. 9As shown, observed along the thickness direction X: the third heat dissipation slot 123c passes through the transmitting chip 200, the fourth heat dissipation slot 123d passes through the first receiving chip 300, and the fifth heat dissipation slot 123e passes through the second receiving chip 400. The three heat dissipation slots 123 correspond to each other and take away the heat of the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400, thereby dissipating heat efficiently.

[0049] Similarly, when the second surface 121 of the substrate layer 120 is provided with a third heat dissipation groove 123c, a fourth heat dissipation groove 123d and a fifth heat dissipation groove 123e, the second surface 121 of the substrate layer 120 may also be provided with other heat dissipation grooves 123, and these heat dissipation grooves 123 are respectively spaced apart from the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400 in the thickness direction X of the system-level chip 100 to improve the heat dissipation efficiency.

[0050] It can be understood that the heat sink 123 has an inlet and an outlet. The heat contained in the refrigerant is low when passing through the inlet of the heat sink 123, and the heat contained in the refrigerant is high when passing through the outlet of the heat sink 123. When there are multiple heat sinks 123, in order to prevent the heat at the outlets and inlets of the multiple heat sinks 123 from flowing into each other, the outlets and inlets of the multiple heat sinks 123 need to be set in different areas. Figure 2 The side surface 122 of the substrate layer 120 includes a first side surface 1221 and a second side surface 1222. The first side surface 1221 and the second side surface 1222 are arranged relative to each other in the second preset direction B. The first preset direction A, the second preset direction B and the thickness direction X of the system-level chip 100 are perpendicular to each other. The inlet of the heat dissipation groove 123 is opened on the first side surface 1221, and the outlet of the heat dissipation groove 123 is opened on the second side surface 1222. That is, when there are multiple heat dissipation grooves 123, the inlets of the multiple heat dissipation grooves 123 are all opened on the first side surface 1221, and the outlets of the multiple heat dissipation grooves 123 are all opened on the second side surface 1222.

[0051] In some embodiments, the chip module 10 also includes a chip junction temperature sensor, which is arranged in the device layer 110 and is electrically connected to the integrated circuit. The chip junction temperature sensor is used to sense the temperature of the system-level chip 100, the transmitting chip 200, the first receiving chip 300 and at least one of the first receiving chip 300, and output a temperature signal. The integrated circuit receives the temperature signal and controls the flow state of the refrigerant in the heat sink 123 according to the temperature signal, and / or the heat dissipation efficiency of the refrigerant when dissipating heat.

[0052] like Fig.10 As shown, the integrated circuit includes a main control unit, a laser emission control unit, a time-division multiplexing CIS control unit, a first receiving interface, a second receiving interface, a coordinate fusion unit, a communication unit, a cache unit, a DMA unit and a control bus.

[0053] The main control unit is electrically connected to the time-division multiplexing CIS control unit and the laser emission control unit through the control bus. The main control unit is used to periodically output the first control signal and the second control signal alternately. The laser emission control unit is electrically connected to the emission chip 200. The laser emission control unit controls the emission chip 200 to start up to emit the detection laser based on the first control signal. The laser emission control unit is also used to control the emission chip 200 to shut down to stop emitting the detection laser when the first control signal is not received.

[0054] The first receiving chip 300 is electrically connected to the first receiving interface, and is used to receive the echo laser formed by the detection laser reflected by the target object, and photoelectrically convert the echo laser into a transceiver dot signal, and transmit the transceiver dot signal to the first receiving interface.

[0055] The time-division multiplexing CIS control unit is electrically connected to the second receiving chip 400. The time-division multiplexing CIS control unit controls the second receiving chip 400 to turn on based on the second control signal to obtain the target image, thereby obtaining image information. The second receiving chip 400 is electrically connected to the second receiving interface, and the second receiving chip 400 is used to transmit the image information to the second receiving interface. The time-division multiplexing CIS control unit is used to control the second receiving chip 400 to turn off to stop capturing the target image when the second control signal is not received.

[0056] The coordinate fusion unit is electrically connected to the first receiving interface through the control bus to receive the transceiver dotting signal; the coordinate fusion unit is electrically connected to the second receiving interface through the control bus to receive the image information. The main control unit is used to output the shadow elimination signal while outputting the second control signal. The coordinate fusion unit is electrically connected to the main control unit through the control bus to receive the shadow elimination signal. The coordinate fusion unit is used to perform coordinate unified fusion calculation on the transceiver dotting signal, the shadow elimination signal and the image information of the same period, and output the fusion data.

[0057] The cache unit is electrically connected to the coordinate fusion unit through a control bus, and the cache unit is used to cache the fusion data transmitted by the coordinate fusion unit.

[0058] The DMA unit is electrically connected to the cache unit and the communication unit through a control bus, and the DMA unit is used to carry the fused data cached by the cache unit and transmit the fused data to the communication unit. The communication unit includes at least one of an Ethernet controller and a Wifi controller.

[0059] In some embodiments, the integrated circuit further includes a refrigerant control unit, which is electrically connected to the chip junction temperature sensor to receive a temperature signal, and the refrigerant control unit is used to control the flow state of the refrigerant in the heat dissipation channel based on the temperature signal.

[0060] The embodiment of the present application also provides a laser radar, which includes a shell and the chip module 10 described in any of the above embodiments. The shell defines a receiving cavity, and the chip module 10 is arranged in the receiving cavity of the shell and installed on the shell. By adopting the chip module 10 as described above, the laser radar can effectively reduce the space occupied by these chips because the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400 are all integrated in the same system-level chip 100, thereby reducing the volume of the laser radar and facilitating the miniaturization design of the laser radar. In addition, during assembly, the system-level chip 100 integrated with the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400 is installed in the shell, and there is no need to adjust the positions of these chips, which effectively improves the assembly efficiency.

[0061] like Fig.11 As shown, the laser radar also includes a refrigerant pump 500 and a radiator 600, one end of the refrigerant pump 500 is connected to one end of the heat sink 123, one end of the radiator 600 is connected to the other end of the heat sink 123, and the other end of the radiator 600 is connected to the other end of the refrigerant pump 500; the refrigerant pump 500 is used to drive the refrigerant to circulate between the refrigerant pump 500, the heat sink 123 and the radiator 600, and the radiator 600 is used to cool the refrigerant entering the interior thereof, so that the refrigerant in the heat sink 123 is in a flowing state, so as to take away the heat of the chip module 10 in time. Among them, the radiator 600 can be a heat dissipation fin, which dissipates the heat in the refrigerant into the air through the heat dissipation fins; or, the radiator 600 may include a first channel and a second channel, the first channel is connected to the heat dissipation slot 123, and a heat exchange medium is passed into the second channel. The heat exchange medium in the second channel can actively absorb the heat of the refrigerant in the first channel, and the refrigerant in the first channel transfers the heat to the heat exchange medium in the second channel and then circulates back to the heat dissipation slot 123; or, the radiator 600 may include a third channel and a miniature fan, the third channel is adjacent to the path through which the refrigerant flows, and the fan is used to drive the gas in and out of the third channel to take away the heat carried by the refrigerant; in addition, the radiator 600 can also be a combination of more than one of the above-mentioned schemes.

[0062] The integrated circuit of the chip module 10 is in communication with the refrigerant pump 500, and the integrated circuit controls the operation state of the refrigerant pump 500 according to the temperature signal to adjust the flow rate and flow rate of the refrigerant in the heat sink 123, thereby adjusting the temperature of the chip module. Of course, the integrated circuit can also control the heat dissipation efficiency of the radiator 600 according to the above temperature signal, thereby adjusting the temperature of the system-level chip 100.

[0063] The embodiment of the present application further provides a self-test method of a chip module 10, the self-test method is applied to the chip module 10 as described above, the chip module 10 includes a system-level chip 100, a transmitting chip 200, a first receiving chip 300 and a second receiving chip 400, the self-test method includes: Step S110 , outputting a first preset excitation signal to enable the transmitting chip 200 to emit a detection laser toward a first preset scene.

[0064] Specifically, the system-level chip 100 transmits a first preset excitation signal to the transmitting chip 200 to stimulate the transmitting chip 200 to emit detection light and detect the first preset scene. The first preset scene may be a scene consisting of a plurality of target objects; for example, in some embodiments, the first preset scene may include a reflector, and for example, in other embodiments, the first preset scene may include a plurality of targets arranged according to a preset rule.

[0065] Step S120 , receiving first excitation data outputted by the first receiving chip 300 , wherein the first excitation data is data obtained by the first receiving chip 300 receiving the echo laser and performing photoelectric conversion.

[0066] Specifically, after the transmitting chip 200 transmits the detection light, the detection light will be reflected when detecting the first preset scene, thereby forming an echo light; the first receiving chip 300 receives the echo light and performs photoelectric conversion to obtain first excitation data, and transmits the first excitation data to the system-level chip 100.

[0067] Step S130 : determining whether the transmitting chip 200 , the first receiving chip 300 and the system-on-chip 100 communicate normally according to a comparison result between the first excitation data and the pre-stored first expected data.

[0068] The first expected data is pre-stored point cloud data obtained based on the above-mentioned first preset scene. For example, in some embodiments, the first preset scene can be detected by a receiving chip equipped with the same specifications as the first receiving chip 300 in the chip module 10 in the embodiment of the present application, thereby obtaining the corresponding point cloud data, and storing the point cloud data in the system-on-chip 100. Although the present method is executed during the test process of the chip module 10, the first excitation data can be regarded as the data information obtained by the first receiving chip 300 during the actual working process of the chip module 10, and the first expected data can be regarded as the data information that should be obtained during the theoretical working process of the chip module 10; therefore, after the system-on-chip 100 receives the first excitation data, the first excitation data can be compared with the first expected data. If the difference between the first excitation data and the first expected data is higher than the preset threshold, it can be explained that at least one of the transmitting chip 200 and the first receiving chip 300 is abnormal in communication with the system-on-chip 100.

[0069] Step S140 : receiving second excitation data outputted by the second receiving chip 400 , wherein the second excitation data is excitation data pre-stored in the second receiving chip 400 .

[0070] Among them, the second preset scene can be a scene composed of several target objects, which can be the same as or different from the above-mentioned first preset scene; for example, in some embodiments, the second preset scene can include a reflector, and for example, in other embodiments, the second preset scene can include several targets arranged according to preset rules.

[0071] The second excitation data is pre-stored image data obtained based on the second preset scene. For example, in some embodiments, the second preset scene can be detected by a receiving chip with the same specifications as the second receiving chip 400 in the chip module 10 in the embodiment of the present application, and the corresponding image data is obtained and stored in the second receiving chip 400.

[0072] When testing whether the second receiving chip 400 and the SoC 100 communicate normally, the second receiving chip 400 transmits the second excitation data to the SoC 100 so that the SoC 100 can determine whether the second receiving chip 400 communicates normally through the data.

[0073] Step S150 : determining whether the second receiving chip 400 and the system-on-chip 100 communicate normally according to the comparison result between the second excitation data and the second expected data.

[0074] The second expected data is pre-stored image data obtained based on the above-mentioned second preset scene. For example, in some embodiments, the second preset scene can be detected by a receiving chip equipped with the same specifications as the second receiving chip 400 in the chip module 10 in the embodiment of the present application, thereby obtaining corresponding image data, and storing the image data in the system-level chip 100. It should be noted that the second excitation data and the second expected data can be consistent data or different data; for example, in some embodiments, after the receiving chip with the same specifications as the second receiving chip 400 in the chip module 10 in the embodiment of the present application obtains the above-mentioned image data, the image data is further processed appropriately, such as filtering, and the obtained data is the second expected data.

[0075] Although the method is executed during the test of the chip module 10, the second stimulus data can be regarded as the data information obtained by the second receiving chip 400 during the actual operation of the chip module 10, and the second expected data can be regarded as the data information that should be obtained during the theoretical operation of the chip module 10; therefore, after the system-level chip 100 receives the second stimulus data, the second stimulus data can be compared with the second expected data. If the difference between the second stimulus data and the second expected data is higher than the preset threshold, it can be explained that the communication between the second receiving chip 400 and the system-level chip 100 is abnormal.

[0076] The self-test method of the chip module 10 of this embodiment first controls the transmitting chip 200 to emit a detection laser to trigger the first receiving chip 300 to output the first excitation data, and then completes the subsequent self-test steps.

[0077] The first expected data and the second expected data may also be data pre-stored in an external host computer. The first excitation data and the second excitation data are sequentially transmitted through the cache unit and the DMA unit, and then transmitted to the host computer through the communication unit. The first excitation data and the first expected data are compared with each other at the host computer, and the second excitation data and the second expected data are compared with each other. If the comparison results are consistent, it is determined that the transmitting chip 200, the first receiving chip 300 and the second receiving chip 400 communicate normally.

[0078] Based on the same inventive concept, the embodiment of the present application also provides another self-test method of the chip module 10, which is applied to the chip module 10 as described above. The self-test method includes: Step S210 : receiving third excitation data outputted by the first receiving chip 300 , wherein the third excitation data is point cloud data pre-stored in the first receiving chip 300 and obtained based on a third preset scenario.

[0079] Among them, the third preset scene can be a scene composed of several target objects, which can be the same as or different from the above-mentioned first / second preset scenes; for example, in some embodiments, the third preset scene can include a reflector, and for example, in other embodiments, the third preset scene can include several targets arranged according to preset rules.

[0080] The third excitation data is pre-stored point cloud data obtained based on the third preset scene. For example, in some embodiments, the third preset scene can be detected by a receiving chip with the same specifications as the first receiving chip 300 in the chip module 10 in the embodiment of the present application, and then the corresponding point cloud data is obtained and stored in the first receiving chip 300.

[0081] When testing whether the first receiving chip 300 and the SoC 100 communicate normally, the first receiving chip 300 transmits the third stimulus data to the SoC 100 so that the SoC 100 can determine whether the first receiving chip 300 communicates normally through the data.

[0082] Step S220 , receiving fourth excitation data outputted by the second receiving chip 400 , wherein the fourth excitation data is image data pre-stored in the second receiving chip 400 and obtained based on a third preset scene.

[0083] The fourth excitation data is pre-stored image data obtained based on the third preset scene. For example, in some embodiments, the third preset scene can be detected by a receiving chip with the same specifications as the second receiving chip 400 in the chip module 10 in the embodiment of the present application, thereby obtaining corresponding image data, and storing the image data in the second receiving chip 400.

[0084] When testing whether the second receiving chip 400 and the SoC 100 communicate normally, the second receiving chip 400 transmits the fourth stimulus data to the SoC 100 so that the SoC 100 can determine whether the second receiving chip 400 communicates normally through the data.

[0085] Step S230: Fusing the third excitation data with the second excitation data to obtain fused data.

[0086] Specifically, after receiving the third excitation data and the fourth excitation data, the system-on-chip 100 may fuse the two data to obtain fused data, and the fused data may include information of the third excitation data and the fourth excitation data.

[0087] Step S240 : Determine whether the first receiving chip 300 , the second receiving chip 400 and the system-on-chip 100 are communicating normally according to the comparison result between the fused data and the third expected data.

[0088] Among them, the third expected data is the fusion data of the point cloud data and the image data obtained based on the third preset scene. For example, in some embodiments, the third preset scene can be detected by a laser radar equipped with a receiving chip of the same specification as the first receiving chip 300 in the chip module 10 in the embodiment of the present application, and the corresponding point cloud data can be obtained; at the same time, the third preset scene can be detected by a camera equipped with a receiving chip of the same specification as the second receiving chip 400 in the chip module 10 in the embodiment of the present application, and the corresponding image data can be obtained; then, the above point cloud data and image data are fused through the host computer, such as the car domain control, to obtain the third expected data; then, the third expected data is stored in the system-level chip.

[0089] Although the method is executed during the test of the chip module 10, the above fusion data can be regarded as the fusion data obtained by the chip module 10 based on the first receiving chip 300 and the second receiving chip 400 during the actual working process, and the second expected data can be regarded as the fusion data that should be obtained during the theoretical working process of the chip module 10; therefore, after the system-level chip 100 receives the third stimulus data and the fourth stimulus data and fuses them, the above fusion data can be compared with the third expected data. If the difference between the fusion data and the third expected data is higher than the preset threshold, it can be explained that at least one of the first receiving chip 300 and the second receiving chip 400 and the system-level chip 100 has abnormal communication.

[0090] In the embodiment of the present application, the third expected data for reference is pre-stored in the system-on-chip 100, and fusion data is obtained based on the third excitation data and the fourth excitation data respectively output by the first receiving chip 300 and the second receiving chip 400. By comparing the difference between the fusion data and the third expected data, it can be determined whether the first receiving chip 300 and the second receiving chip 400 have abnormal communication with the system-on-chip 100.

[0091] The same or similar numbers in the drawings of this embodiment correspond to the same or similar parts; in the description of this application, it should be understood that if the terms "upper", "lower", "left", "right", etc. indicate an orientation or position relationship based on the orientation or position relationship shown in the drawings, it is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as a limitation on this patent. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0092] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A chip module, characterized in that: Including system-level chip and cover; The system-level chip comprises a substrate layer and a device layer stacked along the thickness direction of the system-level chip, the device layer has a first surface on a side away from the substrate layer, the substrate layer comprises a second surface and a side surface, the second surface is a surface of the substrate layer on a side away from the device layer, the side surface is connected to the second surface and is arranged around the second surface, the second surface is provided with a heat dissipation groove, the heat dissipation groove extends on the second surface and passes through the side surface; The cover plate is disposed on the second surface and blocks the opening of the heat dissipation slot on the second surface; The chip module also includes: A transmitting chip, disposed on the first surface and connected to the system-level chip for communication, the transmitting chip being used to generate a detection laser to detect a target object; and / or, A first receiving chip is disposed on the first surface and is in communication connection with the system-level chip, and the first receiving chip is used to receive the echo laser formed by the detection laser being reflected by the target object; and / or, The second receiving chip is disposed on the first surface and is communicatively connected with the system-level chip. The second receiving chip is used to acquire image information.

2. The chip module according to claim 1, characterized in that: The inner wall surface of the heat dissipation groove is an insulating surface.

3. The chip module according to claim 2, characterized in that: The system-on-chip satisfies at least one of the following conditions: The substrate layer comprises a silicon substrate and a first insulating material layer, the surface of the silicon substrate facing away from the device layer is the second surface, the second surface is provided with a through groove penetrating the side surface, and the inner wall surface of the through groove is provided with the first insulating material layer to form the heat dissipation groove; or, The substrate layer includes a first material layer and a second material layer, the first material layer is a silicon layer, the device layer is arranged on the surface of the first material layer, the second material layer is a silicon dioxide layer, the second material layer is arranged on the side of the first material layer away from the device layer, the surface of the second material layer away from the first material layer is the second surface, and the second material layer is provided with the heat dissipation groove on the second surface.

4. The chip module according to claim 1, characterized in that: The cover plate has a third surface fixed to the second surface, and the third surface is an insulating surface.

5. The chip module according to claim 4, characterized in that: The cover plate satisfies at least one of the following conditions: The cover plate comprises a cover plate substrate and a second insulating material layer provided on the cover plate substrate, and a surface of the second insulating material layer away from the cover plate substrate is the third surface; or, The cover plate is a silicon dioxide cover plate.

6. The chip module according to claim 1, characterized in that: The chip module includes the transmitting chip and the first receiving chip; Observed along the thickness direction, at least one of the heat dissipation slots passes through the transmitting chip, and at least one of the heat dissipation slots passes through the first receiving chip; and / or, When viewed along the thickness direction, at least one of the heat dissipation slots passes through both the transmitting chip and the first receiving chip.

7. The chip module according to claim 1, characterized in that: The chip module includes the transmitting chip, the first receiving chip and the second receiving chip; Along a first preset direction, the first receiving chip and the second receiving chip are disposed on two sides of the transmitting chip.

8. The chip module according to claim 7, characterized in that: The substrate layer is provided with at least two heat dissipation slots, and the at least two heat dissipation slots include a first heat dissipation slot and a second heat dissipation slot; The first heat dissipation slot includes a first part, a second part and a third part. When viewed along the thickness direction, one end of the first part is located at the side surface, and the other end extends to intersect with the first receiving chip, or extends to between the first receiving chip and the transmitting chip; one end of the second part is connected to the first part, and the other end extends to intersect with the transmitting chip, or extends to between the first receiving chip and the transmitting chip; one end of the third part is connected to the second part, and the other end extends to the side surface; as well as The second heat dissipation slot includes a fourth part, a fifth part and a sixth part. When observed along the thickness direction: one end of the fourth part is located on the side, and the other end extends to intersect with the second receiving chip, or extends to between the second receiving chip and the transmitting chip; one end of the fifth part is connected to the fourth part, and the other end extends to intersect with the transmitting chip, or extends to between the second receiving chip and the transmitting chip; one end of the sixth part is connected to the fifth part, and the other end extends to the side.

9. The chip module according to claim 7, characterized in that: The substrate layer is provided with at least three heat dissipation slots, wherein the at least three heat dissipation slots include a third heat dissipation slot, a fourth heat dissipation slot and a fifth heat dissipation slot; Observed along the thickness direction: the third heat dissipation slot passes through the transmitting chip, the fourth heat dissipation slot passes through the first receiving chip, and the fifth heat dissipation slot passes through the second receiving chip.

10. The chip module according to claim 7, characterized in that: The side surface of the substrate layer includes a first side surface and a second side surface, the first side surface and the second side surface are arranged opposite to each other along a second preset direction, and the first preset direction, the second preset direction and the thickness direction of the system-level chip are perpendicular to each other; The inlet of the heat dissipation slot is arranged on the first side surface, and the outlet of the heat dissipation slot is arranged on the second side surface.

11. The chip module according to claim 1, characterized in that: The chip module further includes a chip junction temperature sensor, which is disposed at the device layer and is used to sense the temperature of at least one of the system-level chip, the transmitting chip, the first receiving chip and the first receiving chip; The device layer includes an integrated circuit, and the integrated circuit is electrically connected to the chip junction temperature sensor.

12. A laser radar, characterized in that: include: A housing defines a receiving cavity; as well as The chip module according to any one of claims 1 to 11, wherein the chip module is arranged in the receiving cavity of the shell.

13. The laser radar according to claim 12, characterized in that: The laser radar further comprises: a refrigerant pump, one end of which is connected to one end of the heat sink; and a radiator, one end of the radiator being connected to the other end of the heat dissipation tank, and the other end of the radiator being connected to the other end of the refrigerant pump; The refrigerant pump is used to drive the refrigerant to circulate between the refrigerant pump, the heat dissipation tank and the radiator, and the heat dissipation device is used to cool the refrigerant entering the inside thereof.

14. A chip module self-test method, characterized in that: Applied to the chip module according to any one of claims 1 to 11, the chip module includes the system-level chip, the first receiving chip and the second receiving chip, and the method includes: Outputting a first preset excitation signal to enable the transmitting chip to emit a detection laser toward a first preset scene; Receiving first excitation data outputted by the first receiving chip, wherein the first excitation data is data obtained by the first receiving chip receiving the echo laser and performing photoelectric conversion; Determining whether the transmitting chip, the first receiving chip, and the system-on-chip communicate normally according to a comparison result between the first excitation data and the pre-stored first expected data, wherein the first expected data is point cloud data obtained based on the first preset scenario; Receiving second excitation data outputted by the second receiving chip, wherein the second excitation data is excitation data pre-stored in the second receiving chip; According to a comparison result between the second excitation data and the second expected data, it is determined whether the second receiving chip communicates normally with the system-level chip, wherein the second excitation data and the second expected data are respectively image data obtained based on the same second preset scene.

15. A chip module self-test method, characterized in that: Applied to the chip module according to any one of claims 1 to 11, the chip module includes the system-level chip, the transmitting chip, the first receiving chip and the second receiving chip, and the method includes: Receiving third excitation data outputted by the first receiving chip, wherein the third excitation data is point cloud data pre-stored in the first receiving chip and obtained based on a third preset scene; receiving fourth excitation data outputted by the second receiving chip, wherein the fourth excitation data is image data pre-stored in the second receiving chip and obtained based on a third preset scene; fusing the third excitation data with the fourth excitation data to obtain fused data; According to the comparison result of the fused data and the third expected data, it is determined whether the first receiving chip, the second receiving chip and the system-level chip communicate normally.

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