Low-cost LVDT excitation source generation circuit

Abstract

The invention discloses a low-cost LVDT excitation source generation circuit which comprises a control system, a level conversion circuit, a low-pass filter circuit, a high-pass filter circuit and a drive circuit which are sequentially connected in series. According to the low-cost LVDT excitation source generation circuit, stable excitation signals can be provided with low cost, meanwhile, the low-cost LVDT excitation source generation circuit has good performance and reliability, the amplitude and frequency of voltage design are met, the total harmonic distortion (THD) actual measurement index is only 0.15%, the performance is far beyond the normal design requirement by 3%, and the low-cost LVDT excitation source generation circuit is suitable for large-scale popularization and application. The problems that a traditional LVDT excitation source circuit is complex in structure, high in cost and the like are solved, the LVDT excitation source circuit can be applied to an LVDT sensor in the field of civil and commercial airplanes, and position information of a valve element of an electro-hydraulic servo valve is provided for a remote electronic control unit.

Description

Technical Field

[0001] The present invention relates to the field of various measurement systems of aircraft and spacecraft, and in particular to a low-cost LVDT excitation source generating circuit. Background Art

[0002] Linear Variable Differential Transformer (LVDT) is a linear displacement sensor, which mainly consists of an excitation coil and two fixed receiving coils. It uses the principle of electromagnetic induction and has the advantages of high precision, non-contact measurement, good linearity and stability. It is suitable for occasions that require precise displacement measurement.

[0003] The performance of traditional LVDT has high requirements on the quality of the excitation signal, and it has a complex structure and high cost, so it is not suitable for cost-sensitive applications. The digital processing method and device of the LVDT displacement sensor disclosed in patent CN201510849802.4 uses square waves as the excitation source of the LVDT. Through the inductive effect and low-pass filter characteristics of the LVDT sensor, the high-frequency components in the square wave will be filtered out, thereby forming an effective excitation response. Although the square wave as an excitation source simplifies the circuit design, it contains multiple frequency components and may affect the stability of some high-precision occasions, especially for applications that require precise frequency control. Patent CN202410833849.0 discloses an LVDT displacement sensor excitation generation and demodulation circuit, which feeds back and adjusts the excitation signal through a frequency calibration circuit to ensure that the excitation signal remains within the ±1% range of the LVDT operating frequency, and uses a threshold comparison method to extract the frequency of the excitation signal. The DSP control, frequency calibration circuit and multi-stage signal processing circuit design involved are relatively complex, which increases the complexity and cost of the system and is not suitable for cost-sensitive applications. Summary of the invention

[0004] In order to solve the above problems, the present invention provides a low-cost LVDT excitation source generation circuit, and the specific technical solution is as follows:

[0005] A low-cost LVDT excitation source generation circuit includes a control system, a level conversion circuit, a low-pass filter circuit, a high-pass filter circuit, and a drive circuit, wherein each circuit system is connected in series in sequence, wherein:

[0006] The control system adopts an FPGA main control chip to output PWM signals.

[0007] The level conversion circuit is used to ensure that the input signal can be correctly received and processed under different logic level standards; the level conversion circuit includes a 3.3V input power supply, a precision 5V input power supply, a level conversion chip SN74LVC1T45MDCKREP, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, and a resistor R1;

[0008] The level conversion circuit is connected to a control system whose main control chip is FPGA;

[0009] The capacitor C1 and the capacitor C2 are connected in parallel to form a parallel circuit; one end of the parallel circuit formed by the capacitor C1 and the capacitor C2 is grounded, and the other end is connected to a 3.3V input power supply;

[0010] The level conversion chip SN74LVC1T45MDCKREP has 6 ports, namely VCCA port, VCCB port, GND port, DIR port, A port, and B port; the VCCA port is connected to a 3.3V input power supply; the VCCB port is connected to a precision 5V input power supply; the GND port is grounded; the DIR port is connected to a resistor R1; the A port is connected to a control system for receiving a PWM input signal; the B port is connected to a low-pass filter circuit;

[0011] One end of the resistor R1 is connected to a 3.3V power supply, and the other end is connected to a level conversion chip SN74LVC1T45MDCKREPDIR port;

[0012] The capacitor C3 and the capacitor C4 are connected in parallel to form a parallel circuit; one end of the parallel circuit formed by the capacitor C3 and the capacitor C4 is grounded, and the other end is connected to the precision 5V circuit.

[0013] Preferably, the level conversion circuit adopts a precision 5V circuit to improve the accuracy of the 5V output level, ensure the system performance of the level conversion circuit, and thus improve the current driving capability.

[0014] The precision 5V circuit includes a 15V input power supply, a 5V input power supply, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a resistor R2, a power reference chip REF5050MDREP, and a chip TLE2037AMD;

[0015] One end of the capacitor C5 is grounded, and the other end is connected to the positive electrode of the 15V input power supply;

[0016] The VIN port of the power reference chip REF5050MDREP is connected to the 15V input power supply; the GND port of the power reference chip REF5050MDREP is grounded; the TRIM / NR port of the power reference chip REF5050MDREP is connected to the 5V input power supply, the capacitor C7, and the IN+ port of the chip TLE2037AMD;

[0017] One end of the capacitor C6 is connected to the TRIM / NR port of the power reference chip REF5050MDREP, and the other end is grounded; the VOUT port of the power reference chip REF5050MDREP is connected to the 5V input power supply;

[0018] One end of the capacitor C7 is grounded, and the other end is connected to the VOUT port of the power reference chip REF5050MDREP, the 5V input power supply, and the IN+ port of the chip TLE2037AMD;

[0019] The IN+ port of the chip TLE2037AMD is connected to the VOUT port of the power reference chip REF5050MDREP; the VCC- port of the chip TLE2037AMD is connected to the negative electrode of the 15V input power supply and the capacitor C8; the IN- port of the chip TLE2037AMD is connected to the resistor R2; the OUT port of the chip TLE2037AMD outputs a precision 5V power supply; the VCC+ port of the chip TLE2037AMD is connected to the positive electrode of the 15V input power supply;

[0020] One end of the capacitor C8 is grounded, and the other end is connected to the VCC- port of the chip TLE2037AMD and the negative electrode of the 15V input power supply;

[0021] One end of the resistor R2 is connected to the IN-port of the chip TLE2037AMD, and the other end is connected to the OUT port of the chip TLE2037AMD;

[0022] The capacitor C9 is connected in parallel with the resistor R2;

[0023] One end of the capacitor C10 is grounded, and the other end is connected to the positive electrode of the 15V input power supply.

[0024] The low-pass filter circuit adopts Butterworth type fourth-order Sallen-Key low-pass filtering, which is used to pass signals below a certain cut-off frequency and weaken or prevent signals above the frequency from passing, and includes capacitor C11, capacitor C12, capacitor C22, capacitor C23, resistor R3, resistor R4, resistor R13, resistor R14, operational amplifier OP1, operational amplifier OP2;

[0025] One end of the resistor R3 is connected to the B port of the level conversion chip SN74LVC1T45MDCKREP of the level conversion circuit, and the other end is connected to the resistor R4 and the capacitor C11;

[0026] The positive electrode of the operational amplifier OP1 is connected to the resistor R4, the negative electrode is connected to the capacitor C11, and the output end is connected to the resistor R13;

[0027] One end of the resistor R4 is connected to R3, and the other end is connected to the capacitor C12 and the positive electrode of the operational amplifier OP1;

[0028] One end of the capacitor C12 is grounded, and the other end is connected to the resistor R4 and the positive electrode of the operational amplifier OP1;

[0029] One end of the resistor R13 is connected to the output end of the operational amplifier OP1, and the other end is connected to the resistor R14 and the capacitor C22;

[0030] The positive electrode of the operational amplifier OP2 is connected to the resistor R14, the negative electrode is connected to the capacitor C22, and the output end is connected to the high-pass filter;

[0031] One end of the resistor R14 is connected to R13, and the other end is connected to the capacitor C23 and the positive electrode of the operational amplifier OP2;

[0032] One end of the capacitor C23 is grounded, and the other end is connected to the resistor R14 and the positive electrode of the operational amplifier OP2.

[0033] The high-pass filter circuit is used to allow signals above a certain cut-off frequency to pass through and to weaken or prevent signals below the frequency from passing through; the high-pass filter circuit adopts a first-order RC high-pass filter circuit, including a capacitor C21 and a resistor R12; one end of the capacitor C21 is connected to the output end of the operational amplifier OP2 in the low-pass filter, and the other end is connected to the resistor R12 and the drive circuit resistor R5.

[0034] The low-pass filter is connected in series with the high-pass filter to form a band-pass filter, which is used to pass specific frequencies and effectively suppress signals of other frequencies.

[0035] The driving circuit includes an operational amplifier OPA4991MDYYREP, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a capacitor C13, a capacitor C14, a capacitor C15, a capacitor C16, a capacitor C17, a capacitor C18, a capacitor C19, a capacitor C20, a transistor Q1, and a transistor Q2;

[0036] The resistor R5 is connected in series with the capacitor C21 in the high-pass filter circuit;

[0037] The resistors R8, R9, R10 and R11 are connected in parallel to form a parallel circuit;

[0038] The capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19 and the capacitor C20 are connected in parallel to form a parallel circuit;

[0039] The transistor Q1 is an NPN transistor, including a base, a collector, and an emitter, wherein the base is connected to the output end of the operational amplifier OPA4991MDYYREP, the collector is connected to the positive electrode of the 15V input power supply, and the emitter is connected to the emitter of the transistor Q2; the base of the transistor Q1 is connected to the base of the transistor Q2;

[0040] The transistor Q2 is a PNP transistor, including a base, a collector, and an emitter, wherein the base is connected to the output end of the operational amplifier OPA4991MDYYREP, and the collector is connected to the negative electrode of the 15V input power supply; the positive electrode of the amplifier OPA4991MDYYREP is connected to the resistor R5; the negative electrode of the amplifier OPA4991MDYYREP is connected to the resistor R6; the output end of the amplifier OPA4991MDYYREP is connected to the base of the transistor Q1 and the base of the transistor Q2;

[0041] One end of the capacitor C13 is grounded, and the other end is connected to the resistor R6;

[0042] One end of the resistor R6 is connected to the capacitor C13, and the other end is connected to the negative electrode of the amplifier OPA4991MDYYREP and the resistor R7;

[0043] One end of the resistor R7 is connected to the resistor R6, and the other end is connected to a parallel circuit consisting of the resistor R8, the resistor R9, the resistor R10, and the resistor R11, and a parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19, and the capacitor C20;

[0044] A parallel circuit consisting of the resistor R8, the resistor R9, the resistor R10, and the resistor R11 has one end connected to the emitter of the transistor Q1 and the emitter of the transistor Q2, and the other end connected to a parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19, and the capacitor C20;

[0045] One end of the capacitor C14 is connected to the collector of the transistor Q1, and the other end is grounded;

[0046] One end of the capacitor C15 is connected to the collector of the transistor Q2, and the other end is grounded;

[0047] A parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19 and the capacitor C20 has one end connected to the resistor R7 and the other end connected to the load.

[0048] The driving circuit meets the requirement of a peak-to-peak voltage of 20V for use by subsequent loads.

[0049] Compared with the prior art, the present invention has the following beneficial effects:

[0050] The output of the excitation source circuit provided by the present invention meets the designed voltage amplitude and frequency when connected to a load, and the total harmonic distortion (THD) measured index is only 0.15%, which is far superior to the 3% required by the normal design.

[0051] The present invention provides a low-cost LVDT excitation source generating circuit, which adopts commonly used circuit components and can provide a stable excitation signal at a relatively low cost, and has good performance and reliability. The LVDT sensor used in the field of civil commercial aircraft provides the position information of the electro-hydraulic servo valve core for the remote electronic control unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the technical solutions disclosed in the present invention, the following briefly introduces the drawings required to be used in some embodiments disclosed in the present invention. Obviously, the drawings described below are only drawings of some embodiments disclosed in the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the products involved in the embodiments disclosed in the present invention, the actual process of the method, etc.

[0053] Figure 1 This is a circuit diagram of the LVDT excitation source of the present invention.

[0054] Figure 2 This is the level conversion circuit of the present invention.

[0055] Figure 3 This is the precise 5V circuit of the present invention.

[0056] Figure 4 This is the low-pass filter circuit of the present invention.

[0057] Figure 5 The fourth-order Sallen-Key low-pass filter circuit of the present invention is simulated by the Bode diagram.

[0058] Figure 6 This is a diagram showing the effect of the fourth-order Sallen-Key low-pass filter of the present invention.

[0059] Figure 7 This is a first-order high-pass filter circuit diagram of the present invention.

[0060] Figure 8 This is a first-order high-pass filtering effect diagram of the present invention.

[0061] Fig. 9 This is a structural diagram of the driving circuit of the present invention.

[0062] Fig.10 This is a diagram showing the output effect of the driving circuit of the present invention. DETAILED DESCRIPTION

[0063] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0064] like Figure 1 As shown, a low-cost LVDT excitation source generating circuit includes a control system, a level conversion circuit, a low-pass filter circuit, a high-pass filter circuit, and a driving circuit, and each circuit system is connected in series in sequence; the control system adopts an FPGA main control chip to output a PWM signal.

[0065] like Figure 2 As shown, the level conversion circuit includes a 3.3V input power supply, a precision 5V input power supply, a level conversion chip SN74LVC1T45MDCKREP, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, and a resistor R1;

[0066] The resistor R1 is 10KΩ; the capacitors C1 and C3 are 10μF; the capacitors C2 and C4 are 100nF;

[0067] The level conversion circuit is connected to a control system whose main control chip is FPGA;

[0068] The capacitor C1 and the capacitor C2 are connected in parallel to form a parallel circuit; one end of the parallel circuit formed by the capacitor C1 and the capacitor C2 is grounded, and the other end is connected to a 3.3V input power supply;

[0069] The level conversion chip SN74LVC1T45MDCKREP has 6 ports, namely VCCA port, VCCB port, GND port, DIR port, A port, and B port; the VCCA port is connected to a 3.3V input power supply; the VCCB port is connected to a precision 5V input power supply; the GND port is grounded; the DIR port is connected to a resistor R1; the A port is connected to a control system for receiving a PWM input signal; the B port is connected to a low-pass filter circuit;

[0070] One end of the resistor R1 is connected to a 3.3V power supply, and the other end is connected to a level conversion chip SN74LVC1T45MDCKREPDIR port;

[0071] The capacitor C3 and the capacitor C4 are connected in parallel to form a parallel circuit; one end of the parallel circuit formed by the capacitor C3 and the capacitor C4 is grounded, and the other end is connected to the precision 5V circuit.

[0072] Preferably, Figure 3 As shown, the level conversion circuit adopts a precision 5V circuit to improve the accuracy of the 5V output level, ensure the system performance of the level conversion circuit, and thus improve the current driving capability.

[0073] The precision 5V circuit includes a 15V input power supply, a 5V input power supply, a capacitor C5, a capacitor C6, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a resistor R2, a power reference chip REF5050MDREP, and a chip TLE2037AMD;

[0074] The capacitors C5 and C6 are 1 μF; the capacitor C7 is 22 μF; the capacitors C8 and C10 are 100 nF; the capacitor C9 is 33 pF; the resistor R2 is 10 KΩ;

[0075] One end of the capacitor C5 is grounded, and the other end is connected to the positive electrode of the 15V input power supply;

[0076] The VIN port of the power reference chip REF5050MDREP is connected to the input power supply; the GND port of the power reference chip REF5050MDREP is grounded; the TRIM / NR port of the power reference chip REF5050MDREP is connected to the 5V input power supply, the capacitor C7, and the IN+ port of the chip TLE2037AMD;

[0077] One end of the capacitor C6 is connected to the TRIM / NR port of the power reference chip REF5050MDREP, and the other end is grounded; the VOUT port of the power reference chip REF5050MDREP is connected to the 5V input power supply;

[0078] One end of the capacitor C7 is grounded, and the other end is connected to the VOUT port of the power reference chip REF5050MDREP, the 5V input power supply, and the IN+ port of the chip TLE2037AMD;

[0079] The IN+ port of the chip TLE2037AMD is connected to the VOUT port of the power reference chip REF5050MDREP; the VCC- port of the chip TLE2037AMD is connected to the negative electrode of the 15V input power supply and the capacitor C8; the IN- port of the chip TLE2037AMD is connected to the resistor R2; the OUT port of the chip TLE2037AMD outputs a precision 5V power supply; the VCC+ port of the chip TLE2037AMD is connected to the positive electrode of the 15V input power supply;

[0080] One end of the capacitor C8 is grounded, and the other end is connected to the VCC- port of the chip TLE2037AMD and the negative electrode of the 15V input power supply;

[0081] One end of the resistor R2 is connected to the IN-port of the chip TLE2037AMD, and the other end is connected to the OUT port of the chip TLE2037AMD;

[0082] The capacitor C9 is connected in parallel with the resistor R2;

[0083] One end of the capacitor C10 is grounded, and the other end is connected to the positive electrode of the 15V input power supply.

[0084] like Figure 4 As shown, the low-pass filter circuit adopts Butterworth type fourth-order Sallen-Key low-pass filtering, which is used to pass signals below a certain cut-off frequency and weaken or prevent signals above the frequency from passing, and includes capacitor C11, capacitor C12, capacitor C22, capacitor C23, resistor R3, resistor R4, resistor R13, resistor R14, operational amplifier OP1, operational amplifier OP2;

[0085] One end of the resistor R3 is connected to the B port of the level conversion chip SN74LVC1T45MDCKREP of the level conversion circuit, and the other end is connected to the resistor R4 and the capacitor C11;

[0086] The positive electrode of the operational amplifier OP1 is connected to the resistor R4, the negative electrode is connected to the capacitor C11, and the output end is connected to the resistor R13;

[0087] One end of the resistor R4 is connected to R3, and the other end is connected to the capacitor C12 and the positive electrode of the operational amplifier OP1;

[0088] One end of the capacitor C12 is grounded, and the other end is connected to the resistor R4 and the positive electrode of the operational amplifier OP1;

[0089] One end of the resistor R13 is connected to the output end of the operational amplifier OP1, and the other end is connected to the resistor R14 and the capacitor C22;

[0090] The positive electrode of the operational amplifier OP2 is connected to the resistor R14, the negative electrode is connected to the capacitor C22, and the output end is connected to the high-pass filter;

[0091] One end of the resistor R14 is connected to R13, and the other end is connected to the capacitor C23 and the positive electrode of the operational amplifier OP2;

[0092] One end of the capacitor C23 is grounded, and the other end is connected to the resistor R14 and the positive electrode of the operational amplifier OP2;

[0093] The fourth-order Sallen-Key low-pass filter is simulated, the cut-off frequency is set to 2.8K, the PWM is set to 1953Hz, and the obtained low-pass filter circuit simulation Bode diagram is as follows: Figure 5 As shown in the figure, the low-pass filtering effect is as follows Figure 6 shown.

[0094] like Figure 7 As shown, the high-pass filter circuit adopts a first-order RC high-pass filter circuit, including a capacitor C21 and a resistor R12; the capacitor C21 is 10nF; the capacitor R12 is 200KΩ;

[0095] One end of the capacitor C21 is connected to the output end of the operational amplifier OP2 in the low-pass filter, and the other end is connected to the resistor R12 and the driving circuit resistor R5.

[0096] The low-pass filter is connected in series with the high-pass filter to form a band-pass filter, which is used to pass specific frequencies and effectively suppress signals of other frequencies.

[0097] The first-order RC high-pass filter circuit can remove the DC component in the previous stage circuit. When the cut-off frequency is set to 1.061K, the measured effect of the first-order RC high-pass filter circuit is observed, and the first-order high-pass filter effect diagram is as follows: Figure 8 shown.

[0098] like Fig. 9 As shown, the driving circuit includes an operational amplifier OPA4991MDYYREP, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a capacitor C13, a capacitor C14, a capacitor C15, a capacitor C16, a capacitor C17, a capacitor C18, a capacitor C19, a capacitor C20, a transistor Q1, and a transistor Q2;

[0099] The resistor R5 is connected in series with the capacitor C21 in the high-pass filter circuit;

[0100] The resistors R8, R9, R10 and R11 are connected in parallel to form a parallel circuit;

[0101] The capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19 and the capacitor C20 are connected in parallel to form a parallel circuit;

[0102] The transistor Q1 is an NPN transistor, including a base, a collector, and an emitter, wherein the base is connected to the output end of the operational amplifier OPA4991MDYYREP, the collector is connected to the positive electrode of the 15V input power supply, and the emitter is connected to the emitter of the transistor Q2; the base of the transistor Q1 is connected to the base of the transistor Q2;

[0103] The transistor Q2 is a PNP transistor, including a base, a collector, and an emitter, wherein the base is connected to the output end of the operational amplifier OPA4991MDYYREP, and the collector is connected to the negative electrode of the 15V input power supply; the positive electrode of the amplifier OPA4991MDYYREP is connected to the resistor R5; the negative electrode of the amplifier OPA4991MDYYREP is connected to the resistor R6; the output end of the amplifier OPA4991MDYYREP is connected to the base of the transistor Q1 and the base of the transistor Q2;

[0104] One end of the capacitor C13 is grounded, and the other end is connected to the resistor R6;

[0105] One end of the resistor R6 is connected to the capacitor C13, and the other end is connected to the negative electrode of the amplifier OPA4991MDYYREP and the resistor R7;

[0106] One end of the resistor R7 is connected to the resistor R6, and the other end is connected to a parallel circuit consisting of the resistor R8, the resistor R9, the resistor R10, and the resistor R11, and a parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19, and the capacitor C20;

[0107] A parallel circuit consisting of the resistor R8, the resistor R9, the resistor R10, and the resistor R11 has one end connected to the emitter of the transistor Q1 and the emitter of the transistor Q2, and the other end connected to a parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19, and the capacitor C20;

[0108] One end of the capacitor C14 is connected to the collector of the transistor Q1, and the other end is grounded;

[0109] One end of the capacitor C15 is connected to the collector of the transistor Q2, and the other end is grounded;

[0110] A parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19 and the capacitor C20 has one end connected to the resistor R7 and the other end connected to the load.

[0111] The driving circuit meets the requirement of a peak-to-peak voltage of 20V for use by subsequent loads.

[0112] like Fig.10 The figure shows the output effect of the driving circuit. When the excitation source circuit output is connected to the load, the voltage amplitude and frequency meet the design, and the total harmonic distortion (THD) is only 0.15%, which is far higher than the normal design requirement of 3%.

[0113] Although the present invention has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications to the technical solution of the present invention using the above disclosed contents without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the contents of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A low-cost LVDT excitation source generation circuit, characterized in that: The circuit comprises: a control system, a level conversion circuit, a low-pass filter circuit, a high-pass filter circuit, and a driving circuit, and each circuit system is connected in series in sequence.

2. A low-cost LVDT excitation source generating circuit according to claim 1, characterized in that: The control system adopts an FPGA main control chip to output PWM signals.

3. A low-cost LVDT excitation source generating circuit according to claim 1, characterized in that: The level conversion circuit includes a 3.3V input power supply, a precision 5V input power supply, a level conversion chip SN74LVC1T45MDCKREP, a capacitor, and a resistor.

4. A low-cost LVDT excitation source generating circuit according to claim 1 or 3, characterized in that: The level conversion circuit adopts a precision 5V circuit to ensure the system performance of the level conversion circuit and improve the current driving capability.

5. A low-cost LVDT excitation source generating circuit according to claim 1, characterized in that: The low-pass filter circuit adopts Butterworth type fourth-order Sallen-Key low-pass filtering, which is used to pass signals below a certain cut-off frequency and weaken or prevent signals above the frequency from passing, and includes capacitor C11, capacitor C12, capacitor C22, capacitor C23, resistor R3, resistor R4, resistor R13, resistor R14, operational amplifier OP1, operational amplifier OP2; One end of the resistor R3 is connected to the B port of the level conversion chip SN74LVC1T45MDCKREP of the level conversion circuit, and the other end is connected to the resistor R4 and the capacitor C11; the positive electrode of the operational amplifier OP1 is connected to the resistor R4, the negative electrode is connected to the capacitor C11, and the output end is connected to the resistor R13; One end of the resistor R4 is connected to R3, and the other end is connected to the capacitor C12 and the positive electrode of the operational amplifier OP1; One end of the capacitor C12 is grounded, and the other end is connected to the resistor R4 and the positive electrode of the operational amplifier OP1; One end of the resistor R13 is connected to the output end of the operational amplifier OP1, and the other end is connected to the resistor R14 and the capacitor C22; The positive electrode of the operational amplifier OP2 is connected to the resistor R14, the negative electrode is connected to the capacitor C22, and the output end is connected to the high-pass filter; One end of the resistor R14 is connected to R13, and the other end is connected to the capacitor C23 and the positive electrode of the operational amplifier OP2; One end of the capacitor C23 is grounded, and the other end is connected to the resistor R14 and the positive electrode of the operational amplifier OP2.

6. A low-cost LVDT excitation source generating circuit according to claim 1, characterized in that: The high-pass filter circuit is used to pass signals with a frequency higher than a certain cut-off frequency and weaken or prevent signals with a frequency lower than the cut-off frequency from passing; The high-pass filter circuit adopts a first-order RC high-pass filter circuit, including a capacitor C21 and a resistor R12; One end of the capacitor C21 is connected to the output end of the operational amplifier OP2 in the low-pass filter, and the other end is connected to the resistor R12 and the driving circuit resistor R5.

7. A low-cost LVDT excitation source generating circuit according to claim 1, characterized in that: The low-pass filter and the high-pass filter form a band-pass filter, which is used to pass specific frequencies and effectively suppress signals of other frequencies.

8. A low-cost LVDT excitation source generating circuit according to claim 1, characterized in that: The driving circuit includes an operational amplifier OPA4991MDYYREP, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a capacitor C13, a capacitor C14, a capacitor C15, a capacitor C16, a capacitor C17, a capacitor C18, a capacitor C19, a capacitor C20, a transistor Q1, and a transistor Q2; The resistor R5 is connected in series with the capacitor C21 in the high-pass filter circuit; The resistors R8, R9, R10 and R11 are connected in parallel to form a parallel circuit; The capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19 and the capacitor C20 are connected in parallel to form a parallel circuit; The transistor Q1 is an NPN transistor, including a base, a collector, and an emitter, wherein the base is connected to the output end of the operational amplifier OPA4991MDYYREP, the collector is connected to the positive electrode of the 15V input power supply, and the emitter is connected to the emitter of the transistor Q2; the base of the transistor Q1 is connected to the base of the transistor Q2; The transistor Q2 is a PNP transistor, including a base, a collector, and an emitter, wherein the base is connected to the output end of the operational amplifier OPA4991MDYYREP, and the collector is connected to the negative electrode of the 15V input power supply; the positive electrode of the amplifier OPA4991MDYYREP is connected to the resistor R5; the negative electrode of the amplifier OPA4991MDYYREP is connected to the resistor R6; the output end of the amplifier OPA4991MDYYREP is connected to the base of the transistor Q1 and the base of the transistor Q2; One end of the capacitor C13 is grounded, and the other end is connected to the resistor R6; One end of the resistor R6 is connected to the capacitor C13, and the other end is connected to the negative electrode of the amplifier OPA4991MDYYREP and the resistor R7; One end of the resistor R7 is connected to the resistor R6, and the other end is connected to a parallel circuit consisting of the resistor R8, the resistor R9, the resistor R10, and the resistor R11, and a parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19, and the capacitor C20; A parallel circuit consisting of the resistor R8, the resistor R9, the resistor R10, and the resistor R11 has one end connected to the emitter of the transistor Q1 and the emitter of the transistor Q2, and the other end connected to a parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19, and the capacitor C20; One end of the capacitor C14 is connected to the collector of the transistor Q1, and the other end is grounded; One end of the capacitor C15 is connected to the collector of the transistor Q2, and the other end is grounded; A parallel circuit consisting of the capacitor C16, the capacitor C17, the capacitor C18, the capacitor C19 and the capacitor C20 has one end connected to the resistor R7 and the other end connected to the load.

9. A low-cost LVDT excitation source generating circuit according to claim 1 or 8, characterized in that: The driving circuit meets the requirement of a peak-to-peak voltage of 20V for use by subsequent loads.

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