LIN drive circuit integrating current limiting and slope control

Abstract

The invention discloses an LIN drive circuit integrating current limiting and slope control. The LIN drive circuit comprises a slope control circuit, a slope monitoring sampling circuit, a source electrode following circuit, a drive circuit, a current sampling circuit and a current limiting control circuit. The slope monitoring sampling circuit is used for sampling an LIN output signal generated by the driving circuit; the slope control circuit generates a slope control signal according to an input signal and an output signal of the slope monitoring sampling circuit; the slope control signal controls the driving circuit through the source electrode following circuit, so that the driving circuit generates an LIN output signal with a preset slope; the current sampling circuit is used for sampling current flowing through the driving circuit; the current-limiting control circuit compares the sampling voltage with the reference voltage, and when the sampling voltage is larger than the reference voltage, the current-limiting control circuit turns off the driving circuit, so that the maximum output current of the LIN driving circuit is limited at a preset level.

Description

Technical Field

[0001] The invention relates to the field of communications, and in particular to a LIN drive circuit integrating current limiting and slope control. Background Art

[0002] Local Interconnect Network (LIN) is a low-cost, low-speed serial communication network solution that is widely used in various distributed electronic systems that do not have high requirements on network bandwidth, performance and fault tolerance, such as vehicle-mounted systems, household appliances, etc.

[0003] The LIN node includes a LIN drive circuit for outputting a drive signal, and the load device responds based on the drive signal output by the LIN drive circuit. A common fault in the LIN drive circuit is that the internal drive transistor is short-circuited to the high-voltage power supply VS. When the driving capability of the LIN drive circuit is strong, the output current is too large when a short-circuit fault occurs, which damages the LIN drive circuit and seriously affects other LIN nodes in the entire system. The driving capability of the LIN drive circuit cannot be too weak, otherwise the output current is too low, which will affect the signal transmission rate and duty cycle of the LIN node, resulting in poor communication quality.

[0004] On the other hand, the slope of the drive signal output by the LIN drive circuit needs to be properly controlled. If the slope is too high, the generated EMI will have a greater impact on the EMC characteristics of the entire system; if the slope is too low, it will not meet the requirements of signal transmission rate and duty cycle, thus affecting the communication quality.

[0005] In view of these problems, the present invention proposes a LIN driving circuit integrating current limiting and slope control, and the circuit is simple, easy to implement and convenient for low-cost integration. Summary of the invention

[0006] The present invention proposes a LIN drive circuit with integrated current limiting and slope control, which can effectively limit the maximum output current of the LIN drive circuit to a predetermined level while maintaining a strong driving capability of the LIN drive circuit, and will not generate excessive output current even if a short circuit fault occurs. At the same time, the LIN drive circuit of the present invention integrates a slope control circuit, which well solves the problems of electromagnetic interference and poor communication quality in the LIN drive circuit.

[0007] The technical solution of the present invention is as follows: The present invention proposes a LIN driving circuit integrating current limiting and slope control, comprising: Slope control circuit, slope monitoring sampling circuit, source follower circuit, drive circuit, current sampling circuit and current limiting control circuit; The slope monitoring sampling circuit samples the LIN output signal generated by the driving circuit; The slope control circuit generates a slope control signal according to the input signal and the output signal of the slope monitoring sampling circuit; The slope control signal controls the driving circuit through the source follower circuit, so that the driving circuit generates a LIN output signal with a predetermined slope; The current sampling circuit samples the current flowing through the driving circuit; The current limiting control circuit compares the sampled voltage with the reference voltage. When the sampled voltage is greater than the reference voltage, the current limiting control circuit turns off the drive circuit so that the maximum output current of the drive circuit is limited to a predetermined level.

[0008] The invention also comprises a buffer circuit for buffering the input signal so as to match the voltage domain of the input signal with that of the LIN driving circuit.

[0009] The slope control circuit includes a first current source, a second current source, a first transistor and a second transistor, and the first current source, the first transistor, the second transistor and the second current source are connected in series in sequence.

[0010] The first transistor is a PMOS transistor, and the second transistor is an NMOS transistor.

[0011] The slope monitoring sampling circuit comprises a sampling capacitor, one end of which is connected to the output end of the LIN driving circuit, and the other end of which is connected to the connection point of the first transistor and the second transistor.

[0012] The source follower circuit includes a third transistor and a third current source connected in series, and a slope control signal is input into the gate of the third transistor to generate a driving signal.

[0013] The driving circuit comprises a voltage stabilizing diode and a fourth transistor connected in series. A driving signal is input into the gate of the fourth transistor, and the fourth transistor is driven to generate a LIN output signal.

[0014] The third transistor and the fourth transistor are NMOS transistors.

[0015] The current sampling circuit includes a sampling resistor, and the fourth transistor is grounded through the sampling resistor.

[0016] The current limiting control circuit includes an operational amplifier and a fifth transistor, a sampling voltage is input to a first input terminal of the operational amplifier, a reference voltage is input to a second input terminal of the operational amplifier, an output terminal of the operational amplifier is connected to a gate of the fifth transistor, an input terminal of the fifth transistor is connected to a gate of the fourth transistor, and an output terminal of the fifth transistor is grounded. The operational amplifier compares the sampled voltage with a reference voltage. When the sampled voltage is greater than the reference voltage, the operational amplifier controls the fourth transistor to be turned off through the fifth transistor.

[0017] The present invention sets a current limiting circuit including a current limiting feedback loop in the LIN driving circuit, so that the current limiting value is more accurate, and the driving signal output by the LIN driving circuit is guaranteed to be more reliable and stable. The present invention integrates the current limiting circuit and the slope control circuit in the LIN driving circuit, which can not only realize current limiting and slope control, but also has a simple circuit, is easy to realize, and is convenient for low-cost integration.

[0018] The features and advantages of the present invention will become clear through reference to the following drawings and detailed description of specific embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of a LIN driver circuit of the present invention is shown.

[0020] Figure 2 A circuit diagram of a LIN driver circuit of the present invention is shown.

[0021] Figure 3 A waveform diagram of a voltage signal at a key node of the present invention is shown. DETAILED DESCRIPTION

[0022] In order to make the technical solution of the present invention clearer and more understandable, it will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. Figure 1 A schematic diagram of a LIN driver circuit of the present invention is shown.

[0023] The LIN driving circuit comprises a buffer circuit, a slope control circuit, a slope monitoring sampling circuit, a source follower circuit, a driving circuit, a current sampling circuit, a current limiting control circuit and a pull-up circuit. The current sampling circuit and the current limiting control circuit constitute the current limiting circuit of the present invention.

[0024] TXD is the input signal of the LIN driver circuit, and after passing through the buffer circuit, it serves as one of the input signals of the slope control circuit. The slope monitoring sampling circuit samples the LIN output signal as another input signal of the slope control circuit. The slope control circuit generates a slope control signal based on the buffered input signal and the output signal of the slope monitoring sampling circuit. The slope control signal controls the driver circuit through the source follower circuit, so that the driver circuit generates a LIN output signal with a predetermined slope.

[0025] In order to achieve precise current limiting control of the driving capability, the current sampling circuit samples the current flowing through the driving circuit, and the current limiting control circuit controls the driving circuit according to the sampling voltage, so that the maximum output current of the LIN driving circuit is limited to a predetermined level. Even if a short circuit fault occurs, no excessive output current will be generated.

[0026] Figure 2 A circuit diagram of a LIN driver circuit of the present invention is shown.

[0027] The buffer circuit Buffer is used to implement the buffer function, and here it can also be replaced with a level conversion circuit to solve the problem of mismatch between the voltage domain of the input signal TXD and the LIN drive circuit. The input signal TXD is input to the buffer circuit Buffer to generate a buffer input signal TXD_BF compatible with the LIN drive circuit.

[0028] The slope control circuit includes a digital control circuit DAC_Control, current sources IDAC_P and IDAC_N, a first transistor S1 and a second transistor S2. The first current source IDAC_P, the first transistor S1, the second transistor S2 and the second current source IDAC_N are connected in series in sequence, the input end of the first current source IDAC_P is connected to the high level VDD, and the output end of the second current source IDAC_N is grounded. The buffered input signal TXD_BF is input to the gates of the first transistor S1 and the second transistor S2 to control the on and off of the first transistor S1 and the second transistor S2. The digital control signal generated by the digital control circuit DAC_Control is used to control the current value output by the current sources IDAC_P and IDAC_N. Among them, the first transistor S1 is a PMOS tube, and the second transistor S2 is an NMOS tube. The connection point of the first transistor S1 and the second transistor S2 forms the output end of the slope control circuit, which is used to output the slope control signal Vslope.

[0029] The source follower circuit includes a third transistor ND and a third current source Inbias1. The third transistor ND and the third current source Inbias1 are connected in series, the input end of the third transistor ND is connected to the high level VDD, and the output end of the third current source Inbias1 is grounded. The slope control signal Vslope is input to the gate of the third transistor ND, which is used to control the source follower circuit to generate a drive signal Vdrive. The third transistor ND is an NMOS tube. The connection point of the third transistor ND and the third current source Inbias1 forms the output end of the source follower circuit, which is used to output the drive signal Vdrive.

[0030] The driving circuit includes a fourth transistor N1 and a Zener diode D0. The Zener diode D0 and the fourth transistor N1 are connected in series. A driving signal Vdrive is input into the gate of the fourth transistor N1 to drive the fourth transistor N1 to generate a LIN output signal. The Zener diode D0 is used to provide negative voltage protection for the fourth transistor N1. The positive electrode of the Zener diode D0 is connected to the pull-up circuit. The connection point of the Zener diode D0 and the pull-up circuit forms the output end of the LIN driving circuit, which is used to output the LIN output signal. Among them, the fourth transistor N1 is an NMOS tube.

[0031] The pull-up circuit includes a resistor R0 and a diode D1 connected in series, the input end of the resistor R0 is connected to the power supply voltage VS, and the output end of the diode D1 is connected to the positive electrode of the voltage-stabilizing diode D0. The pull-up circuit provides a high-voltage power supply for the driving circuit.

[0032] The slope monitoring sampling circuit includes a sampling capacitor C. One end of the sampling capacitor C is connected to the output end of the LIN driving circuit, and the other end is connected to the output end of the slope control circuit. The sampling capacitor C is used to monitor and sample the LIN output signal. The slope control circuit generates a desired slope control signal according to the output signal of the sampling capacitor C, and then controls the driving circuit to generate a LIN output signal with a predetermined slope.

[0033] When TXD is high, TXD_BF is a high-level voltage compatible with the LIN drive circuit, which controls the first transistor S1 to be turned off and the second transistor S2 to be turned on. The voltage of the slope control signal Vslope forms a Miller effect due to the presence of the sampling capacitor C, and does not drop linearly, but decreases from VDD to a voltage Vmiller=V th_ND +V th_N1 After that, it maintains a Miller platform time Trise, and then continues to drop to 0V. Among them, V th_ND is the threshold voltage of the NMOS type third transistor ND, V th_N1 is the threshold voltage of the NMOS fourth transistor N1.

[0034] The driving signal Vdriver follows the slope control signal Vslope, and its value is Vdriver=Vslope-V th_N1 , and then drives the fourth transistor N1. The LIN output signal rises linearly within the Miller platform time, and its rising slope is: Wherein, ΔVLIN is the voltage change at the output of the LIN driving circuit. When it rises, the output voltage rises from 0V to the power supply voltage VS; when it falls, the output voltage falls from the power supply voltage VS to 0V. IDAC_N is the current value output by the current source IDAC_N. C is the capacitance value of the sampling capacitor C.

[0035] IDAC_N and C determine the slope Slewrate rise In our company's actual products, the recommended typical slope value is 1.2V / uS, which can generate lower EMI.

[0036] Similarly, when TXD is at a low level, TXD_BF is a low level voltage compatible with the LIN drive circuit, which controls the first transistor S1 to be turned on and the second transistor S2 to be turned off. The voltage of the slope control signal Vslope does not rise linearly due to the Miller effect formed by the sampling capacitor C, but rises from 0V to the voltage Vmiller=V th_ND +V th_N1 After that, it maintains a Miller platform time Tfall, and then continues to rise to VDD. The driving signal Vdriver follows the slope control signal Vslope, and then drives the fourth transistor N1. The LIN output signal decreases linearly within the Miller platform time, and its falling slope is DAC_P is the current value output by the current source IDAC_P.

[0037] By simple deduction, we can get: If IDAC_N=IDAC_P, Trise is the same as Tfall, and the rising slope and falling slope are also the same. In order to ensure that the rising slope and falling slope of the LIN output signal are consistent, IDAC_N=IDAC_P is often required. However, in actual solutions, it is not mandatory to be the same, but can be adjusted according to the EMI evaluation test results.

[0038] The current sampling circuit includes a sampling resistor Rsense. The fourth transistor N1 is grounded through the sampling resistor Rsense. The current flowing through the fourth transistor N1 generates a sampling voltage Vsense on the sampling resistor Rsense.

[0039] The current limiting control circuit includes an operational amplifier OP and a fifth transistor N0. The sampling voltage Vsense is input to the first input terminal of the operational amplifier OP, and the reference voltage Vref_limit is input to the second input terminal of the operational amplifier OP. The output terminal of the operational amplifier OP is connected to the gate of the fifth transistor N0. The input terminal of the fifth transistor N0 is connected to the gate of the fourth transistor N1, and the output terminal of the fifth transistor N0 is grounded. Among them, the fifth transistor N0 is an NMOS tube. The operational amplifier OP compares the sampling voltage Vsense with the reference voltage Vref_limit. When the sampling voltage Vsense is greater than the reference voltage Vref_limit, the current limiting control circuit turns off the driving circuit. Specifically, the operational amplifier OP controls the fourth transistor N1 to turn off through the fifth transistor N0, so that the maximum output current of the driving circuit is limited to a predetermined level.

[0040] In the normal working stage of LIN slave node, because the resistance R0 is usually relatively large (for example, 30KΩ), the maximum current Imax≈VS / R0 flowing through the fourth transistor N1, Imax is less than the preset current limiting value Ilimit, and the current limiting protection function will not be triggered. However, when TXD is at a high level and the fourth transistor N1 is short-circuited to the power supply voltage VS, the output voltage VLIN of the LIN drive circuit is VLIN=VS. At this time, Imax will be very large, triggering the current limiting circuit to start working. Through the effect of negative feedback, Vsense can be forced not to exceed Vref_limit, at this time Imax=Ilimit=Vref_limit / Rsense. As a result, the present invention can limit the maximum output current of the LIN drive circuit to a predetermined level, and even if a short circuit fault occurs, it will not generate excessive output current.

[0041] In order to integrate the current limiting circuit and the slope control circuit into the LIN driving circuit, the present invention provides a source follower circuit.

[0042] The source follower circuit can provide voltage isolation. The gate-source voltage Vgs of the third transistor ND exists between the output and input of the source follower circuit, so that the gate voltage of the fourth transistor N1 is not affected by the capacitor C, thereby providing a stable voltage supply for the fourth transistor N1. At the same time, the influence of the gate terminal capacitance Cg of the fourth transistor N1 on the capacitor C can be isolated, so that the sampling result of the sampling capacitor C is more accurate.

[0043] On the other hand, when limiting current, the source follower circuit can provide a DC bias for the normal operation of the fifth transistor N0 in the current limiting circuit, and at the same time provide a high-frequency pole for the output end of the fifth transistor N0, which is beneficial to maintaining the operating point of the fourth transistor N1 stable without affecting the stability of the current limiting circuit.

[0044] The high frequency pole provided by the output terminal of the fifth transistor N0 is: P N0_d ≈G m_ND / Cpar Among them, P N0_d is the drain node of the fifth transistor N0; G m_ND is the transconductance of the third transistor ND; Cpar is the total parasitic capacitance of the drain node of the fifth transistor N0, including the gate-source capacitance Cgs of the fourth transistor N1 and the drain-source capacitance Cds of the fifth transistor N0.

[0045] In addition, the source follower circuit can be used as a protection circuit to provide a certain degree of protection to prevent the gate voltage of the fourth transistor N1 from being too high or too low and thus being damaged.

[0046] Therefore, the source follower circuit can provide voltage isolation, signal stabilization and protection, and is an important component of the circuit design of the present invention.

[0047] Figure 3 The waveform diagram of the voltage signal of the key node of the present invention is shown. As shown in the figure, the present invention can make the driving signal output by the LIN driving circuit have an appropriate slope.

[0048] The present invention integrates a current limiting circuit and a slope control circuit in a LIN driving circuit. By setting a source follower circuit, not only can current limiting and slope control be well realized, but the circuit is simple, easy to realize, and convenient for low-cost integration.

[0049] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. LIN driver circuit with integrated current limiting and slope control, characterized in that: include: Slope control circuit, slope monitoring sampling circuit, source follower circuit, drive circuit, current sampling circuit and current limiting control circuit; The slope monitoring sampling circuit samples the LIN output signal generated by the driving circuit; The slope control circuit generates a slope control signal according to the input signal and the output signal of the slope monitoring sampling circuit; The slope control signal controls the driving circuit through the source follower circuit, so that the driving circuit generates a LIN output signal with a predetermined slope; The current sampling circuit samples the current flowing through the driving circuit; The current limiting control circuit compares the sampled voltage with the reference voltage. When the sampled voltage is greater than the reference voltage, the current limiting control circuit turns off the drive circuit so that the maximum output current of the drive circuit is limited to a predetermined level.

2. The LIN driver circuit with integrated current limiting and slope control as claimed in claim 1, characterized in that: Also includes: The buffer circuit is used to buffer the input signal so that the input signal and the voltage domain of the LIN drive circuit match.

3. The LIN driver circuit with integrated current limiting and slope control as claimed in claim 1, characterized in that: in, The slope control circuit includes a first current source, a second current source, a first transistor and a second transistor, and the first current source, the first transistor, the second transistor and the second current source are connected in series in sequence.

4. The LIN driver circuit with integrated current limiting and slope control as claimed in claim 3, characterized in that: in, The first transistor is a PMOS transistor, and the second transistor is an NMOS transistor.

5. The LIN driver circuit with integrated current limiting and slope control as claimed in claim 3 or 4, characterized in that: in, The slope monitoring sampling circuit comprises a sampling capacitor, one end of which is connected to the output end of the LIN driving circuit, and the other end of which is connected to the connection point of the first transistor and the second transistor.

6. The LIN driver circuit with integrated current limiting and slope control as claimed in claim 1, characterized in that: in, The source follower circuit includes a third transistor and a third current source connected in series, and a slope control signal is input into the gate of the third transistor to generate a driving signal.

7. The LIN driver circuit with integrated current limiting and slope control as claimed in claim 6, characterized in that: in, The driving circuit comprises a voltage stabilizing diode and a fourth transistor connected in series. A driving signal is input into the gate of the fourth transistor, and the fourth transistor is driven to generate a LIN output signal.

8. The LIN driving circuit with integrated current limiting and slope control as claimed in claim 7, characterized in that: in, The third transistor and the fourth transistor are NMOS transistors.

9. The LIN driver circuit with integrated current limiting and slope control as claimed in claim 7 or 8, characterized in that: in, The current sampling circuit includes a sampling resistor, and the fourth transistor is grounded through the sampling resistor.

10. The LIN driving circuit with integrated current limiting and slope control as claimed in claim 9, characterized in that: in, The current limiting control circuit includes an operational amplifier and a fifth transistor, a sampling voltage is input to a first input terminal of the operational amplifier, a reference voltage is input to a second input terminal of the operational amplifier, an output terminal of the operational amplifier is connected to a gate of the fifth transistor, an input terminal of the fifth transistor is connected to a gate of the fourth transistor, and an output terminal of the fifth transistor is grounded. The operational amplifier compares the sampled voltage with a reference voltage. When the sampled voltage is greater than the reference voltage, the operational amplifier controls the fourth transistor to be turned off through the fifth transistor.

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