Semiconductor assembly having semiconductor element, substrate and at least one wiring element

Abstract

The invention relates to a semiconductor assembly (2) having a semiconductor element (4), a substrate (6) and at least one wiring element (22). In order to achieve higher reliability, it is proposed that the substrate (6) has a substrate metallization (14) with line segments (12, 16, 18) arranged electrically insulated from one another, the semiconductor element (4) being connected, in particular in an adhesive manner, to a first line segment (12) of the substrate metallization (14), the semiconductor element (4) having a contact surface (8) on the side facing away from the substrate (6), the contact surface (8) of the semiconductor element (4) is connected to the substrate (6) via at least one connection element (22), the at least one connection element (22) having a first connection section (24), which connects the contact surface (8) to a second line section (16) of the substrate metallization (14), and a second connection section (26), which connects the contact surface (8) to a third line section (18) of the substrate metallization (14), the second and third line sections (16, 18) of the base metallization (14) are configured such that the first connection section (24) and the second connection section (26) have an asymmetric current flow during operation of the semiconductor assembly (2).

Description

Technical Field

[0001] The invention relates to a semiconductor component having a semiconductor element, a substrate and at least one connection element.

[0002] Furthermore, the invention relates to a power converter having at least one such semiconductor component.

[0003] The invention also relates to a method for producing such a semiconductor component, wherein the semiconductor element is connected to a substrate, in particular by adhesive bonding, wherein in a further step, a contact area of ​​the semiconductor element is connected to the substrate via at least one connection element.

[0004] Furthermore, the present invention also relates to a computer program product comprising instructions which, when the computer executes the program, cause the computer to simulate the behavior of such a semiconductor component. Background Art

[0005] Such semiconductor modules are usually used in power converters. The so-called power converter should be understood as, for example, a rectifier, an inverter, a frequency converter or a DC voltage converter. The semiconductor elements used in the semiconductor module include, but are not limited to, transistors, triacs, thyristors or diodes. The transistor is designed, for example, as an insulated gate bipolar transistor (IGBT), a field effect transistor or a bipolar transistor. The semiconductor elements in the semiconductor assembly are usually contacted via wiring elements on the substrate. Such wiring elements can include, but are not limited to, bonding wires and / or bonding strips. In particular, the load contact portion of the semiconductor element includes, but is not limited to, the emitter contact portion of the IGBT, which is usually contacted to the substrate by a plurality of wiring elements.

[0006] Patent application document DE 11 2019 000 660 T5 describes a semiconductor device comprising: a substrate having a main surface; a plurality of conductor patterns arranged on the main surface; a plurality of switching elements arranged on the plurality of conductor patterns, the plurality of switching elements being used to connect collectors; and one or more wiring elements, the one or more wiring elements directly connecting emitter electrodes of switching elements arranged on different conductor patterns and connected in parallel between the plurality of switching elements.

[0007] During operation of semiconductor components, the connection elements can become detached from the load contacts, which can lead to failure of the semiconductor component. Stronger connections can improve the reliability of semiconductor components. Summary of the invention

[0008] Against this background, it is an object of the present invention to specify a semiconductor component having improved reliability.

[0009] This object is achieved according to the invention by a semiconductor component having a semiconductor element, a substrate and at least one connection element, wherein the substrate has a substrate metallization, the substrate metallization having line sections arranged electrically insulated from one another, wherein the semiconductor element is connected to a first line section of the substrate metallization, in particular by adhesive bonding, wherein the semiconductor element has a contact surface on a side facing away from the substrate, wherein the contact surface of the semiconductor element is connected to the substrate via at least one connection element, wherein at least one connection element has a first connection section and a second connection section, the first connection section connecting the contact surface to the second line section of the substrate metallization and the second connection section connecting the contact surface to a third line section of the substrate metallization, wherein the second line section and the third line section of the substrate metallization are configured such that the first connection section and the second connection section have an asymmetrical current flow during operation of the semiconductor component.

[0010] Furthermore, the object is achieved according to the invention by a power converter comprising at least one such semiconductor component.

[0011] Furthermore, the object is achieved according to the invention by a method for producing such a semiconductor component, wherein the semiconductor element is connected to a substrate, in particular adhesively bonded, wherein in a further step a contact surface of the semiconductor element is connected to the substrate via at least one connection element.

[0012] Furthermore, the object is achieved according to the invention by a computer program product comprising instructions which, when a computer executes the program, cause the computer to simulate the behavior, in particular the thermal, mechanical and / or electrical behavior, of such a semiconductor component.

[0013] The advantages and preferred embodiments listed below with regard to the semiconductor component can apply correspondingly to the power converter, the method and the computer program product.

[0014] The concept of the present invention is based on improving the reliability of semiconductor components, and the probability of failure of semiconductor components during operation is significantly reduced by wiring elements separated from semiconductor elements. Such semiconductor components have a substrate, which has a substrate metallization. The substrate metallization is designed in a structured manner, that is, it has line segments that are electrically insulated from each other. The semiconductor element is especially connected to the first line segment of the substrate metallization by adhesive bonding. The material matching is produced, for example, by welding, sintering or bonding. In addition, the semiconductor element has a contact surface on the side facing away from the substrate, and the contact surface is connected to the substrate through at least one wiring element. For example, the semiconductor element is designed as an IGBT, the collector side of the IGBT is welded or sintered to the first line segment of the substrate metallization, and the emitter side of the IGBT is connected to the substrate via at least one wiring element. At least one wiring element is designed, for example, as a bonding wire or a bonding strip, and a connection can be generated between the substrate and the contact surface of the semiconductor element by ultrasonic bonding. At least one wiring element includes a first connecting segment, and the first connecting segment establishes a connection between the contact surface and the second line segment of the substrate metallization. If a current, in particular a load current, flows through at least one terminal element, shear forces act on the connection, in particular the ultrasonic bond connection, between the contact surface of the semiconductor element and the terminal element.

[0015] In order to counteract such shear forces, at least one terminal element comprises a second connecting section, which connects the contact surface to a third conductor section of the base metallization, wherein the first, second conductor section and third conductor section are arranged on the base in an electrically insulated manner from one another. The second conductive section and the third conductor section of the base metallization are configured so that during operation of the semiconductor component, the first connecting section and the second connecting section of the at least one terminal element have an asymmetrical current flow. If the second conductor section or the third conductor section is arranged in a suspended manner in addition to being connected to the at least one terminal element, this situation causes the current to flow from the semiconductor component at least mainly, in particular substantially completely, through the first connecting section or the second connecting section of the at least one terminal element. By the additional connection of the second connecting section of the at least one terminal element to the third conductor section, also referred to as "overbonding", the reaction force of the shear forces acts in the opposite direction, so that the connection of the at least one terminal element to the contact surface is made more robust, in particular under load, which has a positive effect on the reliability of the semiconductor component and prolongs its service life.

[0016] The computer program product includes instructions that, when executed by a computer, cause the computer to simulate the behavior of the semiconductor component described above, in particular the thermal, mechanical and / or electrical behavior, which can include a "digital twin" (also referred to as "digital twin"), or be implemented as such a digital twin. For example, such a digital twin is shown in patent application US2017 / 0286572 A1. The disclosure of US 2017 / 0286572 A1 is incorporated into this application by reference. The "digital twin" is, for example, a digital representation of components related to the operation of the semiconductor component.

[0017] Another embodiment provides that the second line section and the third line section of the base metallization are arranged on opposite sides of the semiconductor element. By means of this relative arrangement, the reaction forces of the parallel-running shear forces can be offset, so that optimal robustness can be achieved.

[0018] Another embodiment provides that a first current, in particular a load current, flowing through a first connecting section of the at least one connecting element is one hundred times greater, in particular one thousand times greater, than a second current flowing through a second connecting section of the at least one connecting element. This is the case when, in addition to being connected to the at least one connecting element, the third line section is arranged in a floating manner, while the second line section is connected, for example, to an AC or DC connection. In this way, an optimal robustness of the connection of the at least one connecting element to the contact surface is achieved, in particular under load.

[0019] Another embodiment provides that a third line section connected to the second connecting section of the at least one connecting element is arranged on the substrate in an unloaded manner. The unloaded arrangement of the third line section means that, apart from the at least one connecting element, the third line section is not electrically conductively connected to any further components. In this way, an optimal robustness of the connection of the at least one connecting element to the contact surface is achieved, in particular under load.

[0020] Another embodiment provides that the first connecting section and the second connecting section of at least one terminal element are configured substantially axially symmetrically with respect to the axis of symmetry. By means of this substantially axially symmetrical arrangement, the shear forces that occur are optimally compensated by the reaction forces that counteract the shear forces.

[0021] Another embodiment provides that at least one connection element has a third connection section, which connects the third line section of the base metallization to the contact surface of the other semiconductor element. For example, the semiconductor element is designed as an IGBT, and the other semiconductor element is designed as a diode connected in antiparallel to the semiconductor element. Optionally, the other semiconductor element can also be designed as a further IGBT connected in parallel with the semiconductor element designed as an IGBT. By means of this arrangement, the robustness of the connection of the at least one connection element to the contact surface of the semiconductor element is increased, which has a positive effect on the reliability of the semiconductor component and increases its service life.

[0022] Another embodiment provides that the semiconductor component includes a plurality of connection elements for connecting the contact surface to the second line section and the third line section. This embodiment is particularly advantageous for higher load currents. In addition, the parasitic inductance is reduced by connecting the connection elements in parallel, thereby reducing the switching losses.

[0023] Another embodiment provides that the semiconductor element is wider than the third line section on the side facing the third line section, wherein the main current path of the first line section is formed to extend beyond the third line section on both sides. For example, the load current flows via the first line section to the semiconductor element. In this case, the main current path of the load current extends beyond the third line section on both sides. By implementing the third line section narrower, better current conduction is achieved, for example, so that losses are reduced.

[0024] Another embodiment provides that the main current path of the first line section is designed to extend substantially symmetrically over the third line section. This embodiment achieves an optimized current conduction.

[0025] Another embodiment provides that more connection elements are connected to the second line section than to the third line section. For example, at least one connection element, in particular at least one external connection element, is not used for the second connection section connected to the third line section, thereby enabling a narrower embodiment of the third line section, thereby improving current conduction.

[0026] Another embodiment provides that the third line section of the base metallization comprises at least two electrically insulated connection islands, which are arranged on the base in an unloaded manner, wherein at least one connection element is connected to one of the connection islands of the third line section via a respective second connection section. This separate arrangement allows for better current conduction, for example, resulting in reduced losses.

[0027] Another embodiment provides that two connection islands are arranged on the substrate so that a main current path is formed between the connection islands. For example, the load current flows between the connection islands to the semiconductor element. Through this direct current conduction, losses are reduced.

[0028] Another embodiment proposes that the semiconductor element is implemented as a switchable semiconductor element, in particular as a transistor, and forms a half bridge with at least one other switchable semiconductor element. For example, the semiconductor element is configured as a low-side switch of a half bridge. In particular, the switchable semiconductor element and the other switchable semiconductor element are respectively implemented as at least one IGBT. Due to the circuit topology of the half bridge, the wiring of the low-side switch may have low reliability, which adversely affects the service life of the half bridge. In this example, the reliability of the low-side switch can be improved by overbonding the third line segment through the second connecting segment of the wiring element, thereby improving the service life of the half bridge. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The present invention will be described and explained in more detail below based on the embodiments shown in the drawings.

[0030] In the attached picture:

[0031] Figure 1 shows a schematic diagram of a first embodiment of a semiconductor component in plan view,

[0032] Figure 2 shows a schematic diagram of a first specific embodiment of a semiconductor component in the form of a cross-sectional view,

[0033] Figure 3 shows a schematic diagram of a second embodiment of a semiconductor component in plan view,

[0034] Figure 4 shows a schematic diagram of a third embodiment of a semiconductor component in plan view,

[0035] Figure 5 shows a schematic diagram of a fourth embodiment of a semiconductor component in plan view,

[0036] Figure 6 shows a schematic diagram of a fifth embodiment of a semiconductor component in plan view,

[0037] Figure 7 A schematic diagram of a power converter is shown. DETAILED DESCRIPTION

[0038] The embodiments described below are all preferred embodiments of the present invention. In these embodiments, the components described in the embodiments are separate, independently considered features of the present invention, which also independently further form the invention, and therefore these features are also considered as components of the invention individually or in a combination different from that shown. In addition, the described embodiments can also be supplemented by other features of the present invention that have been described.

[0039] In the different figures, the same reference signs have the same meaning.

[0040] Figure 1 A schematic diagram of a first embodiment of a semiconductor component 2 in the form of a plan view is shown, which includes a semiconductor element 4, which is contacted to a substrate 6. For example, the semiconductor element 4 is designed as an insulated gate bipolar transistor (IGBT). Other examples of such semiconductor elements 4 include triacs, thyristors, diodes or other transistor types, such as field effect transistors or bipolar transistors. The IGBT includes a control terminal, which is designed as a gate terminal G, and load terminals, which are designed as a collector terminal C and an emitter terminal E, wherein the collector terminal C is connected to the substrate 6 in an adhesive bond on the side of the semiconductor element 4 facing the substrate 6.

[0041] The emitter terminal E has a contact surface 8, wherein the gate terminal G has a control contact surface 10 arranged electrically insulated from the contact surface 8 of the emitter terminal E. The contact surface 8 and the control contact surface 10 have at least one metal layer, which contains, for example, aluminum, copper and / or gold. The IGBT is connected to a first conductor section 12 of a base metallization 14 of the base 6, for example, via a solder connection or a sintered connection. In addition, the base 6 has a second conductor section 16 arranged electrically insulated from the first conductor section 12 and a third conductor section 18 implemented in an island-like manner in the first conductor section 12 and electrically insulated from the first conductor section, wherein the second conductor section and the third conductor section 16, 18 of the base metallization 14 are arranged on opposite sides of the semiconductor element 4. In addition, the base 6 also includes a dielectric material layer 20, which contains, for example, a ceramic material, in particular aluminum nitride or aluminum oxide, and has a thickness of 25 to 400 μm, in particular 50 to 250 μm.

[0042] In addition, the semiconductor component 2 further comprises a plurality of connection elements 22, which are used to connect the contact surface 8 of the emitter terminal E to the second and third line sections 16, 18. These connection elements 22 are implemented as bonding wires or bonding strips extending substantially in parallel, which contain, for example, aluminum, copper and / or gold. In addition, the connection elements 22 each have a first connection section 24 and a second connection section 26, the first connection section connecting the contact surface 8 of the emitter terminal E to the second line section 16 of the base metallization 14, and the second connection section connecting the contact surface 8 of the emitter terminal E to the third line section 18 of the base metallization 14. The third line section 18 connected to the second connection section 26 of the corresponding connection element 22 is arranged in an unloaded manner on the substrate 6. The unloaded arrangement allows a first current I1, in particular a load current, to flow from the emitter E via the first connection section 24 of the corresponding connection element 22 during operation, while a negligibly small second current I2 flows via the second connection section 26. In particular, the first current I1 is one hundred times greater, in particular one thousand times greater, than the second current I2. Therefore, during operation of the semiconductor component 2, the first connecting section 24 and the second connecting section 26 have an asymmetrical current flow.

[0043] Figure 2 A schematic diagram of a first embodiment of a semiconductor component 2 is shown in the form of a cross-sectional view. The wiring element 22 is designed as a bonding wire and has a plurality of spliced ​​connections 32 implemented on the contact surface 8 between the first connection section 24 and the second connection section 26, wherein the connection is produced by ultrasonic bonding. The connection of the wiring element 22 to the contact surface 8 of the semiconductor element 4 is produced by means of a loop of the wiring element 22, in particular by means of a multi-splice wedge-to-wedge wire bonding. Multiple bonding is also referred to as "splicing". Usually, such a spliced ​​connection 32 is also referred to as "splicing bonding", and the splicing bonding can be implemented as "wedge bonding", for example. The first connection section 24 and the second connection section 26 of each wiring element 22 are substantially axially symmetrical about the axis of symmetry 30.

[0044] If the first current I1, in particular the load current, flows via the connecting element 22, the shear force F1 acts on the connection 32, in particular the ultrasonic bonding connection. Since the connecting element 22 is overbonded on the third line section 18 via the second connecting section 26, the reaction force F2 can counteract the shear force F1, thereby making the connection 32 more robust, especially under load. As a result, a longer service life of the semiconductor component 2 is achieved by overbonding.

[0045] Figure 3The schematic diagram of a second embodiment of a semiconductor component 2 is shown in plan view, in which a semiconductor element 4 designed as an IGBT forms a half bridge with a further semiconductor element 34 also designed as an IGBT. The semiconductor elements 4, 34 each have a diode 36 connected in antiparallel.

[0046] The semiconductor element 4 is configured as a low-side switch of a half-bridge. The first line section 12 of the substrate 6 is connected to the AC terminal AC via a shunt resistor 38, while the second line section 16 is connected to the negative DC terminal DCN of the half-bridge. The further semiconductor element 34 is connected, in particular adhesively, to a fourth line section 40 of the substrate metallization 14, wherein the fourth line section 40 is connected to the positive DC terminal DCP of the half-bridge. The load current path IL of the first line section 12 is designed to extend beyond the third line section 18 on both sides. In addition, the semiconductor component 2 includes a temperature sensor, which is designed, for example, as an NTC thermistor (negative temperature coefficient thermistor). Figure 3 Other embodiments of the semiconductor component 2 Figure 1 or Figure 2 The implementation method in corresponds to .

[0047] Figure 4 A schematic diagram of a third embodiment of a semiconductor component 2 is shown in the form of a plan view. The third line segment 18 of the substrate metallization 14 has two terminal islands 42, 44, which are arranged electrically insulated from each other and are each arranged in an unloaded manner on the substrate 6. The second connecting sections 26 of the wiring elements 22 are each connected to one of the terminal islands 42, 44 of the third line segment 18. For example, three terminal elements 22 are connected to the first terminal island 42, and two terminal elements 22 are connected to the second terminal island 44. Exemplarily, the rectangular terminal islands 42, 44 are arranged at intervals on the substrate 6, so that a main current path IH between the semiconductor elements 4, 34 is implemented between the terminal islands. Figure 4 Another embodiment of the semiconductor component 2 in Figure 3 Corresponding to the implementation method in.

[0048] Figure 5 A schematic diagram of a fourth embodiment of a semiconductor component 2 in the form of a plan view is shown, wherein, by way of example, only three of the five connection elements 22 for connecting the contact surface 8 of the semiconductor element 4 to the substrate 6 are connected to the third line section 18 via the second connecting section 26. The semiconductor element 4 has a first width b1 on the side facing the third line section 18, while the third line section 18 has a second width b2, which is smaller than the first width b1. The main current path IH of the first line section 12 is designed to extend substantially symmetrically on both sides beyond the third line section 18. Figure 5 Other embodiments of the semiconductor component 2 in Figure 3 Corresponding to the implementation method in.

[0049] Figure 6 A schematic diagram of a fifth embodiment of a semiconductor component 2 is shown in the form of a plan view, in which a further semiconductor element 34 is connected via a terminal element 22, which is used to connect the contact surface 8 of the semiconductor element 4 (for example, implemented as an IGBT) to the second line section 1 and the third line section 16, 18. The terminal element 22 has a third connecting section 46, which connects the third line section 18 of the base metallization 14 to the further semiconductor element 34. The further semiconductor element 34 is designed, for example, as a diode connected in anti-parallel to the semiconductor element 4. In addition or alternatively, the further semiconductor element 34 can include at least one further IGBT connected in parallel with the semiconductor element 4. The third line section 18 is designed for no-load operation, that is, apart from the terminal element 22, the third line section 18 is not electrically conductively connected to any further components. In Figure 6 Other embodiments of the semiconductor component 2 in Figure 1 or Figure 2 Corresponding to the implementation method in.

[0050] Figure 7 A schematic diagram of a power converter 48 is shown, which includes, for example, a semiconductor component 2 .

Claims

1. A semiconductor component (2) comprising a semiconductor element (4), a substrate (6) and at least one connection element (22), in, The substrate (6) has a substrate metallization (14) having line sections (12, 16, 18) which are arranged electrically insulated from one another. wherein the semiconductor element (4) is connected to the first line section (12) of the base metallization (14), in particular by adhesive bonding, The semiconductor element (4) has a contact surface (8) on a side facing away from the substrate (6). The contact surface (8) of the semiconductor element (4) is connected to the substrate (6) via at least one connection element (22). The at least one terminal element (22) comprises: a first connecting section (24) which connects the contact surface (8) to a second line section (16) of the base metallization (14), and a second connecting section (26) which connects the contact surface (8) to a third line section (18) of the base metallization (14), The second line section and the third line section (16, 18) of the base metallization (14) are configured such that the first connecting section (24) and the second connecting section (26) have an asymmetrical current flow during operation of the semiconductor component (2).

2. The semiconductor component (2) according to claim 1, wherein: The second line section and the third line section (16, 18) of the base metallization (14) are arranged on opposite sides of the semiconductor element (4).

3. The semiconductor component (2) according to claim 1, wherein: A first current (I1), in particular a load current, flowing through the first connecting section (24) of the at least one connecting element (22) is one hundred times, in particular one thousand times, greater than a second current (I2) flowing through the second connecting section (26) of the at least one connecting element (22).

4. The semiconductor component (2) according to any one of the preceding claims, wherein: The third line section (18) connected to the second connecting section (26) of the at least one terminal element (22) is arranged on the substrate (6) in an unloaded manner.

5. The semiconductor component (2) according to any one of the preceding claims, wherein: The first connecting section (24) and the second connecting section (26) of the at least one terminal element (22) are substantially axially symmetrical about an axis of symmetry (30).

6. The semiconductor component (2) according to any one of the preceding claims, wherein: The at least one connection element (22) has a third connecting section (46) which connects the third line section (18) of the base metallization (14) to a contact surface (8) of a further semiconductor element (34).

7. The semiconductor component (2) according to any one of the preceding claims, wherein: The semiconductor component (2) comprises a plurality of connection elements (22) for connecting the contact surface (8) to the second line section and the third line section (16, 18).

8. The semiconductor component (2) according to claim 7, wherein: The semiconductor element (4) is wider than the third line section (18) on a side facing the third line section (18), Therein, a main current path (IH) of the first line section (12) is designed to extend beyond the third line section (18) on both sides.

9. The semiconductor component (2) according to claim 8, wherein: The main current path (IH) of the first line section (12) is configured to extend substantially symmetrically over the third line section (18).

10. The semiconductor component (2) according to any one of claims 7 to 9, wherein: The number of connection elements (22) connected to the second line section (16) is greater than the number of connection elements connected to the third line section (18).

11. The semiconductor component (2) according to claim 7, wherein: The third line section (18) of the base metallization (14) comprises at least two terminal islands (42, 44), which are arranged electrically insulated from one another and arranged in an unloaded manner on the base (6), Therein, at least one terminal element (22) is connected to one of the terminal islands (42, 44) of the third line section (18) via a respective second connecting section (26).

12. The semiconductor component (2) according to claim 11, wherein: Two connection islands (42, 44) are arranged on the substrate (6) in such a way that a main current path (IH) is designed to extend between the connection islands (42, 44).

13. The semiconductor component (2) according to any one of the preceding claims, wherein: The semiconductor element (4) is embodied as a switchable semiconductor element, in particular as a transistor, and is embodied as a half bridge with at least one further switchable semiconductor element (34).

14. A power converter (48) having at least one semiconductor component (2) according to any one of the preceding claims.

15. A method for producing a semiconductor component (2) according to any one of claims 1 to 13, in, The semiconductor element (4) is connected to the substrate (6), in particular by adhesive bonding. In a further step, the contact area (8) of the semiconductor element (4) is connected to the substrate (6) via the at least one connection element (22). 16 . A computer program product comprising instructions which, when a computer executes the program, cause the computer to implement the behavior, in particular thermal, mechanical and / or electrical behavior, of the semiconductor component ( 2 ) according to claim 1 .

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