Three-way multimedia interface audio switching circuit
By combining a digital audio signal input module and an ADC conversion module, the noise and synchronization problems of the audio switching circuit were solved, enabling synchronous transmission of audio and video signals and reducing circuit noise.
Patent Information
- Application Number
- CN202420726842.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-09
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2034-04-09
AI Technical Summary
Existing audio switching circuits generate noise during switching, and the ADC and DAC buses of ARM processors cannot achieve synchronous processing of audio and video signals.
By combining a digital audio signal input module, a DAC conversion module, an analog audio signal preprocessing module, an analog adder module, and an ADC conversion module, and through a three-channel video audio interface circuit module and a one-channel ADC conversion module, synchronous processing of audio and video signals is achieved, avoiding noise generated by switching.
It achieves synchronous processing of audio and video signals, reduces circuit noise, and ensures synchronous transmission of audio and video signals.
Smart Images
Figure CN222147674U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of audio signal processing circuits, in particular to a three-way multimedia interface audio switching circuit. Background Art
[0002] HDMI cable is a high-definition multimedia interface, an interface standard that has both high-definition digital video and digital audio transmission capabilities. It is a dedicated digital interface suitable for image transmission. It can transmit audio and image signals at the same time. Existing audio switching circuits mostly use a three-in-one switch selection, but noise is generated when the switch is switched. Only one of the three audio signals is selected. After the existing three-way audio (ADC digital to analog) decoded by the video is converted into an analog signal, the three-way audio is added using analog addition. However, the IIS bus of the ADC (analog to digital) of the ARM processor and the three-way IIS (DAC digital to analog conversion) bus are set separately, and the audio and video signals cannot be synchronized. Utility Model Content
[0003] In order to solve the above technical problems, the purpose of the utility model is to provide a three-way multimedia interface audio switching circuit, which can avoid the existence of circuit noise and realize the synchronous processing of audio signals and video signals.
[0004] The first technical solution adopted by the utility model is: comprising a digital audio signal input module, a DAC conversion module, an analog audio signal preprocessing module, an analog adder module, an ADC conversion module and a digital audio signal output module, wherein the output end of the digital audio signal input module is connected to the input end of the DAC conversion module, the output end of the DAC conversion module is connected to the input end of the analog audio signal preprocessing module, the output end of the analog audio signal preprocessing module is connected to the input end of the analog adder module, the output end of the analog adder module is connected to the input end of the ADC conversion module, and the output end of the ADC conversion module is connected to the input end of the digital audio signal output module.
[0005] Further, the digital audio signal input module includes a first chip, a second chip, a third chip, a first AND gate, a second AND gate and a third AND gate, wherein the 42nd pin of the first chip is connected to the second pin of the first AND gate, the 42nd pin of the second chip is connected to the fifth pin of the second AND gate, the 42nd pin of the third chip is connected to the tenth pin of the third AND gate, the 46th pin of the first chip, the 46th pin of the second chip and the 46th pin of the third chip are connected to the first connection point, the 45th pin of the first chip, the 45th pin of the second chip and the 45th pin of the third chip are connected to the second connection point, the 41st pin of the first chip, the 41st pin of the second chip and the 41st pin of the third chip are connected to the third connection point, the first pin of the first AND gate is connected to the first control signal, the fourth pin of the second AND gate is connected to the second control signal, the ninth pin of the third AND gate is connected to the third control signal, and the third pin of the first AND gate, the sixth pin of the second AND gate and the eighth pin of the third AND gate are all connected to the DAC conversion module.
[0006] Furthermore, the first chip and the first AND gate constitute an audio interface circuit module for the first video channel, the second chip and the second AND gate constitute an audio interface circuit module for the second video channel, and the third chip and the third AND gate constitute an audio interface circuit module for the third video channel.
[0007] Further, the DAC conversion module includes a fourth chip, a fifth chip, a sixth chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor and an eighteenth capacitor, wherein a first pin of the fourth chip is connected to a third pin of the first AND gate, a first pin of the fifth chip is connected to a sixth pin of the second AND gate, a first pin of the sixth chip is connected to an eighth pin of the third AND gate, a second pin of the fourth chip, a second pin of the fifth chip and a second pin of the sixth chip are connected The third pin of the fourth chip, the third pin of the fifth chip and the third pin of the sixth chip are all connected to the second connection point, the fourth pin of the fourth chip, the fourth pin of the fifth chip and the fourth pin of the sixth chip are all connected to the third connection point, the fifth pin of the fourth chip is connected to the first end of the first capacitor and the first end of the second capacitor, the second end of the first capacitor and the second end of the second capacitor are connected and grounded, the fifth pin of the fifth chip is connected to the first end of the seventh capacitor and the first end of the eighth capacitor, the second end of the seventh capacitor and the second end of the eighth capacitor are connected and grounded, the fifth pin of the sixth chip is connected to the first end of the seventh capacitor and the first end of the eighth capacitor, the second end of the seventh capacitor and the second end of the eighth capacitor are connected and grounded, the fifth pin of the sixth chip is connected to the The first end of the thirteenth capacitor and the first end of the fourteenth capacitor are connected, the second end of the thirteenth capacitor and the second end of the fourteenth capacitor are connected and grounded, the tenth pin of the fourth chip, the seventh pin of the fourth chip, the tenth pin of the fifth chip, the seventh pin of the fifth chip, the tenth pin of the sixth chip and the seventh pin of the sixth chip are all connected to the analog audio signal preprocessing module, the ninth pin of the fourth chip is connected to the first end of the fifth capacitor and the first end of the sixth capacitor, the sixth pin of the fourth chip is connected to the first end of the third capacitor and the first end of the fourth capacitor, the second end of the third capacitor, the second end of the fourth capacitor, the fifth capacitor and the sixth capacitor are ... fourth capacitor, the fifth capacitor and the sixth capacitor are connected to the analog audio signal preprocessing module, the ninth pin of the fourth chip is connected to the first end of the fifth capacitor and the first end of the sixth capacitor, the ninth pin of the fourth chip is connected to the first end of the third capacitor and the first end of the fourth capacitor, the second end of the The second end, the second end of the sixth capacitor and the eighth pin of the fourth chip are connected and grounded, the ninth pin of the fifth chip is connected to the first end of the eleventh capacitor and the first end of the twelfth capacitor, the sixth pin of the fifth chip is connected to the first end of the ninth capacitor and the first end of the tenth capacitor, the second end of the ninth capacitor, the second end of the tenth capacitor, the second end of the eleventh capacitor, the second end of the twelfth capacitor and the eighth pin of the fifth chip are connected and grounded, the ninth pin of the sixth chip is connected to the first end of the seventeenth capacitor and the first end of the eighteenth capacitor, the sixth pin of the sixth chip is connected to the first end of the fifteenth capacitor and the first end of the sixteenth capacitor,The second end of the fifteenth capacitor, the second end of the sixteenth capacitor, the second end of the seventeenth capacitor, the second end of the eighteenth capacitor and the eighth pin of the sixth chip are connected and grounded.
[0008] Further, the fourth chip, the first capacitor, the second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor and the sixth capacitor constitute a first video DAC conversion module, the fifth chip, the seventh capacitor, the eighth capacitor, the ninth capacitor, the tenth capacitor, the eleventh capacitor and the twelfth capacitor constitute a second video DAC conversion module, and the sixth chip, the thirteenth capacitor, the fourteenth capacitor, the fifteenth capacitor, the sixteenth capacitor, the seventeenth capacitor and the eighteenth capacitor constitute a third video DAC conversion module.
[0009] Further, the analog audio signal preprocessing module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a nineteenth capacitor, a twentieth capacitor, a twenty-first capacitor, a twenty-second capacitor, a twenty-third capacitor and a twenty-fourth capacitor, the first end of the nineteenth capacitor is connected to the tenth pin of the fourth chip, the first end of the twentieth capacitor is connected to the seventh pin of the fourth chip, the second end of the nineteenth capacitor is connected to the first end of the first resistor, the second end of the twentieth capacitor is connected to the first end of the second resistor, the second end of the first resistor and the second end of the second resistor are both connected to the analog adder module, the first end of the twenty-first capacitor is connected to the tenth pin of the fifth chip, and the The first end of the twenty-second capacitor is connected to the seventh pin of the fifth chip, the second end of the twenty-first capacitor is connected to the first end of the third resistor, the second end of the twenty-second capacitor is connected to the first end of the fourth resistor, the second end of the third resistor and the second end of the fourth resistor are both connected to the analog adder module, the first end of the twenty-third capacitor is connected to the tenth pin of the sixth chip, the first end of the twenty-fourth capacitor is connected to the seventh pin of the sixth chip, the second end of the twenty-third capacitor is connected to the first end of the fifth resistor, the second end of the twenty-fourth capacitor is connected to the first end of the sixth resistor, and the second end of the fifth resistor and the second end of the sixth resistor are both connected to the analog adder module.
[0010] Further, the first resistor, the second resistor, the nineteenth capacitor and the twenty-th capacitor constitute a first analog audio signal preprocessing module, the third resistor, the fourth resistor, the twenty-first capacitor and the twenty-second capacitor constitute a second analog audio signal preprocessing module, and the fifth resistor, the sixth resistor, the twenty-third capacitor and the twenty-fourth capacitor constitute a third analog audio signal preprocessing module.
[0011] Further, the analog adder module includes a first analog operational amplifier, a second analog operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a twenty-fifth capacitor and a twenty-sixth capacitor, wherein the second pin of the first analog operational amplifier, the first end of the seventh resistor, and the first end of the twenty-fifth capacitor are respectively connected to the second end of the first resistor, the second end of the third resistor and the second end of the fifth resistor, the sixth pin of the second analog operational amplifier, the first end of the ninth resistor, and the first end of the twenty-sixth capacitor are respectively connected to the second end of the second resistor, the second end of the fourth resistor and the second end of the sixth resistor, the first pin of the first analog operational amplifier, the second end of the seventh resistor, the second end of the twenty-fifth capacitor and the first end of the eighth resistor are connected, the seventh pin of the second analog operational amplifier, the second end of the ninth resistor, the second end of the twenty-sixth capacitor and the first end of the tenth resistor are connected, the third pin of the first analog operational amplifier and the fifth pin of the second analog operational amplifier are both grounded, and the second end of the eighth resistor and the second end of the tenth resistor are both connected to the ADC conversion module.
[0012] Further, the ADC conversion module includes a seventh chip, an eleventh resistor, a twelfth resistor, a twenty-seventh capacitor, a twenty-eighth capacitor, a twenty-ninth capacitor, a thirtieth capacitor, a thirty-first capacitor, a thirty-second capacitor, a thirty-third capacitor, and a thirty-fourth capacitor, wherein the first pin of the seventh chip, the second pin of the seventh chip, the third pin of the seventh chip, and the fourth pin of the seventh chip are all connected to the digital audio signal output module, the fifth pin of the seventh chip, the first end of the thirty-first capacitor, and the first end of the thirty-second capacitor are connected, the sixth pin of the seventh chip is connected to the first end of the thirtieth capacitor, the seventh pin of the seventh chip, the first end of the thirty-third capacitor, and the first end of the thirty-fourth capacitor are connected, and the thirty-first pin of the seventh chip is connected to the first end of the thirty-third capacitor. The second end of the thirty-second capacitor, the second end of the thirty-third capacitor and the second end of the thirty-fourth capacitor are connected and grounded, the second end of the thirtieth capacitor is connected to the first end of the twelfth resistor, the second end of the twelfth resistor is connected to the second end of the eighth resistor, the eighth pin of the seventh chip is connected to the first end of the twenty-ninth capacitor, the second end of the twenty-ninth capacitor is connected to the first end of the eleventh resistor, the second end of the eleventh resistor is connected to the second end of the tenth resistor, the ninth pin of the seventh chip, the second end of the twenty-seventh capacitor and the second end of the twenty-eighth capacitor are connected and grounded, the tenth pin of the seventh chip, the first end of the twenty-seventh capacitor and the first end of the twenty-eighth capacitor are connected and connected to a high level.
[0013] Further, the digital audio signal output module includes an eighth chip, a first pin of the eighth chip is connected to the first pin of the seventh chip, a second pin of the eighth chip and a second pin of the seventh chip are connected to a first connection point of the digital audio signal input module, a third pin of the eighth chip and a third pin of the seventh chip are connected to a second connection point of the digital audio signal input module, and a fourth pin of the eighth chip and a fourth pin of the seventh chip are connected to a third connection point of the digital audio signal input module.
[0014] The beneficial effect of the utility model is: through a digital audio signal input module, wherein the digital audio signal input module includes an audio interface circuit module for three-way video, and then through a one-way ADC conversion module for conversion processing, thereby ensuring the synchronous processing of the audio signal and the video signal, while avoiding switch switching and reducing the existence of circuit noise. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 This is a structural block diagram of a three-way multimedia interface audio switching circuit of the utility model;
[0016] Figure 2 This is a specific circuit diagram of a digital audio signal input module of a specific embodiment of the utility model;
[0017] Figure 3 This is a specific circuit diagram of a DAC conversion module in a specific embodiment of the utility model;
[0018] Figure 4 This is a specific circuit diagram of the analog audio signal preprocessing module of the specific embodiment of the utility model;
[0019] Figure 5 It is a specific circuit diagram of the analog adder module of a specific embodiment of the utility model;
[0020] Figure 6 This is a specific circuit diagram of the ADC conversion module of a specific embodiment of the utility model;
[0021] Figure 7 It is a specific circuit diagram of a digital audio signal output module of a specific embodiment of the utility model.
[0022] Reference numerals: U1, first chip; U2, second chip; U3, third chip; U4, fourth chip; U5, fifth chip; U6, sixth chip; U7, seventh chip; U8, eighth chip; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; R7, seventh resistor; R8, eighth resistor;
[0023] R9, the ninth resistor; R10, the tenth resistor; R11, the eleventh resistor; R12, the twelfth resistor; C1, the first capacitor; C2, the second capacitor; C3, the third capacitor; C4, the fourth capacitor; C5, the fifth capacitor; C6, the sixth capacitor; C7, the seventh capacitor;
[0024] C8, the eighth capacitor; C9, the ninth capacitor; C10, the tenth capacitor; C11, the eleventh capacitor; C12, the twelfth capacitor; C13, the thirteenth capacitor; C14, the fourteenth capacitor; C15, the fifteenth capacitor; C16, the sixteenth capacitor; C17, the seventeenth capacitor;
[0025] C18, the eighteenth capacitor; C19, the nineteenth capacitor; C20, the twentieth capacitor; C21, the twenty-first capacitor; C22, the twenty-second capacitor; C23, the twenty-third capacitor; C24, the twenty-fourth capacitor; C25, the twenty-fifth capacitor; C26, the twenty-sixth capacitor; C27, the twenty-seventh capacitor; C28, the twenty-eighth capacitor; C29, the twenty-ninth capacitor; C30, the thirtieth capacitor; C31, the thirty-first capacitor; C32, the thirty-second capacitor; C33, the thirty-third capacitor; C34, the thirty-fourth capacitor; U4A, the first analog operational amplifier; U4B, the second analog operational amplifier; U20A, the first AND gate; U20B, the second AND gate; U20C, the third AND gate. DETAILED DESCRIPTION
[0026] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The step numbers in the following embodiments are only provided for the convenience of explanation and description, and the order between the steps is not limited in any way. The execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.
[0027] It should be noted that, unless otherwise specified, the singular forms "a", "said" and "the" used in this disclosure are also intended to include plural forms, unless the context clearly indicates other meanings. In addition, unless otherwise defined, all technical and scientific terms used herein have the same meanings as those generally understood by those skilled in the art. The terms used in this specification are only for describing specific embodiments and are not intended to limit the present utility model. The term "and / or" used herein includes any combination of one or more related listed items.
[0028] Reference Figure 1The utility model provides a clipping distortion circuit, including a digital audio signal input module, a DAC conversion module, an analog audio signal preprocessing module, an analog adder module, an ADC conversion module and a digital audio signal output module, the output end of the digital audio signal input module is connected to the input end of the DAC conversion module, the output end of the DAC conversion module is connected to the input end of the analog audio signal preprocessing module, the output end of the analog audio signal preprocessing module is connected to the input end of the analog adder module, the output end of the analog adder module is connected to the input end of the ADC conversion module, and the output end of the ADC conversion module is connected to the input end of the digital audio signal output module.
[0029] Specifically, Figure 1 As shown, three IIS (DAC digital-to-analog conversion) and one IIS (ADC analog-to-digital conversion) buses are connected. One IIS bus is enough. The ARM system is the IIS master device, and the video decoder chip, DAC chip and ADC chip are all IIS slave devices. Since the IIS clock signal is provided by the ARM system and there is only one master device, the signal clock lines of the IIS slave devices are connected together. The rising edge and falling edge of each signal are the same. This ensures 100% synchronization of the audio signal and the video signal.
[0030] As a further preferred embodiment of the present invention, Figure 2 As shown, the digital audio signal input module includes a first chip U1, a second chip U2, a third chip U3, a first AND gate U20A, a second AND gate U20B and a third AND gate U20C, wherein the 42nd pin of the first chip is connected to the second pin of the first AND gate, the 42nd pin of the second chip is connected to the fifth pin of the second AND gate, the 42nd pin of the third chip is connected to the tenth pin of the third AND gate, the 46th pin of the first chip, the 46th pin of the second chip and the 46th pin of the third chip are connected to the first connection point, the 45th pin of the first chip, the 45th pin of the second chip and the 45th pin of the third chip are connected to the second connection point, the 41st pin of the first chip, the 41st pin of the second chip and the 41st pin of the third chip are connected to the third connection point, the first pin of the first AND gate is connected to the first control signal, the fourth pin of the second AND gate is connected to the second control signal, the ninth pin of the third AND gate is connected to the third control signal, and the third pin of the first AND gate, the sixth pin of the second AND gate and the eighth pin of the third AND gate are all connected to the DAC conversion module.
[0031] Further as a preferred embodiment of the utility model, the first chip and the first AND gate constitute an audio interface circuit module for the first video channel, the second chip and the second AND gate constitute an audio interface circuit module for the second video channel, and the third chip and the third AND gate constitute an audio interface circuit module for the third video channel.
[0032] Specifically, the first chip, the second chip and the third chip are all IT66021FN model chips. The IT66021FN chip is a single-port HDMI receiver, which is fully compatible with HDMI 1.4b, HDMI 1.4b 3D and HDCP 1.4 and backward compatible with DVI 1.0 specifications. The IT66021FN has a deep color function (up to 36 bits), which ensures good reception of high-quality uncompressed video content. The IT66021FN also supports all major 3D formats that comply with the HDMI 1.4b 3D specification. In addition to supporting multiple video output formats, the IT66021FN can also accept and provide up to 4 IS digital audio output channels with a sampling rate of up to 192kHz and sampling content of up to 24 bits, which is convenient for direct connection to industry-standard low-cost audio DACs. In addition, an S / PDIF output is provided to support compressed audio at a frame rate of 192kHz. The video signals of the three-way video are connected to the ARM core board.
[0033] Among them, the first AND gate, the second AND gate and the third AND gate are all 74HC08 chips. When the control signal ONOFF_A1, A2, A3 is 0, the AND gate chip output is 0. The audio data is 0. When the control signal ONOFF_A1, A2, A3 is 1, the AND gate chip output is determined by the audio data 1 or 0. It is equivalent to outputting audio data.
[0034] As a further preferred embodiment of the present invention, Figure 3As shown, the DAC conversion module includes a fourth chip U4, a fifth chip U5, a sixth chip U6, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a seventeenth capacitor C17 and an eighteenth capacitor C18, wherein the first pin of the fourth chip is connected to the third pin of the first AND gate, the first pin of the fifth chip is connected to the sixth pin of the second AND gate, and the first pin of the sixth chip is connected to the third AND gate. The eighth pin of the gate is connected, the second pin of the fourth chip, the second pin of the fifth chip and the second pin of the sixth chip are all connected to the first connection point, the third pin of the fourth chip, the third pin of the fifth chip and the third pin of the sixth chip are all connected to the second connection point, the fourth pin of the fourth chip, the fourth pin of the fifth chip and the fourth pin of the sixth chip are all connected to the third connection point, the fifth pin of the fourth chip is connected to the first end of the first capacitor and the first end of the second capacitor, the second end of the first capacitor and the second end of the second capacitor are connected and grounded, the fifth pin of the fifth chip is connected to the first end of the seventh capacitor and the first end of the eighth capacitor, the second end of the seventh capacitor and the second end of the eighth capacitor are connected and grounded, the sixth chip The fifth pin of the fourth chip is connected to the first end of the thirteenth capacitor and the first end of the fourteenth capacitor, the second end of the thirteenth capacitor and the second end of the fourteenth capacitor are connected and grounded, the tenth pin of the fourth chip, the seventh pin of the fourth chip, the tenth pin of the fifth chip, the seventh pin of the fifth chip, the tenth pin of the sixth chip and the seventh pin of the sixth chip are all connected to the analog audio signal preprocessing module, the ninth pin of the fourth chip is connected to the first end of the fifth capacitor and the first end of the sixth capacitor, the sixth pin of the fourth chip is connected to the first end of the third capacitor and the first end of the fourth capacitor, the second end of the third capacitor, the second end of the fourth capacitor, the second end of the fifth capacitor, the second end of the sixth capacitor and the eighth pin of the fourth chip are connected and The ninth pin of the fifth chip is connected to the first end of the eleventh capacitor and the first end of the twelfth capacitor, the sixth pin of the fifth chip is connected to the first end of the ninth capacitor and the first end of the tenth capacitor, the second end of the ninth capacitor, the second end of the tenth capacitor, the second end of the eleventh capacitor, the second end of the twelfth capacitor and the eighth pin of the fifth chip are connected to ground, the ninth pin of the sixth chip is connected to the first end of the seventeenth capacitor and the first end of the eighteenth capacitor, the sixth pin of the sixth chip is connected to the first end of the fifteenth capacitor and the first end of the sixteenth capacitor, the second end of the fifteenth capacitor, the second end of the sixteenth capacitor, the second end of the seventeenth capacitor, the second end of the eighteenth capacitor and the eighth pin of the sixth chip are connected to ground.
[0035] Further as a preferred embodiment of the utility model, the fourth chip, the first capacitor, the second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor and the sixth capacitor constitute a first video DAC conversion module, the fifth chip, the seventh capacitor, the eighth capacitor, the ninth capacitor, the tenth capacitor, the eleventh capacitor and the twelfth capacitor constitute a second video DAC conversion module, and the sixth chip, the thirteenth capacitor, the fourteenth capacitor, the fifteenth capacitor, the sixteenth capacitor, the seventeenth capacitor and the eighteenth capacitor constitute a third video DAC conversion module.
[0036] Specifically, the fourth, fifth and sixth chips are all CS4344 chips, and the CS5343 chip can perform sampling, digital-to-analog conversion (ADC) and anti-aliasing filtering, and can generate 24-bit values for left and right inputs at a sampling rate of up to 108kHz per channel in serial format, providing 98dB of dynamic range and -92db of total harmonic distortion (THD) +N. The only difference is the serial audio interface format support, CS5343 supports I 2 S format, CS5344 supports left-aligned serial data format.
[0037] The stereo audio digital-to-analog converter (DAC), or DAC conversion module, is a complete 2-channel output digital-to-analog conversion chip that contains an interpolation filter, a Multi-Bit digital-to-analog converter, an output analog filter, and supports most audio data. 2 S format. Based on a fourth-order Multi-Bit Δ∑ modulator with a linear analog low-pass filter, it automatically detects the signal frequency and the main clock frequency and automatically adjusts the sampling rate between 2KHz and 200KHz. Contains a digital de-emphasis module.
[0038] As a further preferred embodiment of the present invention, Figure 4As shown, the analog audio signal preprocessing module includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a nineteenth capacitor C19, a twentieth capacitor C20, a twenty-first capacitor C21, a twenty-second capacitor C22, a twenty-third capacitor C23 and a twenty-fourth capacitor C24, a first end of the nineteenth capacitor is connected to the tenth pin of the fourth chip, a first end of the twentieth capacitor is connected to the seventh pin of the fourth chip, a second end of the nineteenth capacitor is connected to the first end of the first resistor, a second end of the twentieth capacitor is connected to the first end of the second resistor, a second end of the first resistor and a second end of the second resistor are both connected to the analog adder module, and a second The first end of the eleventh capacitor is connected to the tenth pin of the fifth chip, the first end of the twenty-second capacitor is connected to the seventh pin of the fifth chip, the second end of the twenty-first capacitor is connected to the first end of the third resistor, the second end of the twenty-second capacitor is connected to the first end of the fourth resistor, the second end of the third resistor and the second end of the fourth resistor are both connected to the analog adder module, the first end of the twenty-third capacitor is connected to the tenth pin of the sixth chip, the first end of the twenty-fourth capacitor is connected to the seventh pin of the sixth chip, the second end of the twenty-third capacitor is connected to the first end of the fifth resistor, the second end of the twenty-fourth capacitor is connected to the first end of the sixth resistor, and the second end of the fifth resistor and the second end of the sixth resistor are both connected to the analog adder module.
[0039] Further as a preferred embodiment of the utility model, the first resistor, the second resistor, the nineteenth capacitor and the twentieth capacitor constitute a first analog audio signal preprocessing module, the third resistor, the fourth resistor, the twenty-first capacitor and the twenty-second capacitor constitute a second analog audio signal preprocessing module, and the fifth resistor, the sixth resistor, the twenty-third capacitor and the twenty-fourth capacitor constitute a third analog audio signal preprocessing module.
[0040] As a further preferred embodiment of the present invention, Figure 5As shown, the analog adder module includes a first analog operational amplifier U4A, a second analog operational amplifier U4B, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a twenty-fifth capacitor C25 and a twenty-sixth capacitor C26, wherein the second pin of the first analog operational amplifier, the first end of the seventh resistor, and the first end of the twenty-fifth capacitor are respectively connected to the second end of the first resistor, the second end of the third resistor and the second end of the fifth resistor, the sixth pin of the second analog operational amplifier, the first end of the ninth resistor, and the first end of the twenty-sixth capacitor are respectively connected to the second end of the second resistor, the second end of the fourth resistor and the second end of the sixth resistor, the first pin of the first analog operational amplifier, the second end of the seventh resistor, the second end of the twenty-fifth capacitor and the first end of the eighth resistor are connected, the seventh pin of the second analog operational amplifier, the second end of the ninth resistor, the second end of the twenty-sixth capacitor and the first end of the tenth resistor are connected, the third pin of the first analog operational amplifier and the fifth pin of the second analog operational amplifier are both grounded, and the second end of the eighth resistor and the second end of the tenth resistor are both connected to the ADC conversion module.
[0041] Specifically, the first analog operational amplifier and the second analog operational amplifier are both NJM4580M chips, which are dual-channel operational amplifiers specially designed for improving audio control and are most suitable for audio applications. This product has no noise, higher gain bandwidth, high output current and low distortion, and is not only very suitable for the audio electronics part and active filter of the audio preamplifier, but also for industrial measurement tools. It is also suitable for headphone amplifiers with higher output current, etc. It can be applied to general-purpose convenient operational amplifiers, as well as low-voltage single-power supply types that are appropriately biased with a low-voltage source.
[0042] As a further preferred embodiment of the present invention, Figure 6As shown, the ADC conversion module includes a seventh chip U7, an eleventh resistor R11, a twelfth resistor R12, a twenty-seventh capacitor C27, a twenty-eighth capacitor C28, a twenty-ninth capacitor C29, a thirtieth capacitor C30, a thirty-first capacitor C31, a thirty-second capacitor C32, a thirty-third capacitor C33, and a thirty-fourth capacitor C34, wherein the first pin of the seventh chip, the second pin of the seventh chip, the third pin of the seventh chip, and the fourth pin of the seventh chip are all connected to the digital audio signal output module, the fifth pin of the seventh chip, the first end of the thirty-first capacitor, and the first end of the thirty-second capacitor are connected, the sixth pin of the seventh chip is connected to the first end of the thirtieth capacitor, and the seventh pin of the seventh chip and the first end of the thirty-third capacitor are connected. And the first end of the thirty-fourth capacitor is connected, the second end of the thirty-first capacitor, the second end of the thirty-second capacitor, the second end of the thirty-third capacitor and the second end of the thirty-fourth capacitor are connected and grounded, the second end of the 30th capacitor is connected to the first end of the twelfth resistor, the second end of the twelfth resistor is connected to the second end of the eighth resistor, the eighth pin of the seventh chip is connected to the first end of the twenty-ninth capacitor, the second end of the twenty-ninth capacitor is connected to the first end of the eleventh resistor, the second end of the eleventh resistor is connected to the second end of the tenth resistor, the ninth pin of the seventh chip, the second end of the twenty-seventh capacitor and the second end of the twenty-eighth capacitor are connected and grounded, the tenth pin of the seventh chip, the first end of the twenty-seventh capacitor and the first end of the twenty-eighth capacitor are connected and connected to a high level.
[0043] As a further preferred embodiment of the present invention, Figure 7 As shown, the digital audio signal output module includes an eighth chip U8, the first pin of the eighth chip is connected to the first pin of the seventh chip, the second pin of the eighth chip and the second pin of the seventh chip are connected to the first connection point of the digital audio signal input module, the third pin of the eighth chip and the third pin of the seventh chip are connected to the second connection point of the digital audio signal input module, and the fourth pin of the eighth chip and the fourth pin of the seventh chip are connected to the third connection point of the digital audio signal input module.
[0044] The working principle of the first specific embodiment of the utility model is as follows:
[0045] U1, U2, and U3 in the circuit are the IIS interfaces of the video decoder IT66021FN chip. The decoding is performed on the corresponding U4, U5, and U6 chips through the IIS bus, and the audio decoding obtains an analog signal. The analog adder is composed of the first analog operational amplifier, the second analog operational amplifier, and the peripheral circuit, and the three-way stereo (left and right channels) are combined and output to the ADC chip. The ADC chip U7 is labeled as CS5343 model and performs ADC (analog to digital) sampling. It is sent to the AM core board through the IIS bus, and the three-way IIS (DAC digital-to-analog conversion) is connected to the one-way IIS bus (ADC analog-to-digital conversion), ensuring the synchronous processing of audio and video signals.
[0046] The above is a specific description of the preferred implementation of the utility model, but the invention of the utility model is not limited to the described embodiments. Technical personnel familiar with the field can also make various equivalent deformations or substitutions without violating the spirit of the utility model. These equivalent deformations or substitutions are all included in the scope defined by the claims of this application.
Claims
1. A three-way multimedia interface audio switching circuit, characterized in that: It includes a digital audio signal input module, a DAC conversion module, an analog audio signal preprocessing module, an analog adder module, an ADC conversion module and a digital audio signal output module, wherein the output end of the digital audio signal input module is connected to the input end of the DAC conversion module, the output end of the DAC conversion module is connected to the input end of the analog audio signal preprocessing module, the output end of the analog audio signal preprocessing module is connected to the input end of the analog adder module, the output end of the analog adder module is connected to the input end of the ADC conversion module, and the output end of the ADC conversion module is connected to the input end of the digital audio signal output module.
2. A three-way multimedia interface audio switching circuit according to claim 1, characterized in that: The digital audio signal input module includes a first chip, a second chip, a third chip, a first AND gate, a second AND gate and a third AND gate, wherein the 42nd pin of the first chip is connected to the second pin of the first AND gate, the 42nd pin of the second chip is connected to the fifth pin of the second AND gate, the 42nd pin of the third chip is connected to the tenth pin of the third AND gate, the 46th pin of the first chip, the 46th pin of the second chip and the 46th pin of the third chip are connected to a first connection point, the 45th pin of the first chip, the 45th pin of the second chip and the 45th pin of the third chip are connected to a second connection point, the 41st pin of the first chip, the 41st pin of the second chip and the 41st pin of the third chip are connected to a third connection point, the first pin of the first AND gate is connected to a first control signal, the fourth pin of the second AND gate is connected to a second control signal, the ninth pin of the third AND gate is connected to a third control signal, and the third pin of the first AND gate, the sixth pin of the second AND gate and the eighth pin of the third AND gate are all connected to the DAC conversion module.
3. A three-way multimedia interface audio switching circuit according to claim 2, characterized in that: The first chip and the first AND gate constitute an audio interface circuit module for the first video channel, the second chip and the second AND gate constitute an audio interface circuit module for the second video channel, and the third chip and the third AND gate constitute an audio interface circuit module for the third video channel.
4. The three-way multimedia interface audio switching circuit according to claim 2, characterized in that: The DAC conversion module includes a fourth chip, a fifth chip, a sixth chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor and an eighteenth capacitor, wherein a first pin of the fourth chip is connected to a third pin of the first AND gate, a first pin of the fifth chip is connected to a sixth pin of the second AND gate, a first pin of the sixth chip is connected to an eighth pin of the third AND gate, and a second pin of the fourth chip, a second pin of the fifth chip and a second pin of the sixth chip are all connected to the The first connection point is connected to the first connection point, the third pin of the fourth chip, the third pin of the fifth chip and the third pin of the sixth chip are all connected to the second connection point, the fourth pin of the fourth chip, the fourth pin of the fifth chip and the fourth pin of the sixth chip are all connected to the third connection point, the fifth pin of the fourth chip is connected to the first end of the first capacitor and the first end of the second capacitor, the second end of the first capacitor and the second end of the second capacitor are connected and grounded, the fifth pin of the fifth chip is connected to the first end of the seventh capacitor and the first end of the eighth capacitor, the second end of the seventh capacitor and the second end of the eighth capacitor are connected and grounded, the fifth pin of the sixth chip is connected to the first end of the seventh capacitor and the first end of the eighth capacitor, the second end of the seventh capacitor and the second end of the eighth capacitor are connected and grounded, the fifth pin of the sixth chip is connected to the first end of the seventh capacitor and the first end of the eighth capacitor, the second end of the seventh capacitor and the second end of the eighth capacitor are connected and grounded, The first end of the thirteenth capacitor and the first end of the fourteenth capacitor are connected, the second end of the thirteenth capacitor and the second end of the fourteenth capacitor are connected and grounded, the tenth pin of the fourth chip, the seventh pin of the fourth chip, the tenth pin of the fifth chip, the seventh pin of the fifth chip, the tenth pin of the sixth chip and the seventh pin of the sixth chip are all connected to the analog audio signal preprocessing module, the ninth pin of the fourth chip is connected to the first end of the fifth capacitor and the first end of the sixth capacitor, the sixth pin of the fourth chip is connected to the first end of the third capacitor and the first end of the fourth capacitor, the second end of the third capacitor, the second end of the fourth capacitor, the tenth pin of the fifth capacitor ... The second end of the sixth capacitor is connected to the eighth pin of the fourth chip and is grounded, the ninth pin of the fifth chip is connected to the first end of the eleventh capacitor and the first end of the twelfth capacitor, the sixth pin of the fifth chip is connected to the first end of the ninth capacitor and the first end of the tenth capacitor, the second end of the ninth capacitor, the second end of the tenth capacitor, the second end of the eleventh capacitor, the second end of the twelfth capacitor and the eighth pin of the fifth chip are connected to ground, the ninth pin of the sixth chip is connected to the first end of the seventeenth capacitor and the first end of the eighteenth capacitor, the sixth pin of the sixth chip is connected to the first end of the fifteenth capacitor and the first end of the sixteenth capacitor,The second end of the fifteenth capacitor, the second end of the sixteenth capacitor, the second end of the seventeenth capacitor, the second end of the eighteenth capacitor and the eighth pin of the sixth chip are connected and grounded.
5. A three-way multimedia interface audio switching circuit according to claim 4, characterized in that: The fourth chip, the first capacitor, the second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor and the sixth capacitor constitute a first video DAC conversion module, the fifth chip, the seventh capacitor, the eighth capacitor, the ninth capacitor, the tenth capacitor, the eleventh capacitor and the twelfth capacitor constitute a second video DAC conversion module, and the sixth chip, the thirteenth capacitor, the fourteenth capacitor, the fifteenth capacitor, the sixteenth capacitor, the seventeenth capacitor and the eighteenth capacitor constitute a third video DAC conversion module.
6. A three-way multimedia interface audio switching circuit according to claim 4, characterized in that: The analog audio signal preprocessing module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a nineteenth capacitor, a twentieth capacitor, a twenty-first capacitor, a twenty-second capacitor, a twenty-third capacitor and a twenty-fourth capacitor. The first end of the nineteenth capacitor is connected to the tenth pin of the fourth chip, the first end of the twentieth capacitor is connected to the seventh pin of the fourth chip, the second end of the nineteenth capacitor is connected to the first end of the first resistor, the second end of the twentieth capacitor is connected to the first end of the second resistor, the second end of the first resistor and the second end of the second resistor are both connected to the analog adder module, the first end of the twenty-first capacitor is connected to the tenth pin of the fifth chip, and the second end of the twenty-third capacitor is connected to the seventh pin of the fourth chip. The first end of the twenty-second capacitor is connected to the seventh pin of the fifth chip, the second end of the twenty-first capacitor is connected to the first end of the third resistor, the second end of the twenty-second capacitor is connected to the first end of the fourth resistor, the second end of the third resistor and the second end of the fourth resistor are both connected to the analog adder module, the first end of the twenty-third capacitor is connected to the tenth pin of the sixth chip, the first end of the twenty-fourth capacitor is connected to the seventh pin of the sixth chip, the second end of the twenty-third capacitor is connected to the first end of the fifth resistor, the second end of the twenty-fourth capacitor is connected to the first end of the sixth resistor, and the second end of the fifth resistor and the second end of the sixth resistor are both connected to the analog adder module.
7. A three-way multimedia interface audio switching circuit according to claim 6, characterized in that: The first resistor, the second resistor, the nineteenth capacitor and the twenty-th capacitor constitute a first analog audio signal preprocessing module, the third resistor, the fourth resistor, the twenty-first capacitor and the twenty-second capacitor constitute a second analog audio signal preprocessing module, and the fifth resistor, the sixth resistor, the twenty-third capacitor and the twenty-fourth capacitor constitute a third analog audio signal preprocessing module.
8. A three-way multimedia interface audio switching circuit according to claim 6, characterized in that: The analog adder module includes a first analog operational amplifier, a second analog operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a twenty-fifth capacitor and a twenty-sixth capacitor, wherein the second pin of the first analog operational amplifier, the first end of the seventh resistor and the first end of the twenty-fifth capacitor are respectively connected to the second end of the first resistor, the second end of the third resistor and the second end of the fifth resistor, the sixth pin of the second analog operational amplifier, the first end of the ninth resistor and the first end of the twenty-sixth capacitor are respectively connected to the second end of the second resistor, the second end of the fourth resistor and the second end of the sixth resistor, the first pin of the first analog operational amplifier, the second end of the seventh resistor, the second end of the twenty-fifth capacitor and the first end of the eighth resistor are connected, the seventh pin of the second analog operational amplifier, the second end of the ninth resistor, the second end of the twenty-sixth capacitor and the first end of the tenth resistor are connected, the third pin of the first analog operational amplifier and the fifth pin of the second analog operational amplifier are both grounded, and the second end of the eighth resistor and the second end of the tenth resistor are both connected to the ADC conversion module.
9. A three-way multimedia interface audio switching circuit according to claim 8, characterized in that: The ADC conversion module includes a seventh chip, an eleventh resistor, a twelfth resistor, a twenty-seventh capacitor, a twenty-eighth capacitor, a twenty-ninth capacitor, a thirtieth capacitor, a thirty-first capacitor, a thirty-second capacitor, a thirty-third capacitor, and a thirty-fourth capacitor, wherein the first pin of the seventh chip, the second pin of the seventh chip, the third pin of the seventh chip, and the fourth pin of the seventh chip are all connected to the digital audio signal output module, the fifth pin of the seventh chip, the first end of the thirty-first capacitor, and the first end of the thirty-second capacitor are connected, the sixth pin of the seventh chip is connected to the first end of the thirtieth capacitor, the seventh pin of the seventh chip, the first end of the thirty-third capacitor, and the first end of the thirty-fourth capacitor are connected, and the The second end, the second end of the thirty-second capacitor, the second end of the thirty-third capacitor and the second end of the thirty-fourth capacitor are connected and grounded, the second end of the thirtieth capacitor is connected to the first end of the twelfth resistor, the second end of the twelfth resistor is connected to the second end of the eighth resistor, the eighth pin of the seventh chip is connected to the first end of the twenty-ninth capacitor, the second end of the twenty-ninth capacitor is connected to the first end of the eleventh resistor, the second end of the eleventh resistor is connected to the second end of the tenth resistor, the ninth pin of the seventh chip, the second end of the twenty-seventh capacitor and the second end of the twenty-eighth capacitor are connected and grounded, and the tenth pin of the seventh chip, the first end of the twenty-seventh capacitor and the first end of the twenty-eighth capacitor are connected and connected to a high level.
10. A three-way multimedia interface audio switching circuit according to claim 9, characterized in that: The digital audio signal output module includes an eighth chip, a first pin of the eighth chip is connected to the first pin of the seventh chip, a second pin of the eighth chip and a second pin of the seventh chip are connected to a first connection point of the digital audio signal input module, a third pin of the eighth chip and a third pin of the seventh chip are connected to a second connection point of the digital audio signal input module, and a fourth pin of the eighth chip and a fourth pin of the seventh chip are connected to a third connection point of the digital audio signal input module.