Chip circuit and sampling system

Abstract

The utility model provides a chip circuit and a sampling system, the chip circuit comprises an amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor, the first resistor is arranged outside a chip, the second resistor is arranged outside or inside the chip, and the amplifier, the third resistor and the fourth resistor are arranged inside the chip; an in-phase end of the amplifier is connected with an input signal through a first chip port and a first resistor, an anti-phase end is connected with reference ground through a second chip port and a second resistor, and an output end generates an output signal; the third resistor is connected between the in-phase end of the amplifier and the reference ground, and the fourth resistor is connected between the anti-phase end of the amplifier and the output end. According to the utility model, the problem that the chip is damaged due to the fact that the port voltage of the chip exceeds a protection threshold value due to signal fluctuation when an existing chip sampling system carries out signal sampling through a divider resistor is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a chip circuit and a sampling system. Background Art

[0002] Figure 1 A chip sampling system is shown, which uses a voltage-dividing resistor to divide the signal to be sampled to obtain a sampling signal, which is input into the chip for subsequent processing. In the application, in order to protect the port of the chip, the voltage-dividing ratio is designed by setting the value of the voltage-dividing resistor so that the chip port voltage is less than the chip power supply voltage. However, when the signal to be sampled fluctuates greatly, the sampling signal input to the chip will also fluctuate greatly, causing its voltage value to exceed the protection threshold of the chip port, causing the chip port to be damaged due to excessive voltage, thereby damaging the chip. Therefore, how to effectively protect the chip port during signal sampling is a technical problem that technicians in this field are eager to solve.

[0003] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Utility Model Content

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a chip circuit and a sampling system, which solves the problem that when the existing chip sampling system samples signals through voltage divider resistors, the chip port voltage exceeds the port protection threshold due to signal fluctuations, causing chip damage.

[0005] In order to achieve the above-mentioned purpose and other related purposes, the utility model provides a chip circuit, the chip circuit comprising:

[0006] An amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor, wherein the first resistor is arranged outside the chip, the second resistor is arranged outside the chip or inside the chip, and the amplifier, the third resistor and the fourth resistor are arranged inside the chip;

[0007] The in-phase end of the amplifier is connected to the input signal via the first chip port and the first resistor, the inverting end is connected to the reference ground via the second chip port and the second resistor, and the output end generates an output signal; the third resistor is connected between the in-phase end of the amplifier and the reference ground, and the fourth resistor is connected between the inverting end and the output end of the amplifier.

[0008] Optionally, the third resistor is implemented by selecting at least two fifth resistors, wherein the chip circuit also includes a first switch, a fixed end connected to the in-phase end of the amplifier, and each selection end is connected to the reference ground via each of the fifth resistors.

[0009] Optionally, the fourth resistor is implemented by selecting at least two sixth resistors, wherein the chip circuit also includes a second switch, a fixed end connected to the inverting end of the amplifier, and each selection end is connected to the output end of the amplifier via each of the sixth resistors.

[0010] Optionally, the third resistor is implemented by selecting at least two fifth resistors and the fourth resistor is implemented by selecting at least two sixth resistors, wherein the number of the fifth resistors is equal to the number of the sixth resistors and the resistance value of each fifth resistor is equal to that of each sixth resistor.

[0011] Optionally, a resistance value of the third resistor is smaller than a resistance value of the first resistor.

[0012] Optionally, the resistance value of the first resistor is equal to the resistance value of the second resistor, and the resistance value of the third resistor is equal to the resistance value of the fourth resistor.

[0013] Optionally, a resistance value of the first resistor is greater than or equal to 1 KΩ and less than or equal to 100 KΩ.

[0014] Optionally, the amplifier comprises an operational amplifier or a gain amplifier.

[0015] The utility model also provides a sampling system, which comprises: the chip circuit as described above, which is used for amplifying and sampling input signals.

[0016] Optionally, the sampling system further includes a voltage divider circuit for dividing the voltage of the signal to be sampled to obtain the input signal.

[0017] As described above, a chip circuit and sampling system of the utility model uses an amplifier disposed inside the chip to perform signal sampling, and uses a voltage-dividing structure composed of a first resistor disposed outside the chip and a third resistor disposed inside the chip to divide the input signal to reduce the voltage at the first chip port, so that the chip port voltage is less than the input signal voltage, effectively protecting the chip port while also broadening the voltage range of the input signal so that it can be an electrical signal that exceeds the chip power supply voltage. The present invention can protect the chip port while implementing signal sampling, so that the chip can work more safely and improve the robustness of the system; moreover, the circuit architecture of the present invention is simple, which is conducive to reducing circuit costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1Shown is a schematic diagram of the structure of an existing chip sampling system.

[0019] Figure 2 and Figure 3 Shown are two structural schematic diagrams of the sampling system of the present invention, Figure 2 The second resistor is set outside the chip. Figure 3 The second resistor is arranged inside the chip.

[0020] Figure 4 and Figure 5 Shown are two other structural schematic diagrams of the sampling system of the present invention, Figure 4 The third resistor is implemented by using at least two fifth resistors to select each other. Figure 5 The fourth resistor is implemented by selecting at least two sixth resistors.

[0021] Component number description

[0022] 100 Sampling System

[0023] 110 Chip Circuit

[0024] 111 Chip

[0025] 111a Amplifier

[0026] 120 voltage divider circuit DETAILED DESCRIPTION

[0027] The following is an explanation of the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0028] See also Figures 2 to 5 It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings in this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the utility model, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size should still fall within the scope of the technical content disclosed by the utility model without affecting the effects and purposes that can be achieved by the utility model. At the same time, the terms such as "upper", "lower", "left", "right", "middle" and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the utility model. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the utility model without substantially changing the technical content.

[0029] Embodiment 1

[0030] like Figure 2 and Figure 3 As shown, this embodiment provides a chip circuit 110 including an amplifier 111 a , a first resistor R1 , a second resistor R2 , a third resistor R3 and a fourth resistor R4 .

[0031] The first resistor R1 and the second resistor R2 are disposed outside the chip 111, and the amplifier 111a, the third resistor R3 and the fourth resistor R4 are disposed inside the chip 111. Figure 2 Of course, the second resistor R2 can also be set inside the chip 111, such as Figure 3 In application, whether the second resistor R2 is disposed outside or inside the chip 111 should be determined by actual needs, and this embodiment does not limit this.

[0032] In one implementation, the chip 111 is a single-chip microcomputer chip. Of course, the chip 111 may also be other types of microcontroller chips, which has no substantial impact on this embodiment. It should be noted that, in addition to the amplifier 111a and the corresponding resistor, the chip 111 may also include other device structures. Of course, corresponding chip ports may also be designed. The specific requirements shall be determined by actual needs, and this embodiment does not limit this.

[0033] The amplifier 111 a is used to amplify and sample the input signal Vin.

[0034] When the second resistor R2 is disposed outside the chip 111, the in-phase end of the amplifier 111a is connected to the input signal Vin via the first chip port I / O1 and the first resistor R1, and the inverting end is connected to the reference ground via the second chip port I / O2 and the second resistor R2, and the output end generates an output signal Vout. Figure 2 shown.

[0035] When the second resistor R2 is disposed inside the chip 111, the in-phase end of the amplifier 111a is connected to the input signal Vin via the first chip port I / O1 and the first resistor R1, and the inverting end is connected to the reference ground via the second resistor R2 and the second chip port I / O2, and the output end generates an output signal Vout. Figure 3 shown.

[0036] In one implementation, the amplifier 111 a includes an operational amplifier or a gain amplifier. Of course, the amplifier 111 a may also be other types of amplifiers, which is not limited in this embodiment.

[0037] The first resistor R1 and the second resistor R2 are used as input resistors of the amplifier 111a. As an optional solution, the resistance value of the first resistor R1 is equal to the resistance value of the second resistor R2; in application, the resistance value of the first resistor R1 is usually designed to be greater than or equal to 1KΩ and less than or equal to 100KΩ, and further, the resistance value of the first resistor R1 is designed to be greater than or equal to 5KΩ and less than or equal to 50KΩ.

[0038] The third resistor R3 is connected between the in-phase terminal of the amplifier 111a and the reference ground. In this embodiment, the third resistor R3 and the first resistor R1 form a voltage-dividing structure. By setting the first resistor R1 outside the chip 111 and setting the third resistor R3 inside the chip 111, the voltage-dividing structure is used to divide the input signal Vin, so that the port voltage of the first chip port I / O1 is smaller than the voltage of the input signal Vin, which can avoid the problem of chip port damage caused by the port voltage exceeding the protection threshold due to the fluctuation of the input signal Vin, thereby achieving the purpose of protecting the chip port.

[0039] In applications, the resistance values ​​of the third resistor R3 and the first resistor R1 are usually designed in combination with actual scenarios. For example, for scenarios where large signal fluctuations are likely to occur, the resistance value of the third resistor R3 can be designed to be smaller than the resistance value of the first resistor R1. In this way, the input signal can be divided by a larger magnitude through the voltage-dividing structure, which is beneficial to chip port protection; and for scenarios where small signal fluctuations are likely to occur, the resistance value of the third resistor R3 can be designed to be larger than the resistance value of the first resistor R1. In this way, the input signal can be divided by a smaller magnitude through the voltage-dividing structure, and the chip port protection can be performed while taking into account the performance of the amplifier 111a, ensuring the amplification factor while having high signal processing accuracy.

[0040] In one implementation, the third resistor R3 is implemented by a single resistor, such as Figure 2 and Figure 3 Of course, in other implementations, the third resistor R3 can also be implemented by gating at least two fifth resistors, wherein the resistance values ​​of the fifth resistors are different, such as Figure 4 shown.

[0041] By selecting two or more fifth resistors to set the resistance value of the third resistor R3 connected to the in-phase end of the amplifier 111a, the voltage dividing ratio of the voltage dividing structure formed by the third resistor R3 and the first resistor R1 can be adjusted, which is beneficial to expanding the application scenarios of the chip circuit 110 and increasing the flexibility of circuit design.

[0042] When the third resistor R3 is implemented by selecting at least two fifth resistors, the chip circuit 110 further includes a first switch K1, a fixed end of which is connected to the in-phase end of the amplifier 111a, and each selection end is connected to the reference ground via each fifth resistor.

[0043] Taking the number of the fifth resistors as two for example, the two fifth resistors are respectively recorded as resistor R51 and resistor R52. At this time, the fixed end of the first switch K1 is connected to the in-phase end of the amplifier 111a, the first selection end is connected to the reference ground via the resistor R51, and the second selection end is connected to the reference ground via the resistor R52. Figure 4 shown.

[0044] It should be noted that Figure 4 Only the case where the number of the fifth resistors is two is given. Of course, the number of the fifth resistors is three or more, which is also feasible, and it is only necessary to increase the number of the selection terminals of the first switch K1 accordingly. In addition, Figure 4 It is also feasible to arrange the second resistor R2 inside the chip 111 .

[0045] The fourth resistor R4 is connected between the inverting terminal and the output terminal of the amplifier 111a and serves as a feedback resistor of the amplifier 111a. It should be noted that the resistance of the fourth resistor R4 is related to the gain of the amplifier 111a and its value should be determined by actual needs, which is not limited in this embodiment.

[0046] In one implementation, the fourth resistor R4 is implemented by a single resistor, such as Figure 2 and Figure 3 Of course, in other implementations, the fourth resistor R4 can also be implemented by gating at least two sixth resistors, wherein the resistance values ​​of the sixth resistors are different, such as Figure 5 shown.

[0047] By selecting two or more sixth resistors, the resistance value of the fourth resistor R4 connected between the inverting terminal and the output terminal of the amplifier 111a is set, so that the amplification factor of the amplifier 111a can be adjusted, which is beneficial to expanding the application scenarios of the chip circuit 110 and increasing the flexibility of circuit design.

[0048] When the fourth resistor R4 is implemented by selecting at least two sixth resistors, the chip circuit 110 further includes a second switch K2, whose fixed end is connected to the inverting end of the amplifier 111a, and whose selection ends are respectively connected to the output end of the amplifier 111a via the sixth resistors.

[0049] Taking the number of the sixth resistors as two for example, the two sixth resistors are respectively recorded as resistor R61 and resistor R62. At this time, the fixed end of the second switch K2 is connected to the inverting end of the amplifier 111a, the first selection end is connected to the output end of the amplifier 111a via the resistor R61, and the second selection end is connected to the output end of the amplifier 111a via the resistor R62. Figure 5 shown.

[0050] It should be noted that Figure 5Only the case where the number of the sixth resistors is two is given. Of course, the number of the sixth resistors is three or more, which is also feasible, and it is only necessary to increase the number of the selection terminals of the second switch K2 accordingly. In addition, Figure 5 It is also feasible to arrange the second resistor R2 inside the chip 111 .

[0051] In the chip circuit 110 of the present embodiment, the third resistor R3 and the fourth resistor R4 are usually implemented in the same manner, for example, both are implemented by a single resistor, or both are implemented by selecting at least two resistors; in this way, it is convenient to design the resistance value of the third resistor R3 to be equal to the resistance value of the fourth resistor R4; and by designing the two resistance values ​​to be equal and using the third resistor R3 to match the fourth resistor R4, the offset error of the amplifier 111a can be compensated, thereby improving the signal processing accuracy of the amplifier 111a.

[0052] As an optional solution, the third resistor R3 is implemented by selecting at least two fifth resistors and the fourth resistor R4 is implemented by selecting at least two sixth resistors, wherein the number of fifth resistors is equal to the number of sixth resistors and the resistance values ​​of each fifth resistor and each sixth resistor are correspondingly equal.

[0053] It should be noted that corresponding equal resistance values ​​means that the resistance value of the first fifth resistor is equal to the resistance value of the first sixth resistor, the resistance value of the second fifth resistor is equal to the resistance value of the second sixth resistor, the resistance value of the third fifth resistor is equal to the resistance value of the third sixth resistor, and so on.

[0054] See below. Figure 2 , the working principle of the chip circuit 110 of this embodiment is briefly introduced; wherein the voltage at the first chip port I / O1 is defined as Vio.

[0055] According to Kirchhoff's current law and the virtual-off characteristic of the operational amplifier, we can get formula 1 In this way, we can get formula 2

[0056] Taking R1 / R3=N as an example, Formula 2 can be simplified to Formula 3

[0057] It can be seen that the port voltage of the first chip port I / O1 is the input signal voltage In this way, the port voltage can be effectively prevented from exceeding the protection threshold, thus protecting the chip port to a great extent.

[0058] Embodiment 2

[0059] like Figures 2 to 5 As shown, this embodiment provides a sampling system 100 , including a chip circuit 110 , and further including a voltage divider circuit 120 .

[0060] The chip circuit 110 is used to amplify and sample the input signal Vin. The chip circuit 110 is implemented by using the circuit structure described in the first embodiment, and the relevant contents can be found in the above text, which will not be described again here.

[0061] The voltage divider circuit 120 is used to divide the voltage of the sampled signal Vx (eg, a power signal) to obtain an input signal Vin.

[0062] In one embodiment, the voltage divider circuit 120 includes a seventh resistor R7 and an eighth resistor R8, which are connected in series between the signal to be sampled Vx and the reference ground and generate an input signal Vin at the series node. In application, the voltage divider ratio of the voltage divider circuit 120 is designed by designing the resistance values ​​of the seventh resistor R7 and the eighth resistor R8, thereby designing the voltage relationship between the input signal Vin and the signal to be sampled Vx.

[0063] In summary, the utility model is a chip circuit and sampling system, which uses an amplifier disposed inside the chip to perform signal sampling, and uses a voltage-dividing structure composed of a first resistor disposed outside the chip and a third resistor disposed inside the chip to divide the input signal to reduce the voltage at the first chip port, so that the chip port voltage is less than the input signal voltage, which effectively protects the chip port and can also broaden the voltage range of the input signal, so that it can be an electrical signal that exceeds the chip power supply voltage. The present invention can protect the chip port while realizing signal sampling, so that the chip can work more safely and improve the robustness of the system; moreover, the circuit architecture of the present invention is simple, which is conducive to reducing circuit costs.

[0064] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.

Claims

1. A chip circuit, characterized in that: The chip circuit comprises: An amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor, wherein the first resistor is arranged outside the chip, the second resistor is arranged outside the chip or inside the chip, and the amplifier, the third resistor and the fourth resistor are arranged inside the chip; The in-phase end of the amplifier is connected to the input signal via the first chip port and the first resistor, the inverting end is connected to the reference ground via the second chip port and the second resistor, and the output end generates an output signal; the third resistor is connected between the in-phase end of the amplifier and the reference ground, and the fourth resistor is connected between the inverting end and the output end of the amplifier.

2. The chip circuit according to claim 1, characterized in that: The third resistor is implemented by selecting at least two fifth resistors, wherein the chip circuit also includes a first switch, a fixed end of which is connected to the in-phase end of the amplifier, and each selection end is connected to the reference ground via each of the fifth resistors.

3. The chip circuit according to claim 1 or 2, characterized in that: The fourth resistor is implemented by selecting at least two sixth resistors, wherein the chip circuit also includes a second switch, a fixed end connected to the inverting end of the amplifier, and each selection end is connected to the output end of the amplifier via each of the sixth resistors.

4. The chip circuit according to claim 3, characterized in that: The third resistor is implemented by selecting at least two fifth resistors and the fourth resistor is implemented by selecting at least two sixth resistors, wherein the number of the fifth resistors is equal to the number of the sixth resistors and the resistance value of each fifth resistor is equal to that of each sixth resistor.

5. The chip circuit according to claim 1, characterized in that: The resistance of the third resistor is smaller than the resistance of the first resistor.

6. The chip circuit according to claim 1 or 5, characterized in that: The resistance value of the first resistor is equal to the resistance value of the second resistor, and the resistance value of the third resistor is equal to the resistance value of the fourth resistor.

7. The chip circuit according to claim 6, characterized in that: The resistance of the first resistor is greater than or equal to 1KΩ and less than or equal to 100KΩ.

8. The chip circuit according to claim 1, characterized in that: The amplifier includes an operational amplifier or a gain amplifier.

9. A sampling system, characterized in that: The sampling system comprises: a chip circuit as claimed in any one of claims 1 to 8, used for amplifying and sampling an input signal.

10. The sampling system according to claim 9, characterized in that: The sampling system further comprises a voltage dividing circuit for dividing the voltage of the signal to be sampled to obtain the input signal.

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