Mask

Abstract

The mask includes: a first portion; and a second portion surrounding the first portion and having a size smaller than that of the first portion in a plan view, the second portion including: a first blocking portion; and a plurality of first openings positioned alternately with the first blocking portion in one direction in a plan view.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0035428 filed in the Korean Intellectual Property Office on March 17, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various aspects of embodiments of the present disclosure relate to a mask and a method of manufacturing a display panel using the mask. Background Art

[0004] Display devices such as televisions, mobile phones, tablet computers, navigation devices, and gaming devices provide images to users and include a display panel for generating and displaying images. The display panel includes an inorganic layer and an organic layer for encapsulating a light emitting element. Utility Model Content

[0005] When the organic layer of the display panel is formed by curing a liquid organic material having fluidity, a backflow phenomenon may (e.g., is likely to) occur due to the liquid organic material flowing through the dam on the display panel and reaching one end of the unit during the curing process. In this case, an ashing process can be used to remove a portion of the organic layer formed by the backflow phenomenon. However, during the ashing process, a gas containing oxygen or the like may be generated in the organic material, and the electrode of the light-emitting element may be oxidized by the gas, resulting in black spots on the display panel.

[0006] One or more embodiments of the present disclosure are directed to a mask for a pretreatment process capable of controlling the spread of an organic material during a manufacturing process of a display panel.

[0007] One or more embodiments of the present disclosure are directed to a method of manufacturing a display panel using a mask.

[0008] According to one or more embodiments of the present disclosure, a mask includes: a first part; and a second part surrounding the first part and having a size smaller than that of the first part in a plan view, the second part including: a first blocking part; and a plurality of first openings positioned alternately with the first blocking part along a direction in a plan view.

[0009] In an embodiment, the first portion may include: a mask hole; and a first region surrounding the mask hole in a plan view and including a second opening positioned around the mask hole in a plan view.

[0010] In an embodiment, each of the plurality of first openings may have a polygonal shape.

[0011] In an embodiment, each of the plurality of first openings may have a circular shape.

[0012] In an embodiment, the plurality of first openings may have the same size as one another.

[0013] According to one or more embodiments of the present disclosure, a method for manufacturing a display panel includes: providing a preliminary display panel including a display area, a peripheral area adjacent to the display area, and a light-emitting element positioned in the display area; forming a first inorganic layer on the light-emitting element to overlap with the display area and the peripheral area; pre-treating at least a portion of the first inorganic layer overlapping with the peripheral area by a plasma process using a first mask, the first mask including: a first portion overlapping with the display area; and a second portion separated from the display area and overlapping with the peripheral area, the second portion including: a first blocking portion; and a plurality of first openings positioned alternately with the first blocking portion along a direction in a plan view; and forming an organic layer on the first inorganic layer.

[0014] In an embodiment, the first inorganic layer may be formed on the light emitting element using a second mask including a mask opening overlapping the display area and having a size larger than that of the first opening, and the first inorganic layer may be deposited to correspond to the mask opening.

[0015] In an embodiment, a nitrogen containing gas may be used in the plasma process.

[0016] In an embodiment, the pre-treated surface of the first inorganic layer in the region overlapping the first opening may have higher hydrophobicity than the surface of the first inorganic layer overlapping the first portion.

[0017] In an embodiment, the method may further include treating a surface of the organic layer through a plasma process using hydrogen gas.

[0018] In an embodiment, the method may further include forming a second inorganic layer on the organic layer.

[0019] In an embodiment, the forming of the second inorganic layer may include: forming a first sub-inorganic layer using a first power; and forming a second sub-inorganic layer on the first sub-inorganic layer using a second power higher than the first power.

[0020] In an embodiment, the preliminary display panel may also be provided with a module hole and a hole area, the module hole is defined through the preliminary display panel to overlap with the display area, and the hole area is defined in the preliminary display panel to surround the module hole. The first portion may be provided with a mask hole defined through the first portion and a first area surrounding the mask hole in a plan view. The first area may include a second opening positioned around the mask hole in a plan view.

[0021] According to one or more embodiments of the present disclosure, a method for manufacturing a display panel includes: providing a preliminary display panel, the preliminary display panel including a display area, a peripheral area adjacent to the display area, and a light emitting element positioned in the display area; forming a first inorganic layer on the light emitting element to overlap with the display area and the peripheral area; forming a first layer on the first inorganic layer overlapping with the peripheral area using a first mask to pre-treat the first inorganic layer, the first mask including a first portion overlapping with the display area and a second portion spaced apart from the display area and overlapping with the peripheral area, the second portion including a first blocking portion and a plurality of first openings alternately positioned with the first blocking portion in a plan view along one direction; and forming an organic layer on the first inorganic layer. The first layer is deposited corresponding to the first opening.

[0022] In an embodiment, the surface of the first layer may have a nitrogen atom content higher than that of the surface of the first inorganic layer.

[0023] In an embodiment, the first layer may include silicon nitride.

[0024] In an embodiment, the method may further include forming a second inorganic layer on the organic layer.

[0025] In an embodiment, the method may further include: forming a first sub-inorganic layer on the organic layer using a first power; and forming a second sub-inorganic layer on the first sub-inorganic layer using a second power higher than the first power.

[0026] In an embodiment, the first layer may include a hydrophobic material.

[0027] In an embodiment, the preliminary display panel may also be provided with a module hole and a hole area, the module hole is defined through the preliminary display panel to overlap with the display area, and the hole area is defined in the preliminary display panel to surround the module hole. The first portion may be provided with a mask hole defined through the first portion and a first area surrounding the mask hole in a plan view. The first area may include a second blocking portion and a second opening positioned alternately with the second blocking portion in a direction in a plan view.

[0028] According to one or more embodiments of the present disclosure, the inorganic layer disposed under the organic layer is preprocessed, and thus, the spreading of the organic layer on the inorganic layer toward the outside of the display panel is controlled. Therefore, the area where the organic layer is formed can be easily controlled.

[0029] According to one or more embodiments of the present disclosure, an ashing process for removing an organic layer on a peripheral region is not required, and thus, process time may be reduced and process cost may be reduced.

[0030] According to one or more embodiments of the present disclosure, since an ashing process is not required, generation of gas (such as oxygen) from an organic layer can be prevented or substantially prevented, oxidation of an electrode of a light-emitting element caused by the gas can be prevented or substantially prevented, and occurrence of dark spots in a display panel can be prevented or substantially prevented. Therefore, the reliability of the display panel can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other aspects and features of the present disclosure will be more clearly understood from the following detailed description of illustrative, non-limiting embodiments with reference to the accompanying drawings, in which:

[0032] Figure 1 is a perspective view of a display device according to an embodiment of the present disclosure;

[0033] Figure 2 is an exploded perspective view of a display device according to an embodiment of the present disclosure;

[0034] Figure 3 is a cross-sectional view of a portion of a display panel according to an embodiment of the present disclosure;

[0035] Figure 4 is a cross-sectional view of a portion of a display panel according to an embodiment of the present disclosure;

[0036] Figure 5A and Figure 5B is a flow chart of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0037] Figure 6 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0038] Figure 7 is a perspective view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0039] Fig. 8A is a plan view of a mask according to an embodiment of the present disclosure;

[0040] Figure 8Bis a perspective view of a mask according to an embodiment of the present disclosure;

[0041] Fig.9A is a plan view of a mask according to an embodiment of the present disclosure;

[0042] Fig. 9B is a perspective view of a mask according to an embodiment of the present disclosure;

[0043] Fig. 10A is a plan view of a mask according to an embodiment of the present disclosure;

[0044] Fig. 10B is a perspective view of a mask according to an embodiment of the present disclosure;

[0045] Fig.11 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0046] Fig.12 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0047] Fig.13 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0048] Fig.14 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure; and

[0049] Fig.15 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0050] Hereinafter, the embodiments are described in more detail with reference to the accompanying drawings, in which the same reference numerals always refer to the same elements. However, the present disclosure may be embodied in different forms and should not be construed as being limited to the embodiments shown herein. On the contrary, these embodiments are provided as examples so that the disclosure will be thorough and complete, and will fully convey the various aspects and features of the present disclosure to those skilled in the art. Therefore, processes, elements and techniques that are unnecessary for those of ordinary skill in the art to fully understand the various aspects and features of the present disclosure may not be described. Unless otherwise stated, throughout the drawings and written descriptions, the same reference numerals represent the same elements, and therefore, the redundant descriptions thereof may not be repeated.

[0051] When the specific embodiment can be implemented differently, the specific process order may be different from the described order. For example, two consecutively described processes may be performed simultaneously or substantially simultaneously or may be performed in the reverse order of the described order.

[0052] In the accompanying drawings, for the sake of clarity, the relative size, thickness and ratio of elements, layers and zones may be exaggerated and / or simplified. Spatial relative terms such as "under ... ", "under ... ", "under ... ", "above ... " and "on " can be used herein to describe the relationship between an element or feature and another element (multiple elements) or feature (multiple features) as shown in the drawings. It will be understood that, in addition to the orientations depicted in the accompanying drawings, spatial relative terms are also intended to cover different orientations of the device in use or in operation. For example, if the device in the accompanying drawings is turned over, the element described as "under" or "under" or "below" other elements or features will then be oriented "above" other elements or features. Therefore, the example terms "under ... " and "under ... " can cover both upper and lower orientations. The device can be oriented in addition (for example, rotated 90 degrees or at other orientations), and the spatial relative terms used in this article should be interpreted accordingly.

[0053] In the drawings, the first direction DR1, the second direction DR2, and the third direction DR3 are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the first direction DR1, the second direction DR2, and the third direction DR3 may be perpendicular or substantially perpendicular to each other, or may represent different directions that are not perpendicular to each other.

[0054] It will be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, areas, layers and / or parts, these elements, components, areas, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, area, layer or part from another element, component, area, layer or part. Therefore, without departing from the spirit and scope of the present disclosure, the first element, first component, first area, first layer or first part described below may be referred to as the second element, second component, second area, second layer or second part.

[0055] It will be understood that when an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to the element or layer, or there may be one or more intervening elements or layers. Similarly, when a layer, region, or element is referred to as being "electrically connected to" another layer, region, or element, the layer, region, or element may be directly electrically connected to the other layer, region, or element, and / or may be indirectly electrically connected to the other layer, region, or element with one or more intervening layers, regions, or elements between the layer, region, or element and the other layer, region, or element. In addition, it will be understood that when an element or layer is referred to as being "between" two elements or layers, the element or layer may be the only element or layer between the two elements or layers, or there may also be one or more intervening elements or layers.

[0056] The terms used herein are for the purpose of describing specific embodiments and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, as used herein, the singular forms "one" and "one (kind / person)" are also intended to include plural forms. It will also be understood that when used in this specification, the terms "comprises, comprising", "includes, including" and "has, have, having" illustrate the existence of stated features, integral bodies, steps, operations, elements and / or components, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, components and / or their groups. As used herein, the term "and / or" includes any combination and all combinations of one or more related listed items. For example, the statement "A and / or B" means A, B or A and B. Statements such as "at least one (kind / person) in ... " modify the elements of the entire series when following a series of elements and do not modify the individual elements in the series. For example, the expressions "at least one of a, b, and c" and "at least one selected from the group consisting of a, b, and c" mean only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0057] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for inherent deviations in measurements or calculations that will be recognized by those of ordinary skill in the art. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure." As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively. Moreover, the term "example" is intended to refer to an example or illustration.

[0058] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their context in the relevant art and / or the meaning in this specification, and should not be interpreted in an idealized or overly formalized sense.

[0059] Figure 1 is a perspective view of a display device DD according to an embodiment of the present disclosure. Figure 2 is an exploded perspective view of a display device DD according to an embodiment of the present disclosure.

[0060] Reference Figure 1 and Figure 2 , the display device DD can be activated in response to the electrical signal. The display device DD may include various embodiments. As an example, the display device DD may be applied to a large display device such as a television or an outdoor billboard or a small or medium-sized display device such as a mobile phone, a tablet computer, a navigation device (e.g., a navigation console), and a gaming device (e.g., a gaming console). However, these are merely examples, and the display device DD may also be employed in other suitable electronic devices. For convenience, a mobile phone will be described in more detail as a representative example of the display device DD.

[0061] The display device DD according to one or more embodiments of the present disclosure may be flexible. The term "flexible" as used herein refers to the performance of being able to bend from a fully bent structure to a structure that is bent at a scale of a few nanometers. For example, the flexible display device DD may be a curved display device or a foldable display device. According to an embodiment, the display device DD may be rigid.

[0062] The display device DD may include a display surface to display an image IM through a front surface of the display device DD. The display device DD may display an image IM through the display surface toward a third direction DR3, which is parallel or substantially parallel to a plane defined by the first direction DR1 and the second direction DR2. The third direction DR3 may cross (e.g., may intersect) each of the first direction DR1 and the second direction DR2, and may be parallel or substantially parallel to a normal direction of the display surface. The image IM displayed through the display surface may include a static image as well as a video.

[0063] The front surface (or upper surface) and the rear surface (or lower surface) of each member of the display device DD may be defined relative to the direction on which the image IM is displayed. The front surface and the rear surface may face away from each other in the third direction DR3. Meanwhile, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 may be opposite to each other, and therefore, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 may be modified variously to other suitable directions.

[0064] The display device DD may include a window member WD, a display panel DP, an electronic module (eg, an electronic sensor, circuit, or device) ID, and a housing member HS.

[0065] The window member WD may be disposed on the display panel DP. The window member WD may protect the display panel DP from external impact and / or scratch.

[0066] The window member WD may include an optically transparent material. For example, the window member WD may include a glass substrate, a sapphire substrate, or a plastic film. The window member WD may have a single-layer or multi-layer structure. As an example, the window member WD having a multi-layer structure may include a plurality of plastic films coupled to each other by an adhesive, or a glass substrate and a plastic film coupled to the glass substrate by an adhesive.

[0067] The front surface of the window member WD may correspond to the front surface of the display device DD. The front surface of the window member WD may include a transmissive area TA and a bezel area BZA.

[0068] The transmissive area TA may have a relatively high light transmittance in the front surface of the window member WD. A user may observe an image IM provided from the display panel DP through the transmissive area TA.

[0069] The transmission area TA may have a quadrilateral shape parallel to each of the first direction DR1 and the second direction DR2, however, the present disclosure is not limited thereto. The transmission area TA may have various suitable shapes and should not be particularly limited.

[0070] The border area BZA may be defined as being adjacent to the transmission area TA. As an example, the border area BZA may surround the transmission area TA (e.g., around the periphery of the transmission area TA). The border area BZA may be an area having a relatively low light transmittance compared to the transmission area TA. The border area BZA may be an area printed or coated with a material having a suitable color (e.g., a predetermined color). The border area BZA may prevent or substantially prevent reflection of light, so that components of the display panel DP that are arranged overlapping with the border area BZA may be prevented or substantially prevented from being observed from the outside.

[0071] The display panel DP may be disposed between the window member WD and the housing member HS. The display panel DP may display an image IM in response to an electrical signal. The display panel DP may be a light-emitting display panel, but the present disclosure is not limited thereto. As an example, the display panel DP may be an organic light-emitting display panel, an inorganic light-emitting display panel, or a quantum dot light-emitting display panel.

[0072] The display panel DP may include a display area AA and a peripheral area NAA. The display panel DP may include a plurality of pixels PX disposed in the display area AA. Each of the plurality of pixels PX may include a light emitting element and a pixel driving circuit electrically connected to the light emitting element. The pixel PX may emit light in response to an electrical signal, and thus, an image IM may be displayed in the display area AA. The display area AA may overlap with the transmission area TA. The image IM displayed in the display area AA may be provided to the outside through the transmission area TA.

[0073] The peripheral area NAA may be defined as being adjacent to the display area AA. As an example, when viewed on a plane (e.g., in a plan view), the peripheral area NAA may surround the display area AA (e.g., around the periphery of the display area AA). A driving circuit or a driving line may be provided in the peripheral area NAA to drive the pixels PX arranged in the display area AA. The peripheral area NAA may overlap with the border area BZA. Due to the border area BZA, components of the display panel DP provided in the peripheral area NAA may be prevented or substantially prevented from being observed from the outside.

[0074] The display panel DP may include a hole area PA defined in the display area AA. The hole area PA may be an area in which a module hole MH defined by passing through (e.g., penetrating) the display panel DP is formed. When viewed on a plane (e.g., in a plan view), the hole area PA may be surrounded by the display area AA (e.g., the display area AA is around the periphery of the hole area PA), but the present disclosure is not limited thereto or thereby. A portion of the hole area PA may be surrounded by the display area AA (e.g., the display area AA is around the periphery of a portion of the hole area PA), and another portion of the hole area PA may be surrounded by the peripheral area NAA (e.g., the peripheral area NAA is around the periphery of another portion of the hole area PA). According to an embodiment, the hole area PA may be defined in the peripheral area NAA.

[0075] The module hole MH may be defined through (eg, may penetrate) at least one component overlapping the hole area PA from among a plurality of components of the display panel DP. Figure 2 One module hole MH is shown, however, the module hole MH may be provided in plural. The module hole MH may be defined in one hole area PA, or may be defined in a plurality of hole areas PA, respectively.

[0076] The electronic module ID may be an electronic component that outputs or receives an optical signal. As an example, the electronic module ID may be a camera that takes a picture of an external object, a proximity sensor that uses an optical signal to identify an object approaching it, or an infrared light emitting sensor that emits light.

[0077] The electronic module ID may be disposed below the display panel DP. At least a portion of the electronic module ID may overlap with the module hole MH. The electronic module ID may send or receive an optical signal through the module hole MH. Since the module hole MH is formed by passing through (e.g., penetrating) the display panel DP, the region where the module hole MH is formed may have a light transmittance higher than the light transmittance of the region where the pixel PX is arranged in the display area AA. Therefore, the electronic module ID overlapping with the module hole MH may easily receive or output an optical signal.

[0078] The housing member HS may be disposed below the display panel DP. The housing member HS may define a rear surface of the display device DD. The housing member HS may be coupled to the window member WD to form an exterior of the display device DD. The housing member HS may be coupled to the window member WD to define an interior space therein, and components of the display device DD (such as the display panel DP and the electronic module ID, etc.) may be accommodated in the interior space.

[0079] The housing member HS may include a material having relatively high rigidity. As an example, the housing member HS may include a plurality of frames and / or plates formed of glass, plastic, or metal materials or various appropriate combinations thereof. The housing member HS may protect the components accommodated in the internal space from external impacts. The housing member HS may absorb external impacts applied to the display panel DP from the outside, or may prevent or substantially prevent foreign matter and moisture from entering the display panel DP.

[0080] Figure 3 is a cross-sectional view of a portion of the display panel DP according to an embodiment of the present disclosure, and may be a cross-sectional view along Figure 2 A view taken along line I-I'. Figure 3 A cross section of the display panel DP in the peripheral area NAA and a portion of the display area AA adjacent to the peripheral area NAA is shown.

[0081] Reference Figure 3 The display panel DP may include an insulating substrate 10, pixels PX, a plurality of driving signal lines CL, a power connection pattern E-VSS, a dam portion DM, and a plurality of insulating layers 20, 30, and 40. The insulating layers 20, 30, and 40 may include a circuit insulating layer 20, a display insulating layer 30, and an encapsulation layer 40.

[0082] The insulating substrate 10 may define a base surface on which the pixels PX are disposed. The insulating substrate 10 may include a base layer 11 , a first auxiliary layer 12 , and a second auxiliary layer 13 .

[0083] The base layer 11 may include an insulating material. The base layer 11 may be a flexible layer, but the present disclosure is not limited thereto or thereby, and the base layer 11 may also be a rigid layer. As an example, the base layer 11 may include a polymer such as polyimide (PI) or a glass material, but the material for the base layer 11 is not limited thereto or thereby.

[0084] The first auxiliary layer 12 and the second auxiliary layer 13 may be disposed on the base layer 11. The first auxiliary layer 12 and the second auxiliary layer 13 may completely cover the base layer 11.

[0085] The first auxiliary layer 12 may include a barrier layer. Therefore, the first auxiliary layer 12 may prevent or substantially prevent oxygen and / or moisture from entering the pixel PX through the base layer 11.

[0086] The second auxiliary layer 13 may include a buffer layer. Therefore, the second auxiliary layer 13 may control the surface energy of the insulating substrate 10 to allow the pixel PX to be stably disposed on the insulating substrate 10.

[0087] However, the present disclosure is not limited thereto or thereby, and the stacking order of the first auxiliary layer 12 and the second auxiliary layer 13 may be modified variously, or one of the first auxiliary layer 12 and the second auxiliary layer 13 may be omitted as needed or required. According to an embodiment, at least one of the base layer 11, the first auxiliary layer 12, and the second auxiliary layer 13 may be provided in plural and may be alternately stacked with other layers.

[0088] The pixel PX may be disposed on the insulating substrate 10. As described above, the pixel PX may be disposed in the display area AA of the insulating substrate 10.

[0089] The pixel PX may include a plurality of thin film transistors (eg, a driving transistor and a switching transistor), a capacitor, and a light emitting element OD. The pixel PX may be electrically connected to a signal line of the display panel DP. Figure 3 The thin film transistor TR and the light emitting element OD from among the plurality of components of the pixel PX are shown as representative examples.

[0090] The thin film transistor TR may be disposed on the insulating substrate 10. The thin film transistor TR may form a thin film transistor layer with the circuit insulating layer 20. The thin film transistor TR may include a semiconductor pattern SP, a control electrode CE, an input electrode IE, and an output electrode OE. The circuit insulating layer 20 may include a first insulating layer 21 and a second insulating layer 22 sequentially stacked on the insulating substrate 10.

[0091] The semiconductor pattern SP may be disposed on the insulating substrate 10. The semiconductor pattern SP may include one or more semiconductor materials (such as crystalline silicon, amorphous silicon, or one or more metal oxides). The semiconductor pattern SP may include a source region and a drain region having relatively high conductivity and a channel region having relatively low conductivity. The source region and the drain region may be spaced apart from each other, and the channel region is interposed between the source region and the drain region.

[0092] The control electrode CE may be disposed above the first insulating layer 21 (e.g., on the first insulating layer 21) to overlap with the semiconductor pattern SP. The control electrode CE may be spaced apart from the semiconductor pattern SP with the first insulating layer 21 interposed therebetween. However, the present disclosure is not limited thereto or thereby, and the control electrode CE may be disposed below the semiconductor pattern SP.

[0093] The input electrode IE and the output electrode OE may be disposed above the second insulating layer 22 (e.g., on the second insulating layer 22). The input electrode IE and the output electrode OE may be spaced apart from the control electrode CE, and the second insulating layer 22 is interposed between the input electrode IE and the output electrode OE and the control electrode CE. The input electrode IE and the output electrode OE of the thin film transistor TR may each be connected to a region having a higher conductivity of the semiconductor pattern SP after penetrating the first insulating layer 21 and the second insulating layer 22. However, the structure of the thin film transistor TR is not limited thereto or thereby. According to an embodiment, the input electrode IE and the output electrode OE may be disposed below the semiconductor pattern SP, or may be disposed at the same layer as the semiconductor pattern SP (e.g., disposed in the same layer as the semiconductor pattern SP or disposed on the same layer as the semiconductor pattern SP) to be directly connected to the semiconductor pattern SP. The thin film transistor TR may have various suitable structures, and the present disclosure is not limited to any one specific structure.

[0094] The light emitting element OD may be disposed on the circuit insulating layer 20. The light emitting element OD may form a display element layer together with the display insulating layer 30. The light emitting element OD may include a first electrode E1, a light emitting layer EL, a control layer OPL, and a second electrode E2. The display insulating layer 30 may include a third insulating layer 31 and a fourth insulating layer 32 stacked in sequence.

[0095] The first electrode E1 may be connected to the thin film transistor TR after penetrating the third insulating layer 31, however, the present disclosure is not limited thereto or thereby. According to an embodiment, the display panel DP may further include a separate connection electrode disposed between the first electrode E1 and the thin film transistor TR. In this case, the first electrode E1 may be electrically connected to the thin film transistor TR through the connection electrode.

[0096] The fourth insulating layer 32 may be disposed on the third insulating layer 31. A light emitting opening may be defined by the fourth insulating layer 32. The light emitting opening may expose at least a portion of the first electrode E1. The fourth insulating layer 32 may be a pixel defining layer defining a region in which the light emitting element OD emits light.

[0097] The light emitting layer EL may be disposed in the light emitting opening and may be disposed on the first electrode E1 exposed by the light emitting opening. The light emitting layer EL may include a light emitting material. As an example, the light emitting layer EL may include at least one material from various suitable materials for emitting red light, green light, and blue light. The light emitting layer EL may include a fluorescent material or a phosphorescent material. The light emitting layer EL may include an organic material and / or an inorganic material. The light emitting layer EL may emit light in response to a potential difference between the first electrode E1 and the second electrode E2.

[0098] The control layer OPL may be disposed between the first electrode E1 and the second electrode E2. The control layer OPL may be disposed adjacent to the light emitting layer EL. In the present embodiment, the control layer OPL is shown as being disposed between the light emitting layer EL and the second electrode E2, but the present disclosure is not limited thereto or thereby. According to an embodiment, the control layer OPL may be disposed between the light emitting layer EL and the first electrode E1. According to an embodiment, the control layer OPL may be provided in plurality, and the control layer OPL may be stacked in the third direction DR3, with the light emitting layer EL interposed between the control layers OPL.

[0099] The control layer OPL may be commonly provided in the plurality of pixels PX. According to an embodiment, the control layer OPL may have an integral shape extending from the display area AA to the peripheral area NAA, but the present disclosure is not limited thereto or thereby.

[0100] The second electrode E2 may be disposed on the light emitting layer EL. The second electrode E2 may be provided in common in the plurality of pixels PX. The second electrode E2 may have an integral shape extending from the display area AA to the peripheral area NAA.

[0101] The second electrode E2 may include a transmissive conductive material or a semi-transmissive conductive material. Therefore, the light generated by the light emitting layer EL may be easily emitted in the third direction DR3 after passing through the second electrode E2. However, the present disclosure is not limited thereto. According to an embodiment, the light emitting element OD may include a first electrode E1 including a transmissive or semi-transmissive material, and may be operated in a rear surface light emitting mode, or in a light emitting mode in which light is emitted to both the front surface and the rear surface.

[0102] The encapsulation layer 40 may be disposed on the light emitting element OD to encapsulate the light emitting element OD. The encapsulation layer 40 may be commonly provided in a plurality of pixels PX. In some embodiments, a capping layer may be further disposed between the second electrode E2 and the encapsulation layer 40 to cover the second electrode E2.

[0103] The encapsulation layer 40 may include a first inorganic layer 41, an organic layer 42, and a second inorganic layer 43 sequentially stacked in the third direction DR3. However, the stack structure of the encapsulation layer 40 is not limited thereto or thereby.

[0104] The first inorganic layer 41 may cover the second electrode E2. The first inorganic layer 41 may prevent or substantially prevent external moisture and / or oxygen from entering the light emitting element OD. For example, the first inorganic layer 41 may include silicon nitride, silicon oxide, or a suitable compound thereof. The first inorganic layer 41 may have a single-layer structure of an inorganic layer, or a multi-layer structure in which a plurality of sub-inorganic layers are stacked in the third direction DR3. The first inorganic layer 41 may be formed by a deposition process using an open mask having an opening portion corresponding to the display area AA.

[0105] The organic layer 42 may be disposed on the first inorganic layer 41 to contact the first inorganic layer 41. The organic layer 42 may define a flat or substantially flat surface on the first inorganic layer 41. The uneven shape formed on the upper surface of the first inorganic layer 41 and the particles present on the first inorganic layer 41 may be covered by the organic layer 42, and thus the influence of the surface state of the upper surface of the first inorganic layer 41 on the components formed on the organic layer 42 may be prevented. In addition, the organic layer 42 may relieve stress between a plurality of layers in contact with the organic layer 42. The organic layer 42 may be formed by a solution process such as a spin coating process, a slit coating process, or an inkjet process.

[0106] The second inorganic layer 43 may be disposed on the organic layer 42 to cover the organic layer 42. Because the second inorganic layer 43 is disposed on the organic layer 42, the second inorganic layer 43 may be stably formed on a relatively flat or substantially flat surface. The second inorganic layer 43 may prevent or substantially prevent moisture and / or oxygen from entering the organic layer 42. The second inorganic layer 43 may include silicon nitride, silicon oxide, or a suitable compound thereof. The second inorganic layer 43 may have a single-layer structure of an inorganic layer, or a multi-layer structure in which a plurality of sub-inorganic layers are stacked in the third direction DR3. The second inorganic layer 43 may be formed by a deposition process using an open mask having a portion of an opening corresponding to the display area AA.

[0107] The driving signal line CL, the dam portion DM, and the power connection pattern E-VSS may be disposed in the peripheral area NAA.

[0108] The driving signal line CL may be provided in plural and may be disposed on the circuit insulating layer 20. The driving signal line CL may be a line connected to a pad or a line constituting an integrated circuit (IC). As an example, the driving signal line CL may include a power line, an initialization voltage line, or a light emission control line.

[0109] The power connection pattern E-VSS may supply a power voltage to the light emitting element OD. The power connection pattern E-VSS may correspond to a power terminal of the pixel PX. The second electrode E2 may extend to the peripheral area NAA and may be connected to the power connection pattern E-VSS. In the present embodiment, the power voltage supplied to the pixel PX by the power connection pattern E-VSS may be a voltage commonly supplied to a plurality of pixels PX.

[0110] The dam portion DM may be disposed at an appropriate position to cover a portion of the power connection pattern E-VSS, however, the present disclosure is not limited thereto or thereby. According to an embodiment, the dam portion DM may be disposed outside the power connection pattern E-VSS. In the present embodiment, the dam portion DM may have a multilayer structure including a first dam DM1 and a second dam DM2.

[0111] The first dam DM1 may include the same material as that of the third insulating layer 31. The first dam DM1 may be formed simultaneously or substantially simultaneously with the third insulating layer 31, and may be disposed at the same layer as that of the third insulating layer 31 (e.g., disposed in the same layer as that of the third insulating layer 31 or disposed on the same layer as that of the third insulating layer 31).

[0112] The second dam DM2 may be disposed on the first dam DM1. In the present embodiment, a portion of the second electrode E2 may be inserted (e.g., may be interposed) between the first dam DM1 and the second dam DM2. In other words, the second dam DM2 according to the present embodiment may be formed by a separate process after forming the second electrode E2, but the present disclosure is not limited thereto or thereby. According to an embodiment, the second dam DM2 may be formed simultaneously or substantially simultaneously with the fourth insulating layer 32. According to an embodiment, the dam portion DM may have a single-layer structure, but the present disclosure is not limited thereto or thereby.

[0113] The first inorganic layer 41 and the second inorganic layer 43 may extend from the display area AA to the outside of the dam portion DM. Therefore, the dam portion DM may be covered by the first inorganic layer 41 and the second inorganic layer 43. The first inorganic layer 41 and the second inorganic layer 43 may contact each other on the dam portion DM, and the organic layer 42 disposed between the first inorganic layer 41 and the second inorganic layer 43 may be encapsulated. The organic layer 42 may be disposed at the inner side of the dam portion DM, however, the present disclosure is not limited thereto or thereby. According to an embodiment, a portion of the organic layer 42 may extend to a region overlapping with the dam portion DM, and the present disclosure is not limited thereto or thereby.

[0114] The dam portion DM may be disposed adjacent to at least one side of the display area AA. When viewed on a plane (e.g., in a plan view), the dam portion DM may surround the display area AA (e.g., around the periphery of the display area AA). The dam portion DM may prevent or substantially prevent the organic layer 42 from overflowing to the outside of the display panel DP. The organic layer 42 may be formed by coating a liquid organic material on the first inorganic layer 41, and the dam portion DM may prevent or substantially prevent the liquid organic material from overflowing to the outside of the dam portion DM.

[0115] The first inorganic layer 41 of the encapsulation layer 40 according to an embodiment of the present disclosure may include a pretreatment area PTA in which a pretreatment process described in more detail below is performed.

[0116] The organic layer 42 may be formed by curing a liquid organic material having fluidity, and a backflow phenomenon may occur in which the liquid organic material flows to one end of a cell above the dam portion DM in the display panel DP during the curing process. In order to prevent or substantially prevent the backflow phenomenon of the liquid organic material from occurring, a mask MK (e.g., referring to FIG. 8A to FIG. 10B ) is used to pre-treat the upper portion of the first inorganic layer 41. Through the pre-treating process for the first inorganic layer 41, a pre-treated portion TM (eg, referring to Fig.11 ), and the pretreatment area PTA may include a pretreatment portion TM. The pretreatment portion TM may correspond to a region in which the surface of the first inorganic layer 41 is directly (eg, actually) pretreated within the pretreatment area PTA.

[0117] The pretreatment area PTA may be aligned with the second portion MA2 (eg, referring to FIG. 1 ) of the mask MK used in the pretreatment process of the first inorganic layer 41. Figure 7 ) and may correspond to a portion of the first inorganic layer 41 in which at least a portion is pretreated. The pretreatment area PTA may include layers alternately arranged in one direction in which the pretreatment portion TM is formed (eg, referring to Fig.11 ) and a region in which the pre-treatment portion TM is not formed.

[0118] When compared with the first inorganic layer 41 corresponding to the display area AA, due to the pre-processing portion TM (eg, referring to Fig.11 ) has a low interface affinity with the organic layer 42, and the first inorganic layer 41 corresponding to the pretreatment area PTA can have a low interface affinity with the organic layer 42. Therefore, the backflow phenomenon of the organic material in the pretreatment area PTA can be prevented or substantially prevented, and through the pretreatment area PTA, the organic layer 42 can be prevented or substantially prevented from extending to the outside of the peripheral area NAA.

[0119] When forming the organic layer 42, the backflow phenomenon of the organic material can be controlled by the pretreatment area PTA and the dam portion DM. However, in the process of forming the organic layer 42, in the case where the organic material contacts the pretreatment area PTA before the dam portion DM, the backflow phenomenon of the organic material can be sufficiently prevented by the pretreatment area PTA, and therefore, the dam portion DM can play an auxiliary role in preventing the backflow phenomenon of the organic material.

[0120] The area where the organic layer 42 is formed may be determined by the shape and range of the pretreatment area PTA. Figure 3 The range of the pretreatment area PTA shown in is shown only as an example, and the present disclosure is not limited thereto or thereby. Figure 3A structure in which the edge of the organic layer 42 is aligned with the boundary of the pretreatment area PTA is shown, however, the present disclosure is not limited thereto or thereby. According to an embodiment, according to the pretreatment portion TM (for example, referring to Fig.11 ) is formed in the pretreatment area PTA, a portion of the edge of the organic layer 42 may overlap or substantially overlap with the pretreatment area PTA.

[0121] Figure 4 is a cross-sectional view of a portion of the display panel DP according to an embodiment of the present disclosure, and may be a cross-sectional view along Figure 2 A view taken along line II-II'. Figure 4 A cross section of the display panel DP in the hole area PA and a portion of the display area AA adjacent to the hole area PA is shown as a representative example. Figure 4 Refer to the above Figure 3 Redundant description of components that are identical or substantially identical to the components described.

[0122] Reference Figure 4 , the display panel DP may include a hole area PA adjacent to the display area AA. When viewed on a plane (e.g., in a plan view), the hole area PA may be surrounded by the display area AA (e.g., the display area AA is around the periphery of the hole area PA). The display panel DP may include signal lines SCL1 and SCL2 and groove patterns GV1 and GV2 disposed in the hole area PA. The module hole MH may pass through (e.g., may penetrate) the display panel DP.

[0123] The signal lines SCL1 and SCL2 may include a first signal line SCL1 and a second signal line SCL2 disposed at different layers from each other (e.g., disposed in or on different layers from each other). As an example, the first signal line SCL1 may be disposed on the first insulating layer 21, and the second signal line SCL2 may be disposed on the second insulating layer 22. However, the positions where the signal lines SCL1 and SCL2 are disposed are not limited thereto or thereby.

[0124] The signal lines SCL1 and SLC2 may be electrically connected to the pixels PX disposed adjacent to the aperture area PA (eg, refer to Figure 3 ). Therefore, a plurality of pixels PX spaced apart from each other around the module hole MH may be electrically connected to each other.

[0125] The module hole MH may be aligned with the pixel PX (eg, Figure 3) are spaced apart and may be disposed in the hole area PA. The module hole MH may be defined in the hole area PA. The module hole MH may be formed by passing through (e.g., may penetrate) a component disposed in the hole area PA from among a plurality of components of the display panel DP. As an example, the module hole MH may be formed by passing through (e.g., may penetrate) the insulating substrate 10, the first insulating layer 21, the control layer OPL, the second electrode E2, the first inorganic layer 41, and the second inorganic layer 43. However, the component of the display panel DP that is penetrated to form the module hole MH is not limited thereto or thereby.

[0126] When viewed on a plane (e.g., in a plan view), the groove patterns GV1 and GV2 may be disposed between the module hole MH and the display area AA. The groove patterns GV1 and GV2 may be formed by removing a portion of some of the plurality of components of the display panel DP so as to be recessed from the upper surface of the display panel DP. Unlike the module hole MH, the groove patterns GV1 and GV2 may not penetrate (e.g., completely pass through) the display panel DP. In other words, the rear surface of the insulating substrate 10 may not be opened by the groove patterns GV1 and GV2.

[0127] Each of the groove patterns GV1 and GV2 may be formed by penetrating some of the components of the display panel DP and penetrating only a portion of the base layer 11. In the present embodiment, each of the groove patterns GV1 and GV2 may be formed by completely penetrating the first auxiliary layer 12, the second auxiliary layer 13, and the first insulating layer 21 and removing a portion of the base layer 11.

[0128] The control layer OPL and the second electrode E2 may be formed after forming the groove patterns GV1 and GV2. As an example, the control layer OPL and the second electrode E2 may be formed after removing a portion of the first auxiliary layer 12, the second auxiliary layer 13, and the first insulating layer 21. The control layer OPL and the second electrode E2 may be formed by a deposition process. Therefore, the control layer OPL and the second electrode E2 may cover a cross section of the first auxiliary layer 12, the second auxiliary layer 13, and the first insulating layer 21 defined by removing a portion of the first auxiliary layer 12, the second auxiliary layer 13, and the first insulating layer 21.

[0129] The first inorganic layer 41 may extend to the hole area PA to cover the groove patterns GV1 and GV2. As an example, the first inorganic layer 41 may cover the second electrode E2 formed on the inner surface of the recess of the base layer 11 and the cross-section of the first auxiliary layer 12, the second auxiliary layer 13 and the first insulating layer 21.

[0130] Each of the groove patterns GV1 and GV2 may have an undercut shape of a tip portion TP protruding inward. As an example, the first auxiliary layer 12, the second auxiliary layer 13, and the first insulating layer 21 may protrude from the base layer 11, and the undercut may be formed between the base layer 11 and the first auxiliary layer 12, the second auxiliary layer 13, and the first insulating layer 21. The first inorganic layer 41 may continuously cover the components disposed below the first inorganic layer 41 until the protruding tip portion TP. The display panel DP may have various suitable layer structures as long as the tip portion TP is formed in the groove patterns GV1 and GV2, and is not particularly limited to any one structure.

[0131] The groove patterns GV1 and GV2 may include a first groove pattern GV1 and a second groove pattern GV2 disposed to be spaced apart from the first groove pattern GV1. The first groove pattern GV1 may be disposed closer to the module hole MH than the second groove pattern GV2. In other words, the distance between the first groove pattern GV1 and the module hole MH may be smaller than the distance between the second groove pattern GV2 and the module hole MH.

[0132] The first groove pattern GV1 and / or the second groove pattern GV2 may be selectively filled with the organic layer 42 extending from the display area AA to the hole area PA. As an example, the first groove pattern GV1 may be exposed without being covered by the organic layer 42, and the second groove pattern GV2 may be filled with the organic layer 42. However, the present disclosure is not limited thereto or thereby, and the groove patterns GV1 and GV2 may be spaced apart from the organic layer 42.

[0133] When the organic layer 42 is filled in the second groove pattern GV2, the tip portion TP of the second groove pattern GV2 may be supported, thereby preventing or substantially preventing damage to the tip portion TP that may be caused by the protruding shape of the tip portion TP, and thus improving the durability of the display panel DP.

[0134] However, the first groove pattern GV1 may not be filled with the organic layer 42. The first groove pattern GV1 adjacent to the module hole MH may be exposed without being covered by the organic layer 42. Since at least one groove pattern from among the groove patterns GV1 and GV2 may be exposed without being covered by the organic layer 42, the continuity of the organic layer 42 in the hole area PA may be interrupted. Therefore, a path of external contaminants that may penetrate into the hole area PA via the module hole MH into the display area AA through the organic layer 42 may be blocked.

[0135] The organic layer 42 may be formed by curing a liquid organic material having fluidity, and the liquid organic material may be filled in the first groove pattern GV1 of the display panel DP and may flow to the module hole MH during the curing process. In this case, the continuity of the organic layer 42 in the hole area PA may not be blocked. According to one or more embodiments of the present disclosure, the upper portion of the first inorganic layer 41 may be formed using a mask MK described in more detail below (e.g., refer to Fig. 10A and Fig. 10B ) is pre-treated to prevent or substantially prevent defects from occurring.

[0136] The first inorganic layer 41 of the encapsulation layer 40 may include a pre-processed area PTA overlapping the hole area PA. As an example, when viewed on a plane (e.g., in a plan view), the pre-processed area PTA overlapping the hole area PA may surround the module hole MH (e.g., around the periphery of the module hole MH), however, the present disclosure is not limited thereto or thereby.

[0137] The pretreatment area PTA may be aligned with the first area MAH1 (eg, referring to FIG. 2 ) of the mask MK used in the pretreatment process of the first inorganic layer 41. Fig. 10A ) and may correspond to a portion of the first inorganic layer 41 in which at least a portion is pre-processed. The pre-processed portion is formed to correspond to the second opening OP2 (eg, referring to Fig. 10A ) corresponding areas can be arranged in the pretreatment area PTA along the module hole MH.

[0138] When compared with the first inorganic layer 41 corresponding to the display area AA, the first inorganic layer 41 corresponding to the pretreatment area PTA may have a low interface affinity with the organic layer 42 because the pretreatment portion has a low interface affinity with the organic layer 42. Therefore, a backflow phenomenon of the organic material in the pretreatment area PTA may be prevented or substantially prevented, and the organic layer 42 may be prevented from extending to the module hole MH in the hole area PA.

[0139] The area where the organic layer 42 is formed may be determined by the shape and range of the pretreatment area PTA. Figure 4 The range of the pretreatment area PTA shown in is shown only as an example, and the present disclosure is not limited thereto or thereby. Figure 4 A structure is shown in which an edge of the organic layer 42 is aligned with a boundary of the pretreatment area PTA, however, the present disclosure is not limited thereto or thereby. According to an embodiment, a portion of the edge of the organic layer 42 may overlap or substantially overlap with the pretreatment area PTA depending on the position where the pretreatment portion is formed in the pretreatment area PTA.

[0140] During the manufacturing process of the display panel DP, a mask MK (eg, referring to Figure 7 ). The first inorganic layer 41 corresponding to the pre-treatment area PTA may be formed by a mask MK (eg, referring to Figure 7 ) is pre-processed. Hereinafter, the mask MK and a manufacturing process of the display panel DP using the mask MK will be described in more detail.

[0141] Figure 5A is a flowchart of a method of manufacturing a display panel according to an embodiment of the present disclosure. Figure 5B is a flowchart of a method of manufacturing a display panel according to an embodiment of the present disclosure.

[0142] Reference Figure 5A , a method for manufacturing a display panel may include providing a preliminary display panel (S10), forming a first inorganic layer (S11), plasma-treating the first inorganic layer (S12-1), forming an organic layer on the first inorganic layer (S13), performing hydrogen plasma treatment (S14), and forming a second inorganic layer on the organic layer (S15).

[0143] Apart from Figure 5B The manufacturing method shown in the figure includes forming a first layer on the first inorganic layer (S12-2) as a step of pre-treating the first inorganic layer, Figure 5B The manufacturing method of the display panel shown in the above reference may have the same Figure 5A The manufacturing method of the display panel has the same or substantially the same processes.

[0144] The preliminary display panel provided in providing the preliminary display panel (S10) may be formed with the first inorganic layer 41 (eg, referring to Figure 3 ) corresponds to the display panel before. As an example, Figure 3 As shown in , the preliminary display panel may include an insulating substrate 10, a circuit insulating layer 20, a display insulating layer 30, and pixels PX disposed under the first inorganic layer 41, however, the components included in the preliminary display panel are not limited thereto or thereby. Hereinafter, after providing the preliminary display panel (S10), a process of forming components on the preliminary display panel to manufacture the display panel will be described in more detail below.

[0145] Figure 6 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure. Figure 6 The formation of the first inorganic layer (S11) (for example, referring to Figure 5A ).

[0146] Reference Figure 6 , a first inorganic layer 41 may be formed on the preliminary display panel P-DP. The preliminary display panel P-DP may include a first inorganic layer 41 and a second inorganic layer 42 respectively connected to the display panel DP (eg, Figure 3) of the display area AA and the peripheral area NAA corresponding to the display area AA and the peripheral area NAA. The first inorganic layer 41 may be formed in the entire area of ​​the display area AA. The first inorganic layer 41 may be formed in at least a portion of the peripheral area NAA. The first inorganic layer 41 may have an integral form overlapping the display area AA and the peripheral area NAA.

[0147] The mask MK may be provided with a mask opening defined therethrough (e.g., see Figure 7 ) to form the first inorganic layer 41 so as to correspond to the region where the first inorganic layer 41 is formed. As an example, the first inorganic layer 41 may be formed using a mask MK (eg, referring to Figure 7 ) is formed on the preliminary display panel P-DP to overlap with at least a portion of the display area AA and the peripheral area NAA.

[0148] The first inorganic layer 41 may have a single-layer structure of an inorganic layer or a multi-layer structure of a plurality of inorganic layers. As an example, the first inorganic layer 41 may include a lithium fluoride (LiF) layer, a silicon nitride (SiN x ) layer and silicon oxynitride (SiO x N y ) layers.

[0149] In the case where the first inorganic layer 41 includes a plurality of inorganic layers, a mask MK having the same mask opening may be used (for example, referring to Figure 7 ) depositing an inorganic layer, however, the present disclosure is not limited thereto or thereby.

[0150] The upper surface of the first inorganic layer 41 may have hydrophilicity, through which the organic material can easily spread. As an example, the uppermost layer of the first inorganic layer 41 may be silicon oxynitride (SiO x N y ) layer. However, the material included in the first inorganic layer 41 is not particularly limited thereto, as long as the surface of the first inorganic layer 41 has the property of easily spreading the organic material. Since the first inorganic layer 41 has hydrophilicity, the organic layer 42 (for example, referring to Fig.12 ) may be easily spread on the first inorganic layer 41 , may be tightly adhered to the first inorganic layer 41 , and may not be easily separated from the first inorganic layer 41 .

[0151] Figure 7 is a perspective view of a process of a method of manufacturing a display panel according to an embodiment of the present disclosure. FIG. 8A to FIG. 10B is a view of a mask MK according to various embodiments of the present disclosure.

[0152] Figure 7 The pre-treatment of the first inorganic layer 41 is shown. FIG. 8A to FIG. 10B The mask MK shown in FIG. 4A may be used in the pre-processing of the first inorganic layer 41 .

[0153] According to one or more embodiments, in the organic layer 42 (eg, referring to Fig.12 ) is formed on the first inorganic layer 41, a pretreatment of the first inorganic layer 41 may be performed on a portion of the upper surface of the first inorganic layer 41 that overlaps the peripheral area NAA. In other words, the pretreatment of the first inorganic layer 41 may be performed on the upper surface of the first inorganic layer 41 to prevent or substantially prevent the organic layer 42 (e.g., referring to Fig.12 ) is formed outside the peripheral area NAA due to the hydrophilicity of the upper surface of the first inorganic layer 41. As an example, the pretreatment of the first inorganic layer 41 may include plasma-treating a portion of the first inorganic layer 41 (eg, S12-1, see Figure 5A ), or forming a first layer on a portion of the first inorganic layer 41 (eg, S12-2, see Figure 5B ).

[0154] Reference Figure 7 , Fig. 8A and Figure 8B , in the pre-treatment of the first inorganic layer 41 by the plasma process, or in the pre-treatment of the first inorganic layer 41 by forming the first layer, a mask MK may be provided over the preliminary display panel P-DP. The mask MK may include a first portion MA1 and a second portion MA2. Hereinafter, for convenience, the first portion MA1 and the second portion MA2 will be described separately, however, the first portion MA1 and the second portion MA2 may correspond to portions of the mask MK provided in an integrated form.

[0155] The first portion MA1 may overlap the display area AA of the preliminary display panel P-DP. The first portion MA1 may completely overlap the display area AA, and according to an embodiment, the first portion MA1 may also overlap a portion of the peripheral area NAA adjacent to the display area AA. In other words, the first portion MA1 may have a size equal to or larger than that of the display area AA. The first portion MA1 may be an unopened portion and may correspond to the display area AA in the mask MK. Figure 7 The first portion MA1 having a quadrangular shape is illustrated as a representative example, but the shape of the first portion MA1 may be variously modified to correspond to the display area AA of the preliminary display panel P-DP.

[0156] The second portion MA2 may be disposed adjacent to the first portion MA1. As an example, when viewed on a plane (e.g., in a plan view), the second portion MA2 may surround the first portion MA1 (e.g., around the periphery of the first portion MA1). The second portion MA2 may overlap the peripheral area NAA of the preliminary display panel P-DP. The second portion MA2 may have a size smaller than that of the first portion MA1.

[0157] The second portion MA2 may include a first blocking portion MC1 and a first opening OP1. The first opening OP1 may be formed through (eg, may penetrate) the second portion MA2. The first blocking portion MC1 may correspond to a portion of the second portion MA2 where the first opening OP1 is not defined.

[0158] The first blocking portions MC1 may be alternately arranged with the first openings OP1 in one direction (eg, along one or more directions). As an example, the first blocking portions MC1 and the first openings OP1 may be alternately arranged with each other along the first direction DR1 and the second direction DR2.

[0159] The first blocking portions MC1 may be connected to each other to have an integral form. The first blocking portions MC1 may be connected to each other by contact between at least a portion of their vertices or corners. When viewed on a plane (e.g., in a plan view), the first blocking portions MC1 connected to each other may surround the first opening OP1 (e.g., around the periphery of the first opening OP1). Therefore, the second portion MA2 having an integral shape without a separated portion may be formed by forming the first openings OP1 alternately arranged with the first blocking portions MC1.

[0160] A first blocking portion MC1 adjacent to the first portion MA1 from among the plurality of first blocking portions MC1 may extend from the first portion MA1. The first blocking portions MC1 adjacent to the first portion MA1 may be connected to one side of the first portion MA1 through their vertices or corners. Therefore, a mask MK having an integral shape without separate portions may be formed in the first portion MA1 and the second portion MA2.

[0161] The first openings OP1 may be uniformly or substantially uniformly arranged in the second portion MA2. As an example, the distances between the first openings OP1 adjacent to each other may be the same or substantially the same as each other. The plurality of first openings OP1 may have the same or substantially the same size as each other. However, the arrangement and size of the first openings OP1 are not limited thereto or thereby, as long as the first openings OP1 are alternately arranged with the first blocking portions MC1 in the second portion MA2.

[0162] When viewed on a plane (eg, in a plan view), each of the plurality of first openings OP1 may have a quadrilateral shape, however, it is not limited thereto or thereby. Fig.9A and Fig. 9B , when viewed on a plane (eg, in a plan view), the first opening OP1C may have a circular shape. The first opening OP1C having a circular shape may be alternately arranged with the first blocking portion MC1 along the first direction DR1 and the second direction DR2. However, FIG. 8A to FIG. 9B The shapes of the first openings OP1 and OP1C shown in the figure are provided only as examples, and the first openings OP1 and OP1C may have various suitable shapes such as another polygonal shape or an elliptical shape instead of a quadrilateral shape or a circular shape. The shapes of the first openings OP1 and OP1C are not particularly limited as long as the first openings OP1 and OP1C are alternately arranged with the first blocking portions MC1 in the second portion MA2.

[0163] Refer again Figure 7 The mask MK may define a region to be pretreated in the first inorganic layer 41. In other words, the first inorganic layer 41 may be pretreated in a region defining the first opening OP1. The pretreatment region PTA (for example, referring to Figure 3 ).

[0164] In the plasma treatment of the first inorganic layer 41 using the mask MK (for example, S12-1, see Figure 5A ), ionized gas may be provided to the preliminary display panel P-DP from above the mask MK. The surface of the first inorganic layer 41 overlapping the first opening OP1 may be plasma-treated by the ionized gas passing through the first opening OP1. The plasma-treated surface of the first inorganic layer 41 may have hydrophobicity. As an example, nitrogen (N 2 ) The first inorganic layer 41 is pre-treated by a plasma process. In this case, the nitrogen atom content in the pre-treated surface of the first inorganic layer 41 corresponding to the first opening OP1 may be increased, and the pre-treated surface of the first inorganic layer 41 may be hydrophobic compared to the surface of the first inorganic layer 41 corresponding to the first portion MA1. However, the type of gas used in the plasma process is not limited thereto or thereby, as long as the surface of the first inorganic layer 41 corresponding to the first opening OP1 is hydrophobic. Because the pre-treated first inorganic layer 41 is hydrophobic, the organic layer 42 (for example, referring to Fig.12 ) (e.g., S13, see Figure 5A ) can control the spreadability of organic materials.

[0165] In forming the first layer on the first inorganic layer 41 using the mask MK (for example, S12-2, refer to Figure 5B ), the deposition material may be provided to the preliminary display panel P-DP from above the mask MK. As an example, the first layer may be deposited by a chemical vapor deposition (CVD) method using the mask MK. However, the deposition method for the first layer is not limited thereto or thereby. After passing through the first opening OP1, the deposition material may be deposited on the upper surface of the first inorganic layer 41 overlapping the first opening OP1. In other words, the first layer may be formed on the upper surface of the first inorganic layer 41 overlapping the first opening OP1. The first layer may be provided in a pattern corresponding to the first opening OP1.

[0166] The first layer may include a suitable material having hydrophobicity. As an example, the first layer may include a suitable material having a nitrogen atom content higher than that of the upper surface of the first inorganic layer 41 (such as silicon nitride). However, the material for the first layer is not particularly limited thereto as long as the organic layer 42 (e.g., referring to Fig.12 ) is not easily used for the material of the first layer. Since the first layer is hydrophobic, an organic layer 42 is formed on the first inorganic layer 41 (for example, referring to Fig.12 ) (e.g., S13, see Figure 5B ) can control the spreadability of organic materials.

[0167] Since the first openings OP1 and the first blocking portions MC1 are alternately arranged, the first portion MA1 can be provided integrally with the second portion MA2 without a separate portion. Because one mask MK is aligned on the preliminary display panel P-DP, the first portion MA1 and the second portion MA2 can be aligned on the display area AA and the peripheral area NAA of the preliminary display panel P-DP, respectively. The portion of the first inorganic layer 41 corresponding to the first opening OP1 in the peripheral area NAA can be pretreated by a pretreatment process using the mask MK. In addition, since the first portion MA1 is not opened, the surface of the first inorganic layer 41 corresponding to the first portion MA1 may not be pretreated. Therefore, the surface of the first inorganic layer 41 corresponding to the display area AA can maintain or substantially maintain hydrophilicity.

[0168] Reference Fig. 10A and Fig. 10B , an opening may also be defined in the mask MK to correspond to the opening in the preliminary display panel P-DP (eg, referring to Figure 7 ) corresponds to the area defined in ). As an example, the preliminary display panel P-DP may be provided with a module hole MH (eg, referring to Figure 2 ), and around the display panel DP as described above (eg, referring to Figure 2) defined by the module hole MH (eg, around the periphery of the module hole MH) of the hole area PA (eg, with reference to Figure 2 ). Accordingly, a mask hole HH and a second opening OP2 may be additionally defined in the first portion MA1 of the mask MK.

[0169] According to an embodiment, the first portion MA1 may include a mask hole HH and a first area MAH1 surrounding the mask hole HH (eg, around the periphery of the mask hole HH). The mask hole HH may be aligned with the module hole MH of the preliminary display panel P-DP (eg, referring to Figure 2 ). The number, position, and shape of the mask holes HH may be variously modified corresponding to the number, position, and shape of the module holes MH of the preliminary display panel P-DP. As an example, in the case where a plurality of module holes MH are defined through the preliminary display panel P-DP, the mask hole HH may be provided in plurality so that the plurality of mask holes HH overlap with the plurality of module holes MH, respectively.

[0170] The first area MAH1 may be aligned with the hole area PA (eg, around the periphery of the module hole MH of the preliminary display panel P-DP) surrounding the module hole MH of the preliminary display panel P-DP (eg, around the periphery of the module hole MH of the preliminary display panel P-DP). Figure 2 The number, position, and shape of the first area MAH1 may overlap with the hole area PA defined in the preliminary display panel P-DP (eg, refer to Figure 2 ) are modified differently accordingly. The first area MAH1 may include a second barrier portion MC2 and a second opening OP2.

[0171] The second opening OP2 may be formed through (eg, may penetrate) the first portion MA1 corresponding to the first area MAH1. The second opening OP2 may be arranged around the mask hole HH. However, the arrangement of the second opening OP2 is not limited to Fig. 10A and Fig. 10B , and the second openings OP2 may be alternately arranged with the second barrier portions MC2 in one direction, just like the first openings OP1 alternately arranged with the first barrier portions MC1.

[0172] The second opening OP2 may include two or more openings having sizes different from each other, however, they are not limited thereto or thereby. According to an embodiment, the plurality of second openings OP2 may have the same or substantially the same size as each other. Fig. 10AAs shown in , when viewed on a plane (e.g., in a plan view), each of the plurality of second openings OP2 may have a quadrilateral shape, however, the present disclosure is not limited thereto or thereby. Each of the plurality of second openings OP2 may have various suitable shapes such as another polygonal shape, a circular shape, or an elliptical shape. The arrangement, size, and shape of the second openings OP2 are not particularly limited as long as the second openings OP2 are arranged around the mask hole HH.

[0173] The second blocking portions MC2 may be connected to each other to have an integral form. The second blocking portions MC2 may be connected to each other by contact between at least a portion of their vertices or corners. When viewed on a plane (e.g., in a plan view), the second blocking portions MC2 connected to each other may surround the second opening OP2 (e.g., around the periphery of the second opening OP2). The second blocking portions MC2 adjacent to the outer portion of the mask hole HH may be connected to the outer portion of the mask hole HH by its vertices or corners. The first portion MA1 of the mask MK may be formed in an integral shape in the first region MAH1 without a separated portion.

[0174] The preliminary display panel P-DP and the hole area PA (for example, refer to Figure 4 ) corresponding to the first inorganic layer 41 (for example, refer to Figure 4 ) can be pre-processed corresponding to the second opening OP2. In other words, by using Fig. 10A and Fig. 10B The pretreatment of the first inorganic layer 41 using the mask MK may form a pretreatment area PTA corresponding to the hole area PA in the first inorganic layer 41 (for example, refer to Figure 4 ). The first inorganic layer 41 is in the hole area PA (for example, refer to Figure 4 ) and corresponding to the second opening OP2 may have a hydrophobic surface, or a layer having hydrophobicity in the region corresponding to the second opening OP2 may be formed on the first inorganic layer 41. Figure 4 ) in the hole area PA (for example, refer to Figure 4 ) in the spread.

[0175] Figures 11 to 14 are plan views of various processes of a method for manufacturing a display panel according to one or more embodiments of the present disclosure. Fig.15 is a plan view of a process of a method for manufacturing a display panel according to an embodiment of the present disclosure.

[0176] Fig.114 shows the pre-treated first inorganic layer 41 after plasma treatment of the first inorganic layer 41 or after forming a first layer on the first inorganic layer 41. The pre-treated portion TM may be formed in the pre-treated first inorganic layer 41. The region of the first inorganic layer 41 in which the pre-treated portion TM is formed may be aligned with the pre-treated area PTA (e.g., see FIG. Figure 3 ) corresponding to.

[0177] Reference Fig.11 , the pre-processing part TM can be combined with the mask MK (for example, referring to Figure 7 ) of the opening OP1 (for example, see Figure 7 ) is formed accordingly. The pre-treatment portion TM may have high hydrophobicity compared to the hydrophobicity of the first inorganic layer 41 in the display area AA. As an example, the pre-treatment portion TM may be a portion having a lower content of oxygen atoms or a higher content of nitrogen atoms compared to the content of oxygen atoms or nitrogen atoms of the first inorganic layer 41 in the display area AA. The pre-treatment portion TM may correspond to the silicon nitride layer formed on the first inorganic layer 41. The pre-treatment portion TM is not particularly limited thereto as long as the pre-treatment portion TM has higher hydrophobicity than the hydrophobicity of the first inorganic layer 41 corresponding to the display area AA.

[0178] Even if the pretreatment portion TM is not completely formed on the first inorganic layer 41 overlapping the peripheral area NAA, because the area where the pretreatment portion TM is formed and the area where the pretreatment portion TM is not formed are arranged alternately with each other, the continuity of the first inorganic layer 41 that has not been pretreated can be blocked on the peripheral area NAA.

[0179] Therefore, although the pretreatment area PTA (for example, refer to Figure 3 ) does not fully include Fig.11 Although the arrangement pattern of the pretreatment portion TM shown in FIG. 4 is different, the first inorganic layer 41 corresponding to the pretreatment area PTA may have hydrophobicity as a whole. Therefore, the organic material may be prevented or substantially prevented from spreading to the outside of the peripheral area NAA.

[0180] Fig.12 The process of forming an organic layer 42 on the pre-treated first inorganic layer 41 (eg, S13, see Figure 5A ).

[0181] The organic layer 42 may include a monomer or a polymer. As an example, the organic layer 42 may include at least one of acrylic resin, epoxy resin, and silicon oxycarbide (SiOC), but the organic layer 42 is not limited thereto or thereby.

[0182] The organic layer 42 may be formed by coating an organic material using an inkjet method. The surface of the first inorganic layer 41 corresponding to the display area AA may be Figure 7 ) of the first part MA1 (for example, referring to Figure 7 ) without being pre-processed. Therefore, the first inorganic layer 41 corresponding to the display area AA may have hydrophilicity, and the organic material may be easily spread on the display area AA.

[0183] The mask MK may be provided with a first opening OP1 (eg, referring to Figure 7 ) The surface of the first inorganic layer 41 corresponding to the peripheral area NAA is pretreated, and thus, a pretreatment portion TM may be formed. The pretreatment portion TM may have hydrophobicity and may have low affinity with the organic material coated on the first inorganic layer 41. The continuity of the first inorganic layer 41 having hydrophilicity may be interrupted by the pretreatment portion TM on the peripheral area NAA, and the organic material may be prevented or substantially prevented from spreading to the outside of the area where the pretreatment portion TM is formed.

[0184] In other words, a portion of the first inorganic layer 41 corresponding to the display area AA may have hydrophilicity, and a portion of the first inorganic layer 41 corresponding to the pretreatment area PTA (eg, referring to FIG. 5 ) may have hydrophilicity. Figure 3 ) The corresponding portion can be made hydrophobic as a whole by the pretreatment portion TM. Therefore, by pretreating the first inorganic layer 41, the area where the organic layer 42 is formed can be easily controlled, and therefore, the backflow phenomenon of the organic material can be prevented or substantially prevented.

[0185] In the case where the organic layer 42 is formed without pre-treating the first inorganic layer 41, the organic layer 42 may be easily spread on the peripheral area NAA by the first inorganic layer having hydrophilicity. In this case, the portion of the organic layer 42 formed in the peripheral area NAA may be removed using an ashing process. When the ashing process is performed on the organic layer 42, oxygen contained in the organic material may be gasified, and the electrodes E1 and E2 of the light emitting element (for example, referring to Figure 3 ) may be oxidized. According to one or more embodiments of the present disclosure, since the first inorganic layer 41 is pre-treated, the backflow phenomenon of the organic material can be prevented or substantially prevented, and the ashing process of the organic layer 42 can be omitted. Therefore, the oxidation of the light-emitting element that may be caused by the ashing process can be prevented or substantially prevented. In addition, the cost and time for the ashing process can be reduced or eliminated.

[0186] Fig.13 The upper surface of the first inorganic layer 41 and the upper surface of the organic layer 42 are treated with hydrogen plasma (eg, S14, see Figure 5A). In the hydrogen plasma treatment process, the surfaces of the first inorganic layer 41 and the organic layer 42 may be plasma treated under hydrogen or hydrogen ion conditions. When the hydrogen plasma treatment is performed, the surface of the organic layer 42 and the first inorganic layer 41 may be changed, and the adhesive strength between the surface of the organic layer 42 and the second inorganic layer 43 and the adhesive strength between the surface of the first inorganic layer 41 and the second inorganic layer 43 may be improved.

[0187] Fig.14 and Fig.15 The second inorganic layer 43 is shown to be formed on the organic layer 42 after the hydrogen plasma treatment (for example, see Figure 3 )(For example, S15, cf. Figure 5A ). The second inorganic layer 43 (for example, see Figure 3 ) can be formed by depositing a plurality of sub-inorganic layers 43 - 1 and 43 - 2 .

[0188] Fig.14 A process of forming the first sub-inorganic layer 43 - 1 on the organic layer 42 using the first power is shown. Fig.15 A process of forming the second sub-inorganic layer 43 - 2 on the first sub-inorganic layer 43 - 1 using the second power is shown.

[0189] Reference Fig.14 , the first sub-inorganic layer 43-1 may be deposited in the display area AA and the peripheral area NAA. The first sub-inorganic layer 43-1 may be formed using a mask MK (eg, referring to Figure 7 ) is formed on the organic layer 42 to overlap at least a portion of the display area AA and the peripheral area NAA. The first sub-inorganic layer 43-1 may extend to the peripheral area NAA where the organic layer 42 is not formed. Therefore, the first sub-inorganic layer 43-1 may contact the first inorganic layer 41 in the peripheral area NAA.

[0190] Reference Fig.15 , the second sub-inorganic layer 43-2 may be deposited on the first sub-inorganic layer 43-1. The second sub-inorganic layer 43-2 may be deposited using the same mask as that used to deposit the first sub-inorganic layer 43-1, but the present disclosure is not limited thereto or thereby.

[0191] The first sub-inorganic layer 43-1 may be deposited under a power condition lower than that of the second sub-inorganic layer 43-2. ​​In other words, the first power is lower than the second power. When a strong power is used immediately in the initial stage of forming the second inorganic layer 43, gas may be generated from the organic layer 42 below the second inorganic layer 43. However, when a low power is used as in the present embodiment, gas may be prevented or substantially prevented from being generated from the organic layer 42 below the second inorganic layer 43, and the display device DD (for example, referring to FIG. 1 ) may be improved. Figure 1 ) reliability.

[0192] Each of the first sub-inorganic layer 43-1 and the second sub-inorganic layer 43-2 may include an inorganic material such as silicon nitride, aluminum oxide, or silicon oxide. The first sub-inorganic layer 43-1 and the second sub-inorganic layer 43-2 may include the same material as each other, but may be formed under different power conditions from each other. However, the present disclosure is not limited to this or thereby. According to an embodiment, the first sub-inorganic layer 43-1 and the second sub-inorganic layer 43-2 may include different materials from each other.

[0193] The foregoing is an explanation of some embodiments of the present disclosure and is not to be construed as limiting thereof. Although some embodiments have been described, it is readily appreciated by those skilled in the art that various modifications may be made in the embodiments without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of the features or aspects in each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Therefore, it will be apparent to those of ordinary skill in the art that, unless otherwise specifically noted, the features, characteristics and / or elements described in conjunction with a particular embodiment may be used alone or in combination with the features, characteristics and / or elements described in conjunction with other embodiments. Therefore, it will be understood that the foregoing is an explanation of various example embodiments and will not be construed as being limited to the specific embodiments disclosed herein, and that various modifications to the disclosed embodiments and other example embodiments are intended to be included in the spirit and scope of the present disclosure as defined by the appended claims and their equivalents.

Claims

1. A mask, It is characterized in that The mask comprises: Part I; and A second portion, surrounding the first portion and having a size smaller than that of the first portion in a plan view, the second portion comprising: a first blocking portion; and A plurality of first openings are positioned alternately with the first blocking portions along one direction in a plan view.

2. The mask according to claim 1, It is characterized in that The first part includes: mask apertures; and The first region surrounds the mask hole in plan view and includes a second opening positioned around the mask hole in plan view.

3. The mask according to claim 1, It is characterized in that Each of the plurality of first openings has a polygonal shape.

4. The mask according to claim 1, It is characterized in that Each of the plurality of first openings has a circular shape.

5. The mask according to claim 1, It is characterized in that The plurality of first openings have the same size as one another.

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