Automatic grabbing photoetching plate of photoetching machine applied to multiple photoetching

Abstract

The utility model discloses an automatic grabbing photoetching plate of a photoetching machine applied to multiple photoetching, and belongs to the field of semiconductor manufacturing equipment. According to the utility model, the primary photolithography plate and the overlay plate which are matched for use are designed, and the surfaces of the primary photolithography plate and the overlay plate are respectively provided with a positioning mark combination in a pattern mask form besides a chip unit mask, so that a positioning mark which can be clearly observed through a microscope is obtained at a non-chip position of the wafer after primary front photolithography; and the positioning mark is reserved on the wafer through wet etching. Therefore, in the overlay process, the positioning marks with different offsets on the overlay plate can be aligned with the existing positioning marks on the wafer during manual operation, and the overlay size is flexibly adjusted in combination with multiple photoetching, so that the required chip pattern is obtained.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor manufacturing equipment, and in particular relates to a photolithography machine for automatically grabbing a photolithography plate used for multiple photolithography. Background Art

[0002] With the continuous development of the semiconductor industry, the manufacturing of semiconductor devices is becoming more and more precise and complex. As one of the core processes in semiconductor manufacturing, the importance of secondary overlay technology is becoming increasingly prominent. Secondary overlay technology provides strong support for the construction of complex circuit structures by superimposing multiple layers of patterns on the chip. Traditionally, the secondary overlay process involves the use of precisely aligned mask plates (including primary photolithography and overlay plates) to build circuit patterns layer by layer on silicon wafers. In the prior art, the mask plate used for multiple photolithography on the lithography machine will have positioning points with specific geometric shapes, which can be observed and positioned by a microscope or other optical equipment. During the lithography process, the lithography machine will use these positioning points as a reference to accurately align the pattern on the overlay plate with the existing pattern on the silicon wafer. This method generally includes the following steps: first, a basic circuit structure is formed on the silicon wafer through a primary photolithography plate, and then a layer of photoresist is coated on the silicon wafer, and a new circuit pattern is accurately superimposed on the formed structure using the overlay plate to achieve more complex functions.

[0003] However, despite the remarkable achievements of secondary overlay technology in semiconductor manufacturing, it still faces severe challenges in the customization of overlay plate size. Due to the diversity and highly personalized needs of semiconductor chip design, each secondary overlay process requires a mask plate of a specific size to be customized according to the target device. This not only increases production costs, but also prolongs the production cycle, limiting the wide application and flexibility of secondary overlay technology.

[0004] In order to overcome this challenge, it is urgent to explore new secondary overlay processes and mask designs. By introducing advanced manufacturing technology, optimizing process flows, and developing adaptive mask systems, the flexibility and adaptability of secondary overlay technology can be improved, production costs can be reduced, and production cycles can be shortened. Summary of the invention

[0005] The purpose of the present invention is to solve the problems in the prior art that the overlay plate needs to be customized according to the size of the target device and the overlay size cannot be flexibly adjusted, and to provide a lithography machine for automatically grabbing the lithography plate for multiple lithography.

[0006] The specific technical solutions adopted by the present invention are as follows:

[0007] A photolithography machine for automatically grabbing photolithography plates used in multiple photolithography, comprising a primary photolithography plate and an overlay plate used in combination, both of which have square chip mask units, the primary photolithography plate having two groups of first positioning mark combinations, the two groups of first positioning mark combinations being located at different positions of the primary photolithography plate and arranged in a mirror-symmetrical manner with respect to each other; each group of first positioning mark combinations comprising a group of first reference mark masks and at least one group of first offset mark masks; each group of first offset mark masks comprising a first positive offset mark mask and a first negative offset mark mask;

[0008] The overlay plate is provided with two groups of second positioning mark combinations, which are located at different positions of the overlay plate and are arranged in mirror symmetry with each other; each group of second positioning mark combinations includes a group of second reference mark masks and at least one group of second offset mark masks; each group of second offset mark masks includes a second positive offset mark mask and a second negative offset mark mask;

[0009] When the chip mask unit in the primary photolithography plate corresponds one-to-one with the chip mask unit in the overlay plate and their centers completely overlap, all the first reference mark masks on the primary photolithography plate and all the second reference mark masks on the overlay plate also correspond one-to-one, keeping the centers completely overlapping without offset, and each group of first offset mark masks on the primary photolithography plate respectively forms a mark pattern pair for alignment and positioning with a group of second offset mark masks on the overlay plate; and in any mark pattern pair, there is a first offset distance along the positive direction between the center of the first positive offset mark mask and the center of the second positive offset mark mask, and there is a second offset distance along the negative direction between the center of the first negative offset mark mask and the center of the second negative offset mark mask, the positive direction and the negative direction are respectively two opposite directions along the diagonal of the square of the chip mask unit in the primary photolithography plate, and the first offset distance is equal to the second offset distance.

[0010] Preferably, each group of first reference mark masks on the primary lithography plate includes two first reference mark masks, and each group of second reference mark masks on the overlay plate also includes two first reference mark masks.

[0011] Preferably, there are multiple groups of first offset mark masks on the primary photolithography plate, and the second offset mark masks on the overlay plate also have the same number of groups, and the two constitute multiple pairs of the mark pattern pairs; in different mark pattern pairs, the first offset distance or the second offset distance is different.

[0012] Preferably, in the primary lithography plate, all first positioning mark combinations are located in a peripheral non-chip mask area surrounding all chip mask units.

[0013] Preferably, in the overlay plate, all second positioning mark combinations are located in a peripheral non-chip mask area surrounding all chip mask units.

[0014] Preferably, in the first positioning mark combination, different mark masks use different mask patterns, and in the second positioning mark combination, the mask pattern of each mark mask is the same as the mask pattern of the corresponding mark mask in the first positioning mark combination.

[0015] Preferably, in the first positioning mark combination and the second positioning mark combination, the mask pattern of each mark mask consists of two inner and outer concentrically nested geometric figures.

[0016] Preferably, each mark mask in the first positioning mark combination constructs a desired pattern shape through a combination of a light-transmitting material area and an opaque material area.

[0017] Preferably, each mark mask in the second positioning mark combination constructs a desired pattern shape through a combination of a light-transmitting material area and an opaque material area.

[0018] Preferably, the chip mask unit in the primary photolithography plate is a light-transmitting material area, and the chip mask unit in the overlay plate is a light-opaque material area.

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] The utility model designs a primary photolithography plate and an overlay plate for use in combination. In addition to the chip unit mask, the surfaces of the two plates also have a combination of positioning marks in the form of patterned masks, so that the wafer can obtain positioning marks that can be clearly observed through a microscope at the non-chip position of the wafer after the primary front photolithography, and the positioning marks are retained on the wafer through wet etching. Therefore, during the overlay process, the positioning marks with different offsets on the overlay plate can be used for manual operation to align with the existing positioning marks on the wafer, and the overlay size can be flexibly adjusted in combination with multiple photolithography to obtain the required chip pattern.

[0021] The marking mask pattern carried by the overlay plate of the utility model can be recognized and captured by the commonly used photolithography machines on the market to achieve automatic alignment. The utility model can be used for the metallization table processing technology in the production process of semiconductor diode GPP tube cores, and can flexibly adjust the overlay effect, that is, the size of the welding lead hole according to the processing requirements and process methods, thereby adjusting the product's current capacity so that some parameters affected by the table size (such as forward voltage drop, forward surge, etc.) match the performance requirements and process capabilities, methods and methods of the packaging end. In addition, the advantages of the utility model can also be reflected in the ability to use a photolithography plate designed for products with shallow etching depths to overlay products with different slotting depths, greatly improving the utilization rate of the photolithography plate, effectively reducing the cost of raw materials, and further improving the economic benefits of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic diagram of a primary photolithography plate in an embodiment of the present invention;

[0023] Figure 2 for Figure 1 An enlarged view of the first positioning mark combination at position A in the middle (where A1, B1, and C1 are numbers for illustration and do not exist on the photolithography plate);

[0024] Figure 3 A schematic diagram of an overlay plate in an embodiment of the present invention;

[0025] Figure 4 for Figure 3 An enlarged view of the second positioning mark combination at position B (wherein the numbers A1, B1, C1, A2, B2, and C2 are only used for illustrative identification and do not need to exist on the photolithography plate);

[0026] Figure 5 A schematic diagram of an offset between a first positioning mark combination and a second positioning mark combination;

[0027] Figure 6 A simplified diagram of a positioning mark mask and a chip mask unit on a primary lithography plate;

[0028] Figure 7 A simplified diagram of a positioning mark mask and a chip mask unit on an overlay;

[0029] Figure 8 It is a schematic diagram of a first alignment state of a primary lithography plate and an overlay plate;

[0030] Fig. 9 is a schematic diagram of a second alignment state of a primary lithography plate and an overlay plate;

[0031] Fig.10 It is a schematic diagram of the third alignment state of the primary photolithography plate and the overlay plate;

[0032] Fig.11 Schematic diagram of the unexposed pattern after double photolithography with offset.

[0033] The colors in some of the above figures are only used for better distinction for display purposes, and do not require that the mask on the photolithography plate be of the corresponding color. DETAILED DESCRIPTION

[0034] In order to make the above-mentioned purpose, features and advantages of the present invention more obvious and easy to understand, the specific implementation mode of the present invention is described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below. The technical features in each embodiment of the present invention can be combined accordingly without conflicting with each other.

[0035] In the description of the present invention, it should be understood that the terms "first" and "second" are only used for the purpose of distinguishing descriptions, and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features.

[0036] In a preferred embodiment of the present invention, a photolithography machine for multiple photolithography is provided to automatically grab a photomask. Similar to the photomask assembly of the conventional overlay process, it also includes a set of primary photomask and overlay plates for matching use, and both the primary photomask and overlay plates have square chip mask units. The chip mask units on the primary photomask and overlay plates are arranged in an array according to conventional practices. The outer contours of the primary photomask and overlay plates are generally circles of equal diameter, and the outer contours of the internal chip mask units are generally square. The primary photomask and overlay plates form mask patterns on a transparent substrate with an opaque light-shielding film, and the patterns are transferred to a wafer by exposure. The masks on the transparent substrates of the two can be processed according to the prior art, for example, a thin layer of metal (usually chromium) can be plated on a glass substrate, and then the desired pattern can be etched on the metal layer by photolithography.

[0037] In a preferred embodiment of the present invention, the primary photomask and the overlay plate are different from the conventional method in that, in addition to the chip mask unit, both of them also have positioning marks, and the positioning marks on the two plates can be combined with each other to achieve alignment of different offsets, so as to achieve the required overlay size through multiple photolithography. The positioning marks on the primary photomask and the overlay plate are introduced below.

[0038] The above-mentioned primary photomask has two groups of first positioning mark combinations, which are located at different positions of the primary photomask and are arranged in mirror symmetry with each other. Generally speaking, in order to avoid the positioning mark pattern from affecting the chip mask area in the primary photomask, in the primary photomask, all first positioning mark combinations are located in the peripheral non-chip mask area surrounding all chip mask units. Each group of first positioning mark combinations includes a group of first reference mark masks and at least one group of first offset mark masks. Each group of first offset mark masks includes a first positive offset mark mask and a first negative offset mark mask.

[0039] In addition, the overlay plate is provided with two sets of second positioning mark combinations, which are located at different positions of the overlay plate and are arranged in mirror symmetry with each other. Similarly, all second positioning mark combinations in the overlay plate are preferably located in the peripheral non-chip mask area surrounding all chip mask units to avoid the positioning mark pattern from affecting the chip mask area in the overlay plate. Each set of second positioning mark combinations includes a set of second reference mark masks and at least one set of second offset mark masks. Each set of second offset mark masks includes a second positive offset mark mask and a second negative offset mark mask.

[0040] When the chip mask units in the above-mentioned primary lithography plate correspond one-to-one with the chip mask units in the above-mentioned overlay plate and their centers completely overlap, each mark mask needs to meet the following restrictions on the offset direction and offset distance: all the first reference mark masks on the primary lithography plate and all the second reference mark masks on the overlay plate also correspond one-to-one, keeping the centers completely overlapped without offset, and each group of first offset mark masks on the primary lithography plate respectively forms a mark pattern pair for alignment and positioning with a group of second offset mark masks on the overlay plate. It should be noted that each group of first offset mark masks on the primary lithography plate can only correspond to one group of second offset mark masks on the overlay plate to form a mark pattern pair, and they are in a one-to-one correspondence with each other. In any mark pattern pair, there is a first offset distance along the positive direction between the center of the first positive offset mark mask and the center of the second positive offset mark mask, and there is a second offset distance along the negative direction between the center of the first negative offset mark mask and the center of the second negative offset mark mask. The positive direction and negative direction defined in the present invention are two opposite directions along the square diagonal of the chip mask unit in the primary lithography, and it is feasible to specify which direction is the positive direction and which direction is the negative direction without any special limitation. However, for each pair of marking patterns, the first offset distance needs to be equal to the second offset distance.

[0041] The mark masks in the first positioning mark combination and the second positioning mark combination in the present invention need to be applied one by one for registration. The first offset mark mask in the first positioning mark combination is at least one group, or it can be multiple groups. The number of groups of the second offset mark mask in the second positioning mark combination is the same as the number of groups of the first offset mark mask in the first positioning mark combination.

[0042] As mentioned above, for each pair of marking pattern pairs, the first offset distance formed by the four offset mark masks inside it must be equal to the second offset distance. However, if there are multiple groups of first offset mark masks on the primary lithography plate, and the second offset mark masks on the overlay plate also have the same number of groups, the two will constitute multiple pairs of the above-mentioned marking pattern pairs. In this case, the first offset distances can be different between different marking pattern pairs, and the corresponding second offset distances can also be different. Therefore, the restriction that the above-mentioned first offset distance is equal to the second offset distance only applies to each pair of marking pattern pairs. In other words, for the marking pattern pair B, the first offset distance L formed by the four offset mark masks is equal to the second offset distance L. B1 Must be equal to the second offset distance L B2 For the mark pattern pair C, the first offset distance L formed by the four offset mark masks is C1 Must be equal to the second offset distance L C2 , but between different marker pattern pairs, L B1 Not equal to L C1 , L B2 Not equal to L C2 .

[0043] In an embodiment of the present invention, Figure 1 and Figure 2 As shown, the first positioning mark combination includes a group of first reference mark masks and two groups of first offset mark masks. One group of first reference mark masks includes a first reference mark mask A1 and a first reference mark mask A2. The first group of first offset mark masks includes a first positive offset mark mask B1 and a first negative offset mark mask B2. The second group of first offset mark masks includes a first positive offset mark mask C1 and a first negative offset mark mask C2. Each group of first reference mark masks on a single lithography plate includes two first reference mark masks. Of course, in theory, it is also feasible to have only one first reference mark mask or more than two first reference mark masks. However, considering the efficiency and accuracy of actual alignment, setting two first reference mark masks is a better choice. Similarly, if Figure 3 and Figure 4As shown, the second positioning mark combination includes a group of second reference mark masks and two groups of second offset mark masks, one group of second reference mark masks includes reference mark mask A1 and reference mark mask A2, the first group of second offset mark masks is the second positive offset mark mask B1 and the second negative offset mark mask B2, and the second group of second offset mark masks is the second positive offset mark mask C1 and the second negative offset mark mask C2.

[0044] Furthermore, Figure 5 As shown, when the chip mask units in the primary lithography plate correspond one-to-one with the chip mask units in the overlay plate and their centers completely overlap, the reference mark mask A1 and the reference mark mask A2 on the primary lithography plate correspond one-to-one with the reference mark mask A1 and the reference mark mask A2 on the overlay plate, respectively, to keep the centers completely overlapped without offset, and the first group of first offset mark masks B1 and B2 on the primary lithography plate respectively form a mark pattern pair for alignment and positioning with a group of second offset mark masks B1 and B2 on the overlay plate, and the first group of first offset mark masks C1 and C2 on the primary lithography plate respectively form a mark pattern pair for alignment and positioning with a group of second offset mark masks C1 and C2 on the overlay plate. In any mark pattern pair, the aforementioned offset direction and offset distance restrictions must be met. See. Figure 5 As shown, taking the offset mark masks B1 and B2 as an example, there is a positive offset along the upper left corner of the square diagonal between the center of the first positive offset mark mask B1 on the primary lithography plate and the center of the second positive offset mark mask B1 on the overlay plate, and the positive offset distance is recorded as L B + There is a negative offset along the lower right corner of the square diagonal between the center of the first negative offset mark mask B2 on the primary lithography plate and the center of the second negative offset mark mask B2 on the overlay plate. The negative offset distance is recorded as L B- The positive and negative offset distances must satisfy L B+ =L B- Similarly, the marking pattern pair corresponding to the offset marking masks C1 and C2 also meets the above-mentioned restrictions on the offset direction and the offset distance.

[0045] In the present invention, for the convenience of description, the horizontal side direction of the square outline of the chip unit mask is defined as the X-axis direction, and the vertical side direction of the square outline of the chip unit mask is defined as the Y-axis direction. Figure 5 In the embodiment shown, the positive and negative offset distances of the mark pattern pairs corresponding to the offset mark masks B1 and B2 are both 2.5 mil in the X-axis and Y-axis directions, while the positive and negative offset distances of the mark pattern pairs corresponding to the offset mark masks C1 and C2 are both 5 mil in the X-axis and Y-axis directions. These three pairs of mark patterns ABC can be used to overlay three chip unit patterns of different sizes, which can be divided into three situations:

[0046] 1. If the grabbing points are the mark masks A1 and A2 on the overlay plate, after aligning them with the mark masks A1 and A2 of the primary lithography plate, the overlay is finally performed according to S155, and the overlay window size is a square 155mil.

[0047] 2. If the grabbing point is the mark mask B1 (or B2) on the overlay plate, after aligning it with the mark mask B1 (or B2) of the primary lithography plate, the X and Y axes will be offset by 2.5 mil respectively. After two lithography, the X and Y axes will shrink by 5 mil in total, and the overlay window size will be a square 150 mil.

[0048] 3. If the grabbing point is the mark mask C1 (or C2) on the overlay plate, after aligning it with the mark mask C1 (or C2) of the primary lithography plate, the X and Y axes will be offset by 5 mil respectively. After two lithography, the X and Y axes will shrink by 10 mil in total, and the overlay window size will be a square 145 mil.

[0049] In addition, in order to facilitate the automatic grabbing of marks for alignment by the lithography machine, in the first positioning mark combination, different mark masks use different mask patterns, and in the second positioning mark combination, the mask pattern of each mark mask is the same as the mask pattern of the mark mask corresponding to it in the first positioning mark combination. That is, the masks of marks with the same number (such as A1 and A1, B2 and B2) use the same mask pattern, and the masks of marks with different numbers (such as A1 and B1, A1 and A2) use different mask patterns. Thus, the lithography machine can automatically align by identifying the pattern. In an embodiment of the present invention, in the first positioning mark combination and the second positioning mark combination, the mask pattern of each mark mask is composed of two concentric nested geometric figures inside and outside, and the optional geometric figures can be common squares, triangles, circles, hexagons, diamonds, etc. Different geometric figures can be combined to form mask patterns of multiple sets of mark masks. Thus, these marking mask patterns can be recognized and feature points can be grabbed by the commonly used lithography machines currently on the market (such as Canon of Japan, Changti of Taiwan, China) to achieve automatic alignment.

[0050] Each mark mask in the first positioning mark combination is constructed by combining a light-transmitting material area and an opaque material area to form a desired pattern shape. Similarly, each mark mask in the second positioning mark combination is constructed by combining a light-transmitting material area and an opaque material area to form a desired pattern shape. The specific processing method of these mark masks in the primary lithography plate and the overlay plate is consistent with the processing method of other chip mask units, and the only difference is the shape.

[0051] In order to demonstrate the specific principle of the present invention that the primary lithography plate with the mark mask and the overlay plate are combined to manually align the plates and freely adjust the overlay size, the mark mask and chip mask unit on the primary lithography plate are simplified as follows: Figure 6 As shown, only four chip mask units are shown; similarly, the marking mask and chip mask unit on the overlay are simplified as follows Figure 7 As shown, only four chip mask units are shown. Taking the scenario of forming the metallized mesa of the diode chip by overlay as an example, the photolithography method with adjustable overlay size is as follows:

[0052] 1) First, use a primary photomask for photolithography. The photolithography process is the same as the existing technology. The primary photomask pattern is transferred to the wafer surface coated with the photomask through the photolithography machine. The coordinate ruler mask and chip mask unit patterns on the primary photomask are transferred to the silicon wafer surface, followed by wet etching, leaving the coordinate ruler on the wafer surface. Then the wafer goes through the steps of debonding, powdering, sintering, etc. to the second photolithography (DP scraping method is the second photolithography, PG photoresist method is the third photolithography), that is, the stage of overlay to obtain the metalized table.

[0053] 2) When overlay is required after one lithography is completed, after the overlay plate is installed, the machine will automatically grab the positioning mark for alignment. For example, if the specification of the overlay plate used is S155, which is a common overlay table size for the S180 product of this specification, that is, the square side length of the chip mask unit in the overlay plate is 155 mil. When the marking masks A1 and A2 on the overlay plate correspond to the marking masks A1 and A2 of the primary lithography plate, respectively, that is, grabbing the A1 or A2 point is a conventional overlay scheme, and the overlay obtained at this time is the S155 chip mask unit. As mentioned above, refer to Figure 5 As shown, the marking masks B1 and B2, and the marking masks C1 and C2 on the overlay plate are designed with corresponding offset distances, and both the X-axis and the Y-axis are offset. For example, the X-axis of B1 is offset 2.5 mil to the right relative to the primary lithography, and the Y-axis is offset 2.5 mil upward relative to the primary lithography, and C1 is offset by 5 mil. When performing the overlay process, the lithography machine adjusts the overlay size according to the setting of the grab point. For example, the chip mask unit of the overlay plate currently used is the common size of S155 mil. If the chip table size that needs to be overlaid is exactly S155 mil, then the marking masks A1 and A2 on the overlay plate can be aligned with the marking masks A1 and A2 of the primary lithography plate respectively. At this time, Figure 8 However, if the chip table size is smaller than S155 mil, the overlay plate needs to be used for two photolithography. For example, when the target chip table size is S145 mil, the mark mask C1 on the overlay plate is aligned with the mark mask C1 of the primary photolithography plate for the first photolithography, and the result is as follows: Fig. 9The pattern shown in FIG. 1 is then aligned with the mark mask C2 on the overlay plate and the mark mask C2 on the primary photolithography plate for a second photolithography. Fig.10 The pattern shown in Figure 1. After two such photolithography, the overlapping part of the two patterns is as shown in Figure 1. Fig.11 As shown, the overlapping part is exactly the target chip of S145 mil. Therefore, in order to meet the overlay size adjustment requirements of the present invention, the chip mask unit in the above-mentioned primary photomask can be a light-transmitting material area, while the chip mask unit in the overlay can be an opaque material area. When the mesa of the diode chip is formed by overlay, the photoresist coated on the surface of the wafer adopts a negative photoresist, and the overlapping part of the chip mask unit of the two photolithography in the overlay link is not exposed at all. The unexposed photoresist can be removed from this area by subsequent development and fixing operations, and a window that meets the target metallization mesa size is obtained on the surface of the diode chip by wet etching in the subsequent process.

[0054] It should be noted that in the above embodiments, the offset of the marking pattern pair is only a commonly used size, but in theory, the offset of the marking pattern pair can be modified arbitrarily. In other embodiments, if more offset distances need to be achieved with the same overlay plate, and more overlay sizes need to be constructed, more marking pattern pairs can be set, but each pair of marking pattern pairs needs to meet the above-mentioned restrictions on the offset direction and offset distance.

[0055] The above-described embodiment is only a preferred solution of the present invention, but it is not intended to limit the present invention. A person skilled in the relevant technical field may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, any technical solution obtained by equivalent replacement or equivalent transformation falls within the protection scope of the present invention.

Claims

1. A photolithography machine for automatically grabbing a photoresist plate for multiple photolithography, comprising a primary photoresist plate and an overlay plate used in conjunction with each other, both the primary photoresist plate and the overlay plate having square chip mask units, characterized in that: The primary photomask is provided with two groups of first positioning mark combinations, which are located at different positions of the primary photomask and are arranged in mirror symmetry with each other; each group of first positioning mark combinations includes a group of first reference mark masks and at least one group of first offset mark masks; each group of first offset mark masks includes a first positive offset mark mask and a first negative offset mark mask; The overprint plate is provided with two sets of second positioning mark combinations, the two sets of second positioning mark combinations are located at different positions of the overprint plate and are arranged in a mirror-symmetrical manner with respect to each other; Each group of second positioning mark combinations includes a group of second reference mark masks and at least one group of second offset mark masks; each group of second offset mark masks includes a second positive offset mark mask and a second negative offset mark mask; When the chip mask unit in the primary photolithography plate corresponds one-to-one with the chip mask unit in the overlay plate and their centers completely overlap, all the first reference mark masks on the primary photolithography plate and all the second reference mark masks on the overlay plate also correspond one-to-one, keeping the centers completely overlapping without offset, and each group of first offset mark masks on the primary photolithography plate respectively forms a mark pattern pair for alignment and positioning with a group of second offset mark masks on the overlay plate; and in any mark pattern pair, there is a first offset distance along the positive direction between the center of the first positive offset mark mask and the center of the second positive offset mark mask, and there is a second offset distance along the negative direction between the center of the first negative offset mark mask and the center of the second negative offset mark mask, the positive direction and the negative direction are respectively two opposite directions along the diagonal of the square of the chip mask unit in the primary photolithography plate, and the first offset distance is equal to the second offset distance.

2. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: Each group of first reference mark masks on the primary lithography plate includes two first reference mark masks, and each group of second reference mark masks on the overlay plate also includes two first reference mark masks.

3. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: There are multiple groups of first offset mark masks on the primary lithography plate, and there are the same number of second offset mark masks on the overlay plate, and the two constitute multiple pairs of the mark pattern pairs; in different mark pattern pairs, the first offset distance or the second offset distance is different.

4. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: In the primary photolithography plate, all first positioning mark combinations are located in a peripheral non-chip mask area surrounding all chip mask units.

5. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: In the overlay plate, all second positioning mark combinations are located in the peripheral non-chip mask area surrounding all chip mask units.

6. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: In the first positioning mark combination, different mark masks use different mask patterns, while in the second positioning mark combination, the mask pattern of each mark mask is the same as the mask pattern of the corresponding mark mask in the first positioning mark combination.

7. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: In the first positioning mark combination and the second positioning mark combination, the mask pattern of each mark mask is composed of two inner and outer concentrically nested geometric figures.

8. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: Each mark mask in the first positioning mark combination constructs a desired pattern shape through a combination of a light-transmitting material area and a light-opaque material area.

9. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: Each mark mask in the second positioning mark combination constructs a desired pattern shape through a combination of a light-transmitting material area and a light-opaque material area.

10. The automatic grabbing of photoresist plates by a photolithography machine for multiple photolithography as claimed in claim 1, characterized in that: The chip mask unit in the primary photolithography plate is a light-transmitting material area, and the chip mask unit in the overlay photolithography plate is a light-opaque material area.

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