Interconnection structure, flip chip and quantum computer
By forming adhesion layers and conductor columns on the upper and lower surfaces of the superconducting quantum chip, the conductor structure is manufactured in step by step to fill through holes, solving the problem of low quality of silicon through hole interconnection, and achieving high-quality signal transmission and product quality improvement .
Patent Information
- Application Number
- CN202420927457.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-29
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2034-04-29
AI Technical Summary
The existing through-silicon solution has low quality of interconnected structures in superconducting quantum chips, resulting in signal crosstalk and distortion problems. It is difficult to manufacture conductor structures in through-holes with large aspect ratios, and the coating speed of filling superconducting metals is slow. It is difficult to achieve high-quality electrical connections.
By forming adhesion layers on the upper and lower surfaces of the substrate and forming conductor columns in the through holes, high-quality interconnection of the upper and lower surfaces is achieved, conductor structures are manufactured in steps, conductor structures are manufactured from the front and back of the chip and filled into the through holes. , reduce manufacturing difficulty and improve interconnection quality.
It improves the quality of the through-hole interconnect structure, reduces manufacturing difficulty, reduces line crosstalk and distortion, and improves the signal transmission efficiency and product quality of superconducting quantum chips.
Smart Images
Figure CN222356888U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit manufacturing, and in particular to an interconnect structure, a flip chip and a quantum computer. Background Art
[0002] At present, as the number of bits in superconducting quantum chips continues to increase, the various lines related to the bits in the chip are also increasing, which potentially increases the signal crosstalk and distortion of the lines in the chip. In order to improve the utilization of chip area and reduce loss and crosstalk, superconducting quantum chips are increasingly using through-silicon via technology to achieve double-sided superconducting connectivity.
[0003] However, the current TSV solution has a low success rate and the quality of the TSV structure formed is not high. Utility Model Content
[0004] The present application provides an interconnection structure, a flip chip and a quantum computer to solve the problem of low quality of through-hole interconnection structure when TSV (through silicon via) interconnection is applied in the prior art.
[0005] In a first aspect, the present application example discloses an interconnect structure, which includes:
[0006] The substrate has a through hole extending from the first surface to the second surface along the thickness direction, wherein the through hole has a first hole segment close to the first surface, a second hole segment close to the second surface, and an interval hole segment between the first hole segment and the second hole segment.
[0007] a first attachment layer having a first main conductor integrally connected and attached to the first surface and a first secondary conductor on the wall of the first hole section; a second attachment layer having a second main conductor integrally connected and attached to the second surface and a second secondary conductor on the wall of the second hole section; and
[0008] The conductor post is filled in the through hole and contacts the first sub-conductor, the second sub-conductor and the spacing hole segment respectively.
[0009] According to some examples of the present application, the first adhesion layer is a superconducting film, and the second adhesion layer is a superconducting film;
[0010] Alternatively, the first attachment layer and the second attachment layer are made of different superconducting materials;
[0011] Alternatively, the conductor column is a TiN column, a NbTiN column, or a Nb column, and the first adhesion layer and the second adhesion layer are aluminum adhesion layers respectively;
[0012] Alternatively, the conductor column is a TiN column, a NbTiN column, a Nb column, a Ti column, or an Au column, the second adhesion layer is independently a TiN film, a NbTiN film, a Nb film, a Ti film, or an Au film, and the first adhesion layer is an aluminum adhesion layer.
[0013] According to some examples of the present application, the first secondary conductor has a thickness dimension measured along a direction perpendicular to the lateral direction;
[0014] The thickness dimension gradually decreases from the first surface to the second surface.
[0015] According to some examples of the present application, the second secondary conductor has a thickness dimension measured along a direction perpendicular to the lateral direction; and the thickness dimension gradually decreases from the second surface to the first surface.
[0016] According to some examples of the present application, the conductor post is a solid post.
[0017] According to some examples of the present application, the conductor column is a superconducting column, and both ends of the conductor column protrude out of the through hole.
[0018] According to some examples of the present application, the first main conductor is composed of two first separated parts separated and avoiding the through hole; the interconnection structure includes a first connecting section, the two first separated parts are electrically conductive through the first connecting section, and the first connecting section covers the end of the conductor column located on the first surface;
[0019] And / or, the second main conductor is composed of two second separated parts separated and avoiding the through hole; the interconnection structure includes a second connecting section, the two second separated parts are conductive through the second connecting section, and the second connecting section covers the end of the conductor column located on the second surface.
[0020] According to some examples of the present application, the cross-sectional shape of the through hole along the thickness direction is a trapezoid;
[0021] And / or, the thickness of the first adhesive layer is different from the thickness of the second adhesive layer.
[0022] According to some examples of the present application, both ends of the conductor column are arc-shaped surfaces.
[0023] In a second aspect, an example of the present application further discloses a flip chip having the aforementioned interconnection structure.
[0024] In a third aspect, an example of the present application also discloses a quantum computer having the aforementioned flip chip.
[0025] In the above-mentioned interconnection structure, by forming adhesion layers (first adhesion layer and second adhesion layer) on the upper and lower surfaces (i.e., the first surface and the second surface) of the substrate respectively, and extending them in the through holes of the substrate, and then forming conductor columns in the through holes, the interconnection structure in the through holes can be manufactured with high quality, and thus the upper and lower interconnection effects can be improved.
[0026] This solution has a positive effect on the application of through-hole interconnection with a large aspect ratio. For through-holes with a large aspect ratio, due to the large depth, directly manufacturing the conductor structure in the hole to interconnect the upper and lower surfaces of the substrate will result in the conductor structure being unable to be manufactured in one go. Using the solution in the example of this application, by manufacturing the attachment layer from the upper and lower surfaces of the through-hole respectively, and then using the conductor formed in the hole to electrically connect the two, the manufacturing difficulty can be greatly reduced, thereby also improving the interconnection manufacturing. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] For a clearer explanation, the following briefly introduces the drawings required for the description.
[0028] Figure 1 A schematic diagram of the structure of the first interconnection structure provided in an embodiment of the present application;
[0029] Figure 2 A schematic diagram of the structure of a second interconnection structure provided in an embodiment of the present application;
[0030] Figure 3 A schematic structural diagram of a substrate in an interconnect structure with a trapezoidal through hole is provided for an embodiment of the present application;
[0031] Figure 4 Published in Figure 3 A schematic diagram of a structure of an interconnection structure in which a conductor column (excluding an adhesion layer) having convex surfaces at both ends is formed in a through hole of a substrate;
[0032] Figure 5 Schematic diagram of the manufacturing process flow of the interconnect structure in the disclosed example.
[0033] Description of the reference numerals: 100 -interconnection structure; 101 -substrate; 102 -second adhesion layer; 103 -conductor column; 104 -first adhesion layer; 105 -first connection section; 106 -second connection section. DETAILED DESCRIPTION
[0034] The specific implementation of the present application will be described in more detail below in conjunction with the schematic diagram. The advantages and features of the present application will become clearer according to the following description and claims. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present application.
[0035] In the description of the present application, it should be understood that the terms "center", "up", "down", "left", "right", etc., indicating directions or positional relationships are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present application.
[0036] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0037] Three-dimensional packaged chips, or 3D packaged chips, are a solution to further increase the device density in the chip without significantly increasing the difficulty of packaging and the layout of circuits and components.
[0038] The currently available solution is to plate metal on the back side of a flip chip (eg, a flip chip) and then use a bonding method to ground the back side of the flip chip.
[0039] However, as the number of components or circuits in the chip continues to increase (for superconducting quantum chips, the number of superconducting quantum bits in the chip increases), such a method will not be applicable, or there will be limitations if only this solution is used.
[0040] Therefore, it is necessary to find a new method to replace and improve the current bonding method. In such a chip structure, based on the needs, you can choose to use silicon through-hole via technology to achieve signal connectivity or electrical connection between components and circuits on the front and back sides of the chip. This application is an improvement on TSV technology.
[0041] Specifically, the solution of the example of this application introduces the TSV process in the semiconductor process, changes the seed layer and the filling layer in the TSV structure, and applies it to the manufacturing process of the superconducting quantum chip to improve the density of the circuits and components in the chip without significantly increasing the configuration and layout difficulty of the circuits and components. In addition, in particular, the solution can also achieve the effect of reducing the crosstalk and distortion of the circuits in the superconducting quantum chip.
[0042] From a practical application point of view, after the silicon through via is made, subsequent processes are still required. Therefore, in order to avoid the influence of the through hole on the subsequent process (such as photolithography coating, leakage into the through hole), the present application chooses to fill the through hole with (such as superconducting) metal. However, the manufacturing process of the electroplating process has the problem of very slow coating speed. For example, the coating speed of the atomic layer deposition process (Atom Layer Deposition, referred to as ALD) is usually less than 1nm / min. Therefore, it is very difficult to fill the through hole with superconducting metal, and it is difficult to complete the filling of the through hole. And such a problem will become particularly serious for through holes with large aspect ratios (for example, greater than 1 / 7, 1 / 2, 3 / 1 or 10 / 1).
[0043] After analysis, the applicant believes that the main reasons for this problem are:
[0044] The above electroplating scheme "expects" to manufacture a conductive structure in a through hole with a large depth at one time. When manufacturing a conductive structure in a through hole in this way, the conductive structure may be disconnected, or filled with pores, or fail to form a good electrical connection.
[0045] Therefore, the applicant believes that the filling structure in the through hole can be manufactured in a step-by-step manner. Specifically, the conductor structure is manufactured from the front and back sides of the chip respectively, and these conductor structures are filled into the through hole (the two layers of conductor structures can be conductively contacted), and then the conductor is filled into the through hole. The filled conductor is used to connect the conductor structures on the front and back sides to achieve electrical connection.
[0046] Since the front and back sides of the chip are manufactured in different steps, the difficulty of implementing a single manufacturing process is reduced and the quality of manufactured products is improved.
[0047] Below is the attached figure ( Figure 1 , Figure 2 , Figure 3 , Figure 4 and Figure 5 ) describes in detail the interconnect structure 100 in the example of the present application.
[0048] like Figure 1 As shown, the interconnect structure 100 in the example includes a substrate 101 , a first adhesion layer 104 , a second adhesion layer 102 , and a conductor post 103 .
[0049] The first adhesion layer 104 and the second adhesion layer 102 are respectively formed on the two surfaces of the substrate 101 and also extend into the through hole of the substrate 101, while the conductor column 103 fills the through hole and also contacts the first adhesion layer 104 and the second adhesion layer 102, so that the structures on the upper and lower surfaces of the substrate 101 can be electrically connected and can also be used to transmit signals - microwave signals, electrical signals.
[0050] Among them, the substrate 101 can be selected as sapphire, silicon wafer, or silicon nitride, etc. Its (thickness direction projection) shape can be rectangular or circular. For the convenience of description, the substrate 101 has a front side and a back side along the thickness direction, which can also be described as a front side and a back side, or a top side and a bottom side. In the example of the present application, it is described as a first surface and a second surface.
[0051] Furthermore, the substrate 101 further has a through hole extending from the first surface to penetrate the second surface.
[0052] The through hole may be a straight through hole, or a trapezoidal hole whose cross-section shape along the thickness direction of the substrate 101 is a trapezoidal hole, such as Figure 3 As shown. For a trapezoidal hole, for example, the inner wall of the through hole is inclined inward from the first surface to the second surface. That is, the inner wall of the through hole is not perpendicular to the first surface, so the opening aperture (D1) of the through hole on the first surface A is larger than the opening aperture (D2) of the through hole on the second surface B. Figure 3 As shown, the through hole is wide at the top and narrow at the bottom from the first surface to the second surface. In a practical application example, the aperture D1 of the through hole on the first surface is 10% to 15% larger than the aperture D2 of the through hole on the second surface.
[0053] Further, based on the consideration of metal particles entering the through hole, the diameter of the superconducting metal sphere does not exceed the aperture of the through hole on the first surface, and is larger than the aperture of the through hole on the second surface so as not to slide out. That is, assuming that the diameter of the superconducting metal sphere is R, then D2<R≤D1, so the superconducting metal sphere can be implanted into the through hole from the first surface of the substrate 101, but will not slide out of the through hole from the second surface of the substrate 101.
[0054] In the example, as an example of a straight through hole, a cylindrical through hole can be used for description, but it is not limited to a cylindrical shape. Further, in order to facilitate the description and other structures in the interconnection structure 100, the through hole is defined by partitioning along its axial direction. Therefore, the through hole has a first hole segment that is distributed in sequence and close to the first surface, a second hole segment that is close to the second surface, and an interval hole segment between the first hole segment and the second hole segment. That is, the through hole includes a first hole segment, an interval hole segment, and a second hole segment that are connected in sequence.
[0055] As a conductor to improve the structure of electrical conduction or signal transmission, the first adhesion layer 104 has a first main conductor that is continuous and attached to the first surface and a first secondary conductor on the wall of the first hole segment. That is to say, the first main conductor and the first secondary conductor in the first adhesion layer 104 are manufactured in the same process. For example, the first adhesion layer 104 can be deposited on the surface of the substrate 101 and in the through hole (side wall) by oblique evaporation. In specific implementation, the substrate 101 can be placed horizontally, and the material source of the first adhesion layer 104 can be tilted relative to the substrate 101.
[0056] Similarly, the second adhesion layer 102 has a second main conductor that is continuous and attached to the second surface and a second secondary conductor on the wall of the second hole segment. That is, the second main conductor and the second secondary conductor in the second adhesion layer 102 are manufactured in the same process. For example, the second adhesion layer 102 can be deposited on the surface of the substrate 101 and in the through hole (side wall) by oblique evaporation. In specific implementation, the substrate 101 can be placed horizontally, and the material source of the second adhesion layer 102 can be tilted relative to the substrate 101.
[0057] The above-mentioned "continuous" means that the main conductor and the auxiliary conductor are manufactured as an integrated structure, rather than being manufactured in different processes and steps and then connected together. For example, when they are manufactured by deposition, the two are deposited and manufactured together. That is, the main conductor and the auxiliary conductor are connected as a whole.
[0058] In the above two adhesion layers, the thickness of the main conductor on the surface of the substrate 101 and the secondary conductor on the side wall of the through hole are related to parameters such as the time of oblique evaporation and the inclination angle, and can be selected according to specific circumstances.
[0059] The structural parameters of the first adhesion layer 104 and the second adhesion layer 102 may be the same or different in different examples. For example, the thickness of the first adhesion layer 104 and the thickness of the second adhesion layer 102 may be different. Or, for example, the attachment depth of the first adhesion layer 104 to the first sub-conductor in the first hole section of the through hole and the attachment depth of the second adhesion layer 102 to the second sub-conductor in the second hole section of the through hole may be different.
[0060] Furthermore, the thickness of the corresponding sub-conductors of the two attachment layers can also be designed. For example, the first sub-conductor has a thickness dimension measured along a direction perpendicular to the lateral direction, and the thickness dimension gradually decreases from the first surface to the direction of the second surface. Similarly, the second sub-conductor has a thickness dimension measured along a direction perpendicular to the lateral direction, and the thickness dimension gradually decreases from the second surface to the direction of the first surface.
[0061] In addition, in terms of materials, the first attachment layer 104 and the second attachment layer 102 can be made of the same material; or different materials. As an application example of a superconducting quantum chip, the first attachment layer 104 is a superconducting film, and the second attachment layer 102 is a superconducting film. And under the premise that both are superconducting films, the first attachment layer 104 and the second attachment layer 102 can also be made of different superconducting materials.
[0062] In some more specific alternative examples, the first adhesion layer 104 and the second adhesion layer 102 can be aluminum adhesion layers respectively. The second adhesion layer 102 is independently a TiN film, a NbTiN film, a Nb film, a Ti film, or an Au film, and the first adhesion layer 104 is an aluminum adhesion layer.
[0063] In particular, for non-monomeric adhesion layers such as TiN, NbTiN, etc., the applicant has also found that the portion attached in the through hole may not form a superconductor during the evaporation coating process. That is, for example, in the case of a superconducting quantum chip, for the example in which the second adhesion layer 102 in the interconnect structure 100 is TiN, its second main conductor may be a superconductor, but the second secondary conductor may not form a superconductor.
[0064] The superconductivity here refers to the temperature at which the superconducting quantum chip operates in normal working condition; for example, the Josephson junction based on aluminum junction (Al-AlOx-Al), and the superconducting quantum bits constructed based on it, as well as the superconducting quantum chips and computers formed further therefrom.
[0065] The reason may be that during evaporation coating (for example, using ALD equipment), since the through hole of the substrate 101 has a large aspect ratio, the chemical reaction in the through hole is insufficient, and the element ratio of TiN in the through hole is uneven, resulting in the film (such as the second sub-conductor in the example) not being superconducting.
[0066] When the interconnection structure 100 is used for connecting superconducting circuits or components, the above-mentioned non-superconductivity may have a very adverse effect. Therefore, in such an example, it can be considered to perform superconductivity repair on the first main conductor and the second main conductor.
[0067] The repair may be to use a first superconductor to electrically connect different parts of a first main conductor on the first surface, and to use a second superconductor to electrically connect different parts of a second main conductor on the second surface. In addition, the first superconductor and the second superconductor are also connected to the upper and lower ends of a conductor column 103, which is a superconductor, respectively. Figure 2 .
[0068] That is, in some examples, the first main conductor may be composed of two first separated parts separated and avoiding the through hole. Meanwhile, the interconnection structure 100 further includes a first connecting segment 105 (such as the first superconductor mentioned above), and the two first separated parts are electrically conductive through the first connecting segment 105, and the first connecting segment 105 covers the end of the conductor column 103 located on the first surface.
[0069] As a corresponding design of the connection between the first adhesion layer 104 and the second adhesion layer 102, the second main conductor can also be composed of two second separation parts separated and avoiding the through hole. At the same time, the interconnection structure 100 also includes a second connection segment 106 (such as the second superconductor mentioned above), and the two second separation parts are correspondingly conductive through the second connection segment 106, and the second connection segment 106 covers the end of the conductor column 103 located on the second surface.
[0070] Continuing with the above, the conductor post 103 in the interconnection structure 100 is discussed. The conductor post 103 can be a solid post or a hollow post. Considering the blocking of the through hole by the conductor post 103, the photoresist is prevented from leaking into it during subsequent use. In this way, the uneven coating of the photoresist can be ensured, and impurities can be avoided from being introduced into the through hole. And because the through hole is filled, the tray can conveniently fix the chip / substrate 101 by vacuum adsorption between different devices or when fixing it.
[0071] In terms of material, in some alternative examples, the conductor column 103 can be a superconducting column or a non-superconducting column. When the filling metal in the through hole is a superconducting metal, that is, a superconducting conductor column 103, when performing low-temperature testing in a dilution refrigerator, it will not increase loss and introduce other crosstalk sources, which helps to obtain real test results. For example, a TiN column, a NbTiN column, or a Nb column, a Ti column, or an Au column.
[0072] Structurally, the conductor post 103 is filled in the through hole and contacts the first sub-conductor, the second sub-conductor and the spaced hole segment respectively. If necessary, and if the process allows and the quality is guaranteed, the conductor post 103 can be provided in a prefabricated structure, and then embedded / inserted into the through hole and contacted with the first sub-conductor, the second sub-conductor and the spaced hole segment. Because the conductor post 103 is conductive, the first attachment layer 104 and the second attachment layer 102 are electrically connected, so that the first main conductor on the first surface of the substrate 101 and the second main conductor on the second surface of the substrate 101 are connected.
[0073] In the example of the present application, the manufacturing material of the conductor column 103 (such as in the form of a granular structure) can be selected to be filled into the through hole, and then formed into a structure filled into the through hole by hot melting. Later, it will be described in detail in the manufacturing process of the interconnection structure 100. In some specific examples, the conductor column 103 can be manufactured by laser aluminum implantation equipment to implant aluminum into the through hole.
[0074] Considering the above manufacturing method, the two ends of the conductor column 103a are arc-shaped surfaces, such as convex arc surfaces (or convex surfaces), such as Figure 4 As shown. That is, both ends of the conductor column protrude outside the through hole. By designing the protruding structure, it is helpful to connect the first superconductor and the second superconductor in the example of achieving superconducting connection by repair described above. For example, this can be done by filling the hole with granular material, and then forming a protruding surface structure under surface tension by heat melting (laser).
[0075] Based on the above interconnection structure 100, a flip chip and a quantum computer can be constructed, wherein the flip chip can have two or three layers of sub-chips, wherein any one or two or more layers of chips are configured with the interconnection structure 100, and through the interconnection structure.
[0076] In order to facilitate those skilled in the art to implement the interconnection structure 100 in the example of the present application, the manufacturing method of the interconnection structure 100 in the example is described below.
[0077] See also Figure 5 The present application embodiment provides a method for manufacturing a superconducting silicon via. The manufacturing method mainly includes four steps S1, S2, S3, and S4.
[0078] Step S1, pre-treating the substrate 101 by degreasing and surface polishing.
[0079] Step S2, etching the substrate 101 to form a through hole.
[0080] Step S3, forming an adhesion layer on the surface of the substrate 101 and the inner wall of the through hole by oblique evaporation.
[0081] Step S4, filling the through hole with a conductor that is in electrical contact with the adhesion layer on the inner wall.
[0082] In some specific examples, the manufacturing method includes the following steps:
[0083] A sapphire substrate 101 is selected, and its surface is polished, degreased, and thinned. A through hole is formed on the substrate 101 by etching along the thickness direction. The through hole is etched by, for example, dry etching or wet etching.
[0084] First, the area to be etched is exposed with photoresist, and then the area to be etched is selectively etched to form a through hole; deep silicon etching can be performed, and etching can be performed twice from the front and back sides of the substrate 101 respectively to reduce the difficulty of directly etching through from one surface alone, although there are higher requirements for alignment when etching from the front and back sides. When etching from one side, an etching stop layer can be manufactured on the surface of the substrate 101.
[0085] Then, an adhesion layer is manufactured by deposition, and the adhesion layer covers the first surface, the second surface and the inner wall of the through hole (not covering the entire inner wall) of the substrate 101. In particular, the adhesion layer forms two non-intersecting parts on the inner wall of the through hole. The deposition process can be a physical vapor deposition process, such as thermal evaporation, electron beam evaporation, magnetron sputtering and the like.
[0086] After the adhesion layer is formed, superconducting metal particles (such as aluminum particles) matching the aperture of the through hole can be filled into the through hole, and then the through hole can be filled using a method such as laser melting, and after cooling and solidification, a conductor column 103 filled into the through hole is formed.
[0087] In the above steps, considering that the diameter of the superconducting metal spheres is compatible with the aperture of the through hole, after the superconducting metal spheres are filled into the through hole, they will not easily detach from the through hole. Accordingly, after the superconducting metal spheres are melted (such as melted) by a high-energy laser, they can better fill the through hole. Subsequently, after the laser is removed, the molten superconducting metal will solidify, and due to the presence of the superconducting seed layer (i.e., the adhesion layer), the molten superconducting metal will adhere to the superconducting seed layer when solidifying (the conductor column 103 and the seed layer can be combined into one), so that the superconducting filling layer formed will completely block the through hole. In this embodiment, the material of the superconducting seed layer is aluminum, and the material of the superconducting metal spheres is aluminum or indium.
[0088] Taking a through hole with a diameter of 90 μm and a depth of 270 μm as an example, the diameter of the superconducting metal sphere (metal particle) is equal to 90 μm or slightly less than 90 μm (such as between 70 μm and 90 μm), and approximately 3 superconducting metal spheres can be selected to fill the through hole in a non-molten state. However, in order to form a conductor column 103 that is completely filled in the through hole, for example, a larger number (such as 9) of metal balls can be selected to fill the hole to ensure that the conductor column 103 protrudes from both ends of the through hole, so that the side wall of the conductor column 103 can be in contact with the adhesion layer on the surface of the substrate 101.
[0089] It should be noted that if there are too few or insufficient metal particles, the two ends of the conductor column 103 may be sunken due to surface tension after melting, making it inconvenient to use in the aforementioned repair process. Therefore, more metal particles may be provided, for example, exposed to the surface of the substrate 101, so that the top and bottom surfaces of the conductor column 103 are not flat, but curved surfaces with a certain curvature, which may be caused by the tension when the molten superconducting metal solidifies.
[0090] Through the above-mentioned scheme, laser melting and re-solidification can be used to make the through-hole filling speed faster, and the superconducting seed layer and the conductor column 103 are combined to play a double-sided superconducting connection role, and the adhesion of the superconducting filling layer can be improved, so that the superconducting filling layer can be formed faster. Therefore, the present application can quickly fill the superconducting metal in the through-hole.
[0091] The above solution can realize efficient and high-quality manufacturing of TSV structure, thereby realizing high-quality interconnection. In this way, when manufacturing three-dimensional packaged chips, such as flip chips, the quality of the chips can be significantly improved and the production yield can be increased.
[0092] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "instance" or "specific example" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.
[0093] The above are only preferred embodiments of the present application and do not have any limiting effect on the present application. Any technical personnel in the relevant technical field, without departing from the scope of the technical solution of the present application, may make any form of equivalent replacement or modification to the technical solution and technical content disclosed in the present application, which shall be deemed as the content of the technical solution of the present application and still fall within the protection scope of the present application.
Claims
1. An interconnection structure, characterized in that: include: A substrate having a through hole extending from a first surface to a second surface along a thickness direction, wherein the through hole has a first hole segment distributed in sequence and close to the first surface, a second hole segment close to the second surface, and an interval hole segment between the first hole segment and the second hole segment; The first attachment layer comprises a first main conductor integrally connected and attached to the first surface and a first secondary conductor on the hole wall of the first hole section; the second attachment layer comprises a second main conductor integrally connected and attached to the second surface and a second secondary conductor on the hole wall of the second hole section; as well as The conductor post is filled in the through hole and contacts the first sub-conductor, the second sub-conductor and the spacing hole segment respectively.
2. The interconnection structure according to claim 1, characterized in that: The first attachment layer is a superconducting film, and the second attachment layer is a superconducting film; Alternatively, the first attachment layer and the second attachment layer are made of different superconducting materials; Alternatively, the conductor column is a TiN column, a NbTiN column, or a Nb column, and the first adhesion layer and the second adhesion layer are aluminum adhesion layers respectively; Alternatively, the conductor column is a TiN column, a NbTiN column, a Nb column, a Ti column, or an Au column, the second adhesion layer is independently a TiN film, a NbTiN film, a Nb film, a Ti film, or an Au film, and the first adhesion layer is an aluminum adhesion layer.
3. The interconnect structure according to claim 1, characterized in that: The first secondary conductor has a thickness dimension measured perpendicular to the lateral direction; The thickness dimension gradually decreases from the first surface to the second surface.
4. The interconnection structure according to claim 3, characterized in that: The second secondary conductor has a thickness dimension measured along a direction perpendicular to the transverse direction; the thickness dimension gradually decreases from the second surface to the first surface.
5. The interconnect structure according to claim 1, characterized in that: The conductor column is a solid column.
6. The interconnection structure according to claim 1 or 5, characterized in that: The conductor column is a superconducting column, and both ends thereof protrude out of the through hole.
7. The interconnect structure according to claim 1, characterized in that: The first main conductor is composed of two first separated parts separated from each other and avoiding the through hole; the interconnection structure includes a first connecting section, the two first separated parts are electrically conductive through the first connecting section, and the first connecting section covers the end of the conductor column located on the first surface; And / or, the second main conductor is composed of two second separated parts separated and avoiding the through hole; the interconnection structure includes a second connecting section, the two second separated parts are conductive through the second connecting section, and the second connecting section covers the end of the conductor column located on the second surface.
8. The interconnection structure according to claim 1, characterized in that: The cross-sectional shape of the through hole along the thickness direction is a trapezoid; and / or, the thickness of the first adhesion layer is different from the thickness of the second adhesion layer; And / or, both ends of the conductor column are arc-shaped surfaces respectively.
9. A flip chip, characterized in that: The invention has an interconnection structure according to any one of claims 1 to 8.
10. A quantum computer, characterized in that: Comprising the flip chip as described in claim 9.