Semiconductor device
By using parallel shunt structure and phase change material (PCM) in semiconductor devices and using common pads to tune the on-resistance, the problem of operation difficulties in the prior art at high frequencies and low voltages is solved, and high at low voltages is achieved Frequency operation and low on-resistance.
Patent Information
- Application Number
- CN202420467703.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2023-04-10
- Filing Date
- 2024-03-11
- Publication Date
- 2025-02-21
- Estimated Expiration
- 2034-03-11
AI Technical Summary
Existing semiconductor devices are difficult to operate effectively at high frequencies and low voltages, resulting in large on-resistance, increasing equipment complexity and area occupied.
A semiconductor device is designed, adopting a parallel shunt structure, using phase change material (PCM) and a common pad, tuning the on-resistance and shutdown capacitor by adjusting the size of the shunt device, thereby achieving high frequency operation at low voltages.
A semiconductor device operating at low voltages is realized, reducing on-resistance, reducing the overall area of the design, and simplifying electrical operation, suitable for integration with low voltage logic circuits.
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Figure CN222515507U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a semiconductor device, in particular to a high-frequency, low-voltage semiconductor device. Background Art
[0002] The semiconductor industry has experienced rapid growth due to the increasing integration density of various electronic building blocks, such as transistors, diodes, resistors, capacitors, etc. In large part, this increase in integration density comes from repeated reductions in minimum feature size, which allows more components to be integrated into a given area. Utility Model Content
[0003] An embodiment of the utility model provides a semiconductor device, comprising a first film and a second film arranged relative to each other along a first lateral direction. Each of the first film and the second film includes a phase change material (PCM). The semiconductor device includes a first metal pad, a second metal pad, and a third metal pad. The first metal pad and the second metal pad are respectively arranged above the end of the first film, and the second metal pad and the third metal pad are respectively arranged above the end of the second film. The semiconductor device includes a first heater and a second heater extending along a second lateral direction. The first heater is arranged below the first film and between the first metal pad and the second metal pad, and the second heater is arranged below the second film and between the second metal pad and the third metal pad.
[0004] An embodiment of the utility model provides a semiconductor device, comprising a plurality of films arranged relative to each other along a first lateral direction, each of the plurality of films comprising a PCM. The semiconductor device may include at least one pad overlapping ends of two of the plurality of films. The semiconductor device may include a plurality of heaters extending along a second lateral direction. Each of the plurality of heaters is disposed below a corresponding one of the plurality of films.
[0005] Based on the above, the heaters of the PCM portion can share pads, and the on-resistance can be tuned by adjusting the size of each shunt device. The parallel shunt structure of the device of the utility model enables various embodiments to operate at low voltage, which enables integration with low voltage logic circuits. A variable number of parallel shunt devices can be used in conjunction with the present technology, each with a selected size to tune to the achieved R ON and C OFF The overall area of the parallel shunt design can be reduced by using a common pad between each shunt device. The common pad further simplifies the electrical operation of the shunt device in read and write modes.
[0006] In order to make the above features and advantages of the embodiments of the present invention more obvious and easy to understand, embodiments are specifically cited below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1 is a flow chart of an example method for manufacturing a parallel shunt phase change material (PCM) RF switch device according to one or more embodiments;
[0008] Figure 2A and 2B illustrative top and cross-sectional views, respectively, of example elements of a split-current PCM device according to some embodiments;
[0009] Figure 3A , 3B 3C and 3D respectively illustrate perspective, top and cross-sectional views of example elements of a shunt PCM RF switch device defined in a substrate according to some embodiments;
[0010] Figure 3E An example circuit diagram of a PCM switching device described herein is shown in an on state and a off state according to some embodiments;
[0011] Figure 4 illustrates a top view of an example shunt PCM switch device with a common contact pad according to some embodiments;
[0012] Figure 5 shows a top view of an example shunt PCM switch device having a common contact pad and a separate heating pad according to some embodiments;
[0013] Figure 6 shows an example graph showing an example relationship between desired heater temperature and phase change material size according to some embodiments;
[0014] Figure 7 shows an example graph illustrating different temperature profiles for different operations of a phase change memory utilizing a PCM according to some embodiments;
[0015] Figure 8 An example graph illustrating the phase of a PCM changing in response to different temperature profiles according to some embodiments.
[0016] Description of Reference Numerals
[0017] 100: Methods;
[0018] 102, 104, 106, 108: operation;
[0019] 200A: Top view;
[0020] 200B, 300D: cross-section;
[0021] 202, 302, 403A, 403B, 403C, 503A, 503B, 503C: heater;
[0022] 204, 205: pad / RF pad;
[0023] 206, 306, 506A, 506B, 506C: PCM membrane / membrane;
[0024] 208, DW1, DW2: width;
[0025] 210, 308: dielectric materials;
[0026] 212, 310: base;
[0027] 214: length;
[0028] 300A: perspective view;
[0029] 300B: top view;
[0030] 300C: top view;
[0031] 304, 305: pads;
[0032] 312, 316: arrows;
[0033] 314: Active zone;
[0034] 320: current;
[0035] 400, 500: PCM device;
[0036] 402, 405, 502A, 502B, 502C: heater pads;
[0037] 404, 410: pad material / RF pad;
[0038] 406A, 406B, 406C: PCM membrane / membrane portion;
[0039] 408A, 408B, 408C: width;
[0040] 504, 510: RF pads;
[0041] 505: common heater pad;
[0042] 600: Chart;
[0043] 900: Example graph / graph;
[0044] 800: Example picture. DETAILED DESCRIPTION
[0045] The following disclosure provides many different embodiments or examples to implement different features of the subject matter provided. Specific examples of components and arrangements are described below to simplify the disclosure. Of course, these are only examples and are not intended to be limiting. For example, the following description of forming a first feature on or on a second feature may include an embodiment in which the first feature and the second feature are formed to be in direct contact, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the disclosure may reuse reference numbers and / or letters in various examples. This repetition is for the purpose of brevity and clarity, rather than representing the relationship between the various embodiments and / or configurations discussed.
[0046] Additionally, spatially relative terms, such as "beneath," "below," "lower," "above," "upper," "top," "bottom" and the like, are used to describe the relationship of one element or feature to another (other) element or feature as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may be interpreted accordingly.
[0047] The present disclosure provides various embodiments of radio frequency (RF) switching circuits using semiconductor manufacturing techniques involving phase change materials (PCMs). PCMs change their electrical properties (e.g., strength, capacitance, etc.) in response to changing external conditions, such as temperature or pressure. The example PCM circuits described herein utilize a heater material formed adjacent to a PCM material to form a high frequency PCM switching circuit. Because the PCM has a variable resistance depending on its phase, certain types of PCMs can be used as electrical isolators (e.g., a switch "off" state) or electrical conductors (e.g., a switch "on" state). These material properties can be used to create various embodiments of parallel RF switching circuits, as described herein.
[0048] Various approaches to PCM switches have a trade-off between device performance and write voltage. In this approach, low on-resistance is required to achieve performance, which increases the necessary size of the PCM switch while increasing heater length and write voltage due to large resistive loads. In addition, such approaches have inconsistent heater reliability due to increased heater length and uneven heat distribution during write operations. Although high voltage can be used, high voltage operation increases complexity when implemented using low voltage logic circuits (e.g., integration of high voltage PCM switches with low voltage logic circuits may be impractical). Approaches that use parallel switches tend to increase electrical complexity and footprint.
[0049] Various embodiments described herein address these problems by providing a shunt PCM RF switch circuit with low on-resistance that can operate at low voltages. One or more embodiments use parallel PCM sections with common overlapping pads. The heaters of the PCM sections can share pads. The on-resistance (sometimes referred to herein as "R ON ” and the off capacitor (sometimes referred to herein as “C OFF ”) can be tuned by adjusting the size of each shunt device. In addition, each parallel shunt device can be independently tuned to achieve the desired electrical characteristics. The parallel shunt structure of the devices described herein enables various embodiments to operate at low voltages, which enables integration with low voltage logic circuits. A variable number of parallel shunt devices, each with a selected size to tune to the achieved R ON and C OFF The overall area of the parallel shunt design can be reduced by using a common pad between each shunt device. The common pad further simplifies the electrical operation of the shunt device in read and write modes.
[0050] Figure 1 A method for manufacturing a parallel shunt PCM RF switch device (e.g., in combination with Figure 4 and 5 It should be noted that the method 100 is only an example and is not intended to limit the present invention. Therefore, it should be understood that the method 100 may be used in the following manner: Figure 1 Additional operations are provided before, during, and after method 100, and only some of the operations are briefly described herein. In addition, the operations of method 100 may be performed in a different order than described herein to achieve the desired results. In some embodiments, the operations of method 100 may be combined with Figure 2A , 2B , 3A, 3B, 3C, 3D, 4 and 5 are described by way of perspective and cross-sectional views of the elements and devices shown in FIG. 4 , which will be discussed in further detail below.
[0051] In brief overview, the exemplary method 100 begins at operation 102, where a first heater, a second heater, and a third heater are formed in a substrate. The method 100 continues to operation 104, which includes forming at least one dielectric material (e.g., a dielectric layer) over the first heater, the second heater, or the third heater. The method 100 continues to operation 106, which includes forming a first film, a second film, and a third film. The method 100 continues to operation 108, which includes forming a first metal pad, a second metal pad, a third metal pad, and a fourth metal pad. As described above, Figure 4 and 5 Various cross-sections and perspectives illustrate how the techniques and Figure 1 The method 100 of manufacturing an example shunted PCM device.
[0052] At operation 102, method 100 includes forming a first heater, a second heater, and a third heater in a substrate. A cross-sectional view 200B of a single element of a parallel shunt PCM RF switch device is shown in FIG. Figure 2B 2, which shows a heater 202 defined within a substrate 212. Similar techniques can be used to form each heater of a split-current PCM device having many elements, such as a combination of Figure 4 and 5 The PCM device described herein. The substrate 212 may be a semiconductor substrate, such as a bulk semiconductor, a semiconductor-on-insulator (SOI) substrate, or the like, which may be doped (eg, having p-type or n-type doping) or undoped. The substrate 212 may be a wafer, such as a silicon wafer.
[0053] The SOI substrate may include a layer of semiconductor material formed on an insulator layer (not shown). The insulator layer may be, for example, a buried oxide (BOX) layer, a silicon oxide layer, or the like. The insulator layer is provided on a substrate, typically a silicon or glass substrate. Other substrates, such as multilayer or gradient substrates, may also be used. In some embodiments, the semiconductor material of the substrate 212 may include silicon; germanium; compound semiconductors including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; alloy semiconductors including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP; or combinations thereof.
[0054] The first, second and third heaters (e.g., Figure 4 The first, second and third heaters 403A, 403B and 403C or Figure 5The first, second and third heaters 503A, 503B and 503C) can be formed on the substrate material or defined on the substrate material using a material deposition process. For example, the heaters can be formed using any suitable material formation technology, including atomic layer deposition (ALD), high density plasma chemical vapor deposition (HDP-CVD), flowable CVD (FCVD) (for example, CVD-based materials are deposited in a remote plasma system and post-cured to convert them into another material, such as an oxide, etc., or a combination thereof. The first, second and third heaters can be used to provide heating to the film corresponding to the PCM, which is formed in a subsequent process step. The heaters can include any type of material having, for example, low resistivity and a high melting point. Some example materials that can be used to manufacture the heaters include W, WN, TiN, NiSi, etc.
[0055] In some embodiments, the heater can be formed by etching a trench or portion of a substrate (e.g., substrate 212) corresponding to the position and shape of the heater. The trench can be patterned, for example, using lithography. The heater material can then be deposited in the formed trench using a suitable material deposition technique, and a chemical mechanical polishing process can be applied prior to further process steps. For example, the heater can be formed to have a thickness ranging from 300 angstroms to 2000 angstroms. Forming the heater can include forming a heating pad that can electrically couple the heater to a power source, as described herein. An example heating pad extending from an end of the heater 202 is shown in FIG. Figure 2A The heater may be formed by separate pads, such as a combination of Figure 5 or may be formed by a common pad, such as a combination of Figure 4 Although method 100 describes the fabrication of three heaters, it should be understood that the present techniques may be used to fabricate split-flow PCM devices having any number of heaters (and corresponding number of PCM membranes, as described herein).
[0056] At operation 104, the method 100 includes forming at least one dielectric material over the first heater, the second heater, or the third heater. A shunt PCM RF switch device (eg, Figure 4 and 5 A cross-sectional view 200B of an element of the device shown in FIG. 1 , which includes a plurality of elements) is shown in FIG. Figure 2B . The dielectric material may be any material having high thermal conductivity and good electrical insulation, such as silicon carbide, silicon nitride, or aluminum nitride. The dielectric material may be used as a material for conducting heat between the heater formed in operation 102 and the PCM film formed in subsequent process steps. The dielectric material may be formed using any suitable material formation technique, including ALD, high HDP-CVD, FCVD, etc., or a combination thereof.
[0057] The dielectric material may be formed to cover the length of the corresponding heater (e.g., between the heater and the PCM film). The dielectric material may be formed directly over the corresponding heater and at least partially share the size or shape of the corresponding heater. In some embodiments, the dielectric material may be formed in a trench in the substrate in which the corresponding heater is formed. Figure 3A An example depiction of an arrangement in which dielectric material is formed in trenches above respective heaters is shown in 308 (e.g., dielectric material 308 is formed in trenches in substrate 310 above heater 302). In some embodiments, the dielectric material may be formed by etching trenches or portions of the substrate and / or heater material to define the location and shape of the dielectric material. Figure 2B As shown in cross-sectional view 200B of , dielectric material 210 has been formed in a second trench formed above heater 202 in substrate 212 .
[0058] The trenches for forming the dielectric material may be patterned, for example, using lithography techniques. The dielectric material may then be deposited in the formed trenches using suitable materials and deposition techniques, and a CMP process may be applied prior to further process steps. For example, the heater may be formed to have a thickness ranging from 100 angstroms to 1000 angstroms. In some embodiments, the dielectric material may be deposited in a multi-membrane PCM switch device (e.g., Figure 4 and 5 In some embodiments, a separate layer of heater material is formed over each heater in the multi-membrane PCM switch device (e.g., the device shown in FIG. 1 ). In some embodiments, a single layer of dielectric material may be formed over all heaters in the multi-membrane PCM switch device. In some embodiments, dielectric material is not formed (e.g., the heaters directly contact the PCM films), and operation 104 is omitted from method 100.
[0059] At operation 106, method 100 includes forming a first film, a second film, and a third film. Each film may include a PCM material. The films may be formed, for example, using any suitable material formation technique, including ALD, high HDP-CVD, FCVD, etc., or a combination thereof. A mask or lithography technique may be used to define the area where the film is deposited. The film may include a phase change material having a low resistivity, such as GeTe, SbTe, GST, In-doped PCM, Sb-doped PCM, etc., or a combination thereof. The film may be deposited to have a predetermined length, width, and thickness, which may be used to define the electrical properties of the film, as described herein. Example PCM film 206 formed on a single element of a shunt PCM device Figure 2A and 2B A similar technique can be used to connect parallel PCM switch devices (e.g., in combination with Figure 4 and 5Each element in the PCM device described herein forms a plurality of PCM films 206 .
[0060] The membrane may be formed over each heater in the device formed in operation 102. The membrane may be positioned so that each heater is at least partially centered below a corresponding region of the PCM membrane. The membrane may be separated from the heater by a dielectric material formed in operation 104, which may conduct heat from the heater to the membrane to change a phase change of the PCM in the membrane. As described herein, applying heat to the membrane may cause a phase change of the PCM, thereby changing an electrical property (e.g., resistance, capacitance, etc.) of the membrane. Thus, once contacts are formed on the membrane in a further process step, the membrane may act as a switch for heater activation.
[0061] At operation 108, method 100 includes forming a first pad, a second pad, a third pad, and a fourth pad. The pads may be formed, for example, using any suitable material formation technique, including ALD, high HDP-CVD, FCVD, etc., or a combination thereof. A mask or lithography technique may be used to define the area of the deposited film. In one embodiment, the pads may be deposited in a single layer of material and subsequently etched to define separate pads, one or more of which may be electrically isolated from each other. The pads may be manufactured using any suitable material having a low resistivity, such as W, WN, NiSi, Al, etc., or a combination thereof. The pads may be formed to have a thickness ranging from, for example, 300 angstroms to 2000 angstroms.
[0062] In a multi-membrane device (e.g., combined Figure 4 and 5 Some of the pads may overlap with multiple membrane areas in the device. Figure 4 As shown, each membrane portion 406A, 406B, or 406C contacts a first portion of pad material 404 at one end and contacts a second portion of pad material 410 at the other end. Pad material 404 is formed to overlap corresponding ends of membrane portions 406B and 406C and one end of membrane portion 406A, and pad material 410 is formed to overlap corresponding ends of membrane portions 406A and 406B and one end of membrane portion 406C. Overlapping pads enable the device to operate using a shunt structure, thereby achieving low voltage operation and low on-resistance. Although Figure 4 and Figure 5 Only three membrane portions are shown, but it should be understood that any number of membrane portions (and corresponding overlapping pads) may be used to achieve the desired electrical characteristics of the device (eg, desired on-resistance, desired off-capacitance, etc.).
[0063] Figure 2A and 2B 2 and 3 show example elements of a PCM device according to some embodiments (for example, in combination with Figure 4 and 5The PCM device is defined in a substrate 212 (from Figure 2A , for visual clarity), it can be a semiconductor substrate, such as a bulk semiconductor, an SOI substrate, etc., which can be doped (e.g., with a p-type or n-type dopant) or undoped. The substrate 212 can be a wafer, such as a silicon wafer. In some embodiments, the semiconductor material of the substrate 212 can include silicon; germanium; a compound semiconductor including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP, or a combination thereof.
[0064] As shown in cross-sectional view 200B, heater 202 is defined in the substrate. The heater can be used to provide heat to the film 206 including the PCM. The heater can include any type of material having, for example, low resistivity and a high melting point. Some example materials that can be used to make the heater include W, WN, TiN, NiSi, etc. In this example, the heater is defined in a recessed portion of the substrate 212 and is in contact with the substrate 212 and the dielectric material 210 (also shown for visual clarity). Figure 2A The heater 202 may have a predetermined length, width, and thickness in the area below the membrane 206, as shown in the top view 200A, and may be expanded to form larger contacts, such as Figure 2A As shown. For example, the heater 202 may be formed of a single layer of material. The heater 202 may be formed to have a thickness ranging from 300 angstroms to 2000 angstroms.
[0065] The dielectric material 210 can conduct heat between the heater and the PCM film 206. The dielectric material can be any material with high thermal conductivity and good electrical insulation, such as silicon carbide, silicon nitride, or aluminum nitride. Figure 2B In the example shown in the cross-sectional view 200B of FIG. 2 , the dielectric material 210 is formed on top of the heater in the recessed portion of the substrate 212. As shown, the dielectric material 210 has a dimension that extends beyond the width of the heater 202 and the PCM film 206. In some embodiments, the dielectric material 210 may have a dimension corresponding to the heater 202 (e.g., similar to Figure 3A dielectric material 308 and heater 302).
[0066] The PCM film 206 may include any suitable PCM with low resistivity, such as GeTe, SbTe, GST, In-doped PCM, Sb-doped PCM, etc. or a combination thereof. The film may be deposited to have a predetermined width 208, length 214, and thickness (e.g., ranging from 300 angstroms to 1500 angstroms, etc.), which may be used to define the electrical properties of the film 206. As described herein, there is a tradeoff between the performance of the device and the write voltage of the film. The PCM resistance (e.g., on-resistance) is determined by the length 214, width 208, and thickness of the PCM film. The write voltage or power depends largely on the PCM volume and heater length, because the write power P of the device is P=V2 / R. When selecting the film size, a larger width 208 is beneficial for reducing the resistance of the PCM and providing a low on-resistance, thereby improving the overall device performance. However, a larger width 208 requires a longer heater 202 length. As the length of the heater 202 increases, the resistance of the heater resistor also increases. Based on the above relationship, this increases the overall write voltage of the PCM switching. Combined with Figure 4 and Figure 5 One advantage of the described shunt PCM devices is that their parallel heaters provide low on-resistance and therefore low voltage operation.
[0067] The pads 204 and 205 may be RF pads that carry RF signals relative to each other. For example, each pad may have a different voltage during device operation, and the varying resistance of the PCM film 206 may operate as a switch. The pads 204 and 205 may be made using any suitable material with a low resistivity, such as W, WN, NiSi, Al, etc., or a combination thereof. The pads may be formed to have a thickness ranging from, for example, 300 angstroms to 2000 angstroms. As shown, the pads 204 and 205 may partially overlap a portion of the PCM film 206. The pads may be formed on the PCM film 206 and the substrate 212, for example, using any suitable material formation technique, including ALD, high HDP-CVD, FCVD, etc., or a combination thereof.
[0068] Figure 3A , 3B 3C and 3D respectively illustrate a split PCM device defined in a substrate (eg, in combination with Figure 4 and 5 Perspective, top, and cross-sectional views of example elements of a split-current PCM device as described herein. Figure 3A Shows something like Figure 2A and 2B A perspective view of an example component of a shunt PCM device shown in FIG. 300A. Multiple components are formed to produce the shunt PCM device described herein (e.g., Figure 4 and Figure 5The heater 302 may be similar to the PCM device 400 and 500. Figure 2A and 2B Any structure of the heater 202, and including Figure 2A and 2B In any structure of heater 202 , substrate 310 may be similar to substrate 212 , PCM film 306 may be similar to PCM film 206 , and pads 304 and 305 may be similar to pads 204 and 205 , respectively. Figure 2A and 2B The PCM device in Figure 3A One difference between the PCM devices in FIG. 3 and FIG. 4 is that the dielectric material 308 has been formed to correspond to the size of the heater 302. As shown, the dielectric material 308 is formed on the heater 302 in the same recessed portion of the substrate 310.
[0069] Figure 3B and 3C They are shown respectively Figure 3A 300B and 300C are top views of the device during write and read operations. During a read operation, a bias voltage may be applied across heater 302 to generate an elevated temperature (e.g., in the direction indicated by arrow 312). Heat generated by heater 302 passes through dielectric material 308 (shown in FIG. 1 for visual clarity). Figure 3B and 3C 304 and 305). The current through the PCM material passes through the active region 314 of the PCM film 306 (e.g., the region activated by the heater 302).
[0070] Figure 3D Displays something like Figure 3A , 3B 3C , but the dielectric material layer 308 extends across the surface of the device rather than being limited to the size of the heater 302. The cross-sectional view 300D is a view of the device along the length of the heater 302, which is shown as being located between pads 304 and 305. Depending on the state of the PCM film 306, the current 320 can flow through the PCM film 306 (e.g., experiencing the on-resistance), or through the capacitance between pads 304 and 305 (e.g., the off-capacitance). Device performance or figure-of-merit (FOM) can be quantified as a function of the device's on-resistance and off-capacitance, which represent the ability of the switch to pass current when it is on, and to attenuate unwanted signals when the device is off, respectively. Figure 3E It is shown in Figure 3DA circuit diagram of a switching device in the on and off states. In one embodiment, the FOM of a device can be quantified as 1 / (2πRC), where R is the on resistance of the device and C is the off capacitance of the device. A high performance device will have low on resistance and high off capacitance.
[0071] Figure 4 A top view of an exemplary parallel PCM switch device with common landing pads is shown in accordance with some embodiments. Figure 4 The device shown in the figure utilizes overlapping pads to reduce the overall area of the parallel PCM RF switch device and reduce the overall device complexity. As shown in the top view, the device includes a plurality of PCM films 406A, 406B and 406C (sometimes collectively referred to as "PCM films 406"), which can be similar to the combination of Figure 2A and 2B A PCM membrane 206 is described. Figure 4 The device in the top view includes an RF pad 404, which partially overlaps the end of PCM film 406A and the ends of PCM films 406B and 406C, as shown. The device in the top view includes an RF pad 410, which partially overlaps the end of PCM film 406C and the ends of PCM films 406A and 406A, as shown. RF pads 404 and 410 can be similar to the combination of Figure 2A and 2B RF pads 204 and 205 are depicted.
[0072] As shown, the common alternating RF pads 404 and 410 are relative to each other. Figure 4 and Figure 5 The alternative approach shown in reduces the RF pad area and minimizes additional parasitic effects on RF switch performance. Alternating pads further simplifies operation Figure 4 The complexity of the logic circuit required for the device shown in FIG. In addition, as shown, the device is symmetrical, which allows the use of complex logic circuits in a simple manner. The corresponding widths 408A, 408B, and 408C of the PCM films 406A, 406B, and 406C provide relatively low on-resistance during device operation. The parallel design of the heaters enables low voltages to drive the corresponding heaters 403A, 403B, and 403C, further improving the performance of the device.
[0073] Heaters 403A, 403B, and 403C (sometimes collectively referred to as "heaters 403") may each be similar to a combination of Figure 2A and 2BThe heater 202 described. As shown, the heaters 403A, 403B and 403C are each located near the center below the corresponding PCM film 406A, 406B and 406C, and extend parallel to and between the alternating RF pads 404 and 410. Although not shown here for visual clarity, one or more portions of dielectric material can be disposed between each heater 403 and their respective PCM film 406, which can conduct heat from the heater 403 to their respective PCM film 406. The heaters 403 can each share heater pads 402 and 405, each of which can be electrically coupled to different voltages (e.g., a positive voltage source and ground). This results in each heater 403 being connected in parallel, making their effective resistance approximately one-third of their respective resistances, thereby reducing the voltage requirements for operating the device. The heater pads 402 and 405 can include the same material as the heater 403. Although three PCM films 406 with overlapping RF pads 404 and 410 are shown here, it should be understood that any number of PCM films 406 (and corresponding heaters 403) can be defined in the device to achieve the desired on-resistance. The same overlapping and alternating arrangement of RF pads 404 and 410 on PCM films 406 can be extended to any number of PCM films 406.
[0074] Figure 5 A top view of an exemplary parallel PCM switch arrangement having a common contact pad and separate heating pads is shown in accordance with some embodiments. Figure 5 The device shown can be similar to Figure 4 For example, heaters 503A, 503B, and 503C may be similar to heaters 403A, 403B, and 403C, RF pads 504 and 510 may be similar to RF pads 404 and 410, and PCM films 506A, 506B, and 506C (sometimes collectively referred to as "PCM films 506") may be similar to PCM films 406A, 406B, and 406C. Figure 5 In the illustrated embodiment, each heater shares a common heater pad 505 (which may be similar to heater pad 405). In addition, each heater 503A, 503B, and 503C has its own heater pad 502A, 502B, and 502C. The heater pads 502A, 502B, and 502C may each be electrically coupled to a different voltage source. In addition, although each PCM film 506 (or Figure 4 The sizes of the PCM film 406 (and the corresponding heater 403 or 503) are shown as having approximately the same size, but it should be understood that the sizes of the PCM film 506 and the PCM film 406 (and the corresponding heater 403 or 503) can each have different sizes to achieve the desired on-resistance and off-capacitance.
[0075] Figure 6An example graph 600 is illustrated showing an example relationship between the required heater temperature and the size of the phase change material according to some embodiments. In graph 600, DW1 and DW2 refer to different widths of the PCM film (e.g., Figure 2A 208), each of which requires a corresponding length of heater material. In graph 600, the width DW1 of the example device is greater than the width DW2. As described herein, a larger PCM film width requires a longer heater material. As shown, a device with a longer PCM film width requires a higher heater temperature to reach the corresponding PCM melting temperature. As shown, operating a device with multiple PCM films in parallel (e.g., a PCM film width of DW2) can reduce the heater temperature (and drive voltage) required to reach the PCM melting point compared to an alternative device with a width of DW1.
[0076] Figure 7 An example graph 900 is illustrated showing different temperature profiles for different operations of a phase change memory in accordance with some embodiments. In short, the set (SET) and reset (RESET) operations of a phase change memory (PCRAM) are driven by the "temperature" inside the material. The temperature is generated by "Joule heating" which is controlled by a current pulse through the device heater, with different pulse widths and fall times. Graph 900 shows that for the reset operation, a short pulse of high current is used to bring the PCM film above the melting temperature. For the set operation, current is passed through the heater to maintain a temperature above the crystal temperature but below the melting temperature for a longer duration than the reset operation. The set pulse is longer to enable nucleation formation in the PCM film, and the temperature has a longer fall time than the reset operation to enable crystal growth in the PCM film. In the read operation, the temperature of the PCM film is raised above room temperature, but not to the crystal temperature of the PCM film.
[0077] Figure 8 An example graph 800 illustrates different phases of a PCM in response to exposure to different temperature profiles according to some embodiments. As shown, in the amorphous phase (e.g., after a reset operation), the PCM has a disordered structure at the atomic level and exhibits high resistivity. In a set operation, a suitable temperature change is applied (e.g., using a combination of Figure 7 When the PCM film is placed in a crystalline phase (e.g., a heater as described herein), the PCM is ordered into a crystalline phase exhibiting a low resistivity. Once in the crystalline state, an appropriate temperature for a reset operation can be applied to cause the PCM to revert to an amorphous phase having a high resistivity. Changing the resistivity of the PCM film can cause the PCM to operate as an insulator (e.g., in an amorphous phase) or a conductor (e.g., in a crystalline phase), enabling the various devices described herein to operate as switches.
[0078] In one aspect of the present disclosure, a semiconductor device is disclosed. The semiconductor device includes a first film and a second film arranged relative to each other along a first lateral direction. Each of the first film and the second film includes a phase change material (PCM). The semiconductor device includes a first metal pad, a second metal pad, and a third metal pad. The first metal pad and the second metal pad are respectively arranged above the end of the first film, and the second metal pad and the third metal pad are respectively arranged above the end of the second film. The semiconductor device includes a first heater and a second heater extending along a second lateral direction. The first heater is arranged below the first film and between the first metal pad and the second metal pad, and the second heater is arranged below the second film and between the second metal pad and the third metal pad.
[0079] In some embodiments, the semiconductor device further includes a dielectric layer interposed between the first and second films and the first and second heaters and configured to thermally couple the first and second heaters to the first and second films, respectively.
[0080] In some embodiments, the dielectric layer includes a material selected from silicon nitride, aluminum nitride, and combinations thereof.
[0081] In some embodiments, the first metal pad and the third metal pad are connected to a first voltage, and the second metal pad is connected to a second voltage.
[0082] In some embodiments, the equivalent resistance between the first voltage and the second voltage is inversely proportional to the number of the first film and the second film.
[0083] In some embodiments, the first heater and the second heater include a material selected from the group consisting of tungsten, tungsten nitride, titanium nitride, nickel silicide, and combinations thereof.
[0084] In some embodiments, the first heater and the second heater have their respective first ends connected to each other, and their respective second ends connected to each other.
[0085] In some embodiments, the semiconductor device further includes a third film extending along the first lateral direction with the first film and the second film, a fourth metal pad, and a third heater extending along the second lateral direction with the first heater and the second heater. The third metal pad and the fourth metal pad are respectively disposed on ends of the third film. The third heater is disposed below the third film and between the third metal pad and the fourth metal pad.
[0086] In some embodiments, each of the first film and the second film is configured to transition between a first resistive state and a second resistive state based on heat received by a corresponding one of the first to third heaters.
[0087] In some embodiments, the phase change material is selected from germanium telluride (GeTe), antimony telluride (SbTe), germanium-antimony-telluride (GST), indium-doped phase change material, antimony-doped phase change material, and combinations thereof.
[0088] In another aspect of the disclosure, a semiconductor device is disclosed. The semiconductor device includes a plurality of membranes arranged relative to each other along a first lateral direction, each of the plurality of membranes including a PCM. The semiconductor device may include at least one pad overlapping ends of two of the plurality of membranes. The semiconductor device may include a plurality of heaters extending along a second lateral direction. Each of the plurality of heaters is disposed below a corresponding one of the plurality of membranes.
[0089] In some embodiments, the semiconductor device further includes a dielectric layer interposed between a heater of the plurality of heaters and a corresponding film of the plurality of films.
[0090] In some embodiments, the dielectric layer includes a material selected from silicon nitride, aluminum nitride, and combinations thereof.
[0091] In some embodiments, the semiconductor device further includes a second pad coupled to at least one end of at least one of the plurality of films, wherein the at least one pad is connected to a first voltage and the second pad is connected to a second voltage.
[0092] In some embodiments, each of the plurality of heaters includes a respective first end and a respective second end, and the respective first ends of each of the plurality of heaters are connected to each other.
[0093] In some embodiments, the respective second ends of each of the plurality of heaters are connected to each other.
[0094] In some embodiments, the phase change material is selected from germanium telluride (GeTe), antimony telluride (SbTe), germanium-antimony-telluride (GST), indium-doped PCM, antimony-doped PCM, and combinations thereof.
[0095] In another aspect of the present disclosure, a method for manufacturing a semiconductor device is disclosed. The method includes forming a first heater and a second heater in a substrate, each of the first heater and the second heater extending along a first lateral direction. The method includes forming a first film and a second film arranged relative to each other along the first lateral direction on the substrate, wherein each of the first film and the second film includes a PCM. The first film and the second film are respectively located above the first heater and the second heater. The method includes forming a first metal pad, a second metal pad, and a third metal pad. The first metal pad and the second metal pad are respectively formed above the end of the first film, and the second metal pad and the third metal pad are respectively formed above the end of the second film.
[0096] In some embodiments, forming the first metal pad, the second metal pad, and the third metal pad includes forming a first radio frequency pad electrically coupled to the first metal pad and the third metal pad, and a second radio frequency pad electrically coupled to the second metal pad.
[0097] In some embodiments, the method for manufacturing a semiconductor device further includes: forming a third heater in a substrate, the third heater extending along a first lateral direction with the first heater and the second heater; forming a third film on a substrate having a first film and a second film arranged along the first lateral direction, the third film being located above the third heater; and forming a fourth metal pad, wherein the third metal pad and the fourth metal pad are respectively formed above ends of the third film.
[0098] As used herein, the terms "about" and "approximately" generally mean plus or minus 10% of the stated value. For example, about 0.5 includes 0.45 and 0.55, about 10 includes 9 to 11, and about 1000 includes 700 to 1100.
[0099] The features of several embodiments are summarized above so that those skilled in the art can better understand aspects of the present disclosure. Those skilled in the art should understand that they can easily use the present disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or achieve the same advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent structures do not depart from the spirit and scope of the present disclosure, and they can make various changes, substitutions and modifications thereto without departing from the spirit and scope of the present disclosure.
Claims
1. A semiconductor device, characterized in that: include: A first phase change material film and a second phase change material film arranged relative to each other along a first lateral direction; a first metal pad, a second metal pad and a third metal pad, wherein the first metal pad and the second metal pad are respectively disposed above an end portion of the first phase-change material film, and the second metal pad and the third metal pad are respectively disposed above an end portion of the second phase-change material film; and A first heater and a second heater extend along a second lateral direction, wherein the first heater is disposed below the first phase-change material film and between the first metal pad and the second metal pad, and the second heater is disposed below the second phase-change material film and between the second metal pad and the third metal pad.
2. The semiconductor device according to claim 1, wherein: Also includes: A dielectric layer is interposed between the first phase-change material film and the second phase-change material film and the first heater and the second heater, and is configured to thermally couple the first heater and the second heater to the first phase-change material film and the second phase-change material film, respectively.
3. The semiconductor device according to claim 1, wherein: The first metal pad and the third metal pad are connected to a first voltage, and the second metal pad is connected to a second voltage.
4. The semiconductor device according to claim 3, wherein: The equivalent resistance between the first voltage and the second voltage is inversely proportional to the number of the first phase-change material film and the second phase-change material film.
5. The semiconductor device according to claim 1, wherein: Also includes: a third film extending along the first lateral direction with the first phase change material film and the second phase change material film, a fourth metal pad and a third heater, and along the second lateral direction with the first heater and the second heater; Wherein, the third metal pad and the fourth metal pad are respectively arranged on the ends of the third film; and The third heater is disposed below the third film and between the third metal pad and the fourth metal pad.
6. The semiconductor device according to claim 1, wherein: Each of the first phase-change material film and the second phase-change material film is configured to transition between a first resistance state and a second resistance state based on heat received by a corresponding one of the first to third heaters.
7. A semiconductor device, characterized in that: include: a plurality of phase change material films arranged relative to each other along a first lateral direction; at least one pad overlapping with ends of two phase change material films among the plurality of phase change material films; as well as A plurality of heaters extend along the second lateral direction, each of the plurality of heaters being disposed below a corresponding one of the plurality of phase change material films.
8. The semiconductor device according to claim 7, wherein: Also includes: A dielectric layer is interposed between one of the plurality of heaters and a corresponding phase change material film of the plurality of phase change material films.
9. The semiconductor device according to claim 7, wherein: Also includes: A second pad is coupled to at least one end of at least one of the plurality of phase change material films, wherein the at least one pad is connected to a first voltage and the second pad is connected to a second voltage.
10. The semiconductor device according to claim 7, wherein: Each of the plurality of heaters includes a respective first end and a respective second end, and the respective first ends of each of the plurality of heaters are connected to each other.