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Memory address allocation method and apparatus

A technology for storing addresses and allocation methods, which is applied in the field of communication, and can solve the problems of not meeting application requirements, slow BITMAP cache management mode, and large delay time, so as to achieve the effect of improving management speed

Active Publication Date: 2011-07-06
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In the process of implementing the present invention, the inventor found that the prior art has at least the following technical problems: the BITMAP cache management method is slow in allocating cache addresses, resulting in a large delay, which may not meet the requirements of some applications

Method used

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  • Memory address allocation method and apparatus
  • Memory address allocation method and apparatus

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Embodiment Construction

[0028] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0029] An embodiment of the present invention provides a storage address management solution based on a hierarchical bitmap, specifically including a storage address allocation method and device. figure 1 It is a schematic flowchart of an embodiment of the storage address allocation method of the present invention, such as figure 1 shown, including the following steps:

[0030] Step 101, receiving a storage address allocation request;

[0031] Step 102, perform a...

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Abstract

The embodiment of the invention provides a method and device for memory address assignment. The method comprises the steps of: receiving the memory address assignment request; bi-directionally searching the second bit map in the classified bit map; outputting a free bit according to bi-directionally searched result of the second bit map; according to the output free bit, obtaining the corresponding memory address and assigning. The device comprises a first receiving module for receiving the memory address assignment request; a classified bit map comprising N first bit maps and second bit maps; a first searching module for bi-directionally searching the second bit map in the classified bit map to obtain a free bit; an assigning module for obtaining the corresponding memory address and assigning according to the output free bit. The method and device provided by the embodiment of the invention can improve the memory address management speed and reduces the consumption of the memory address management to the memory resource.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a storage address allocation method and device. Background technique [0002] Cache management is the management of allocating and reclaiming shared RAM resources plugged into or embedded in the chip. Especially in network devices and chips based on store-and-forward data structures, cache management is widely used. Cache management must ensure allocation and reclaim At the same time, it is necessary to ensure sufficient address allocation and recovery bandwidth. At present, relatively mature cache management implementation schemes include first-in-first-out (First-In First-out, hereinafter referred to as: FIFO) cache management or bitmap (BITMAP) cache management. . [0003] For FIFO cache management, the principle is to use FIFO to store the cache address, write all the allocatable cache addresses during initialization, read the address stored in the FIFO head at the dat...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/56H04L29/12
CPCG06F12/023G06F2212/1016
Inventor 韩新伟林云宁乃东
Owner HUAWEI TECH CO LTD
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