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Belief propagation processor

A processor and memory technology used in instruments, devices that perform computational operations by changing electrical or magnetic quantities, codes, etc.

Inactive Publication Date: 2012-05-02
MITSUBISHI ELECTRIC RES LAB INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The savings in hardware and power consumption can be significant since only one signal, rather than multiple signals representing different digits (e.g., binary digits, bits) of a digital signal representing the same data, is associated with a unit of statistical data

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Examples

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Embodiment Construction

[0080] refer to figure 1 , in one example of a simulation-based implementation of the Belief Propagation Processor, the decoder for a low-density parity-check (LDPC) code is based on a factor graph 100 in which a variable node 110 is associated with Different input bits (b j ) and a check (constraint) node 120 is associated with each constraint. exist figure 1 In , an example with eight input bits and four checks (constraints) on the input bits is shown. A code can be represented in matrix form, where each column is associated with a different input bit and each row is associated with a different check or constraint. The (i,j) term is 1 if the jth input is used for the ith constraint, and 0 otherwise. In the LDPC example, the constraint is that the XOR of the inputs to the constraint is 0. This example of an LPDC code of length 8 can be represented in terms of the parity check matrix as follows (note that the rows are dependent modulo 2 in this illustrative example, which...

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Abstract

A processor includes a first memory module for storing a first set of storage values each representing a respective input, and a second memory module for storing a second set of storage values in analog form. An analog module is coupled to the first and the second memory modules. The analog module is configured to, in each operation cycle of at least one iteration, update at least some of the second set of storage values based on the first and the second sets of storage values. An output module is for generating a set of outputs from at least some of the second set of storage values.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of U.S. Provisional Application No. 61 / 156,792, filed March 2, 2009, entitled "Belief Propagation Processor," and U.S. Provisional Application No. 61 / 293,999, filed January 11, 2010, by reference These patent applications are hereby incorporated by way of reference. [0003] This application is related to U.S. Provisional Patent Application Serial No. 61 / 156,794, filed March 2, 2009, entitled "Circuits for Soft Logical Functions" and U.S. Provisional Patent Application Serial No. 61 / 156,794, filed March 2, 2009, entitled "Signal Mapping" Provisional Patent Application Serial No. 61 / 156,721 is related to US Provisional Patent Application Serial No. 61 / 156,735, filed March 2, 2009, entitled "Circuits for soft Logical Functions." This application is also related to US Application Serial No. 12 / 537,060, filed August 6, 2009, entitled "Storage Device with Soft Processing." The content of th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/00
CPCH03M13/1137H03M13/6597H03M13/1111H03M13/1188G06G7/122G06G7/1942
Inventor D·瑞杨诺德斯B·维格达
Owner MITSUBISHI ELECTRIC RES LAB INC