A sampling clock selection method and device

Abstract

The invention discloses a method and device for selecting a sampling clock and relates to the technical field of communication. The method and device for selecting the sampling clock reduces the number of selecting times of the sampling clock, improves data sampling accuracy and further improves the working efficiency of a system. The method for selecting the sampling clock comprises the steps of acquiring all current clock configuration values which can be used for sampling data accurately, adding adjusting values to first weights corresponding to all the stored clock configuration values respectively, generating second weights corresponding to the clock configuration values respectively, replacing the first weights to the second weights and carrying out storage, judging whether all the second weights corresponding to the clock configuration value respectively are identical or not, if the fact that not all the second weights corresponding to the clock configuration values respectively are identical is confirmed, selecting a maximum value from the second weights corresponding to the clock configuration values respectively, and determining the clock configuration value corresponding to the selected maximum value to be the current sampling clock. The method and device for selecting the sampling clock is mainly applied to the selecting process of the sampling clock.

Description

technical field [0001] The present invention relates to the technical field of communications, in particular to a sampling clock selection method and device. Background technique [0002] When two modules in the chip interact with each other, it is necessary to synchronize the clock used for sampling data and the clock used for receiving data in the sampling module to ensure that the data can be sampled correctly. During the use of the chip, there will be changes in environmental factors such as temperature, which will cause the received data signal to shift, making the sampling module in the chip unable to accurately sample data when sampling data on the sampling clock that can accurately sample data. [0003] In order to synchronize the clock used for sampling data with the clock used for receiving data, a solution is provided in the prior art, which specifically includes: obtaining all clocks that can correctly sample data, these clocks constitute a clock window for corre...

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Problems solved by technology

[0004] In the process of realizing the above sampling clock selection, the inventors found that there are at least the following problems in the prior art: when the change of environmental factors such as temperature will cause a relatively large offset of the received data signal, the sampling clock window will change, and the That is, the correct data cannot be sampled using the middle value of the current sampling clock window

As a result, whenever the acquisition clock window changes due to changes in environmental factors, we need to re-determine a new acquisition clock window and a acquisition clock, which makes the selection of sampling clocks too many times, which affects the low accuracy of data sampling, which in turn affects system efficiency

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