Method and device for supporting FPGA (Field Programmable Gate Array) training in TensorFlow

An operator and equipment technology, applied in the field of supporting FPGA training, can solve problems such as limiting FPGA usage scenarios, and achieve the effect of expanding usage scenarios

Inactive Publication Date: 2020-03-27
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

Since FPGA does not support TensorFlow training, it cannot be accelerated by FPGA for training. Therefore, models th

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  • Method and device for supporting FPGA (Field Programmable Gate Array) training in TensorFlow
  • Method and device for supporting FPGA (Field Programmable Gate Array) training in TensorFlow
  • Method and device for supporting FPGA (Field Programmable Gate Array) training in TensorFlow

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[0032] The embodiments of the present invention are described below. However, it should be understood that the disclosed embodiments are merely examples, and other embodiments may take various alternative forms. The drawings are not necessarily drawn to scale; some functions may be exaggerated or minimized to show details of specific components. Therefore, the specific structural and functional details disclosed herein should not be construed as limiting, but merely as a representative basis for teaching those skilled in the art to use the present invention in various ways. As those of ordinary skill in the art will understand, various features shown and described with reference to any one drawing can be combined with features shown in one or more other drawings to produce embodiments that are not explicitly shown or described. . The combinations of features shown provide representative embodiments for typical applications. However, various combinations and modifications of ...

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Abstract

The invention provides a method for supporting FPGA (Field Programmable Gate Array) training in TensorFlow, which comprises the following steps of: adding registration and discovery of FPGA equipmentin the TensorFlow so as to eanble the name of the FPGA equipment to be in an equipment list of the TensorFlow; calling an operator registration interface of TensorFlow to register an operator supporting the FPGA equipment according to the name of the FPGA equipment, and enabling the name of the operator to be the same as the names of the operators of all the equipment supported by the TensorFlow;and compiling execution functions of the operator by utilizing opencl, including a host end execution function and an FPGA equipment end execution function, so as to execute data interaction between aCPU on the host and the FPGA. According to the invention, the usage scenario of the FPGA is expanded, and the method is suitable for scenarios requiring online training and model updating.

Description

technical field [0001] The present invention relates to the computer field, and more specifically, relates to a method and device for supporting FPGA training in TensorFlow. Background technique [0002] TensorFlow is currently the most widely used deep learning framework in the field of deep learning. Many deep learning models are implemented based on TensorFlow. Many hardware manufacturers, including ASIC and FPGA manufacturers, regard TensorFlow as the primary support framework for deep learning. [0003] However, most of the current manufacturers only support the reasoning of TensorFlow models (convert the model into an intermediate layer supported by FPGA to run on FPGA), and only CPU, GPU, and TPU support TensorFlow training. Some manufacturers have implemented FPGAs to support TensorFlow reasoning, but do not support FPGA training. Since FPGAs do not support TensorFlow training and cannot be accelerated by FPGAs for training, models that are deployed online and requ...

Claims

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Application Information

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IPC IPC(8): G06N20/00
CPCG06N20/00
Inventor 赵谦谦仝培霖赵红博
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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