A p-type tin oxide film, thin film transistor and preparation method thereof

Abstract

The present invention provides a p-type stannous oxide film, the p-type stannous oxide film comprises 19-26at% of tin oxide, 50-60at% of stannous oxide and 20-25at% of tin; and the p-type stannous oxide film is also doped with 2-10at% of tantalum. The present invention also provides a thin film transistor, the active layer of which is the p-type stannous oxide film as claimed in claim 1. The present invention also provides a method for preparing the thin film transistor, comprising the following steps: using a P-type Si substrate as a gate, thermally oxidizing the substrate, so that a SiO2 film as a gate dielectric layer grows on the surface of the P-type Si substrate; magnetron sputtering the surface of the SiO2 film so that the stannous oxide film as an active layer is deposited on the surface of the SiO2 film; annealing the stannous oxide film; thermally evaporating the annealed P-type Si substrate so that a gold film as a source and drain electrode is deposited on the surface of the stannous oxide film.

Description

Technical Field

[0001] The present invention belongs to the field of thin film transistors, and specifically relates to a p-type stannous oxide thin film; it also relates to a thin film transistor comprising the p-type stannous oxide thin film, and a preparation method and application of the thin film transistor. Background Art

[0002] In the field of flat panel displays, thin film transistors play a very important role as the basic unit of pixels. In particular, metal oxide-based thin film transistors have gradually replaced traditional amorphous silicon and polycrystalline silicon thin film transistors because of their high mobility, good transparency, excellent uniformity and low processing temperature.

[0003] At present, the N-type IGZO (indium gallium zinc oxide) thin film transistor technology is relatively mature and has been applied to flat panel displays by companies such as Sharp in Japan and Samsung in South Korea. However, the corresponding P-type tin oxide thin film crystals are still limited by key performance such as low switching ratio and low mobility. Relevant researchers have adopted methods such as improved preparation process and element doping to try to improve device materials. For example: hydrogen is introduced during preparation, 1nm thin film is prepared by liquid metal printing, and thin film is doped with metal Y (yttrium), Al and Ni and other elements. However, the above measures are either limited by the process or have little improvement on the off-state current and switching ratio of the P-type tin oxide thin film transistor, making it difficult to apply and promote on a large scale. Summary of the invention

[0004] The first object of the present invention is to provide a high performance P-type stannous oxide film.

[0005] A second object of the present invention is to provide a thin film transistor with low off-state current and high on-off ratio.

[0006] The third object of the present invention is to provide a method for preparing the thin film transistor.

[0007] The present invention is achieved through the following technical solutions:

[0008] A p-type stannous oxide thin film, comprising 19-26 at % of tin oxide, 50-60 at % of stannous oxide and 20-25 at % of tin; and

[0009] The p-type stannous oxide film is further doped with 2-10 at % of tantalum relative to the total amount of tin oxide, stannous oxide and tin.

[0010] The thickness of the stannous oxide film is 15-25 nm.

[0011] A thin film transistor, wherein the active layer of the thin film transistor is the p-type stannous oxide thin film.

[0012] The thin film transistor also includes a gate, a gate dielectric layer, a source electrode and a drain electrode.

[0013] The gate comprises a p-type Si substrate;

[0014] The gate dielectric layer includes SiO 2 film;

[0015] The source electrode comprises a gold thin film;

[0016] The drain electrode includes a gold thin film.

[0017] A method for preparing a thin film transistor comprises the following steps:

[0018] The P-type Si substrate is used as the gate, and the substrate is thermally oxidized to grow SiO2 as the gate dielectric layer on the surface of the P-type Si substrate. 2 film;

[0019] After thermal oxidation, SiO 2 The surface of the film is magnetron sputtered to make SiO 2 Depositing the tin oxide film as an active layer on the surface of the film;

[0020] Annealing the tin oxide film after magnetron sputtering;

[0021] The annealed P-type Si substrate is subjected to thermal evaporation to deposit a gold film as a source-drain electrode on the surface of the tin oxide film.

[0022] The target material used in the magnetron sputtering is a tin target material doped with 2-10at% of tantalum;

[0023] The SiO 2 The thickness of the film is 90-110nm;

[0024] The thickness of the gold film is 40-60 nm;

[0025] The mixed atmosphere used in the magnetron sputtering includes inert gas and oxygen;

[0026] The oxygen partial pressure of the mixed atmosphere is 2-5%;

[0027] The evaporation pressure is 5×10 -4 Pa.

[0028] The sputtering pressure of the magnetron sputtering is 0.70-0.80 Pa;

[0029] The magnetron sputtering adopts a radio frequency power supply for sputtering;

[0030] The power of the radio frequency power supply is 30W.

[0031] The annealing temperature is 200-300°C;

[0032] The annealing time is 20-40 minutes.

[0033] Compared with the prior art, the present application has the following beneficial effects:

[0034] The tin oxide film provided by the invention has lower off-state current, more excellent switching characteristics and subthreshold swing characteristics.

[0035] The thin film transistor provided by the present invention has good stability, low off-state current and high switching ratio, and can solve the problems of high off-state current and low switching ratio of the existing P-type thin film transistor.

[0036] The method for preparing a thin film transistor provided by the present invention has a simple production operation method, easy control of process parameters and low preparation cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] FIG. 1 shows a flow chart of the preparation of a thin film transistor provided by the present invention.

[0038] FIG. 2 shows a schematic structural diagram of a thin film transistor.

[0039] FIG. 3 shows a transfer characteristic curve of the thin film transistor prepared in Comparative Example 1. FIG.

[0040] FIG. 4 shows a transfer characteristic curve of the thin film transistor prepared in Example 1. FIG.

[0041] FIG. 5 shows a transfer characteristic curve of the thin film transistor prepared in Example 2.

[0042] FIG. 6 shows a bias test diagram of the thin film transistors prepared in Example 1 and Comparative Example 1 at 300K.

[0043] FIG. 7 shows a bias test diagram of the thin film transistors prepared in Example 1 and Comparative Example 1 at 333K.

[0044] FIG. 8 shows the XPS analysis of Sn and O elements of the tantalum-doped and undoped thin films prepared in Example 1 and Comparative Example 1. FIG.

[0045] FIG. 9 shows the XPS analysis of Sn and O elements of the tantalum-doped thin film prepared in Example 2.

[0046] FIG. 10 shows the GIXRD patterns of the doped and undoped tantalum films prepared in Example 1 and Comparative Example 1.

[0047] Fig.11The graph shows the variation of the off-state current of the thin film transistors prepared in Example 1 and Comparative Example 1 under the negative bias stress condition with the bias stress application time.

[0048] Fig.12 Capacitance test (CV) of thin film transistors of stannous oxide and tantalum-doped stannous oxide.

[0049] Fig.13 Conductivity test (GV) of thin film transistors of stannous oxide and tantalum-doped stannous oxide.

[0050] FIG. 14 shows AFM (atomic force microscope) surface morphology images of the doped and undoped tantalum films prepared in Example 1 and Comparative Example 1. FIG.

[0051] Fig.15 The UV (ultraviolet) transmission spectra of the films prepared in Example 1 and Comparative Example 1 are shown.

[0052] Fig.16 The Tauc curves of the films prepared in Example 1 and Comparative Example 1 are shown. DETAILED DESCRIPTION

[0053] The process of the method for preparing a thin film transistor provided by the present invention is as follows: Figure 1 shown.

[0054] The deposition equipment used in this step is a JSD 300 magnetron sputtering coating machine produced by Anhui Jiashuo Vacuum Technology Co., Ltd.

[0055] The annealing equipment is an OTF-1200X single temperature zone tube furnace produced by Hefei Kejing Material Technology Co., Ltd.

[0056] The electrode deposition equipment used in this step is a JSD 500 electron beam coating machine produced by Anhui Jiashuo Vacuum Technology Co., Ltd.

[0057] Example 1

[0058] TaSnO x -2.3% Preparation

[0059] Prepare a 500 μm thick P-type silicon wafer.

[0060] A 100nm SiO2 layer was grown on a P-type silicon substrate by thermal oxidation. 2 The P-type silicon substrate is placed in a thermal oxidation furnace and heated to 900°C. When oxygen is introduced into the reaction tube (the air flow velocity is 1 cm / s), a chemical reaction Si(solid)+O 2 (Gaseous) → SiO 2 (Solid State).

[0061] The metal mask (600*600μm) was covered and fixed on the silicon oxide wafer and placed on the sample stage of the magnetron deposition equipment. Then the vacuum process was started and the vacuum degree of the chamber was drawn to 2×10 -4 After reaching 1.5 Pa, the gas filling valve was opened to introduce the working gas argon and the reaction gas oxygen and fix the oxygen partial pressure at 3.5%. Then the molecular valve was manipulated to fix the sputtering pressure at about 0.76 Pa. Then the RF power was set to 30W to sputter and deposit a 20nm thick tantalum-doped tin oxide film, and the target material used was a Sn target material doped with 2.3at% Ta (purity: 99.99%).

[0062] The deposited silicon wafer was placed in a tube furnace for annealing. The annealing temperature was set at 270° C. and the annealing time was set at 30 minutes.

[0063] After the annealing is completed, the electrode mask is covered and fixed on the tantalum-doped tin oxide film and placed in the deposition equipment. The vacuum process is also started, and the vacuum degree of the chamber is pumped to 5×10 -4 After 1000 Pa, the heating power supply is turned on to increase the current, so that gold is evaporated and deposited on the tantalum-doped tin oxide film to form a 50nm thick source and drain electrode. The purity of gold is 99.99%.

[0064] Example 2

[0065] TaSnO x -10% preparation

[0066] Prepare a 500 μm thick P-type silicon wafer.

[0067] A 100nm SiO2 layer was grown on a P-type silicon substrate by thermal oxidation. 2 The P-type silicon substrate is placed in a thermal oxidation furnace and heated to 900°C. When oxygen is introduced into the reaction tube (the air flow velocity is 1 cm / s), a chemical reaction Si(solid)+O 2 (Gaseous) → SiO 2 (Solid State).

[0068] The metal mask (600*600μm) was covered and fixed on the silicon oxide wafer and placed on the sample stage of the magnetron deposition equipment. Then the vacuum process was started and the vacuum degree of the chamber was drawn to 2×10 -4 After reaching 1.5 Pa, the gas filling valve was opened to introduce the working gas argon and the reaction gas oxygen and fix the oxygen partial pressure at 3.5%. Then the molecular valve was manipulated to fix the sputtering pressure at about 0.76 Pa. Then the RF power was set to 30W to sputter and deposit a 20nm thick tantalum-doped tin oxide film, and the target material used was a Sn target material doped with 10at% Ta (purity: 99.99%).

[0069] The deposited silicon wafer was placed in a tube furnace for annealing. The annealing temperature was set at 270° C. and the annealing time was set at 30 minutes.

[0070] After the annealing is completed, the electrode mask is covered and fixed on the tantalum-doped tin oxide film and placed in the deposition equipment. The vacuum process is also started, and the vacuum degree of the chamber is pumped to 5×10 -4 After 1000 Pa, the heating power supply is turned on to increase the current, so that gold is evaporated and deposited on the tantalum-doped tin oxide film to form a 50nm thick source and drain electrode. The purity of gold is 99.99%.

[0071] Example 3

[0072] TaSnO x -10% preparation

[0073] Prepare a 500 μm thick P-type silicon wafer.

[0074] A 100nm SiO2 layer was grown on a P-type silicon substrate by thermal oxidation. 2 The P-type silicon substrate is placed in a thermal oxidation furnace and heated to 1200°C. When oxygen is introduced into the reaction tube (the air flow velocity is 1 cm / s), a chemical reaction Si(solid)+O2 occurs on the surface of the silicon wafer. 2 (Gaseous) → SiO 2 (Solid State).

[0075] The metal mask (600*600μm) was covered and fixed on the silicon oxide wafer and placed on the sample stage of the magnetron deposition equipment. Then the vacuum process was started and the vacuum degree of the chamber was drawn to 2×10 -4 After reaching 1.5 Pa, the gas filling valve was opened to introduce the working gas argon and the reaction gas oxygen and fix the oxygen partial pressure at 3.5%. Then the molecular valve was manipulated to fix the sputtering pressure at about 0.76 Pa. Then the RF power was set to 30W to sputter and deposit a 20nm thick tantalum-doped tin oxide film, and the target material used was a Sn target material doped with 10at% Ta (purity: 99.99%).

[0076] The deposited silicon wafer is placed in a tube furnace for annealing. The annealing temperature is set to 300°C and the annealing time is set to 40 minutes. After the annealing is completed, the electrode mask is covered and fixed on the tantalum-doped tin oxide film and placed in the deposition equipment. The vacuum process is also started, and the vacuum degree of the chamber is pumped to 5×10 -4 After 100 0.5 Å, the heating power supply is turned on to increase the current, so that silver is evaporated and deposited on the tantalum-doped tin oxide film to form a 50 nm thick source and drain electrode. The purity of silver is 99.99%.

[0077] Comparative Example 1

[0078] SnO x Preparation

[0079] Prepare a 500 μm thick P-type silicon wafer.

[0080] A 100nm SiO2 layer was grown on a P-type silicon substrate by thermal oxidation. 2 The P-type silicon substrate is placed in a thermal oxidation furnace and heated to 900°C. When oxygen is introduced into the reaction tube (the air flow velocity is 1 cm / s), a chemical reaction Si(solid)+O 2 (Gaseous) → SiO 2 (Solid State).

[0081] The metal mask (600*600μm) was covered and fixed on the silicon oxide wafer and placed on the sample stage of the magnetron deposition equipment. Then the vacuum process was started and the vacuum degree of the chamber was drawn to 2×10 -4 After reaching 1.5 Pa, the gas filling valve was opened to introduce the working gas argon and the reaction gas oxygen and fix the oxygen partial pressure at 3.5%. Then the molecular valve was manipulated to fix the sputtering pressure at about 0.76 Pa. Then the RF power was set to 30W to sputter and deposit a 20nm thick tin oxide film, and the target material used was Sn target (purity: 99.99%).

[0082] The deposited silicon wafer is placed in a tube furnace for annealing. The annealing temperature is set to 250°C and the annealing time is set to 30 minutes. The fourth step is to cover and fix the electrode mask on the annealed tin oxide film and place it in the deposition equipment. The vacuum process is also started, and the vacuum degree of the chamber is pumped to 5×10 -4 After Pa, the heating power supply is turned on, the current is increased, and the metal is evaporated and deposited on the tin oxide film to form the source and drain electrodes. Generally, gold and silver with a purity of 99.99% are used as electrodes.

[0083] The present invention is further described below in conjunction with specific embodiments and accompanying drawings.

[0084] The drawings in the specification of the present invention Figure 3 A transfer characteristic curve of tin oxide of the thin film transistor prepared in Comparative Example 1 is shown; Figure 4 The transfer characteristic curve of the thin film transistor prepared in Example 1 is shown. Figure 5 The transfer characteristic curve of the thin film transistor prepared in Example 2 is shown. Fig.10 The GIXRD spectra of the thin film transistors prepared in Example 1 and Comparative Examples 1 and 2 are shown. Fig.14 The AFM spectra of the thin film transistors prepared in Example 1 and Comparative Example 1 are shown.

[0085] like Figure 3 and Figure 4 As shown in Figure 2, the tantalum-doped tin oxide film has better electrical properties than the tin oxide film. Figure 8 As shown in the figure, SnO PDF#006-0395 is the standard card corresponding to the SnO crystal orientation information, Ta 2 O 5 PDF#21-1199 corresponds to Ta 2 O 5 Standard card for crystal orientation information). After tantalum is doped, in addition to the crystal orientation (1 1 0) of SnO, Ta is also produced in the tin oxide film. 2 O 5 The crystallographic direction of Fig.11 As shown, it can be clearly observed from the data of the AFM test surface morphology of the thin film transistors prepared in Example 1 and Comparative Example 1 that the tantalum-doped stannous oxide film has a greater roughness. Therefore, after the tantalum element is added to the stannous oxide film, the crystallinity of the stannous oxide film is greatly improved, and the grain size of the film is increased, resulting in a smaller off-state current of the stannous oxide film, so that the stannous oxide film obtains a better switching ratio characteristic. Moreover, the increase in the size of the grains in the stannous oxide film is also conducive to the transport of carriers in the stannous oxide film, so that the film has a better mobility.

[0086] Specifically, the mobility of the tin oxide film prepared in Example 1 of the present invention is increased from 0.90 cm 2 / (V*s) rises to 1.12 cm 2 / (V*s), which has been improved to a certain extent. Through AFM and GIXRD characterization, it is known that the crystallinity of the stannous oxide film is greatly improved after the tantalum element is added to the stannous oxide film, and the grain size of the film is increased, thereby improving the carrier transport environment. Specifically, the subthreshold swing of the stannous oxide film prepared in Example 1 of the present invention is reduced from 10.43V / dec to 6.52V / dec. All of these make the thin film transistor have better gate control characteristics.

[0087] The drawings in the specification of the present invention Fig.15 and Fig.16 The UV transmission spectrum and Tauc plot are shown.

[0088] Through Fig.16 The value of the intersection of the tangent line of the Tauc curve and the X-axis is the band gap of the film. It can be concluded that the band gap width of the tantalum-doped tin oxide film is 1.98eV, and the band gap width of the tin oxide film is 1.29eV. It is proved that the addition of tantalum expands the band gap width of the tin oxide film.

[0089] Specifically, the off-state current of the stannous oxide film prepared in Example 1 of the present invention is greatly suppressed compared with the stannous oxide film prepared in Comparative Example 1, from 2.35nA to 0.29nA, which is an order of magnitude improvement. Through UV spectrum test characterization, it is known that the off-state current is suppressed because the band gap width of the stannous oxide film is increased after the tantalum element is added to the stannous oxide film. Therefore, the on-off ratio of the stannous oxide film prepared in Example 1 of the present invention is also improved by an order of magnitude compared with the stannous oxide film prepared in Comparative Example 1, from 2.45×10 3 Increased to 2.13×10 4 The on / off ratio of a thin film transistor is a key parameter for determining whether it has industrial application value, and the on / off ratio of the stannous oxide thin film provided by the present invention is significantly improved compared to that of an undoped stannous oxide thin film.

[0090] The drawings in the specification of the present invention Figure 6 The bias stability test results of the tin oxide films prepared in Example 1 and Comparative Example 1 at a temperature of 300K are shown; Figure 7 The bias stability test results of the tin oxide films prepared in Example 1 and Comparative Example 1 at a temperature of 333K are shown. Fig.12 and Fig.13 The capacitance and conductivity test (CV, GV) graphs of the tin oxide films prepared in Example 1 and Comparative Example 1 are shown.

[0091] like Figure 6 and Figure 7 As shown in the figure, it is obvious that the tantalum-doped tin oxide thin film transistor has better temperature stability in negative bias stability (NBS). This shows that tantalum doping can improve the temperature stability of tin oxide thin film transistors. Fig.12 and Fig.13 As shown, the following formula is used to calculate the capacitance conductance data: , , it can be obtained that the interface state density of tin oxide prepared in Comparative Example 1 is Dit=4.25*10 12 cm - 2 eV -1 The interface state density of the tantalum-doped tin oxide prepared in Example 1 is Dit=3.25*10 12 cm -2 eV -1 This shows that doping with tantalum can reduce the interface state density of thin-film transistors, thereby increasing the stability of the device and making the thin-film transistor less affected by temperature.

[0092] The drawings in the specification of the present invention Fig.11The relationship between the off-state current and the applied bias stress time of the tin oxide thin films prepared in Example 1 and Comparative Example 1 at temperatures of 300K and 333K respectively is shown.

[0093] like Fig.11 As shown, the off-state current of the tin oxide thin film transistor prepared in Example 1 changes only by a few hundred picoamperes due to the influence of temperature. Compared with the change of tens of nanoamperes of the tin oxide thin film transistor prepared in Comparative Example 1, the off-state current of the tin oxide thin film prepared in Example 1 is very weakly affected by temperature.

[0094] Table 1 shows the XPS elemental analysis results of the tin oxide films prepared in Comparative Example 1 and Examples 1 and 2.

[0095]

[0096] As shown in Table 1, the tantalum-doped film has a high proportion of lattice oxygen (O Latt ), oxygen vacancies (O Vac ) and free oxygen (O Chem ) has a lower defect ratio. This indicates that doping with tantalum can reduce the defect concentration inside the film, resulting in a lower off-state current where the carriers are mainly provided by defects, and less affected by temperature thermal excitation.

[0097] More surprisingly, it can be seen from Table 1 that the preparation method provided by the present invention can reduce Sn in the preparation of tantalum-doped films. 4+ The proportion of Sn is increased and the proportion of single substance Sn is increased. Because tin oxide is an n-type semiconductor. Excessive content may affect the P-type characteristics of stannous oxide. The method provided by the present invention is because Sn 4+ The proportion of Sn is reduced, so that high-performance p-type stannous oxide can be prepared. In addition, the method provided by the present invention can increase the proportion of single substance Sn when preparing a thin film doped with tantalum. The increase in the proportion of single substance Sn can also improve the mobility of the film.

[0098] In summary, the temperature stability of the tin oxide thin film crystals provided by the present invention.

Claims

1. A method for preparing a thin film transistor, characterized in that: The method comprises the following steps: using a P-type Si substrate as a gate, thermally oxidizing the substrate, so that a SiO2 film as a gate dielectric layer grows on the surface of the P-type Si substrate; performing magnetron sputtering on the surface of the thermally oxidized SiO2 film, so that a p-type tin oxide film as an active layer is deposited on the surface of the SiO2 film; Annealing the p-type tin oxide film after magnetron sputtering; Thermally evaporating the annealed P-type Si substrate to deposit a gold film as a source and drain electrode on the surface of the p-type tin oxide film; The target material used in the magnetron sputtering is a tin target material doped with 2-10at% of tantalum; The p-type stannous oxide film comprises 19-26 at% of tin oxide, 50-60 at% of stannous oxide and 20-25 at% of tin; and the p-type stannous oxide film is further doped with 2-10 at% of tantalum relative to the total amount of tin oxide, stannous oxide and tin; The thickness of the p-type stannous oxide film is 15-25 nm.

2. The method for preparing a thin film transistor according to claim 1, wherein: The thickness of the SiO2 film is 90-110 nm; the thickness of the gold film is 40-60 nm; the mixed atmosphere used in the magnetron sputtering includes inert gas and oxygen; the oxygen partial pressure of the mixed atmosphere is 2-5%; the pressure of the evaporation is 5×10 -4 Pa.

3. The method for preparing a thin film transistor according to claim 1, wherein: The sputtering pressure of the magnetron sputtering is 0.70-0.80 Pa; the magnetron sputtering adopts a radio frequency power supply for sputtering; the power of the radio frequency power supply is 30W.

4. The method for preparing a thin film transistor according to claim 1, wherein: The annealing temperature is 200-300° C. and the annealing time is 20-40 minutes.

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