Dead time control circuit, control method and power supply

By designing a dead time control circuit in a DC-DC converter, the time difference is used to adjust the power switch tube's turn-off time, the problem of power output instability caused by the storage of charge by the body diode is solved, and the power supply stability and conversion efficiency are improved.

CN118631045BActive Publication Date: 2024-12-13SHENZHEN LOWPOWER SEMICON CO LTD
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Patent Information

Application Number
CN202411103229.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-13
Publication Date
2024-12-13
Estimated Expiration
2044-08-13

AI Technical Summary

Technical Problem

The storage charge of the body diode of the power switch tube in existing DC-DC converters causes unstable power output, affecting conversion efficiency and system performance.

Method used

A dead time control circuit is designed to obtain voltage signals through the first signal detection branch and the second signal detection branch. The control module outputs control signals according to the time difference and adjusts the shutdown time of the second power switch tube to accurately control the dead Zone time.

Benefits of technology

It improves the stability of power output, enhances the control accuracy of dead time, reduces the risk of current throughput, and improves the conversion efficiency and system performance of the converter.

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Abstract

The present application provides a dead time control circuit, a control method and a power supply, wherein the dead time control circuit comprises a first signal detection branch, a second signal detection branch and a control module; the first signal detection branch is used to obtain a first voltage signal of a first node within the dead time; the second signal detection branch is used to obtain a second voltage signal of a control electrode of a second power switch tube within the dead time; the control module is used to output a control signal for controlling the turn-off time of the second power switch tube according to a time difference between a first rising edge of the first voltage signal and a second rising edge of the second voltage signal; if the time difference is greater than a preset value of the dead time, the turn-off time of the second power switch tube is reduced, and if the time difference is less than the preset value of the dead time, the turn-off time of the second power switch tube is increased; the dead time is adjusted by controlling the turn-off time of the second power switch tube to improve the control accuracy of the dead time, thereby facilitating improving the stability of the power supply output.
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Description

Technical Field

[0001] The present application belongs to the technical field of switching power supplies, and in particular, relates to a dead time control circuit, a control method and a power supply. Background Art

[0002] As an important component in electronic systems, DC-DC converters are widely used in various power management systems. Their main function is to convert unstable DC voltage into a stable DC voltage that meets specific requirements. DC-DC converters usually set two power switches between VDD (positive power supply) and GND (negative power supply) to achieve efficient conversion and control of electrical energy. The two power switches are usually designed in control logic to avoid simultaneous conduction.

[0003] However, due to the inherent body diode inside the power switch tube, when the power switch tube is turned off, its body diode will inevitably store a certain amount of charge. These stored charges will have a significant impact on the rise time of SW (the output end of the switch tube or the key node related to it) during the subsequent switching process, causing the rise time to become uncontrollable, thereby affecting the stability of the entire power supply output.

[0004] Therefore, how to improve the stability of power supply output is a problem that those skilled in the art currently need to solve. Summary of the invention

[0005] The purpose of the present application is to provide a dead time control circuit, a control method and a power supply, aiming to solve the problem of low stability of power supply output in traditional technologies.

[0006] A first aspect of an embodiment of the present application provides a dead time control circuit, which is used to control the dead time when a first power switch tube and a second power switch tube connected in series are both turned off, wherein the first power switch tube and the second power switch tube are connected to a first node, and the second power switch tube is grounded; the dead time control circuit includes:

[0007] a first signal detection branch, the first signal detection branch being connected to the first node, and the first signal detection branch being used to obtain a first voltage signal of the first node within the dead time;

[0008] A second signal detection branch, wherein the second signal detection branch is connected to the control electrode of the second power switch tube, and the second signal detection branch is used to obtain a second voltage signal of the control electrode of the second power switch tube within the dead time;

[0009] a control module, configured to obtain the first voltage signal and the second voltage signal, and output a control signal according to a time difference between a first rising edge of the first voltage signal and a second rising edge of the second voltage signal, wherein the control signal is used to control a turn-off time of the second power switch tube;

[0010] When the time difference is greater than the preset dead time value, the control signal reduces the off time of the second power switch tube. When the time difference is less than the preset dead time value, the control signal increases the off time of the second power switch tube.

[0011] In some embodiments of the present application, the control module includes:

[0012] A time delay unit, the time delay unit is used to receive a pulse width modulation signal, and the pulse width modulation signal is used to control the opening and closing of the second power switch tube;

[0013] Wherein, the delay unit is further used to modulate the pulse width modulation signal according to the time difference to output the control signal.

[0014] In some embodiments of the present application, the control module further includes:

[0015] a phase detection unit, the phase detection unit being used to receive the first voltage signal and the second voltage signal, and calculate the time difference according to the first rising edge and the second rising edge; the phase detection unit being further used to compare the time difference with a preset dead time value, and output a first output signal according to the comparison result;

[0016] Wherein, the delay unit modulates the pulse width modulation signal according to the first output signal to output the control signal.

[0017] In some embodiments of the present application, the first output signal includes a first sub-output signal and a second sub-output signal, and the first sub-output signal and the second sub-output signal are complementary;

[0018] When the time difference is greater than the preset dead time value, the first sub-output signal is a high level signal, and the second sub-output signal is a low level signal;

[0019] When the time difference is less than the preset dead time value, the first sub-output signal is a low level signal, and the second sub-output signal is a high level signal.

[0020] In some embodiments of the present application, the control module further includes:

[0021] A counting unit, wherein the counting unit is used to obtain the first sub-output signal and the second sub-output signal, and output a counting signal according to the first sub-output signal and the second sub-output signal, and the delay unit is used to modulate the pulse width modulation signal according to the counting signal to output the control signal.

[0022] In some embodiments of the present application, the counting unit is configured to increase the stored data in the counting unit by one unit value when the first sub-output signal is a high-level signal; and decrease the stored data in the counting unit by one unit value when the second sub-output signal is a high-level signal; and the counting unit is also used to output the counting signal according to the stored data.

[0023] In some embodiments of the present application, the delay unit is used to adjust the delay time of the pulse width modulation signal according to the counting signal, and the data size of the counting signal is positively correlated with the delay time.

[0024] In some embodiments of the present application, the control module further includes a logic driving unit, and the logic driving unit is used to receive the pulse width modulation signal modulated by the delay unit to output the control signal.

[0025] In a second aspect, the present application also provides a dead time control method, which is applied to the above-mentioned dead time control circuit.

[0026] In a third aspect, the present application further provides a power supply, including a circuit board, on which the above-mentioned dead time control circuit is integrated.

[0027] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: the above-mentioned dead time control circuit, control method and power supply, the dead time control circuit includes a first signal detection branch, a second signal detection branch and a control module; the first signal detection branch is connected to the first node, and the first signal detection branch is used to obtain a first voltage signal of the first node during the dead time; the second signal detection branch is connected to the control electrode of the second power switch tube, and the second signal detection branch is used to obtain a second voltage signal of the control electrode of the second power switch tube during the dead time; the control module is used to obtain the first voltage signal and the second voltage signal, and output a control signal according to the time difference between the first rising edge of the first voltage signal and the second rising edge of the second voltage signal, and the control signal is used to control the turn-off time of the second power switch tube; the present application is arranged that when the time difference is greater than the preset value of the dead time, the control signal reduces the turn-off time of the second power switch tube, and when the time difference is less than the preset value of the dead time, the control signal increases the turn-off time of the second power switch tube; that is, the present application adjusts the dead time by controlling the turn-off time of the second power switch tube to improve the control accuracy of the dead time, thereby facilitating the improvement of the stability of the power supply output. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A circuit structure diagram of a dead time control circuit provided in one embodiment of the present application;

[0029] Figure 2 A schematic diagram of the framework structure of a dead time control circuit provided in one embodiment of the present application;

[0030] Figure 3 A schematic diagram of the framework structure of a dead time control circuit provided in another embodiment of the present application;

[0031] Figure 4 This is a timing diagram of a dead time control circuit provided in yet another embodiment of the present application.

[0032] Specific element symbol description: 100-control module, 110-delay unit, 120-phase detection unit, 130-counting unit, 140-logic drive unit, Q1-first power switch tube, Q2-second power switch tube, L1-first inductor, C1-first capacitor, R1-first resistor. DETAILED DESCRIPTION

[0033] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0034] It should be noted that when an element is referred to as being "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0035] It should be understood that the terms "length", "width", "up", "down", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0036] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0037] It is important to know that DC-DC converters, as important components in electronic systems, are widely used in various power management systems. Their main function is to convert unstable DC voltage into stable DC voltage that meets specific requirements. In complex power supply designs, DC-DC converters specifically set up two power switch tubes between VDD (positive power supply) and GND (negative power supply) to achieve efficient conversion and control of electrical energy. This design not only improves the flexibility of voltage conversion, but also enhances the stability and reliability of the power supply system. With the advancement of science and technology, especially driven by high-speed and highly integrated electronic devices, the performance requirements for DC-DC converters are increasing. As the core component of the DC-DC converter, the switching speed, on-resistance and reverse recovery characteristics of the power switch tube directly affect the conversion efficiency of the converter, the stability of the output voltage and the overall performance of the system.

[0038] Although DC-DC converters in the prior art have made significant progress in the application of power switch tubes, there are still some technical problems that need to be solved. Specifically, when two power switch tubes are designed in the control logic to avoid simultaneous conduction to prevent short circuit, due to the existence of the inherent body diode inside the power switch tube, when the switch tube is disconnected, its body diode will inevitably store a certain amount of charge. These stored charges will have a significant impact on the rise time of SW (usually referring to the output end of the switch tube or the key node related to it) in the subsequent switching process, causing the rise time to become uncontrollable.

[0039] Uncontrollable SW rise time will bring a series of negative effects: first, it may cause the output voltage fluctuation to increase, affecting the stability of the power supply system; second, too long rise time will increase switching loss and reduce the conversion efficiency of the DC-DC converter; finally, uncontrollable rise time may also cause electromagnetic interference (EMI) problems, interfering with the normal operation of surrounding electronic equipment. Therefore, how to effectively reduce or eliminate the impact of the power switch body diode stored charge on the power supply stability has become an important issue in the current DC-DC converter design.

[0040] Therefore, based on this, the present application improves the related dead time control circuit, control method and power supply.

[0041] See also Figure 1 and Figure 2 , Figure 1 FIG. 4 shows a circuit structure diagram of a dead time control circuit provided in this embodiment, Figure 2 A schematic diagram of the framework structure of the dead time control circuit provided in this embodiment is shown. Figure 1 VDD in is the input voltage, the first switch tube is connected to the input voltage, the first node is connected in series with the first inductor L1 and the first resistor R1, and the first resistor R1 is grounded. The first resistor R1 and the first inductor L1 are also directly connected to the first capacitor C1, and the other end of the first capacitor C1 is grounded. The dead time control circuit of this embodiment is used to control the dead time when the first power switch tube Q1 and the second power switch tube Q2 connected in series are both turned off, the first power switch tube Q1 and the second power switch tube Q2 are connected to the first node, and the second power switch tube Q2 is grounded.

[0042] The dead time control circuit of this embodiment includes a first signal detection branch, a second signal detection branch and a control module 100, the first signal detection branch is connected to the first node, and the first signal detection branch is used to obtain a first voltage signal of the first node during the dead time; the second signal detection branch is connected to the control electrode of the second power switch tube Q2, and the second signal detection branch is used to obtain a second voltage signal of the control electrode of the second power switch tube Q2 during the dead time; the control module 100 is used to obtain the first voltage signal and the second voltage signal, and output a control signal according to the time difference between the first rising edge of the first voltage signal and the second rising edge of the second voltage signal, and the control signal is used to control the turn-off time of the second power switch tube Q2; when the time difference is greater than the preset value of the dead time, the control signal reduces the turn-off time of the second power switch tube Q2, and when the time difference is less than the preset value of the dead time, the control signal increases the turn-off time of the second power switch tube Q2.

[0043] It should be explained that the first voltage signal is used to reflect the change of the node voltage in the dead zone device due to the second power switch tube Q2 being turned off, especially the rising edge time of the node voltage. The second voltage signal is used to reflect the actual state of the control signal of the second power switch tube Q2 and its change information, especially the rising edge time of the control signal of the second power switch tube Q2.

[0044] The current power supply cannot accurately control the dead time, resulting in unstable power output; however, in the present application, the dead time is adjusted by controlling the turn-off time of the second power switch tube Q2 to improve the control accuracy of the dead time, which is beneficial to improve the stability of the power output. Specifically, if the time difference is greater than the preset dead time value, it means that the second switch tube is turned off too early, which may reduce the risk of current penetration but also affect the efficiency. At this time, the control module 100 will output a control signal to reduce the turn-off time of the second switch tube to be closer to the ideal dead time. If the time difference is less than the preset dead time value, it means that the second switch tube is turned off too late, which may increase the risk of current penetration. At this time, the control module 100 will output a control signal to increase the turn-off time of the second switch tube to ensure sufficient dead time.

[0045] In some embodiments of this application, please continue to refer to Figure 1 Also see Figure 3 , Figure 3 A schematic diagram showing the framework structure of the dead time control circuit of this embodiment is shown; Figure 1 The Adjustable delay T0 is the delay unit 110. The control module 100 of this embodiment includes the delay unit 110. The delay unit 110 is used to receive a pulse width modulation signal, and the pulse width modulation signal is used to control the opening and closing of the second power switch tube Q2; wherein the delay unit 110 is also used to modulate the pulse width modulation signal according to the time difference to output a control signal.

[0046] It should be explained that the delay unit 110 is not only responsible for receiving a pulse width modulation (PWM) signal, which is used to control the on and off of the second power switch tube Q2, but also can modulate the received PWM signal according to a specific time difference.

[0047] In some embodiments of this application, please continue to refer to Figure 1 as well as Figure 3The control module 100 of this embodiment also includes a phase detection unit 120, which is used to receive the first voltage signal and the second voltage signal, and calculate the time difference according to the first rising edge and the second rising edge; the phase detection unit 120 is also used to compare the time difference with the preset dead time value, and output a first output signal according to the comparison result; wherein the delay unit 110 modulates the pulse width modulation signal according to the first output signal to output a control signal.

[0048] It needs to be explained that Figure 1 The Phase detector in the figure is the phase detection unit 120. The main function of the phase detection unit 120 is to receive the first voltage signal from the first signal detection branch and the second voltage signal from the second signal detection branch. The two signals represent the voltage changes of the first node (located between the first power switch tube Q1 and the second switch tube) and the control electrode of the second switch tube, respectively. The phase detection unit 120 monitors the rising edge of the two signals (i.e., the moment when the low level changes to the high level), and calculates the time difference between them accordingly. If the time difference is greater than the preset value of the dead time, it means that the second switch tube may be turned off too early. At this time, the first output signal will instruct the delay unit 110 to reduce the modulation delay of the pulse width modulation signal to shorten the turn-off time of the second switch tube, so that it is closer to the ideal dead time. On the contrary, if the time difference is less than the preset value of the dead time, it means that the second switch tube is not turned off in time enough. The first output signal will instruct the delay unit 110 to increase the modulation delay to extend the turn-off time of the second switch tube.

[0049] The delay unit 110 performs corresponding modulation processing on the received pulse width modulation signal according to the instruction of the first output signal, so as to output a control signal for accurately controlling the on-off time of the second switch tube. In this way, through the coordinated work of the phase detection unit 120 and the delay unit 110, the control module 100 of this embodiment can realize accurate control and dynamic adjustment of the dead time, thereby improving the performance and stability of the entire circuit or system.

[0050] In some embodiments of this application, please continue to refer to Figure 1 and Figure 3 The first output signal of this embodiment includes a first sub-output signal and a second sub-output signal, and the first sub-output signal and the second sub-output signal are complementary; when the time difference is greater than the preset value of the dead time, the first sub-output signal is a high-level signal, and the second sub-output signal is a low-level signal; when the time difference is less than the preset value of the dead time, the first sub-output signal is a low-level signal, and the second sub-output signal is a high-level signal.

[0051] It should be explained that the first sub-output signal is Figure 1 The second sub-output signal is UP Figure 1 By using the complementary first sub-output signal and the second sub-output signal, the control module 100 can more clearly express the comparison result between the time difference and the preset dead time value, so that it can be more easily understood and executed by the delay unit 110.

[0052] In some embodiments of this application, please continue to refer to Figure 1 and Figure 3 The control module 100 of this embodiment also includes a counting unit 130, which is used to obtain the first sub-output signal and the second sub-output signal, and output a counting signal according to the first sub-output signal and the second sub-output signal. The delay unit 110 is used to modulate the pulse width modulation signal according to the counting signal to output a control signal.

[0053] It should be explained that the counting unit 130 is Figure 1 The main function of the counting unit 130 is to receive the first sub-output signal and the second sub-output signal from the phase detection unit 120. Since the two signals are complementary, they together provide a clear indication of the comparison result of the time difference with the preset value of the dead time. The counting unit 130 monitors the state changes of the two signals and generates a counting signal according to certain logic rules (such as signal edge detection, pulse width measurement, etc.).

[0054] In some embodiments of the present application, the counting unit 130 is configured to increase the stored data in the counting unit 130 by one unit value when the first sub-output signal is a high-level signal; and decrease the stored data in the counting unit 130 by one unit value when the second sub-output signal is a high-level signal; the counting unit 130 is also used to output a counting signal based on the stored data.

[0055] In some embodiments, the stored data is an N-bit binary number.

[0056] In some embodiments of this application, please continue to refer to Figure 1 and Figure 3 The delay unit 110 of this embodiment is used to adjust the delay time of the pulse width modulation signal according to the counting signal, and the data size of the counting signal is positively correlated with the delay time. That is, the larger the data of the counting signal, the longer the delay time. The smaller the data of the counting signal, the smaller the delay time.

[0057] In some embodiments of this application, please continue to refer to Figure 1 and Figure 3 The control module 100 further includes a logic driving unit 140, which is used to receive the pulse width modulation signal modulated by the delay unit 110 and output a control signal. Figure 1Driver logic (logic control) in. Figure 1 The Constant delay in is a fixed delay.

[0058] Example 1: If the upper and lower power tubes of a traditional DC-DC converter are turned on at the same time, a large current will flow directly from VDD to GND, so a control circuit is configured in the synchronous rectification DC / DC converter to prevent the switches on both sides from being turned on at the same time, that is, the two sides are turned off first and then the corresponding switches are turned on. The control circuit of a traditional DC-DC converter obtains the required dead time by generating a non-overlapping clock. Theoretically, during the dead time, the switches on both sides are disconnected, so no current should flow from either switch to the output. However, in actual MOSFET switches, there is a parasitic diode called a "body diode". When the switches on both sides are in the off state, the body diode of the low-side MOSFET is positive relative to the load current, and the current flows to the load through this body diode.

[0059] It is understandable that the body diode will be turned on during the dead time, and a long dead time will cause the body diode to store too much charge; when the high-side power tube is turned on, the body diode stores too much charge, which will cause the SW rise time to become uncontrollable; uncontrollable SW means that the voltage at SW may ring too much and break down the device; a too fast SW rise speed will lead to poor EMI; current will be injected into the substrate during the dead time, affecting the circuit.

[0060] The control module 100 of this embodiment includes a SW detector, a Phase detector (phase detection unit 120 ), a Counter (counting unit 130 ), an adaptive delay unit (delay unit 110 ) and a Driver logic (logic driver unit 140 ).

[0061] The SW detector function is used to obtain the rising edge of VSW. At the rising edge of A pulse (first voltage signal) will be generated.

[0062] The phase detection unit 120 detects two input signals ( ) The time difference between the rising edges .when Greater than the dead time target value When , the UP signal output is high level, and the DOWN signal output is low level; when When the DOWN signal is output as high level, the UP signal is output as low level. The UP and DOWN signals will be used as the input of the next level Counter.

[0063] The counting unit 130 will output an N-bit binary number, the size of which is determined according to the output result of the previous-stage phase detection unit 120; each time UP is pulled high, the data stored inside the counting unit 130 will be increased by 1, and each time DOWN is pulled high, the data stored inside the counting unit 130 will be decreased by 1; the stored data in the counting unit 130 will be used as the input of the next-stage adaptive delay module.

[0064] The input of the adaptive delay unit is an N-bit binary number from the counting unit 130 . The adaptive delay unit automatically adjusts the delay time (Delay) according to the size of the input data. Changes with the input data, whenever the data increases or decreases The corresponding Delay size will also change with the range ; It is used to control the off time of the low-side power tube. Its falling edge will make the control signal of the low-side power tube Pull down.

[0065] The logic driving unit 140 outputs control signals of the two power tubes respectively according to the input signal.

[0066] See also Figure 4 , Figure 4 FIG. 4 shows a timing diagram of the dead time control circuit of this embodiment. hg is a control signal for controlling the first power switch tube, V lg is the control signal for controlling the second power switch tube, V SW is the signal of the first node, V SW_det is the first voltage signal, V Lg_det is the second voltage signal, Dead_zone is the dead zone, UP is the first sub-output signal, DOWN is the second sub-output signal, and Tdelay is the delay signal.

[0067] The specific working process of the dead time control circuit of this embodiment is as follows:

[0068] Under normal operation, the SW detector will continuously detect the SW rising edge and transmit it to the phase detection unit 120;

[0069] The phase detection unit 120 determines whether the dead time meets the design requirements based on the signal of the previous stage. Figure 4 As shown, in the first cycle, the actual dead time is greater than the design value, and the UP signal will be output high;

[0070] Since the UP signal is high, the stored data in the counting unit 130 will increase and be passed to the adaptive delay unit;

[0071] In the next cycle, due to the increase of data from the counting unit 130, the delay of the low-side adaptive delay module It will increase, making the falling edge of the low-side power tube control signal come later, thereby reducing the dead time;

[0072] Each change in the data in the cycle counting unit 130 will take effect in the next cycle;

[0073] After multiple cycles of adjustment, the actual dead time will approach the designed target value and switch back and forth at the boundary (the output result of the counting unit 130 will switch back and forth between two values). At this time, it can be considered that the dead time has reached the target value.

[0074] In addition, increasing the number of bits of the counting signal can further reduce the error between the actual dead time and the target value, and control the dead time more accurately.

[0075] This embodiment uses a method of multiple cycle dynamic adjustment to gradually adjust the delay of the low-side control signal to achieve the purpose of reducing the dead time. The influence of the drive circuit and the comparator delay is relatively small. By adjusting the delay time by digital control, the dead time can be more accurately controlled to improve the conversion efficiency of the converter.

[0076] Furthermore, in order to better implement the dead time control circuit in any of the above embodiments, based on the above dead time control circuit, the present application also provides a dead time control method, which is applied to the above dead time control circuit.

[0077] Furthermore, in order to better implement the dead time control circuit in any of the above embodiments, based on the above dead time control circuit, the present application also provides a power supply, including a circuit board, on which the above dead time control circuit is integrated.

[0078] In some embodiments, the power supply is a switching power supply.

[0079] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0080] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0081] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0082] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0083] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A dead time control circuit, characterized in that: Used to control the dead time when a first power switch tube and a second power switch tube connected in series are both turned off, the first power switch tube and the second power switch tube are connected to a first node, and the second power switch tube is grounded; The dead time control circuit comprises: a first signal detection branch, the first signal detection branch being connected to the first node, and the first signal detection branch being used to obtain a first voltage signal of the first node within the dead time; A second signal detection branch, wherein the second signal detection branch is connected to the control electrode of the second power switch tube, and the second signal detection branch is used to obtain a second voltage signal of the control electrode of the second power switch tube within the dead time; a control module, configured to obtain the first voltage signal and the second voltage signal, and output a control signal according to a time difference between a first rising edge of the first voltage signal and a second rising edge of the second voltage signal, wherein the control signal is used to control a turn-off time of the second power switch tube; When the time difference is greater than the preset dead time value, the control signal reduces the off time of the second power switch tube. When the time difference is less than the preset dead time value, the control signal increases the off time of the second power switch tube.

2. The dead time control circuit according to claim 1, characterized in that: The control module comprises: A time delay unit, the time delay unit is used to receive a pulse width modulation signal, and the pulse width modulation signal is used to control the opening and closing of the second power switch tube; Wherein, the delay unit is further used to modulate the pulse width modulation signal according to the time difference to output the control signal.

3. The dead time control circuit according to claim 2, characterized in that: The control module also includes: a phase detection unit, the phase detection unit being used to receive the first voltage signal and the second voltage signal, and calculate the time difference according to the first rising edge and the second rising edge; the phase detection unit being further used to compare the time difference with a preset dead time value, and output a first output signal according to the comparison result; Wherein, the delay unit modulates the pulse width modulation signal according to the first output signal to output the control signal.

4. The dead time control circuit according to claim 3, characterized in that: The first output signal includes a first sub-output signal and a second sub-output signal, and the first sub-output signal and the second sub-output signal are complementary; When the time difference is greater than the preset dead time value, the first sub-output signal is a high level signal, and the second sub-output signal is a low level signal; When the time difference is less than the preset dead time value, the first sub-output signal is a low level signal, and the second sub-output signal is a high level signal.

5. The dead time control circuit according to claim 4, characterized in that: The control module also includes: A counting unit, wherein the counting unit is used to obtain the first sub-output signal and the second sub-output signal, and output a counting signal according to the first sub-output signal and the second sub-output signal, and the delay unit is used to modulate the pulse width modulation signal according to the counting signal to output the control signal.

6. The dead time control circuit according to claim 5, characterized in that: The counting unit is configured such that when the first sub-output signal is a high-level signal, the stored data in the counting unit increases by one unit value; when the second sub-output signal is a high-level signal, the stored data in the counting unit decreases by one unit value; the counting unit is also used to output the counting signal according to the stored data.

7. The dead time control circuit according to claim 6, characterized in that: The delay unit is used to adjust the delay time of the pulse width modulation signal according to the counting signal, and the data size of the counting signal is positively correlated with the delay time.

8. The dead time control circuit according to any one of claims 2 to 7, characterized in that: The control module further includes a logic driving unit, and the logic driving unit is used to receive the pulse width modulation signal modulated by the delay unit, so as to output the control signal.

9. A dead time control method, characterized in that: Applicable to the dead time control circuit described in any one of claims 1 to 8.

10. A power supply, characterized in that: It comprises a circuit board, on which the dead time control circuit according to any one of claims 1 to 8 is integrated.