Wafer scale package structure and method of forming same

Abstract

The invention provides a wafer scale packaging structure and a forming method thereof, the wafer scale packaging structure comprises a first packaging structure, a second packaging structure and a heat dissipation plate, the heat dissipation plate comprises an upper surface and a lower surface which are opposite to each other, the first packaging structure is mounted on the upper surface, and the second packaging structure is mounted on the lower surface. The first chip module in the first packaging structure and the second chip module in the second packaging structure operate independently so as to meet different packaging requirements, the first packaging structure is attached to the upper surface of the heat dissipation plate, the second packaging structure is attached to the lower surface of the heat dissipation plate, and therefore the heat dissipation efficiency is improved. Therefore, heat generated by the first chip module and the second chip module can be quickly dissipated or released, so that the heat dissipation problem of the wafer scale packaging structure is improved, the size of the wafer scale packaging structure can be reduced, and the electrical performance of the wafer scale packaging structure is further improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging, and in particular to a wafer-scale packaging structure and a method for forming the same. Background Art

[0002] System in Package (SiP) integrates chips with various functions such as optoelectronics, digital / logic, radio frequency, storage, etc. into a package in the form of chip stacking or package stacking, thereby realizing a system that can realize multiple functions.

[0003] The demand for data computing in today's emerging fields (servers, mobile devices, artificial intelligence, automotive electronics, data storage, etc.) is growing exponentially. In order to meet the needs of high-performance computing such as high density, high speed, high heat dissipation, low power consumption, and low latency, the existing system-level packaging is expanding towards wafer scale. Figure 1 , that is, a plurality of semiconductor chips 20 with different functions are integrated on a silicon wafer 10 to form a wafer-scale system-level packaging structure.

[0004] The heat dissipation problem of the existing wafer-scale packaging structure still needs to be improved, and its performance still needs to be enhanced. Summary of the invention

[0005] The problem to be solved by the present application is to provide a wafer-scale packaging structure and a method for forming the same, so as to improve the heat dissipation problem of the wafer-scale packaging structure and enhance the performance of the wafer-scale packaging structure.

[0006] To solve the above problems, the present application provides a wafer scale packaging structure, including: a first packaging structure, a second packaging structure and a heat sink, The heat sink comprises an upper surface and a lower surface opposite to each other, the upper surface is mounted with a first packaging structure, and the lower surface is mounted with a second packaging structure; The first packaging structure includes a first substrate, a first chip module and a first plastic sealing layer, the first substrate includes a first surface and a second surface opposite to each other, a plurality of discrete first chip modules are mounted on the first surface of the first substrate, the first plastic sealing layer covers the first chip module and the first surface of the first substrate, and the first plastic sealing layer exposes a surface of the first chip module away from the first substrate, and the surface of the first plastic sealing layer and the exposed surface of the first chip module are attached to the upper surface of the heat sink; The second packaging structure includes a second substrate, a second chip module and a second plastic sealing layer. The second substrate includes a first surface and a second surface opposite to each other. A plurality of discrete second chip modules are mounted on the first surface of the second substrate. The second plastic sealing layer covers the second chip module and the first surface of the second substrate, and the second plastic sealing layer exposes a surface of the second chip module away from the second substrate. The surface of the second plastic sealing layer and the exposed surface of the second chip module are in contact with the lower surface of the heat sink.

[0007] As an optional embodiment, the heat sink is a liquid-cooled heat sink having a liquid flow channel, a liquid inlet channel connected to the liquid flow channel, and a liquid outlet channel for liquid refrigerant to flow through.

[0008] As an optional embodiment, the upper surface of the heat sink has a first liquid flow groove, and the lower surface of the heat sink has a second liquid flow groove, the first liquid flow groove and the first plastic sealing layer surface bonded to the exposed first chip module surface form a first liquid flow channel; the second liquid flow groove and the second plastic sealing layer surface bonded to the exposed second chip module surface form a second liquid flow channel.

[0009] As an optional embodiment, a third liquid flow channel is formed in the middle of the heat dissipation plate.

[0010] As an optional embodiment, the heat sink includes a first heat sink and a second heat sink, at least one heat sink has a third liquid flow groove, and the first heat sink and the second heat sink are attached or bonded to form a third liquid flow channel in the middle of the heat sink.

[0011] As an optional embodiment, the liquid-cooling heat sink has a plurality of liquid flow channels respectively corresponding to the positions of the first chip module and / or the second chip module.

[0012] As an optional embodiment, the edges of the upper surface and the lower surface of the heat sink are respectively bonded to the edges of the first packaging structure and the edges of the second packaging structure through a sealing structure, so that the cavity between the upper surface of the heat sink and the bonded first packaging structure forms a fourth liquid flow channel, and the cavity between the lower surface of the heat sink and the bonded second packaging structure forms a fifth liquid flow channel, wherein the sealing structure also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the fourth liquid flow channel and the fifth liquid flow channel.

[0013] As an optional embodiment, a plurality of support blocks are provided in a cavity between an upper surface of the heat dissipation plate and the attached first packaging structure, and a plurality of support blocks are provided in a cavity between a lower surface of the heat dissipation plate and the attached second packaging structure.

[0014] As an optional embodiment, the heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface edge and the upward edge extension of the heat sink body are in contact with the edge and side wall of the first packaging structure, the lower surface edge and the downward edge extension of the heat sink body are in contact with the edge and side wall of the second packaging structure, or the upward edge extension of the heat sink body is in contact with the side wall of the first packaging structure, and the downward edge extension of the heat sink body is in contact with the side wall of the second packaging structure.

[0015] As an optional embodiment, the upper surface and the upward edge extension of the heat sink body are bonded to the edge and side wall of the first packaging structure through a sealing structure, and the lower surface and the downward edge extension of the heat sink body are bonded to the edge and side wall of the second packaging structure through a sealing structure, so that the cavity between the upper surface of the heat sink body and the bonded first packaging structure forms a sixth liquid flow channel, and the cavity between the lower surface of the heat sink body and the bonded second packaging structure forms a seventh liquid flow channel, wherein the side wall of the heat sink also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the sixth liquid flow channel and the seventh liquid flow channel.

[0016] As an optional embodiment, the upper surface of the heat sink body has a third liquid flow groove, and the lower surface of the heat sink body has a fourth liquid flow groove, and the third liquid flow groove, the surface of the first plastic sealing layer bonded to the surface and the exposed surface of the first chip module form an eighth liquid flow channel; the fourth liquid flow groove, the surface of the second plastic sealing layer bonded to the surface and the exposed surface of the second chip module form a ninth liquid flow channel, wherein the side wall of the heat sink also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the eighth liquid flow channel and the ninth liquid flow channel.

[0017] As an optional embodiment, a tenth liquid flow channel is provided in the middle of the heat sink body, wherein the heat sink side wall also has an opening corresponding to a liquid inlet channel and a liquid outlet channel connected to the tenth liquid flow channel.

[0018] As an optional embodiment, the heat sink is a metal heat sink, a silicon heat sink or a graphite heat sink.

[0019] As an optional embodiment, it also includes a first interface module and a second interface module. The second surface of the first substrate has a first interface module, and the second surface of the second substrate has a second interface module. The first interface module and the second interface module are used to be electrically connected to an external power supply terminal, at least for supplying power to the first chip module and the second chip module respectively.

[0020] As an optional embodiment, the first interface module and the second interface module include an interface and a power component electrically connected to the interface, the interface is electrically connected to the external power supply end via a cable, and the power component is used to reduce the external voltage input through the interface to one voltage or multiple voltages of different sizes, and supply the reduced voltage to the corresponding first chip module and the second chip module.

[0021] As an optional embodiment, the first chip module and the second chip module both have one or more semiconductor chips, wherein the multiple semiconductor chips of the first chip module are of the same or different types, and the multiple semiconductor chips of the second chip module are of the same or different types.

[0022] Another aspect of the present application provides a method for forming a wafer scale packaging structure, comprising: A first packaging structure is provided, wherein the first packaging structure includes a first substrate, a first chip module and a first plastic sealing layer, wherein the first substrate includes a first surface and a second surface opposite to each other, a plurality of discrete first chip modules are mounted on the first surface of the first substrate, the first plastic sealing layer covers the first chip module and the first surface of the first substrate, and the first plastic sealing layer exposes a surface of the first chip module away from the first substrate; Providing a second packaging structure, the second packaging structure comprising a second substrate, a second chip module, and a second plastic sealing layer, the second substrate comprising a first surface and a second surface opposite to each other, a plurality of discrete second chip modules being mounted on the first surface of the second substrate, the second plastic sealing layer covering the second chip module and the first surface of the second substrate, and the second plastic sealing layer exposing a surface of the second chip module away from the second substrate; Providing a heat sink, the heat sink comprising an upper surface and a lower surface that are opposite to each other; A first packaging structure is mounted on the upper surface of the heat sink, wherein the surface of the first plastic sealing layer and the exposed surface of the first chip module are in contact with the upper surface of the heat sink; and a second packaging structure is mounted on the lower surface of the heat sink, wherein the surface of the second plastic sealing layer and the exposed surface of the second chip module are in contact with the lower surface of the heat sink.

[0023] As an optional embodiment, the upper surface of the heat sink has a first liquid flow groove, and the lower surface of the heat sink has a second liquid flow groove, the first liquid flow groove and the first plastic sealing layer surface bonded to the exposed first chip module surface form a first liquid flow channel; the second liquid flow groove and the second plastic sealing layer surface bonded to the exposed second chip module surface form a second liquid flow channel.

[0024] As an optional embodiment, a third liquid flow channel is formed in the middle of the heat dissipation plate, and the process of forming the heat dissipation plate includes: providing a first heat sink and a second heat sink, at least one of the heat sinks having a third liquid flow groove; The first heat sink and the second heat sink are bonded or bonded to each other on one side of the surface having the third liquid flow groove, so as to form a third liquid flow channel in the middle of the heat sink.

[0025] As an optional embodiment, the edges of the upper surface and the lower surface of the heat sink are respectively bonded to the edges of the first packaging structure and the edges of the second packaging structure through a sealing structure, so that the cavity between the upper surface of the heat sink and the bonded first packaging structure forms a fourth liquid flow channel, and the cavity between the lower surface of the heat sink and the bonded second packaging structure forms a fifth liquid flow channel, wherein the sealing structure also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the fourth liquid flow channel and the fifth liquid flow channel.

[0026] As an optional embodiment, the heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface edge and the upward edge extension of the heat sink body are in contact with the edge and side wall of the first packaging structure, the lower surface edge and the downward edge extension of the heat sink body are in contact with the edge and side wall of the second packaging structure, or the upward edge extension of the heat sink body is in contact with the side wall of the first packaging structure, and the downward edge extension of the heat sink body is in contact with the side wall of the second packaging structure.

[0027] As an optional embodiment, the edge of the upper surface of the heat sink body and the upward edge extension are bonded to the edge and side wall of the first packaging structure through a sealing structure, and the edge of the lower surface of the heat sink body and the downward edge extension are bonded to the edge and side wall of the second packaging structure through a sealing structure, so that the cavity formed between the upper surface of the heat sink body and the bonded first packaging structure forms a sixth liquid flow channel, and the cavity formed between the lower surface of the heat sink body and the bonded second packaging structure forms a seventh liquid flow channel, wherein the side wall of the heat sink also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the sixth liquid flow channel and the seventh liquid flow channel.

[0028] As an optional embodiment, the upper surface of the heat sink body has a third liquid flow groove, and the lower surface of the heat sink body has a fourth liquid flow groove, and the third liquid flow groove, the surface of the first plastic sealing layer bonded to the surface and the exposed surface of the first chip module form an eighth liquid flow channel; the fourth liquid flow groove, the surface of the second plastic sealing layer bonded to the surface and the exposed surface of the second chip module form a ninth liquid flow channel, wherein the side wall of the heat sink also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the eighth liquid flow channel and the ninth liquid flow channel.

[0029] As an optional embodiment, a tenth liquid flow channel is provided in the middle of the heat sink body, wherein the heat sink side wall also has an opening corresponding to a liquid inlet channel and a liquid outlet channel connected to the tenth liquid flow channel.

[0030] As an optional embodiment, the method further includes: forming a first interface module on the second surface of the first substrate, and forming a second interface module on the second surface of the second substrate.

[0031] The advantages of the technical solution of this application are: The wafer-scale packaging structure and its forming method in the present application, wherein the wafer-scale packaging structure comprises: a first packaging structure, a second packaging structure and a heat sink, the heat sink comprises an upper surface and a lower surface relative to each other, the upper surface is mounted with the first packaging structure, and the lower surface is mounted with the second packaging structure; the first plastic sealing layer surface of the first packaging structure and the exposed first chip module surface are bonded to the upper surface of the heat sink; the second plastic sealing layer surface of the second packaging structure and the exposed second chip module surface are bonded to the lower surface of the heat sink. The first chip modules and the second chip modules of the present application are respectively mounted on the first substrate surface and the second substrate surface, the first chip module and the chip module operate independently to meet different packaging requirements, and the first packaging structure is mounted on the upper surface of the heat sink, and the second packaging structure is mounted on the lower surface of the heat sink, so that the heat generated by the first chip module and the second chip module can be quickly dissipated or released, thereby improving the heat dissipation problem of the wafer-scale packaging structure, and reducing the volume of the wafer-scale packaging structure, further improving the electrical performance of the wafer-scale packaging structure.

[0032] Furthermore, in one embodiment, the liquid cooling heat sink has a plurality of liquid flow channels, which correspond to the positions of the first chip module and / or the second chip module respectively. By selectively setting the positions of the liquid flow channels, the liquid refrigerant in the liquid flow channels can flow smoothly, and the heat generated by the first chip module and the second chip module can be quickly dissipated without accumulating inside the wafer scale packaging structure.

[0033] Furthermore, in one embodiment, the heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface edge and the upward edge extension of the heat sink body are in contact with the edge and side wall of the first packaging structure, the lower surface edge and the downward edge extension of the heat sink body are in contact with the edge and side wall of the second packaging structure, or the upward edge extension of the heat sink body is in contact with the side wall of the first packaging structure, and the downward edge extension of the heat sink body is in contact with the side wall of the second packaging structure. Since the heat sink is in an "H"-shaped structure as a whole, the first packaging structure and the second packaging structure are located in the upper and lower openings of the "H"-shaped structure, that is, the first packaging structure and the second packaging structure are pressed against the heat sink from above and below the wafer-scale packaging structure. Since the upward edge extension and the downward edge extension are used to fit with the side walls of the first packaging structure and the second packaging structure, under the joint action of the upward edge extension and the downward edge extension, not only can the mounting firmness of the heat sink and the upper and lower packaging structures be improved, but also the stress of the first packaging structure and the second packaging structure can be balanced or reduced, which is beneficial to preventing the wafer-scale packaging structure (especially the large-sized wafer-scale packaging structure) from warping or deformation.

[0034] Furthermore, in one embodiment, the wafer-scale packaging structure further includes a first interface module and a second interface module, the second surface of the first substrate has the first interface module, the second surface of the second substrate has the second interface module, the first interface module and the second interface module are used to be electrically connected to an external power supply terminal, at least used to supply power to the first chip module and the second chip module respectively. By arranging the first interface module on the second surface of the first substrate outside the wafer-scale packaging structure and arranging the second interface module on the second surface of the second substrate outside the wafer-scale packaging structure, the power supply problem of the wafer-scale packaging structure is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a schematic diagram of the structure of a wafer scale packaging structure in the prior art; Figure 2 This is a schematic structural diagram of a wafer-scale packaging structure in an embodiment of the present application; Figure 3 This is a schematic structural diagram of a wafer-scale packaging structure in another embodiment of the present application; Figure 4 This is a schematic structural diagram of a wafer-scale packaging structure in another embodiment of the present application; Figure 5 It is a schematic diagram of the top view and cross-sectional structure of a heat sink in a wafer-scale packaging structure in one embodiment of the present application; Figure 6This is a schematic structural diagram of a wafer-scale packaging structure in another embodiment of the present application; Figure 7 A schematic diagram of a top view and a cross-sectional structure of a heat sink in a wafer-scale packaging structure in another embodiment of the present application; Figure 8 This is a schematic structural diagram of a wafer-scale packaging structure in another embodiment of the present application; Fig. 9 This is a schematic structural diagram of a wafer-scale packaging structure in another embodiment of the present application; Fig.10 This is a schematic structural diagram of a wafer-scale packaging structure in another embodiment of the present application. DETAILED DESCRIPTION

[0036] The specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. When describing the embodiments of the present application in detail, for the sake of convenience, the schematic diagrams will not be partially enlarged according to the general proportion, and the schematic diagrams are only examples, which should not limit the scope of protection of the present application. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0037] On the one hand, the present application first provides a wafer-scale packaging structure. The wafer-scale packaging structure of the present application is described in detail below with reference to the accompanying drawings.

[0038] An embodiment of the present application provides a wafer scale packaging structure, referring to Figure 2 , the wafer scale packaging structure comprises: The first packaging structure 100, the second packaging structure 200 and the heat dissipation plate 300, The heat sink 300 includes an upper surface and a lower surface opposite to each other, the upper surface is mounted with a first packaging structure 100, and the lower surface is mounted with a second packaging structure 200; The first packaging structure 100 includes a first substrate 110, a first chip module 120 and a first plastic sealing layer 130. The first substrate 110 includes a first surface and a second surface opposite to each other. A plurality of discrete first chip modules 120 are mounted on the first surface of the first substrate 110. The first plastic sealing layer 130 covers the first chip module 120 and the first surface of the first substrate 110, and the first plastic sealing layer 130 exposes the surface of the first chip module 120 away from the first substrate 110. The surface of the first plastic sealing layer 130 and the exposed surface of the first chip module 120 are attached to the upper surface of the heat sink 300. The second packaging structure 200 includes a second substrate 210, a second chip module 220 and a second plastic sealing layer 230. The second substrate 210 includes a first surface and a second surface relative to each other. A plurality of discrete second chip modules 220 are mounted on the first surface of the second substrate 210. The second plastic sealing layer 230 covers the second chip module 220 and the first surface of the second substrate 210, and the second plastic sealing layer 230 exposes the surface of the second chip module 220 away from the second substrate 210. The surface of the second plastic sealing layer 230 and the exposed surface of the second chip module 220 are in contact with the lower surface of the heat sink 300.

[0039] Specifically, the first substrate 110 and the second substrate 210 serve as support carriers of the wafer-scale packaging structure. In one embodiment, the first substrate 110 and the second substrate 210 may be one of a silicon substrate, an RDL substrate (Re-distribution Layer), a resin substrate, a printed circuit board (PCB), a ceramic substrate, or a glass substrate. In one embodiment, the first substrate and the second substrate may be a single-layer board or a multi-layer board. According to the design requirements of the first packaging structure and the second packaging structure, the first substrate and the second substrate may be the same or different.

[0040] In one embodiment, the first substrate 110 and the second substrate 210 may have a larger size. When the substrates are circular, the diameters of the first substrate and the second substrate may be 300 mm ± 10 mm, 450 ± 15 mm. When the substrates are square, the diagonal sizes of the first substrate and the second substrate may be 300 mm ± 15 mm, 450 ± 20 mm.

[0041] The first substrate 110 and the second substrate 210 each include a first surface and a second surface relative to each other, the first surface having a first wiring layer (not shown in the figure), and the second surface having a second wiring layer (not shown in the figure), the first wiring layer being electrically connected to the first chip module 120 and the second chip module 220, respectively, and the second wiring layer being electrically connected to the first interface module and the second interface module, respectively.

[0042] In one embodiment, the first chip module 120 includes a front side and a back side opposite to each other, and the front side of the first chip module 120 has a plurality of first solder bumps (not labeled). When the first chip module 120 is mounted on the first surface of the first substrate 110, the front side of the first chip module 120 faces the upper surface of the substrate, and the first solder bumps on the front side of the first chip module 120 are soldered together with the first wiring layer corresponding to the first surface of the first substrate 110. The second chip module 220 includes a front side and a back side opposite to each other, and the front side of the second chip module 220 has a plurality of second solder bumps (not labeled). When the second chip module 220 is mounted on the first surface of the second substrate 210, the front side of the second chip module 220 faces the first surface of the second substrate 210, and the second solder bumps on the front side of the second chip module 220 are soldered together with the second wiring layer corresponding to the first surface of the second substrate 210.

[0043] The first chip module 120 and the second chip module 220 may be chip modules with the same or different functions. The first chip module 120 is mounted on the first surface of the first substrate 110, and the second chip module 220 is mounted on the first surface of the second substrate 210. The first chip module 120 and the second chip module 220 may operate independently or in coordination to meet different packaging requirements. At the same time, the first chip module 120 and the second chip module 220 are packaged in the same wafer-scale packaging structure and share a heat sink 300, which can reduce the volume of the wafer-scale packaging structure while improving the electrical performance of the wafer-scale packaging structure.

[0044] In one embodiment, the first chip module 120 and the second chip module 220 each have one or more semiconductor chips. In one embodiment, when the first chip module 120 and the second chip module 220 each have multiple semiconductor chips, the functions of the multiple semiconductor chips are the same or different. In a specific embodiment, when the first chip module 120 and the second chip module 220 each have one or more semiconductor chips, the multiple semiconductor chips may include a logic chip and a memory chip electrically connected to the logic chip, the memory chip is used to store data, and the logic chip is used to control and manage the memory chip. The logic chip includes but is not limited to a graphics processing unit (GPU), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a central processing unit (CPU), a microprocessing unit (MPU), a microcontroller unit (MCU), a logic integrated circuit (IC), an application processor (AP) or other known electronic circuits used as processors, and the memory chip includes but is not limited to a dynamic random access memory (DRAM), a static random access memory (SRAM), a magnetoresistive random access memory (MRAM), a phase-change memory (PRAM), and a resistive random access memory (RRAM).

[0045] The first plastic encapsulation layer 130 covers the first chip module 120 and the first surface of the first substrate 110, and the first plastic encapsulation layer 130 exposes the surface of the first chip module 120 away from the first substrate 110, so as to facilitate mounting the heat sink 300 on the surface of the first plastic encapsulation layer 130. The second plastic encapsulation layer 230 covers the first surface of the second chip module 220 and the second substrate 210, and the second plastic encapsulation layer 230 exposes the surface of the second chip module 220 away from the second substrate 210, so as to facilitate mounting the heat sink 300 on the surface of the second plastic encapsulation layer 230. Since the first packaging structure 100 and the second packaging structure 200 of the present invention are mounted on the two surfaces of the heat sink 300 at the same time, the surface of the first plastic encapsulation layer 130 that exposes the first chip module 120 and the surface of the second plastic encapsulation layer 230 that exposes the second chip module 220 are mounted on the two surfaces of the heat sink 300 at the same time, so as to facilitate simultaneous heat dissipation of the first packaging structure and the second packaging structure, and reduce the volume of the wafer-scale packaging structure while improving the electrical performance of the wafer-scale packaging structure.

[0046] In one embodiment, the material of the first plastic encapsulation layer 130 and the second plastic encapsulation layer 230 may be epoxy resin, polyimide resin, benzocyclobutene resin or polybenzoxazole resin containing fillers; or may be polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyether sulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer or polyvinyl alcohol containing fillers. In some embodiments, the filler may be an inorganic filler or an organic filler.

[0047] Please refer to Figure 2 The wafer-scale packaging structure further includes a first interface module 140 and a second interface module 240. The second surface of the first substrate 110 has the first interface module 140, and the second surface of the second substrate 210 has the second interface module 240. The first interface module 140 and the second interface module 240 are used to be electrically connected to an external power supply terminal, and are at least used to respectively supply power to the first chip module 120 and the second chip module 220. The power supply problem of the wafer-scale packaging structure is solved by providing the first interface module 140 and the second interface module 240.

[0048] In one embodiment, the first interface module 140 includes a first interface 141 and a first power component 142 electrically connected to the first interface 141, the first interface 141 is electrically connected to the external power supply terminal through a cable, and the first power component 142 is also electrically connected to the second wiring layer, and is used to reduce the external voltage input through the first interface 141 to one voltage or multiple voltages of different magnitudes, and supply the reduced voltage to the corresponding first chip module 120. In a specific embodiment, the first interface 141 and the first power component 142 are an integrated structure packaged together. In other embodiments, the first interface 141 and the first power component 142 can also be separate structures, and the two are interconnected through the second wiring layer located on the surface of the first substrate. Similarly, the second interface module 240 includes a second interface 241 and a second power component 242 electrically connected to the second interface 241, the second interface 241 is electrically connected to the external power supply terminal through a cable, and the second power component 242 is also electrically connected to the second wiring layer, and is used to reduce the external voltage input through the second interface 241 to one voltage or multiple voltages of different magnitudes, and supply the reduced voltage to the corresponding second chip module 220. The second interface 241 and the second power component 242 are an integrated structure packaged together. In other embodiments, the second interface 241 and the second power component 242 can also be separate structures, and the two are interconnected through the second wiring layer located on the surface of the second substrate.

[0049] In another embodiment, please refer to Figure 3 , the first power component 142 may also be embedded in the first substrate 110, the first interface 141 is mounted on the second surface of the first substrate, and the first power component 142 is electrically connected to the first interface 141 through part of the second wiring in the second wiring layer on the surface of the first substrate 110. Similarly, the second power component 242 may also be embedded in the second substrate 210, the second interface 241 is mounted on the second surface of the second substrate, and the second power component 242 is electrically connected to the second interface 241 through part of the second wiring in the second wiring layer on the surface of the second substrate 210.

[0050] In another embodiment, please refer to Figure 4 A first interface 141 is installed on the second surface of the first substrate 110, and the first power component 142 is arranged on the outside of the first substrate 110. The first interface 141 is electrically connected to the corresponding first chip module through the first substrate. The first interface 141 in the first interface module is electrically connected to the first power component 142 of the external interface through a cable. The first power component 142 in the first interface module is connected to an external power supply through an external interface. The first power component 142 reduces the external voltage input through the external interface to one voltage or multiple voltages of different sizes, and transmits the reduced voltage to the first interface 141 through a connecting cable. The first interface 141 supplies the reduced voltage to the corresponding first chip module 120 through the first substrate 110. Similarly, a second interface 241 is installed on the second surface of the second substrate 210, and the second power component 242 is arranged on the outside of the second substrate 210. The second interface 241 is electrically connected to the corresponding second chip module through the second substrate, and the second interface 241 in the second interface module is electrically connected to the second power component 242 of the external interface through a cable. The second power component 242 in the second interface module is connected to an external power supply through an external interface. The second power component 242 reduces the external voltage input through the external interface to one voltage or multiple voltages of different sizes, and transmits the reduced voltage to the second interface 241 through a connecting cable. The second interface 241 supplies the reduced voltage to the corresponding second chip module through the second substrate 210.

[0051] In the above embodiment, the first interface module 140 and the second interface module 240 are configured in the same manner. In other embodiments, the first interface module and the second interface module may be configured in different manners and the corresponding numbers of interfaces may also be different.

[0052] In addition to being used for power supply, the first interface 141 and the second interface 241 can also be used for data transmission. The first interface 141 and the second interface 241 include various types of interfaces. In addition to being a power supply interface, the first interface 141 and the second interface 241 can also be used as an input / output interface (I / O) for data transmission. The connection between the interface and the outside can be connected by wired and / or wireless means, the wired means include cables or data cables, and the wireless means include optical waves or electromagnetic waves.

[0053] In one embodiment, continue to refer to Figure 2 , there are two first interfaces 141 and second interfaces 241, and there are two first power components 142 and second power components 242. In other embodiments, there may be one or more first interfaces and second interfaces, and there may be one or more first power components and second power components. Each of the first interface modules can supply power to one or more first chip modules at the same time, and each of the second interface modules can supply power to one or more second chip modules at the same time, so as to improve the efficiency of power supply.

[0054] The heat sink 300 is used to dissipate or release the heat generated by the first chip modules 120 and the second chip modules 220, that is, the heat sink 300 can dissipate heat on the front and back of the wafer-scale packaging structure at the same time, so that the heat generated by the first chip module 120 and the second chip module 220 can be quickly dissipated or released, thereby improving the heat dissipation problem of the wafer-scale packaging structure and further improving the electrical performance of the wafer-scale packaging structure. In one embodiment, the material of the heat sink 300 is a material with high thermal conductivity, and the material with high thermal conductivity includes metal, such as copper, aluminum, gold, nickel, steel or stainless steel. In other embodiments, the material with high thermal conductivity can also be silicon or graphite, and the heat sink is a silicon heat sink or a graphite heat sink.

[0055] In one embodiment, please refer to Figure 2 and Figure 5 The heat sink 300 is a liquid-cooled heat sink, and has a liquid flow channel, a liquid inlet channel 311 connected to the liquid flow channel, and a liquid outflow channel 312 for liquid refrigerant to flow through. The surface of the first plastic sealing layer 130 of the first packaging structure and the surface of the second plastic sealing layer 230 of the second packaging structure are respectively attached to the upper surface and the lower surface of the heat sink 300 through sealant.

[0056] As an optional embodiment, the upper surface of the heat sink 300 has a first liquid flow groove, and the lower surface of the heat sink 300 has a second liquid flow groove. The first liquid flow groove forms a first liquid flow channel 301 with the surface of the first plastic sealing layer 130 bonded to the exposed surface of the first chip module 120; the second liquid flow groove forms a second liquid flow channel 302 with the surface of the second plastic sealing layer 230 bonded to the exposed surface of the second chip module 220. When the refrigerant flows in the first liquid flow channel 301 and the second liquid flow channel 302, it can quickly take away the heat in the heat sink 300 to further improve the efficiency of heat dissipation. And by reasonably setting the position of the liquid flow channel, the first liquid flow channel 301 corresponds to the exposed surface of the first chip module 120, and the second liquid flow channel 302 corresponds to the exposed surface of the second chip module 220. The heat generated by the first chip module 120 and the second chip module 220 is quickly taken away before it accumulates, thereby further improving the efficiency of heat dissipation. Among them, Figure 5 For example, the heat sink 300 has three first liquid flow channels 301 and second liquid flow channels 302, each of which corresponds to a number of first chip modules and second chip modules, and two liquid inlet channels 311 and two liquid outlet channels 312 are formed on the side of the heat sink 300 to allow liquid refrigerant to flow in and out from the upper and lower surfaces of the heat sink 300.

[0057] In one embodiment, the heat sink 300 uses an etching process, a carving process, a stamping process, or the like to form liquid flow grooves on the surface of a metal heat sink, a silicon heat sink, or a graphite heat sink.

[0058] In one embodiment, please refer to Figure 6 and Figure 7 The upper and lower surfaces of the heat sink 300 are planes, which are in contact with the surfaces of the first plastic layer 130 and the second plastic layer 230, and a third liquid flow channel 303 is formed in the middle of the heat sink 300. The side of the heat sink 300 has a liquid inflow channel 311 and a liquid outflow channel 312. The heat sink 300 includes a first heat sink and a second heat sink, the first heat sink has a liquid flow groove, the second heat sink also has a liquid flow groove corresponding to the image, and the first heat sink and the second heat sink have a surface with a liquid flow groove that is in contact or bonded, forming a third liquid flow channel 303 in the middle of the heat sink 300. The third liquid flow channel 303 of the heat sink can be one or more, corresponding to the position of the first chip module and / or the second chip module respectively.

[0059] In another embodiment, one heat sink of the heat sink has a liquid flow groove, and the other is a flat heat sink. One side of the heat sink having the liquid flow groove is attached or bonded to the other flat heat sink to form a third liquid flow channel in the middle of the heat sink.

[0060] In one embodiment, the first heat sink and the second heat sink are completely fitted together by bonding, and the liquid refrigerant flows through the heat sink through the liquid inlet channel 311, the third liquid flow channel 303, and the liquid outflow channel 312 located in the middle to achieve heat dissipation, and the upper and lower surfaces of the heat sink are flat surfaces, which are convenient for fitting with the first packaging structure and the second packaging structure to achieve better heat conduction.

[0061] In one embodiment, the first heat sink and the second heat sink may also be bonded together by means of sealant, and the liquid refrigerant flows through the heat sink through the liquid inlet channel 311, the third liquid flow channel 303, and the liquid outlet channel 312 located in the middle to achieve heat dissipation.

[0062] In one embodiment, please refer to Figure 8 The upper and lower surfaces of the heat sink 300 are smooth planes or have liquid flow grooves. The edges of the upper and lower surfaces of the heat sink 300 are respectively bonded to the edges of the first packaging structure and the second packaging structure through the sealing structure 320, so that the cavity between the upper surface of the heat sink 300 and the bonded first packaging structure 100 forms a fourth liquid flow channel 304, and the cavity between the lower surface of the heat sink 300 and the bonded second packaging structure 200 forms a fifth liquid flow channel 305, wherein the sealing structure 320 also has an opening (not shown), which corresponds to a liquid inflow channel and a liquid outflow channel connected to the fourth liquid flow channel 304 and the fifth liquid flow channel 305.

[0063] The fourth liquid flow channel 304 and the fifth liquid flow channel 305 cover the corresponding positions of the first chip module and the second chip module. When the liquid refrigerant enters the fourth liquid flow channel 304 and the fifth liquid flow channel 305 through the liquid inlet channel, it absorbs the heat generated by the first chip module and the second chip module, and takes the heat away as it flows out from the liquid outlet channel, thereby improving the heat dissipation efficiency.

[0064] For further information, please refer to Fig. 9The cavity between the upper surface of the heat sink 300 and the first package structure 100 that is bonded is also provided with a support block 325, and the cavity between the lower surface of the heat sink 300 and the second package structure 200 that is bonded is also provided with a support block 325. The support block 325 is block-shaped or strip-shaped, and the number is one or more. The thickness of the support block 325 is consistent with the preset height of the cavity, and the support is provided during the process of bonding and sealing the upper surface of the heat sink 300 with the first package structure and the second package structure. Through appropriate position arrangement, the support block 325 can also guide the flow direction and flow speed of the liquid refrigerant to improve the heat dissipation efficiency, and by setting one or more support blocks 325 in the middle position, it is beneficial to improve the mechanical strength of the final wafer-scale package structure and avoid warping of the wafer-scale package structure.

[0065] In one embodiment, please refer to Fig.10 The heat sink 300 may further include a heat sink body 331, an upward edge extension 332 and a downward edge extension 333 located at the edge of the heat sink, the upper surface edge and the upward edge extension 332 of the heat sink body 331 are bonded to the edge and side wall of the first packaging structure 100, and the lower surface edge and the downward edge extension 333 of the heat sink body 331 are bonded to the edge and side wall of the second packaging structure 200, so that the cavity between the upper surface of the heat sink body 331 and the bonded first packaging structure 100 forms a sixth liquid flow channel 306, and the cavity between the lower surface of the heat sink body 331 and the bonded second packaging structure 200 forms a seventh liquid flow channel 307, wherein the side wall of the heat sink also has an opening (not shown), corresponding to a liquid inflow channel and a liquid outflow channel connected to the sixth liquid flow channel 306 and the seventh liquid flow channel 307.

[0066] In this embodiment, the upper surface edge and the upper edge extension 332 of the heat sink body 331 are in contact with the edge and side wall of the first packaging structure 100, and the lower surface edge and the lower edge extension 333 of the heat sink body 331 are in contact with the edge and side wall of the second packaging structure 200. The heat sink is in an "H"-shaped structure as a whole. The first packaging structure and the second packaging structure are located in the upper and lower openings of the "H"-shaped structure, that is, the first packaging structure and the second packaging structure are pressed against the heat sink from above and below the wafer-scale packaging structure. Since the upper edge extension and the lower edge extension are in contact with the side walls of the first packaging structure and the second packaging structure, under the joint action of the upper edge extension and the lower edge extension, not only can the mounting firmness of the heat sink and the upper and lower packaging structures be improved, but also the stress of the first packaging structure and the second packaging structure can be balanced or reduced, which is beneficial to preventing the wafer-scale packaging structure (especially the large-sized wafer-scale packaging structure) from warping or deformation.

[0067] In this embodiment, the heat sink 300 with an "H"-shaped structure is integrally formed. In other embodiments, the heat sink may also be formed by laminating or bonding two upper and lower "U"-shaped heat sinks.

[0068] In one embodiment, please refer to Fig.10 , the height of the upward edge extension portion 332 of the heat dissipation plate 300 is consistent with the thickness of the first package structure 100, and the height of the downward edge extension portion 333 is consistent with the thickness of the second package structure 200. In other embodiments, the height of the upward edge extension portion 332 of the heat dissipation plate 300 is higher or lower than the thickness of the first package structure 100, and the height of the downward edge extension portion 333 is higher or lower than the thickness of the second package structure 200.

[0069] In one embodiment, please refer to Fig.10 The upper surface edge and the upward edge extension 332 of the heat sink body 331 are bonded to the edge and side wall of the first packaging structure 100 by means of a sealing structure 320 such as a sealant, and the lower surface edge and the downward edge extension 333 of the heat sink body 331 are bonded to the edge and side wall of the second packaging structure 200 by means of a sealing structure 320 such as a sealant, so that the sixth liquid flow channel 306 is formed in the cavity at the center between the upper surface of the heat sink body 331 and the bonded first packaging structure 100, and the seventh liquid flow channel 307 is formed in the cavity at the center between the lower surface of the heat sink body 331 and the bonded second packaging structure 200.

[0070] In other embodiments, the upward edge extension of the heat sink body may only be fitted with the side wall of the first packaging structure, and the downward edge extension of the heat sink body may be fitted with the side wall of the second packaging structure. By arranging support blocks on the upper and lower surfaces of the heat sink body, the entire cavity between the upper surface of the heat sink body and the fitted first packaging structure forms a sixth liquid flow channel, and the entire cavity between the lower surface of the heat sink body and the fitted second packaging structure forms a seventh liquid flow channel.

[0071] In another embodiment, the heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface of the heat sink body may also have a third liquid flow groove, and the lower surface of the heat sink body may also have a fourth liquid flow groove, the upward edge extension is bonded to the side wall of the first packaging structure by a sealing structure such as a sealant, and the downward edge extension is bonded to the side wall of the second packaging structure by a sealing structure such as a sealant, the upper surface of the heat sink body is bonded to the surface of the first plastic sealing layer, and the lower surface of the heat sink body is bonded to the surface of the second plastic sealing layer, the third liquid flow groove and the bonded surface of the first plastic sealing layer and the exposed surface of the first chip module form an eighth liquid flow channel; the fourth liquid flow groove and the bonded surface of the second plastic sealing layer and the exposed surface of the second chip module form a ninth liquid flow channel, wherein the side wall of the heat sink also has an opening, corresponding to a liquid inflow channel and a liquid outflow channel connected to the eighth liquid flow channel and the ninth liquid flow channel.

[0072] In another embodiment, the heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface and the upward edge extension of the heat sink body are bonded to the bottom surface and the side wall of the first packaging structure, the lower surface and the downward edge extension of the heat sink body are bonded to the top surface and the side wall of the second packaging structure, and the heat sink body has a tenth liquid flow channel in the middle, wherein the heat sink side wall also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the tenth liquid flow channel.

[0073] In other embodiments, the liquid flow channel corresponding to one side of the first packaging structure and the liquid flow channel corresponding to one side of the second packaging structure may be the same or different, and may be designed separately according to the type and quantity of chip modules on both sides.

[0074] It should be noted that the same or similar parts in the aforementioned embodiments of the present application are not repeated in each embodiment, and can be referenced or referred to each other.

[0075] The present application also provides a method for forming a wafer scale packaging structure. In one embodiment, reference Figure 2 , the forming method comprises: A first packaging structure 100 is provided. The first packaging structure 100 includes a first substrate 110, a first chip module 120 and a first plastic sealing layer 130. The first substrate 110 includes a first surface and a second surface opposite to each other. A plurality of discrete first chip modules 120 are mounted on the first surface of the first substrate 110. The first plastic sealing layer 130 covers the first chip module 120 and the first surface of the first substrate 110, and the first plastic sealing layer 130 exposes a surface of the first chip module 110 away from the first substrate 110. A second packaging structure 200 is provided, wherein the second packaging structure 200 includes a second substrate 210, a second chip module 220, and a second plastic sealing layer 230. The second substrate 210 includes a first surface and a second surface opposite to each other. A plurality of discrete second chip modules 220 are mounted on the first surface of the second substrate 210. The second plastic sealing layer 230 covers the second chip module 220 and the first surface of the second substrate 210, and the second plastic sealing layer 230 exposes a surface of the second chip module 220 away from the second substrate 210. Providing a heat dissipation plate 300, wherein the heat dissipation plate 300 includes an upper surface and a lower surface opposite to each other; The first packaging structure 100 is mounted on the upper surface of the heat sink 300, wherein the surface of the first plastic sealing layer 130 and the exposed surface of the first chip module 120 are in contact with the upper surface of the heat sink 300; the second packaging structure 200 is mounted on the lower surface of the heat sink 300, wherein the surface of the second plastic sealing layer 230 and the exposed surface of the second chip module 220 are in contact with the lower surface of the heat sink 300; A first interface module 140 is formed on the second surface of the first substrate 110 , and a second interface module 240 is formed on the second surface of the second substrate 210 .

[0076] Specifically, in one embodiment, please refer to Figure 2 The upper surface of the heat sink 300 has a first liquid flow groove, and the lower surface of the heat sink 300 has a second liquid flow groove. The surface of the first plastic sealing layer 130 and the exposed surface of the first chip module 120 are bonded to the upper surface of the heat sink 300, and the surface of the second plastic sealing layer 230 and the exposed surface of the second chip module 220 are bonded to the lower surface of the heat sink 300. The first liquid flow groove and the bonded surface of the first plastic sealing layer and the exposed surface of the first chip module form a first liquid flow channel; the second liquid flow groove and the bonded surface of the second plastic sealing layer and the exposed surface of the second chip module form a second liquid flow channel. The heat sink 300 uses an etching process, a carving process, or a stamping process to form a liquid flow groove on the surface of a metal heat sink, a silicon heat sink, or a graphite heat sink.

[0077] In another embodiment, please refer to Figure 6 and Figure 7 A third liquid flow channel 303 is formed in the middle of the heat dissipation plate 300. The process of forming the heat dissipation plate includes: providing a first heat sink and a second heat sink, at least one of the heat sinks having a third liquid flow groove; The first heat sink and the second heat sink are bonded or bonded together on one side of the surface having the third liquid flow groove to form a third liquid flow channel 303 in the middle of the heat sink.

[0078] In another embodiment, please refer to Figure 8 The edges of the upper surface and the lower surface of the heat sink 300 are respectively bonded to the edges of the first packaging structure 100 and the edges of the second packaging structure 200 through the sealing structure 320, so that the cavity between the upper surface of the heat sink 300 and the bonded first packaging structure 100 forms a fourth liquid flow channel 304, and the cavity between the lower surface of the heat sink 300 and the bonded second packaging structure 200 forms a fifth liquid flow channel 305, wherein the sealing structure 320 also has an opening, which corresponds to a liquid inlet channel and a liquid outlet channel connected to the fourth liquid flow channel and the fifth liquid flow channel.

[0079] The sealing structure 320 can be a sealant, a dam glue or a metal dam structure. The sealant, dam glue or metal dam structure is used to form a sealing structure 320 with a certain thickness, so that the cavity between the upper surface of the heat sink 300 and the first packaging structure 100 formed with the fourth liquid flow channel 304, and the cavity between the lower surface of the heat sink 300 and the second packaging structure 200 formed with the fifth liquid flow channel 305.

[0080] In another embodiment, please refer to Fig.10 The heat sink 300 may further include a heat sink body 331, an upward edge extension 332 and a downward edge extension 333 located at the edge of the heat sink, the upper surface edge and the upward edge extension 332 of the heat sink body 331 are bonded to the edge and side wall of the first packaging structure 100, and the lower surface edge and the downward edge extension 333 of the heat sink body 331 are bonded to the edge and side wall of the second packaging structure 200, so that the cavity between the upper surface of the heat sink body 331 and the bonded first packaging structure 100 forms a sixth liquid flow channel 306, and the cavity between the lower surface of the heat sink body 331 and the bonded second packaging structure 200 forms a seventh liquid flow channel 307, wherein the side wall of the heat sink also has an opening (not shown), corresponding to a liquid inflow channel and a liquid outflow channel connected to the sixth liquid flow channel 306 and the seventh liquid flow channel 307.

[0081] In this embodiment, the upper surface edge and the upper edge extension 332 of the heat sink body 331 are in contact with the edge and side wall of the first packaging structure 100, and the lower surface edge and the lower edge extension 333 of the heat sink body 331 are in contact with the edge and side wall of the second packaging structure 200. The heat sink is in an "H"-shaped structure as a whole. The first packaging structure and the second packaging structure are located in the upper and lower openings of the "H"-shaped structure, that is, the first packaging structure and the second packaging structure are pressed against the heat sink from above and below the wafer-scale packaging structure. Since the upper edge extension and the lower edge extension are in contact with the side walls of the first packaging structure and the second packaging structure, under the joint action of the upper edge extension and the lower edge extension, not only can the mounting firmness of the heat sink and the upper and lower packaging structures be improved, but also the stress of the first packaging structure and the second packaging structure can be balanced or reduced, which is beneficial to preventing the wafer-scale packaging structure (especially the large-sized wafer-scale packaging structure) from warping or deformation.

[0082] In this embodiment, the heat sink 300 with an "H"-shaped structure is integrally formed. In other embodiments, the heat sink may also be formed by laminating or bonding two upper and lower "U"-shaped heat sinks.

[0083] In one embodiment, please refer to Fig.10 The upper surface edge and the upper edge extension 332 of the heat sink body 331 are bonded to the edge and side wall of the first packaging structure 100 by means of a sealing structure such as a sealant, and the lower surface edge and the lower edge extension 333 of the heat sink body 331 are bonded to the edge and side wall of the second packaging structure 200 by means of a sealing structure such as a sealant. In other embodiments, it is also possible to bond only the upper edge extension of the heat sink body to the side wall of the first packaging structure, and the lower edge extension of the heat sink body to the side wall of the second packaging structure, and by providing support blocks on the upper and lower surfaces of the heat sink body, the entire cavity between the upper surface of the heat sink body and the bonded first packaging structure forms the sixth liquid flow channel, and the entire cavity between the lower surface of the heat sink body and the bonded second packaging structure forms the seventh liquid flow channel.

[0084] In another embodiment, the heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface of the heat sink body may also have a third liquid flow groove, and the lower surface of the heat sink body may also have a fourth liquid flow groove, the upward edge extension is bonded to the side wall of the first packaging structure by a sealing structure such as a sealant, and the downward edge extension is bonded to the side wall of the second packaging structure by a sealing structure such as a sealant, the upper surface of the heat sink body is bonded to the surface of the first plastic sealing layer, and the lower surface of the heat sink body is bonded to the surface of the second plastic sealing layer, the third liquid flow groove and the bonded surface of the first plastic sealing layer and the exposed surface of the first chip module form an eighth liquid flow channel; the fourth liquid flow groove and the bonded surface of the second plastic sealing layer and the exposed surface of the second chip module form a ninth liquid flow channel, wherein the side wall of the heat sink also has an opening, corresponding to a liquid inflow channel and a liquid outflow channel connected to the eighth liquid flow channel and the ninth liquid flow channel.

[0085] In another embodiment, the heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface and the upward edge extension of the heat sink body are bonded to the bottom surface and the side wall of the first packaging structure, the lower surface and the downward edge extension of the heat sink body are bonded to the top surface and the side wall of the second packaging structure, and the heat sink body has a tenth liquid flow channel in the middle, wherein the heat sink side wall also has an opening, corresponding to a liquid inlet channel and a liquid outlet channel connected to the tenth liquid flow channel.

[0086] It should be noted that the liquid flow channel corresponding to one side of the first packaging structure and the liquid flow channel corresponding to one side of the second packaging structure may be the same or different, and may be designed separately according to the type and quantity of chip modules on both sides.

[0087] It should be noted that the parts in this embodiment (formation method of wafer-scale packaging structure) that are the same or similar to those in the aforementioned embodiment (wafer-scale packaging structure) are no longer repeated in this embodiment. Please refer to the limitations or descriptions of the corresponding parts in the aforementioned embodiment for details.

[0088] Although the present application has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present application. Any technical personnel in this field can use the methods and technical contents disclosed above to make possible changes and modifications to the technical solution of the present application without departing from the spirit and scope of the present application. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are within the protection scope of the technical solution of the present application.

Claims

1. A wafer scale packaging structure, characterized in that: include: a first packaging structure, a second packaging structure and a heat sink, The heat sink comprises an upper surface and a lower surface opposite to each other, the upper surface is mounted with a first packaging structure, and the lower surface is mounted with a second packaging structure; The first packaging structure includes a first substrate, a first chip module and a first plastic sealing layer, the first substrate includes a first surface and a second surface opposite to each other, a plurality of discrete first chip modules are mounted on the first surface of the first substrate, the first plastic sealing layer covers the first chip module and the first surface of the first substrate, and the first plastic sealing layer exposes a surface of the first chip module away from the first substrate, and the surface of the first plastic sealing layer and the exposed surface of the first chip module are attached to the upper surface of the heat sink; The second packaging structure includes a second substrate, a second chip module and a second plastic sealing layer. The second substrate includes a first surface and a second surface opposite to each other. A plurality of discrete second chip modules are mounted on the first surface of the second substrate. The second plastic sealing layer covers the second chip module and the first surface of the second substrate, and the second plastic sealing layer exposes a surface of the second chip module away from the second substrate. The surface of the second plastic sealing layer and the exposed surface of the second chip module are in contact with the lower surface of the heat sink.

2. The wafer scale packaging structure according to claim 1, characterized in that: The heat sink is a liquid-cooled heat sink having a liquid flow channel, a liquid inlet channel connected to the liquid flow channel, and a liquid outlet channel for liquid refrigerant to flow through.

3. The wafer scale packaging structure according to claim 2, wherein: The upper surface of the heat sink has a first liquid flow groove, and the lower surface of the heat sink has a second liquid flow groove. The first liquid flow groove, the surface of the first plastic sealing layer bonded to the exposed surface of the first chip module form a first liquid flow channel; the second liquid flow groove, the surface of the second plastic sealing layer bonded to the exposed surface of the second chip module form a second liquid flow channel.

4. The wafer scale packaging structure according to claim 2, wherein: A third liquid flow channel is formed in the middle of the heat dissipation plate.

5. The wafer scale packaging structure according to claim 4, characterized in that: The heat sink comprises a first heat sink and a second heat sink, at least one of the heat sinks has a third liquid flow groove, and the first heat sink and the second heat sink are attached or bonded to form a third liquid flow channel in the middle of the heat sink.

6. The wafer scale packaging structure according to claim 2, characterized in that: The liquid cooling heat sink has a plurality of liquid flow channels, which respectively correspond to the positions of the first chip module and / or the second chip module.

7. The wafer scale packaging structure according to claim 2, wherein: The edges of the upper surface and the lower surface of the heat sink are respectively bonded to the edges of the first packaging structure and the edges of the second packaging structure through a sealing structure, so that the cavity between the upper surface of the heat sink and the bonded first packaging structure forms a fourth liquid flow channel, and the cavity between the lower surface of the heat sink and the bonded second packaging structure forms a fifth liquid flow channel, wherein the sealing structure also has an opening, which corresponds to a liquid inlet channel and a liquid outlet channel connected to the fourth liquid flow channel and the fifth liquid flow channel.

8. The wafer scale packaging structure according to claim 7, characterized in that: A plurality of support blocks are arranged in a cavity between the upper surface of the heat dissipation plate and the attached first packaging structure, and a plurality of support blocks are arranged in a cavity between the lower surface of the heat dissipation plate and the attached second packaging structure.

9. The wafer scale packaging structure according to claim 1 or 2, characterized in that: The heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface edge and the upward edge extension of the heat sink body are in contact with the edge and side wall of the first packaging structure, the lower surface edge and the downward edge extension of the heat sink body are in contact with the edge and side wall of the second packaging structure, or the upward edge extension of the heat sink body is in contact with the side wall of the first packaging structure, and the downward edge extension of the heat sink body is in contact with the side wall of the second packaging structure.

10. The wafer scale packaging structure according to claim 9, wherein: The upper surface of the heat sink body and the upward edge extension are bonded to the edge and side wall of the first packaging structure through a sealing structure, and the lower surface of the heat sink body and the downward edge extension are bonded to the edge and side wall of the second packaging structure through a sealing structure, so that the cavity between the upper surface of the heat sink body and the bonded first packaging structure forms a sixth liquid flow channel, and the cavity between the lower surface of the heat sink body and the bonded second packaging structure forms a seventh liquid flow channel, wherein the side wall of the heat sink also has an opening, which corresponds to a liquid inlet channel and a liquid outlet channel connected to the sixth liquid flow channel and the seventh liquid flow channel.

11. The wafer scale packaging structure according to claim 9, wherein: The upper surface of the heat sink body has a third liquid flow groove, and the lower surface of the heat sink body has a fourth liquid flow groove, and the third liquid flow groove, the surface of the first plastic sealing layer bonded to the surface and the exposed surface of the first chip module form an eighth liquid flow channel; the fourth liquid flow groove, the surface of the second plastic sealing layer bonded to the surface and the exposed surface of the second chip module form a ninth liquid flow channel, wherein the side wall of the heat sink also has an opening, which corresponds to a liquid inlet channel and a liquid outlet channel connected to the eighth liquid flow channel and the ninth liquid flow channel.

12. The wafer scale packaging structure according to claim 9, wherein: The middle of the heat sink body is provided with a tenth liquid flow channel, wherein the side wall of the heat sink also has an opening, which corresponds to a liquid inflow channel and a liquid outflow channel connected to the tenth liquid flow channel.

13. The wafer scale packaging structure according to claim 1 or 2, characterized in that: The heat sink is a metal heat sink, a silicon heat sink or a graphite heat sink.

14. The wafer scale packaging structure according to claim 1, wherein: It also includes a first interface module and a second interface module. The second surface of the first substrate has the first interface module, and the second surface of the second substrate has the second interface module. The first interface module and the second interface module are used to be electrically connected to an external power supply terminal, at least for supplying power to the first chip module and the second chip module respectively.

15. The wafer scale packaging structure according to claim 14, wherein: The first interface module and the second interface module include an interface and a power component electrically connected to the interface, the interface is electrically connected to the external power supply end through a cable, and the power component is used to reduce the external voltage input through the interface to one voltage or multiple voltages of different sizes, and supply the reduced voltage to the corresponding first chip module and the second chip module.

16. A method for forming a wafer scale packaging structure, characterized in that: include: A first packaging structure is provided, wherein the first packaging structure includes a first substrate, a first chip module and a first plastic sealing layer, wherein the first substrate includes a first surface and a second surface opposite to each other, a plurality of discrete first chip modules are mounted on the first surface of the first substrate, the first plastic sealing layer covers the first chip module and the first surface of the first substrate, and the first plastic sealing layer exposes a surface of the first chip module away from the first substrate; Providing a second packaging structure, the second packaging structure comprising a second substrate, a second chip module, and a second plastic sealing layer, the second substrate comprising a first surface and a second surface opposite to each other, a plurality of discrete second chip modules being mounted on the first surface of the second substrate, the second plastic sealing layer covering the second chip module and the first surface of the second substrate, and the second plastic sealing layer exposing a surface of the second chip module away from the second substrate; Providing a heat sink, the heat sink comprising an upper surface and a lower surface that are opposite to each other; A first packaging structure is mounted on the upper surface of the heat sink, wherein the surface of the first plastic sealing layer and the exposed surface of the first chip module are in contact with the upper surface of the heat sink; and a second packaging structure is mounted on the lower surface of the heat sink, wherein the surface of the second plastic sealing layer and the exposed surface of the second chip module are in contact with the lower surface of the heat sink.

17. The method for forming a wafer scale packaging structure according to claim 16, wherein: The upper surface of the heat sink has a first liquid flow groove, and the lower surface of the heat sink has a second liquid flow groove. The first liquid flow groove, the surface of the first plastic sealing layer bonded to the exposed surface of the first chip module form a first liquid flow channel; the second liquid flow groove, the surface of the second plastic sealing layer bonded to the exposed surface of the second chip module form a second liquid flow channel.

18. The method for forming a wafer scale packaging structure according to claim 16, wherein: A third liquid flow channel is formed in the middle of the heat dissipation plate, and the process of forming the heat dissipation plate includes: providing a first heat sink and a second heat sink, at least one of the heat sinks having a third liquid flow groove; The first heat sink and the second heat sink are bonded or bonded to each other on one side of the surface having the third liquid flow groove, so as to form a third liquid flow channel in the middle of the heat sink.

19. The method for forming a wafer scale packaging structure according to claim 16, wherein: The edges of the upper surface and the lower surface of the heat sink are respectively bonded to the edges of the first packaging structure and the edges of the second packaging structure through a sealing structure, so that the cavity between the upper surface of the heat sink and the bonded first packaging structure forms a fourth liquid flow channel, and the cavity between the lower surface of the heat sink and the bonded second packaging structure forms a fifth liquid flow channel, wherein the sealing structure also has an opening, which corresponds to a liquid inlet channel and a liquid outlet channel connected to the fourth liquid flow channel and the fifth liquid flow channel.

20. The method for forming a wafer scale packaging structure according to claim 16, wherein: The heat sink includes a heat sink body, an upward edge extension and a downward edge extension located at the edge of the heat sink, the upper surface edge and the upward edge extension of the heat sink body are in contact with the edge and side wall of the first packaging structure, the lower surface edge and the downward edge extension of the heat sink body are in contact with the edge and side wall of the second packaging structure, or the upward edge extension of the heat sink body is in contact with the side wall of the first packaging structure, and the downward edge extension of the heat sink body is in contact with the side wall of the second packaging structure.

21. The method for forming a wafer scale packaging structure according to claim 20, wherein: The edge of the upper surface of the heat sink body and the upward edge extension are fitted with the edge and side wall of the first packaging structure through a sealing structure, and the edge of the lower surface of the heat sink body and the downward edge extension are fitted with the edge and side wall of the second packaging structure through a sealing structure, so that the cavity formed between the upper surface of the heat sink body and the fitted first packaging structure forms a sixth liquid flow channel, and the cavity formed between the lower surface of the heat sink body and the fitted second packaging structure forms a seventh liquid flow channel, wherein the side wall of the heat sink also has an opening, which corresponds to a liquid inlet channel and a liquid outlet channel connected to the sixth liquid flow channel and the seventh liquid flow channel.

22. The method for forming a wafer scale packaging structure according to claim 20, wherein: The upper surface of the heat sink body has a third liquid flow groove, and the lower surface of the heat sink body has a fourth liquid flow groove, and the third liquid flow groove, the surface of the first plastic sealing layer bonded to the surface and the exposed surface of the first chip module form an eighth liquid flow channel; the fourth liquid flow groove, the surface of the second plastic sealing layer bonded to the surface and the exposed surface of the second chip module form a ninth liquid flow channel, wherein the side wall of the heat sink also has an opening, which corresponds to a liquid inlet channel and a liquid outlet channel connected to the eighth liquid flow channel and the ninth liquid flow channel.

23. The method for forming a wafer scale packaging structure according to claim 20, wherein: The middle of the heat sink body is provided with a tenth liquid flow channel, wherein the side wall of the heat sink also has an opening, which corresponds to a liquid inflow channel and a liquid outflow channel connected to the tenth liquid flow channel.

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