Transmission error measurement method of robot speed reducer
By using the phase difference characteristics between the synthetic clock signal and the harmonic reducer pulse signal, a counting gate is generated to achieve high-precision phase difference measurement, which solves the problems of low measurement accuracy and complex circuits in the prior art.
Patent Information
- Application Number
- CN202411583400.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-07
- Publication Date
- 2025-02-18
AI Technical Summary
When measuring the transmission error of the harmonic reducer in the prior art, there are problems such as complex operation circuits, high cost and low measurement accuracy due to ±1 pulse counting error.
Through the periodic change of phase difference between the synthesized clock signal and the pulse signal of the reducer output shaft and the input shaft, a counting gate is generated and the pulse count is controlled, and the entire cycle count of the synthetic clock signal and the pulse signal of the reducer output shaft is achieved, overcoming ±1 Counting error of each pulse.
High-precision phase difference measurement is realized, the circuit structure is simplified, the circuit cost is reduced, and the problem of ±1 pulse counting error is overcome.
Smart Images
Figure CN119469746A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a method for measuring a transmission error of a robot reducer, and belongs to the technical field of measuring a transmission error of a robot reducer by using a grating encoder. Background Art
[0002] The harmonic reducer is a key component of the robot. Due to the constraints of factors such as processing accuracy and assembly accuracy, the actual transmission accuracy of the harmonic reducer often fails to meet expectations. It is necessary to measure the transmission error of the harmonic reducer to provide a reference for the optimal design of the reducer.
[0003] The transmission error is measured by using a grating encoder. The grating encoder is installed on the output shaft and input shaft of the harmonic reducer respectively. The rotating angular displacement signal is converted into an electrical signal. Due to the transmission ratio, the two grating encoder output signals need to be adjusted to pulse signals of the same frequency first. Then, the transmission error of the harmonic reducer is determined by measuring the phase difference between the pulse signals. If the phase difference between the two signals changes, it means that the reducer being measured has a transmission error. The key to the entire measurement is to obtain the high-precision phase difference.
[0004] The phase difference between the two pulse signals is converted into a voltage value using a phase-sensitive demodulation circuit. This voltage value also needs to go through steps such as A / D converter sampling. This measurement method does not directly obtain the phase difference between the two pulse signals, but includes many operation circuits, such as mixing and multiplication circuits, analog-to-digital conversion circuits, etc., which will introduce other error factors. In addition, high-precision measurement requires an increase in circuit device costs, and the ordinary phase difference measurement method does not solve the ±1 pulse counting error problem of the counter. Summary of the invention
[0005] The purpose of the present invention is to provide a transmission error measurement method for a robot reducer, which utilizes the periodic change characteristics of the phase difference between the clock signal and the reducer output shaft pulse signal and the input shaft pulse signal to generate a counting gate, that is, the pulse count is controlled by the phase difference between the clock signal and the reducer output shaft pulse signal and the input shaft pulse signal. In this gate, the clock signal and the reducer output shaft pulse signal are counted as a whole cycle, and the difference in the whole cycle time of these two signals is the phase difference between the reducer output shaft pulse signal and the input shaft pulse signal. The present invention has high measurement accuracy and simple circuit structure, and solves the problems of complex operation circuits, high circuit costs, and low measurement accuracy of grating encoders when measuring transmission errors due to ±1 pulse counting errors in the background technology.
[0006] The technical solution of the present invention is:
[0007] A method for measuring transmission error of a robot reducer comprises the following steps:
[0008] Step 1: The frequency value of the synthetic clock signal f0 is a multiple of the frequency value of the reducer input shaft pulse signal f1 with a slight frequency difference.
[0009] The reducer transmission error measurement system of the present invention is aimed at measuring the phase difference between the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1. During the measurement process, the computer is required to determine the frequency value of the synthetic clock signal based on the rough measurement value of the robot reducer input shaft pulse signal f1, so that the frequency value of the synthetic clock signal is several times the frequency value of the input shaft pulse signal and has a small frequency difference Δf. The value of Δf is much smaller than the value of f1. The rough measurement of the pulse signal f1 only needs to obtain an integer value to meet the requirement that the frequency values of the two signals are in a multiple relationship. In this case, the phase difference between the two signals changes monotonically, and the phase difference between the two signals appears periodically.
[0010] For example, a pulse signal with a frequency value of 10 Hz and a pulse signal with a frequency value of 21 Hz, with the rising edge of the pulse signal as the phase comparison moment of the two frequency signals, the phase difference is 0, The 0 here means the two signals are in phase with each other. for That is, one cycle of the pulse signal with a frequency value of 21Hz, after which the phase difference between the two signals starts to be 0, The law of Figure 1 As shown, the phase difference between f0 and f1 is b0, which means the two signals coincide in phase. After the phase difference between f0 and f1 changes to b0, b1, b2, and b3 in sequence, they coincide again at time t2. This rule applies to the case where the frequency value of the clock signal is several times the frequency value of the input shaft pulse signal and there is a small frequency difference Δf. Similarly, due to the existence of the reducer transmission ratio, the input shaft has high speed and low torque, and the output shaft has low speed and high torque. The frequency value of the reducer output shaft pulse signal is proportional to the frequency value of the input shaft pulse signal. Therefore, the frequency value of the synthetic clock signal and the frequency value of the output shaft pulse signal are also multiples and have a small frequency difference. Figure 1 As shown in the figure, at time t1, the phase difference between f0 and f2 is a0, indicating that the two signals coincide with each other. The phase difference between f0 and f2 changes to a0, a1, a2, a3, a4, and then coincides with each other again. This stably changing phase difference is used to form a counting switch, which overcomes the counting error of ±1 pulse and completes high-precision phase difference measurement.
[0011] Step 2: After the computer issues a start counting command, the phase detector detects the phase difference between the synthesized clock signal f0 and the reducer output shaft pulse signal f2, and the phase detector detects the phase difference between the synthesized clock signal f0 and the reducer input shaft pulse signal f1.
[0012] As mentioned above, the change of the phase difference between signals is monotonically periodic, such as Figure 1 Among them, a0, a1, a2, a3, and a4 constitute a phase difference group, and b0, b1, b2, and b3 also constitute a phase difference group. These phase difference groups appear periodically.
[0013] Step 3: The phase detector generates a counting gate opening signal, the counter starts counting the synthetic clock signal f0, and the counter starts counting the reducer output shaft pulse signal f2.
[0014] Step 4: After the computer issues a stop counting command, the phase detector generates a counting gate closing signal, the counter stops counting the synthetic clock signal f0, and the counter stops counting the reducer output shaft pulse signal f2.
[0015] As mentioned above, the phase detector detects Figure 1 After setting the resolution of the phase detector, when the phase detector detects a phase difference value in the phase difference group, it will output a counting gate control signal. This control signal is the counter counting start signal. It is not difficult to find that the synthetic clock signal f0 and the reducer output shaft pulse signal f2 are synchronously counted. Figure 1 The time t1 in is the start time of the combined clock signal f0 and the reducer output shaft pulse signal f2. Figure 1 In the phase difference group of b0, b1, b2, b3, when another phase detector detects a phase difference value in this phase difference group, it will output a counting gate closing signal, such as Figure 1 The counting gate closing signal is generated after the counter detects the rising edge of the signal f2 and stops counting the signal f2, and the counter stops counting the synthesized clock signal f0. Figure 1 The moment t2 in is the moment when the synthetic clock signal f0 stops counting. Further analysis shows that Figure 1 As shown in the figure, the start and stop signals of the counter are generated by comparing the rising edge of the synthetic clock signal f0 with the rising edge of the reducer output shaft pulse signal and the input shaft pulse signal, that is, during the counting process, the synthetic clock signal f0 counts the entire cycle. When the computer issues a stop counting command, the counter detects the rising edge of the reducer output shaft pulse signal and stops counting the signal f2. Figure 1 The t3 moment in the figure is the stop counting moment of the reducer output shaft pulse signal f2. Similarly, the start and stop counting signals of the reducer output shaft pulse signal are also generated by its rising edge. During the counting process, the reducer output shaft pulse signal f2 performs full cycle counting. This measurement method enables the full cycle counting of the synthetic clock signal f0 and the reducer output shaft pulse signal f2 to overcome the counting error of ±1 pulse.
[0016] Step 5: Calculate the time T0 of the counting process according to the count value and cycle value of the synthetic clock signal f0, and calculate the time T2 of the counting process according to the count value and cycle value of the reducer output shaft pulse signal f2;
[0017] like Figure 1 As shown, the rising edge t1 and t2 of the synthetic clock signal f0 are the synthetic clock signal counting process time T0, and the rising edge t1 and t3 of the reducer output shaft pulse signal f2 are the reducer output shaft pulse signal counting process time T2;
[0018] Step 6: Subtract time T0 from time T2 to obtain the phase difference between the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1.
[0019] There is a phase difference between the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1, that is, the rising edge of the reducer output shaft pulse signal f2 is compared with the rising edge of the reducer input shaft pulse signal f1, such as Figure 1 As shown in the figure, the phase difference Δt between the two signals is the difference between the rising edge t3 of the reducer output shaft pulse signal f2 and the rising edge t2 of the reducer input shaft pulse signal f1. The full cycle counting overcomes the counting error of ±1 pulse and realizes the high-precision measurement of the phase difference Δt.
[0020] The main innovation of the present invention is: in the phase difference measurement between the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1, the synthesized clock signal f0 is used to compare the phase difference of the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1. When the frequency values between the signals are multiples and there is a small frequency difference relationship, a periodically stable phase difference signal is generated, and a counting switch is formed using this phase difference change characteristic, and the synthesized clock signal f0 and the reducer output shaft pulse signal f2 are respectively counted for the whole cycle pulses to overcome the counting error of ±1 pulse, and then the phase difference between the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1 is calculated. The present invention can have a wide measurement range and can count the changing pulse signal with high precision.
[0021] The positive effects of the present invention are: the instrument has a simple structure and is easy to implement. It utilizes the phase difference relationship between the synthetic clock signal f0 and the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1, and controls the pulse count by detecting the steadily changing phase difference between the signals. It not only overcomes the counting error of ±1 pulse, but also has no frequency conversion circuit and analog-to-digital conversion circuit, etc., which greatly reduces the introduction of complex circuit error factors. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Figure 1It is a schematic diagram of the change of the phase difference between pulse signals in the transmission error measurement of the present invention;
[0023] Figure 2 It is a block diagram of the transmission error measurement system of the present invention. DETAILED DESCRIPTION
[0024] The present invention provides a transmission error measurement method for a robot reducer, which utilizes the periodic variation characteristics of the phase difference between a clock signal and a reducer output shaft pulse signal and an input shaft pulse signal to generate a counting gate, that is, the pulse count is controlled by the phase difference generated between the clock signal and the reducer output shaft pulse signal and the input shaft pulse signal respectively. In this gate, the clock signal and the reducer output shaft pulse signal are counted as full cycles, and the difference in the full cycle time of the two signals is the phase difference between the reducer output shaft pulse signal and the input shaft pulse signal. The present invention has high measurement accuracy and a simple circuit structure.
[0025] like Figure 2 As shown:
[0026] In this flow measurement system, the grating encoder is used to measure, and the input shaft of the reducer obtains the pulse signal f1, and the output shaft of the reducer obtains the pulse signal f2. The computer determines the frequency value of the synthetic clock signal f0 based on the rough measurement value of the pulse signal f1 of the reducer input shaft, so that the frequency value of the synthetic clock signal f0 and the frequency value of the pulse signal f1 of the reducer input shaft are multiples and have a small frequency difference. As mentioned above, the phase difference group between the synthetic clock signal f0 and the pulse signal f1 of the reducer input shaft changes periodically, and any phase difference in the phase difference group appears periodically. The phase difference group between the synthetic clock signal f0 and the pulse signal f2 of the reducer output shaft also changes periodically, and any phase difference in the phase difference group also appears periodically.
[0027] The computer-synthesized clock signal f0 and the reducer input shaft pulse signal f1 pass through the phase detector generated by the programmable logic device CPLD. The phase detector detects the rising edge of the synthesized clock signal f0 and the reducer input shaft pulse signal f1, that is, detects the phase difference between the two signals, and then sets the phase difference resolution width of the phase detector. When the phase difference that meets the resolution width arrives, the phase detector outputs the counting gate closing signal. Similarly, the computer-synthesized clock signal f0 and the reducer output shaft pulse signal f2 pass through the phase detector generated by the CPLD. The phase detector detects the rising edge of the synthesized clock signal f0 and the reducer output shaft pulse signal f2, that is, detects the phase difference between the two signals, and sets the phase difference resolution width of the phase detector. When the phase difference that meets the resolution width arrives, the phase detector outputs the counting gate opening signal.
[0028] After the computer issues a start timing command, the counting gate open signal controls the counter generated by the CPLD to start counting the synthetic clock signal f0 and the reducer output shaft pulse signal f2 respectively. After the computer issues a stop timing command, the counter stops counting the signal f2 when it detects the rising edge of the signal f2, and the counting gate close signal controls the counter to stop counting the synthetic clock signal f0. As mentioned above, the number of pulses of the signal f0 and the signal f2 during the counting period are both integers, which overcomes the counting error of ±1 pulse and thus improves the measurement accuracy.
[0029] The computer calculates the time T0 of the counting process based on the count value and period value of the synthetic clock signal f0. The computer calculates the time T2 of the counting process based on the count value and period value of the reducer output shaft pulse signal f2, and then obtains the phase difference Δt=T0-T2 between the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1.
Claims
1. A method for measuring the transmission error of a robot reducer, characterized in that: The method comprises the following steps: Step 1: The frequency value of the synthesized clock signal f0 is a multiple of the frequency value of the reducer input shaft pulse signal f1 with a slight frequency difference; Step 2: After the computer issues a start counting command, the phase detector detects the phase difference between the synthesized clock signal f0 and the reducer output shaft pulse signal f2, and the phase detector detects the phase difference between the synthesized clock signal f0 and the reducer input shaft pulse signal f1; Step 3: The phase detector generates a counting gate opening signal, the counter starts to count the synthetic clock signal f0, and the counter starts to count the reducer output shaft pulse signal f2; Step 4: After the computer issues a stop counting command, the phase detector generates a counting gate closing signal, the counter stops counting the synthetic clock signal f0, and the counter stops counting the reducer output shaft pulse signal f2; Step 5: Calculate the time T0 of the counting process according to the count value and cycle value of the synthetic clock signal f0, and calculate the time T2 of the counting process according to the count value and cycle value of the reducer output shaft pulse signal f2; Step 6: Subtract time T0 from time T2 to obtain the phase difference between the reducer output shaft pulse signal f2 and the reducer input shaft pulse signal f1.