Refresh control circuit and memory device including same
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first embodiment
[0061]FIG. 5A is a diagram illustrating the operation of the memory device, according to the
[0062]FIG. 5A illustrates the case in which an active operation of the memory bank BK0 is performed between a refresh command REFC1 and the previous refresh command (not illustrated in FIG. 5A) (ACT_OP), and not between the refresh command REFC1 and the refresh command REFC2.
[0063]Since the active operation of the memory bank BK0 was performed between the refresh command REFC1 and the previous refresh command, normal refresh operations NR1 and NR2 and target refresh operations TR1 and TR2 may be performed in the memory bank BK0 in response to the refresh command REFC1. When the address stored in the address storage unit 410_0 corresponds to the word line WL111, the word line WL112 may be refreshed during the first target refresh TR1 and the word line WL110 may be refreshed during the second target refresh TR2, or vice versa.
[0064]Since the active operation of the memory bank BK0 was not perfo...
second embodiment
[0065]FIG. 5B is a diagram illustrating the operation of the memory device, according to the
[0066]FIG. 5B illustrates the case in which an active operation of the memory bank BK0 is performed between the refresh command REFC1 and the previous refresh command (not illustrated in FIG. 5B) (ACT_OP), and not between the refresh command REFC1 and the refresh command REFC2.
[0067]The refresh operation performed in the memory bank BK0 in response to the refresh command REFC1 may be performed in the same manner as described with reference to FIG. 5A.
[0068]Since the active operation of the memory bank BK0 was not performed between the refresh command REFC1 and the refresh command REFC2, only normal refresh operations NR1, NR2, and NR3 may be performed in the memory bank BK0 in response to the refresh command REFC2, and not any target refresh operations. When a target refresh operation is not to be performed, the memory device according to the second embodiment may perform a normal refresh ope...
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