Optimizing segment access in binary translation

a segment access and binary translation technology, applied in the field of binary translation, can solve the problems of ol code that runs significantly slower than the unmodified il code, and guests may also be restricted from accessing specific peripheral devices,

Active Publication Date: 2012-11-20
VMWARE INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach enhances the efficiency of runtime translations by reducing the number of steps required for validating memory access requests, improving the performance of binary translation in virtualized environments.

Problems solved by technology

Guests may also be restricted from accessing specific peripheral devices, or may be limited to a subset of the device's native capabilities, depending on the hardware access policy implemented by the virtualization host.
In a virtualized system, these privileged instructions often cannot be executed unmodified.
As is known, the binary translation of some instructions or some series of instructions requires nontrivial code transformation, possibly resulting in OL code that runs significantly slower than the unmodified IL code would have done.
Further, the cost of the translation process itself also matters when using dynamic translation, but usually to a much lesser degree as code is generally translated once but executed many times.
From the perspective of a binary translator, verifying the access to a segment's memory is complicated as hardware segmentation in OL cannot be used because OL, unlike IL, in most cases, almost certainly will not have segmentation.

Method used

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  • Optimizing segment access in binary translation
  • Optimizing segment access in binary translation
  • Optimizing segment access in binary translation

Examples

Experimental program
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Embodiment Construction

[0046]In applications that access segmented memory it has been observed that: a) verifying the access to a segment's memory is relatively complicated, and b) it is much more frequent to access a segment's memory than it is to assign a segment selector to a segment register.

[0047]When a selector is assigned to a segment register, the corresponding descriptor is cached for later access.

[0048]For example (using x86 syntax):

[0049]mov⁢⁢%⁢⁢fs,%⁢⁢ax⁢;set⁢⁢segment⁢⁢register⁢⁢%⁢⁢fs⁢⁢to⁢⁢the⁢⁢selector⁢⁢found⁢⁢in⁢⁢%⁢⁢ax⁢;and⁢⁢cache⁢⁢the⁢⁢corresponding⁢⁢descriptor⁢⁢from⁢⁢the⁢;descriptor⁢⁢table⁢⁢in⁢⁢memory

[0050]The caching of the descriptor happens once per execution of the “mov % fs, % ax” instruction. Subsequently, and possibly repeatedly, the register % fs can be used to access memory. At the time of the memory access, however, it does not matter what selector value is in % fs and it does not matter whether the descriptor is even present in memory anymore. As will be described below, the info...

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Abstract

A mechanism for a binary translator to emit code that will pre-generate information about a memory segment when a segment selector is assigned to a segment register. The binary translator emits code that will be executed when a memory access using that segment register is encountered and the emitted code will access the pre-generated information when evaluating the memory access request. Memory accesses, where a number of bytes being accessed is less than or equal to a predetermined value, are validated with a number of steps in the code emitted by the binary translator.

Description

FIELD OF THE INVENTION[0001]Embodiments of the present invention relate generally to the field of binary translation in virtualized computer systems and, more specifically, to translating and verifying segmented memory accesses.BACKGROUND OF THE INVENTION[0002]In computing, virtualization hides the physical characteristics of a computing platform from the users. A user sees an abstract, emulated, computing platform and is unaware that applications are not running directly on the underlying hardware.[0003]In a virtualized system a virtual machine creates “a simulated computer environment” for its guest software. The guest software may include user applications and complete operating systems. The guest software executes as if it were running directly on the underlying physical hardware and is, otherwise, unaware that it is operating in a virtualized environment. To provide isolation between virtual machines and between virtual machines and host software, most virtualized systems contr...

Claims

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Application Information

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Patent Type & AuthorityPatents(United States)
IPC IPC(8): G06F12/00
CPCG06F9/45516G06F9/45558G06F2009/45583
InventorKNIPPEL, ROSS CHARLESSHELDON, JEFFREY W.AGESEN, OLE
OwnerVMWARE INC