A CPU surge accident processing method and device

Abstract

The present invention discloses a method and device for handling a CPU surge accident, and relates to the field of computer technology. A specific implementation of the method includes monitoring the total CPU utilization of a target device, and when the total CPU utilization is higher than a preset threshold, starting an accident location program; obtaining all process identifiers and corresponding CPU utilizations on the target device, and sorting the process identifiers according to the CPU utilization to obtain a preset first number of process identifiers; based on the preset first number of process identifiers, finding the thread resource occupancy rate within each process, and sorting all thread identifiers according to the resource occupancy rate to obtain a preset second number of thread identifiers; exporting the thread stack data of the application, and then locating the accident point in the thread stack according to the thread identifier to eliminate the accident. Thus, the implementation of the present invention can solve the problem that CPU surge problems cannot be automatically located and need to be repeatedly processed, which is inefficient.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method and device for handling a CPU surge accident. Background Art

[0002] With the penetration and popularity of mobile Internet, people now have a demand for Internet services 24 / 7. Therefore, Internet companies' services need to be online all the time and provide stable capabilities. Under the requirement of 24 / 7 online service provision, the possibility of CPU surge and service unavailability due to various reasons is getting higher and higher, and the time of occurrence is also more random.

[0003] In the process of implementing the present invention, the inventors found that there are at least the following problems in the prior art:

[0004] However, there is a special feature of CPU surge, which is that the context at the time is needed for troubleshooting. When a CPU surge occurs, it is more based on manual methods, logging into the machine and manually executing commands to record the accident context and conduct offline analysis. Especially at night or when the on-duty personnel do not respond in time, the accident context is fleeting and cannot be captured.

[0005] Therefore, when the above accidents occur, it is difficult to accurately locate and repair them, which leads to repeated accidents and causes great losses to the normal business operations of the company. Summary of the invention

[0006] In view of this, an embodiment of the present invention provides a method and device for handling a CPU surge accident, which can solve the problem that CPU surge problems cannot be automatically located and need to be repeatedly handled, resulting in low efficiency.

[0007] To achieve the above-mentioned purpose, according to one aspect of an embodiment of the present invention, a method for handling a CPU surge accident is provided, including monitoring the total CPU utilization of a target device, and when the total CPU utilization is higher than a preset threshold, starting an accident location program; obtaining all process identifiers and corresponding CPU utilizations on the target device, and sorting the process identifiers according to the CPU utilization to obtain a preset first number of process identifiers; based on the preset first number of process identifiers, searching for the thread resource occupancy rate within each process, and sorting all thread identifiers according to the resource occupancy rate to obtain a preset second number of thread identifiers; exporting the thread stack data of the application, and then locating the accident point in the thread stack according to the thread identifier to eliminate the accident.

[0008] Optionally, locating the accident point in the thread stack according to the thread identifier includes:

[0009] According to the thread identifier, the corresponding method is matched in the thread stack data to obtain the method fragment, thereby locating the accident point.

[0010] Optionally, it also includes:

[0011] Generate a mapping relationship between a process identifier, a thread identifier, and a method fragment, and store the mapping relationship on a hard disk or upload it to a cloud server; wherein the method fragment includes a method line number and a method stack data list.

[0012] Optionally include:

[0013] Use TOP to list all process IDs and their corresponding CPU utilization on the target device, and sort the process IDs according to CPU utilization.

[0014] In addition, according to one aspect of an embodiment of the present invention, a CPU surge accident handling device is provided, including a monitoring module for monitoring the total CPU utilization of a target device, and starting an accident location program when the total CPU utilization is higher than a preset threshold; an acquisition module for acquiring all process identifiers and corresponding CPU utilizations on the target device, so as to sort the process identifiers according to the CPU utilization to obtain a preset first number of process identifiers; based on the preset first number of process identifiers, searching for thread resource occupancy within each process, so as to sort all thread identifiers according to the resource occupancy to obtain a preset second number of thread identifiers; a positioning module for exporting thread stack data of an application, and then locating the accident point in the thread stack according to the thread identifier to eliminate the accident.

[0015] Optionally, the positioning module locates the accident point in the thread stack according to the thread identifier, including:

[0016] According to the thread identifier, the corresponding method is matched in the thread stack data to obtain the method fragment, thereby locating the accident point.

[0017] Optionally, the positioning module is further used to:

[0018] Generate a mapping relationship between a process identifier, a thread identifier, and a method fragment, and store the mapping relationship on a hard disk or upload it to a cloud server; wherein the method fragment includes a method line number and a method stack data list.

[0019] Optionally, the acquisition module is further used to:

[0020] Use TOP to list all process IDs and their corresponding CPU utilization on the target device, and sort the process IDs according to CPU utilization.

[0021] According to another aspect of an embodiment of the present invention, there is further provided an electronic device, including:

[0022] one or more processors;

[0023] a storage device for storing one or more programs,

[0024] When the one or more programs are executed by the one or more processors, the one or more processors implement the method described in any of the above computing embodiments.

[0025] According to another aspect of an embodiment of the present invention, a computer-readable medium is provided, on which a computer program is stored. When the program is executed by a processor, any of the above-mentioned methods based on the computing embodiment is implemented.

[0026] One embodiment of the above invention has the following advantages or beneficial effects: the present invention monitors the total CPU utilization of the target device, and when the total CPU utilization is higher than the preset threshold, starts the accident location program; obtains all process identifiers and corresponding CPU utilizations on the target device, and sorts the process identifiers according to the CPU utilization to obtain a preset first number of process identifiers; based on the preset first number of process identifiers, searches for thread resource occupancy in each process, and sorts all thread identifiers according to the resource occupancy to obtain a preset second number of thread identifiers; exports the thread stack data of the application, and then locates the accident point in the thread stack according to the thread identifier to eliminate the accident. Therefore, the present invention can quickly locate CPU surge problems in an automated manner, greatly improving processing efficiency.

[0027] The further effects of the above-mentioned non-conventional optional manner will be described below in conjunction with the specific implementation manner. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings are used to better understand the present invention and do not constitute an improper limitation of the present invention.

[0029] Figure 1 Schematic diagram of the main process of the CPU surge accident processing method according to the first embodiment of the present invention

[0030] Figure 2 is a schematic diagram of the main process of a method for handling a CPU surge accident according to a second embodiment of the present invention;

[0031] Figure 3 is a schematic diagram of main modules of a device for handling a CPU surge accident according to an embodiment of the present invention;

[0032] Figure 4 is an exemplary system architecture diagram to which embodiments of the present invention may be applied;

[0033] Figure 5It is a schematic diagram of the structure of a computer system of a terminal device or a server suitable for implementing an embodiment of the present invention. DETAILED DESCRIPTION

[0034] The following is a description of exemplary embodiments of the present invention in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0035] Figure 1 1 is a schematic diagram of the main process of a method for handling a CPU surge accident according to a first embodiment of the present invention. The method for handling a CPU surge accident may include:

[0036] Step S101, monitoring the total CPU utilization of the target device, when the total CPU utilization is higher than a preset threshold, starting the accident location program.

[0037] In an embodiment, the CPU surge described in the present invention refers to a situation in which the CPU utilization of a device soars from a normal value to a very high value, thereby causing the code deployed on the device to fail to run normally, thereby causing a crash.

[0038] Preferably, steps S101 to S104 can be packaged into a shell script, and then a monitoring mechanism can be formed through the capability of crontab, thereby completing the entire high-fidelity, automated storage and analysis capabilities of the accident scene. Furthermore, the automated storage program can be configured through crontab and run regularly at preset time intervals.

[0039] Among them, crontab is a running, configurable scheduled task execution manager. It can perform scheduled scheduling management on any executable file or program. Shell script is a command script under the system. Users can write batch programs based on existing commands and integrate commands that need to be called manually.

[0040] Step S102: Acquire all process identifiers and corresponding CPU utilizations on the target device, sort the process identifiers according to the CPU utilizations, and obtain a preset first number of process identifiers.

[0041] Preferably, all process identifiers and corresponding CPU utilizations on the target device are listed through TOP naming, so as to sort the process identifiers according to CPU utilization. Among them, TOP naming is a system monitoring command, which can provide monitoring of system resource usage by process and thread in the process. The monitoring content includes the memory occupied by the process or thread, CPU usage, etc., and also provides various sorting, data output and other capabilities.

[0042] Step S103: based on a preset first number of process identifiers, searching for thread resource occupancy rates in each process, and sorting all thread identifiers according to the resource occupancy rates to obtain a preset second number of thread identifiers.

[0043] Step S104, exporting the thread stack data of the application, and then locating the accident point in the thread stack according to the thread identifier to eliminate the accident.

[0044] Preferably, when locating the accident point, the corresponding method can be matched in the thread stack data according to the thread identifier to obtain the method fragment.

[0045] In an embodiment, the thread stack data of an application includes a thread identifier, all methods currently running in each thread, and corresponding method line numbers. For example (tid is a thread identifier):

[0046] "thread name"prio=0tid=0x0 nid=0x0 runnable

[0047] at java.net.SocketInputStream.socketRead0(Native Method)

[0048] at java.net.SocketInputStream.socketRead(SocketInputStream.java:116)at java.net.SocketInputStream.read(SocketInputStream.java:171)

[0049] By exporting the thread stack data of the application to match the above-ordered thread identifiers (such as thread IDs), it is possible to determine which code segment the thread that occupies the most resources is constantly running, and the accident point can be quickly located by analyzing the code.

[0050] Furthermore, after executing step S104, a mapping relationship between a process ID, a thread ID, and a method fragment can be generated, and the mapping relationship can be stored on a hard disk or uploaded to a cloud server, that is, the mapping data can be persisted and will not be lost. The method fragment includes a method line number and a method stack data list.

[0051] Therefore, the CPU surge accident handling method proposed in the present invention can monitor the CPU usage rate, automatically judge the resource occupancy rate of the process and the corresponding thread, and integrate and analyze the data of the process, thread and thread detailed stack. Therefore, the present invention can automate repetitive work, thereby improving efficiency and reducing costs. In addition, the context of the problem is automatically saved and data is analyzed, which increases the probability of problem location and ensures the stability of Internet enterprise business.

[0052] Figure 2 2 is a schematic diagram of the main process of a method for handling a CPU surge accident according to a second embodiment of the present invention. The method for handling a CPU surge accident may include:

[0053] Step S201, monitor the total CPU utilization of the target device, and when the total CPU utilization is higher than a preset threshold, start the accident location program.

[0054] Preferably, steps S201 to S206 can be packaged to form a shell script, and then a monitoring mechanism can be formed through the capability of crontab, so as to complete the entire high-fidelity, automated storage and analysis capabilities of the accident scene. Further, the shell script can be automatically saved through crontab configuration, and the shell script can be regularly run at a preset time interval. The time interval can be configured according to the actual situation, for example, the time interval is set to 5 seconds.

[0055] It is worth mentioning that the time interval, threshold, first quantity, second quantity, etc. can all be configured in the shell script.

[0056] In other words, by configuring the entire process as an automated script through crontab, it has the ability to run on a scheduled basis. This capability ensures that the CPU utilization of the target device can be monitored regularly and actively, and ensures that when the CPU utilization is abnormal, it can break through the limitations of time and place and respond immediately, providing a realistic on-site environment.

[0057] Step S202: List all process identifiers and corresponding CPU utilizations on the target device by TOP naming, and sort the process identifiers from large to small according to the CPU utilization to obtain a preset first number of process identifiers.

[0058] Step S203, based on a preset first number of process identifiers, searching for thread resource occupancy rates in each process, and sorting all thread identifiers from large to small according to the resource occupancy rates to obtain a preset second number of thread identifiers.

[0059] In an embodiment, the top ten process identifiers of CPU utilization (for example, process IDs are used as process identifiers) can be extracted, and the ability of thread resource occupancy in the process can be checked based on the TOP command, and the resource occupancy of the top ten threads corresponding to the process identifiers can be output. For example, the output data format is as follows:

[0060]

[0061] The thread id is used as the thread identifier.

[0062] Step S204: export the thread stack data of the application, and match the corresponding method based on the thread identifier to obtain the method fragment.

[0063] Step S205, generating a mapping relationship between a process identifier, a thread identifier and a method fragment, and storing the mapping relationship in a hard disk or uploading it to a cloud server.

[0064] The method fragment includes a method line number and a method stack data list.

[0065] For example, the mapping relationship is:

[0066]

[0067] Step S206: locating the accident point according to the mapping relationship to eliminate the accident.

[0068] Figure 3 Schematic diagram of main modules of the CPU surge accident processing device according to an embodiment of the present invention. Figure 3 As shown, the CPU surge accident handling device 300 includes monitoring modules 301, 302 and a positioning module 303. Among them, the monitoring module 301 monitors the total CPU utilization of the target device, and when the total CPU utilization is higher than the preset threshold, the accident positioning program is started; the acquisition module 302 acquires all process identifiers and corresponding CPU utilizations on the target device, and sorts the process identifiers according to the CPU utilization to obtain a preset first number of process identifiers; based on the preset first number of process identifiers, the thread resource occupancy rate in each process is searched, and all thread identifiers are sorted according to the resource occupancy rate to obtain a preset second number of thread identifiers; the positioning module 303 exports the thread stack data of the application, and then locates the accident point in the thread stack according to the thread identifier to eliminate the accident.

[0069] Preferably, when locating the accident point in the thread stack according to the thread identifier, the positioning module 303 can match the corresponding method in the thread stack data according to the thread identifier to obtain the method fragment, thereby locating the accident point.

[0070] Furthermore, the positioning module 303 can also generate a mapping relationship between a process identifier, a thread identifier and a method fragment, so as to store the mapping relationship on a hard disk or upload it to a cloud server; wherein the method fragment includes a method line number and a method stack data list.

[0071] As another embodiment, the acquisition module 302 lists all process identifiers and corresponding CPU utilizations on the target device through TOP naming, so as to sort the process identifiers according to the CPU utilizations.

[0072] It should be noted that the CPU surge accident processing method and the CPU surge accident processing device described in the present invention have a corresponding relationship in terms of specific implementation contents, so the repeated contents will not be described again.

[0073] Figure 4 An exemplary system architecture 400 is shown to which a CPU surge accident processing method or a CPU surge accident processing device according to an embodiment of the present invention can be applied.

[0074] like Figure 4 As shown, system architecture 400 may include terminal devices 401, 402, 403, network 404 and server 405. Network 404 is used to provide a medium for communication links between terminal devices 401, 402, 403 and server 405. Network 404 may include various connection types, such as wired, wireless communication links or optical fiber cables, etc.

[0075] Users can use terminal devices 401, 402, 403 to interact with server 405 through network 404 to receive or send messages, etc. Various communication client applications can be installed on terminal devices 401, 402, 403, such as shopping applications, web browser applications, search applications, instant messaging tools, email clients, social platform software, etc. (only as examples).

[0076] The terminal devices 401, 402, 403 may be various electronic devices having a CPU surge accident processing screen and supporting web browsing, including but not limited to smart phones, tablet computers, laptop computers, desktop computers, and the like.

[0077] The server 405 may be a server that provides various services, such as a backend management server (only an example) that provides support for shopping websites browsed by users using the terminal devices 401, 402, and 403. The backend management server may analyze and process the received data such as product information query requests, and feed back the processing results (such as target push information, product information - only an example) to the terminal device.

[0078] It should be noted that the CPU surge accident handling method provided in the embodiment of the present invention is generally executed by the server 405 , and accordingly, the computing device is generally arranged in the server 405 .

[0079] It should be understood that Figure 4 The number of terminal devices, networks and servers in the embodiment is only for illustration. Any number of terminal devices, networks and servers may be provided according to implementation requirements.

[0080] Reference below Figure 5 , which shows a schematic diagram of the structure of a computer system 500 of a terminal device suitable for implementing an embodiment of the present invention. Figure 5 The terminal device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present invention.

[0081] like Figure 5 As shown, the computer system 500 includes a central processing unit (CPU) 501, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 502 or a program loaded from a storage part 508 into a random access memory (RAM) 503. In the RAM 503, various programs and data required for the operation of the system 500 are also stored. The CPU 501, the ROM 502, and the RAM 503 are connected to each other via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.

[0082] The following components are connected to the I / O interface 505: an input section 506 including a keyboard, a mouse, etc.; an output section 507 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 508 including a hard disk, etc.; and a communication section 509 including a network interface card such as a LAN card, a modem, etc. The communication section 509 performs communication processing via a network such as the Internet. A drive 510 is also connected to the I / O interface 505 as needed. A removable medium 511, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 510 as needed, so that a computer program read therefrom is installed into the storage section 508 as needed.

[0083] In particular, according to the embodiments disclosed in the present invention, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present invention include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication part 509, and / or installed from the removable medium 511. When the computer program is executed by the central processing unit (CPU) 501, the above-mentioned functions defined in the system of the present invention are executed.

[0084] It should be noted that the computer-readable medium shown in the present invention may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present invention, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In the present invention, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. This propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0085] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present invention. In this regard, each box in the flow chart or block diagram can represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0086] The modules involved in the embodiments of the present invention may be implemented by software or hardware. The modules described may also be set in a processor. For example, it may be described as follows: a processor includes a monitoring module, an acquisition module, and a positioning module. The names of these modules do not, in some cases, constitute limitations on the modules themselves.

[0087] As another aspect, the present invention also provides a computer-readable medium, which may be included in the device described in the above embodiment; or it may exist independently and not be assembled into the device. The above computer-readable medium carries one or more programs, and when the above one or more programs are executed by a device, the device includes: monitoring the total CPU utilization of the target device, and when the total CPU utilization is higher than the preset threshold, starting the accident location program; obtaining all process identifiers and corresponding CPU utilizations on the target device, and sorting the process identifiers according to the CPU utilization to obtain a preset first number of process identifiers; based on the preset first number of process identifiers, searching for the thread resource occupancy rate in each process, and sorting all thread identifiers according to the resource occupancy rate to obtain a preset second number of thread identifiers; exporting the thread stack data of the application, and then locating the accident point in the thread stack according to the thread identifier to eliminate the accident.

[0088] The technical solution according to the embodiment of the present invention can solve the problem that CPU surge problems cannot be automatically located and need to be repeatedly processed, resulting in low efficiency.

[0089] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may occur depending on design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for handling a CPU surge accident, characterized in that: include: Monitor the total CPU utilization of the target device. When the total CPU utilization exceeds the preset threshold, start the accident location program. Obtaining all process identifiers and corresponding CPU utilizations on the target device, and sorting the process identifiers according to the CPU utilizations to obtain a preset first number of process identifiers; Based on a preset first number of process identifiers, searching for thread resource occupancy rates within each process, and sorting all thread identifiers according to the resource occupancy rates to obtain a preset second number of thread identifiers; Exporting thread stack data of the application, and then locating the accident point in the thread stack according to the thread identifier to eliminate the accident; The accident point in the thread stack is located according to the thread identifier, including: matching the corresponding method in the thread stack data according to the thread identifier to obtain a method fragment including a method line number and a method stack data list, and locating the accident point according to the mapping relationship between the process identifier, the thread identifier and the method fragment.

2. The method according to claim 1, characterized in that Also includes: Generate a mapping relationship between the process identifier, the thread identifier and the method fragment, and store the mapping relationship on a hard disk or upload it to a cloud server.

3. The method according to claim 1, characterized in that include: Use TOP to list all process IDs and their corresponding CPU utilization on the target device, and sort the process IDs according to CPU utilization.

4. A CPU surge accident processing device, characterized in that: include: The monitoring module is used to monitor the total CPU utilization of the target device. When the total CPU utilization is higher than the preset threshold, the accident location program is started; An acquisition module is used to acquire all process identifiers and corresponding CPU utilizations on the target device, to sort the process identifiers according to the CPU utilizations, and obtain a preset first number of process identifiers; based on the preset first number of process identifiers, find the thread resource occupancy rate in each process, to sort all thread identifiers according to the resource occupancy rate, and obtain a preset second number of thread identifiers; A positioning module, used for exporting thread stack data of the application, and then locating the accident point in the thread stack according to the thread identifier to eliminate the accident; The positioning module locates the accident point in the thread stack according to the thread identifier, including: matching the corresponding method in the thread stack data according to the thread identifier to obtain a method fragment including a method line number and a method stack data list, and locating the accident point according to the mapping relationship between the process identifier, the thread identifier and the method fragment.

5. The device according to claim 4, characterized in that The positioning module is also used for: Generate a mapping relationship between the process identifier, the thread identifier and the method fragment, and store the mapping relationship on a hard disk or upload it to a cloud server.

6. The device according to claim 4, characterized in that The acquisition module is further used for: Use TOP to list all process IDs and their corresponding CPU utilization on the target device, and sort the process IDs according to CPU utilization.

7. An electronic device, characterized in that: include: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 3.

8. A computer readable medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 3 is implemented.

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