Epitaxial substrate for semiconductor device and semiconductor device

Abstract

The present invention provides an epitaxial substrate for a semiconductor element with suppressed leakage current and high withstand voltage, and a semiconductor element. The epitaxial substrate for a semiconductor element includes: a semi-insulating self-supporting substrate including GaN doped with Zn, a buffer layer including a Group 13 nitride adjacent to the self-supporting substrate, a channel layer including a Group 13 nitride adjacent to the buffer layer, and a barrier layer including a Group 13 nitride disposed on the opposite side of the buffer layer with the channel layer sandwiched therebetween, wherein a portion of a first region including the self-supporting substrate and the buffer layer is 1×10 17 cm ‑3 The second region contains Si at a concentration of 10×10 17 cm ‑3 .

Description

[0001] This application is a divisional application of the invention patent application with application number 2016800596572 (international application number PCT / JP2016 / 079616), application date October 5, 2016, and invention name "Epitaxial substrate for semiconductor element, semiconductor element and method for manufacturing epitaxial substrate for semiconductor element". Technical Field

[0002] The present invention relates to a semiconductor device, and more particularly to a semiconductor device constructed using a semi-insulating GaN-containing self-supporting substrate. Background Art

[0003] Nitride semiconductors have been used as semiconductor materials for light-emitting devices such as LEDs and LDs, and high-frequency / high-power electronic devices because of their direct-transition wide band gap, high breakdown electric field, and high saturation electron velocity.

[0004] As a representative structure of nitride electronic devices, there is a high electron mobility transistor (HEMT) structure that uses AlGaN as a "barrier layer" and GaN as a "channel layer" to form a stack. This structure uses the following characteristics: the strong polarization effect (spontaneous polarization effect and piezoelectric polarization effect) unique to nitride materials generates a high-concentration two-dimensional electron gas at the AlGaN / GaN stacking interface.

[0005] Nitride electronic devices are generally made using commercially available heterogeneous material base substrates such as sapphire, SiC, and Si. However, there is a problem that many defects are generated in GaN films grown heteroepitaxially on these heterogeneous material substrates due to the differences in lattice constants or thermal expansion coefficients between GaN and the heterogeneous material substrates.

[0006] On the other hand, when a GaN film is homoepitaxially grown on a GaN substrate, the above-mentioned defects due to the difference in lattice constant or thermal expansion coefficient do not occur, and the GaN film exhibits good crystallinity.

[0007] Therefore, when a nitride HEMT structure is fabricated on a GaN substrate, the mobility of the two-dimensional electron gas present at the AlGaN / GaN stacking interface is improved, and thus it can be expected that the characteristics of a HEMT device (semiconductor device) fabricated using this structure will be improved.

[0008] However, the commercially available GaN substrate produced by the hydride vapor phase epitaxy method (HVPE method) generally exhibits n-type conductivity due to oxygen impurities introduced into the crystal. The conductive GaN substrate becomes a leakage current path between the source and drain electrodes when the HEMT element is driven at a high voltage. Therefore, it is preferable to use a semi-insulating GaN substrate to produce a HEMT element.

[0009] In order to realize a semi-insulating GaN substrate, it is known that doping a GaN crystal with an element that forms a deep acceptor level, such as a transition metal element (eg, Fe) or a Group 2 element (eg, Mg), is effective.

[0010] It is known that by selecting zinc (Zn) from the second main group elements, a high-quality semi-insulating GaN single crystal substrate can be realized (for example, see Patent Document 1). In addition, there is also a known scheme of preventing Fe from entering the electron transit layer by forming a high-resistance layer doped with iron (Fe) as a transition metal element on the substrate and then forming an intermediate layer with a high Fe introduction effect between the high-resistance layer and the electron transit layer (for example, see Patent Document 2).

[0011] HEMT structures have been fabricated on semi-insulating GaN substrates or substrates with semi-insulating GaN films, and various characteristics have been evaluated (for example, see Non-Patent Documents 1 to 3).

[0012] When a nitride film is epitaxially grown on a semi-insulating GaN substrate, silicon (Si) elements are introduced from the outside to the interface between the semi-insulating GaN substrate and the nitride film (nitride epitaxial film). The silicon (residual silicon) acts as a donor element, thereby generating a conductive layer at the nitride film / substrate interface. This conductive layer acts as a leakage path for drain-source current in the HEMT element, thus causing a decrease in pinch-off characteristics and a decrease in breakdown voltage.

[0013] Prior art literature

[0014] Patent Literature

[0015] Patent Document 1: Japanese Patent No. 5039813

[0016] Patent Document 2: Japanese Patent Application Publication No. 2013-74211

[0017] Non-patent literature

[0018] Non-patent document 1: Yoshinori Oshimura, Takayuki Sugiyama, Kenichiro Takeda, Motoaki Iwaya, Tetsuya Takeuchi, Satoshi Kamiyama, Isamu Akasaki, and HiroshiAmano, "AlGaN / GaN Heterostructure Field-Effect Transistors on Fe-Doped GaNSubstrates with High Breakdown Voltage", Japanese Journal of Applied Physics,vol.50(2011),p.084102-1-p.084102-5.

[0019] Non-patent document 2: V.Desmaris, M.Rudzinski, N.Rorsman, PRHageman, PKLarsen, H.Zirath, TCRodle, and HFFJos, "Comparison of the DC and MicrowavePerformance of AlGaN / GaN HEMTs Grown on SiC by MOCVD With Fe-Doped or Unintentionally Doped GaN Buffer Layers", IEEE Transactions on ElectronDevices, Vol.53, No.9, pp.2413-2417, September 2006.

[0020] Non-patent document 3: M.Azize, Z.Bougrioua, and P.Gibart, "Inhibition of interfacepollution in AlGaN / GaN HEMT structures regrown on semi-insulating GaNtemplates", Journal of Crystal Growth vol.299 (2007) p.103-p.108. Summary of the invention

[0021] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide an epitaxial substrate for a semiconductor element having a high withstand voltage and suppressing leakage current.

[0022] In order to solve the above-mentioned problems, the first scheme of the present invention is an epitaxial substrate for a semiconductor element, comprising: a semi-insulating self-supporting substrate comprising GaN doped with Zn, a buffer layer comprising a Group 13 nitride adjacent to the self-supporting substrate, a channel layer comprising a Group 13 nitride adjacent to the buffer layer, and a barrier layer comprising a Group 13 nitride disposed on the opposite side of the buffer layer with the channel layer sandwiched therebetween, wherein a portion of the first region including the self-supporting substrate and the buffer layer is 1×10 17 cm -3 The second region contains Si at a concentration of 10×10 17 cm -3 .

[0023] A second aspect of the present invention is the epitaxial substrate for a semiconductor device according to the first aspect, wherein the second region exists in the first region so as to include an interface between the independent substrate and the buffer layer.

[0024] A third aspect of the present invention is the epitaxial substrate for a semiconductor device according to the first or second aspect, wherein the buffer layer comprises GaN, the channel layer comprises GaN, and the barrier layer comprises AlGaN.

[0025] The fourth scheme of the present invention is: in the epitaxial substrate for semiconductor elements of the first or second scheme, the above-mentioned buffer layer is a multilayer buffer layer or a composition gradient buffer layer, the above-mentioned multilayer buffer layer is formed by stacking two or more Group 13 nitride layers of different compositions, the above-mentioned composition gradient buffer layer contains Group 13 nitrides containing two or more Group 13 elements and the existence ratio of the Group 13 elements varies in the thickness direction, the above-mentioned channel layer contains GaN, and the above-mentioned barrier layer contains AlGaN.

[0026] A fifth aspect of the present invention is a semiconductor element comprising: a semi-insulating self-supporting substrate comprising GaN doped with Zn, a buffer layer comprising a Group 13 nitride adjacent to the self-supporting substrate, a channel layer comprising a Group 13 nitride adjacent to the buffer layer, a barrier layer comprising a Group 13 nitride disposed on the opposite side of the buffer layer with the channel layer interposed therebetween, and a gate electrode, a source electrode, and a drain electrode disposed on the barrier layer, wherein a portion of the first region including the self-supporting substrate and the buffer layer is 1×10 17 cm -3 The second region contains Si at a concentration of 10×10 17 cm -3 .

[0027] A sixth aspect of the present invention is the semiconductor element according to the fifth aspect, wherein the second region exists in the first region so as to include an interface between the independent substrate and the buffer layer.

[0028] A seventh aspect of the present invention is: in the semiconductor device of the fifth or sixth aspect, the buffer layer includes GaN, the channel layer includes GaN, and the barrier layer includes AlGaN.

[0029] The eighth scheme of the present invention is: in the semiconductor element of the fifth or sixth scheme, the buffer layer is a multilayer buffer layer or a composition gradient buffer layer, the multilayer buffer layer is formed by stacking two or more Group 13 nitride layers of different compositions, the composition gradient buffer layer contains Group 13 nitrides containing two or more Group 13 elements and the existence ratio of the Group 13 elements varies in the thickness direction, the channel layer contains GaN, and the barrier layer contains AlGaN.

[0030] The ninth aspect of the present invention is a method for manufacturing an epitaxial substrate for a semiconductor element, comprising the following steps: a) a preparation step of preparing a semi-insulating self-supporting substrate comprising GaN doped with Zn; b) a buffer layer forming step of forming a buffer layer comprising a Group 13 nitride adjacent to the self-supporting substrate; c) a channel layer forming step of forming a channel layer comprising a Group 13 nitride adjacent to the buffer layer; d) a barrier layer forming step of forming a barrier layer comprising a Group 13 nitride at a position opposite to the buffer layer with the channel layer sandwiched therebetween, and forming a barrier layer with a thickness of 1×10 17 cm -3 In the buffer layer forming step, Zn is diffused from the self-supporting substrate so that the minimum Zn concentration in the second region is 1×10 17 cm -3 The buffer layer is formed in a manner.

[0031] A tenth aspect of the present invention is: in the method for manufacturing an epitaxial substrate for a semiconductor device according to the ninth aspect, the second region exists in the first region so as to include an interface between the independent substrate and the buffer layer.

[0032] According to an eleventh aspect of the present invention, in the method for manufacturing an epitaxial substrate for a semiconductor device according to the ninth or tenth aspect, the self-supporting substrate is manufactured by a flux method.

[0033] A twelfth aspect of the present invention is: in any one of the methods for manufacturing an epitaxial substrate for a semiconductor element according to the ninth to eleventh aspects, the buffer layer is formed of GaN, the channel layer is formed of GaN, and the barrier layer is formed of AlGaN.

[0034] The 13th scheme of the present invention is: in any one of the methods for manufacturing an epitaxial substrate for a semiconductor element in the 9th to 11th schemes, the buffer layer is formed by a multilayer buffer layer or a composition gradient buffer layer, the multilayer buffer layer is formed by stacking two or more Group 13 nitride layers of different compositions, the composition gradient buffer layer contains a Group 13 nitride containing two or more Group 13 elements and the existence ratio of the Group 13 elements varies in the thickness direction, the channel layer is formed by GaN, and the barrier layer is formed by AlGaN.

[0035] According to the first to thirteenth aspects of the present invention, it is possible to reduce leakage current when a semiconductor element is driven, and to increase the withstand voltage (element voltage) of the semiconductor element. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a diagram schematically showing a cross-sectional structure of the HEMT device 20 .

[0037] Figure 2 This is a diagram showing the concentration distribution of the Zn element and the Si element near the interface between the GaN buffer layer and the GaN substrate in Example 1.

[0038] Figure 3 This is a diagram showing the concentration distribution of the Zn element and the Si element near the interface between the GaN buffer layer and the GaN substrate in Comparative Example 1.

[0039] Figure 4 It is a diagram showing the concentration distribution of the Zn element and the Si element and the secondary ion signal distribution of the Al element in the depth direction from the surface of the barrier layer 4 in Example 7. DETAILED DESCRIPTION

[0040] The group numbers of the periodic table shown in this specification are represented by group numbers 1 to 18 according to the revised version of the inorganic chemical nomenclature published by the International Union of Pure and Applied Chemistry (IUPAC) in 1989. Group 13 refers to aluminum (Al), gallium (Ga), indium (In), etc., Group 14 refers to silicon (Si), germanium (Ge), tin (Sn), lead (Pb), etc., and Group 15 refers to nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), etc.

[0041] <Overview of epitaxial substrate and HEMT device>

[0042] Figure 1 The figure schematically shows the cross-sectional structure of a HEMT device 20 as one embodiment of the semiconductor device of the present invention, which is constituted including an epitaxial substrate 10 as one embodiment of the epitaxial substrate for a semiconductor device of the present invention.

[0043] The epitaxial substrate 10 includes a self-supporting substrate 1, a buffer layer 2, a channel layer 3, and a barrier layer 4. In addition, the HEMT element 20 is provided with a source electrode 5, a drain electrode 6, and a gate electrode 7 on the epitaxial substrate 10 (on the barrier layer 4). Figure 1 The thickness ratio of each layer does not reflect the actual situation.

[0044] The self-supporting substrate 1 is 1×10 18 cm -3 The resistivity of the (0001) GaN substrate doped with Zn at room temperature is 1×10 2 The size of the self-supporting substrate 1 is not particularly limited, but it is preferably several hundred μm to several mm thick in consideration of ease of handling. The self-supporting substrate 1 can be produced, for example, by a flux method.

[0045] The formation of the self-supporting substrate 1 by the flux method is generally carried out in the following manner, that is, in a culture container (alumina crucible) arranged in a pressure-resistant container in a horizontally freely rotatable manner, a seed substrate is immersed in a melt containing metal Ga, metal Na, metal Zn, and C (carbon), and the culture container is kept at a predetermined temperature and a predetermined pressure while nitrogen is introduced while the culture container is rotated horizontally, thereby forming a GaN single crystal on the seed substrate, and the formed GaN single crystal is separated from the seed substrate to obtain the self-supporting substrate 1. As the seed substrate, a so-called template substrate formed by forming a GaN thin film on a sapphire substrate by the MOCVD method can be preferably used.

[0046] The buffer layer 2 is a layer containing a Group 13 nitride formed (adjacent) on one main surface of the self-supporting substrate 1. The buffer layer 2 may be a single layer consisting entirely of a single Group 13 nitride, or may be a multilayer buffer layer consisting of two or more Group 13 nitride layers having different compositions. As a single layer, a GaN buffer layer consisting entirely of GaN may be exemplified. As a multilayer buffer layer, for example, a GaN buffer layer consisting entirely of GaN may be exemplified. a Ga 1-aA GaN layer is stacked on an N layer (0<a≤1), etc. Alternatively, the buffer layer 2 can also be set as a composition gradient buffer layer, wherein the composition gradient buffer layer includes a 13th group nitride containing two or more 13th group elements (such as Ga and Al) and the existence ratio (molar fraction) of each element varies in the thickness direction. The buffer layer 2 is formed to a thickness of about 50nm to 1000nm. It should be noted that in this embodiment, the buffer layer 2 is different from the so-called low-temperature buffer layer formed at a low temperature of less than 800°C, and is a layer formed at a temperature equal to or higher than the formation temperature of the channel layer 3 and the barrier layer 4.

[0047] In the epitaxial substrate 10 of the present embodiment, Zn doped in the self-supporting substrate 1 diffuses into at least the buffer layer 2. This point will be described later.

[0048] The channel layer 3 is a layer formed (adjacent) on the buffer layer 2. The channel layer 3 is formed to a thickness of about 50nm to 5000nm. The barrier layer 4 is a layer provided on the opposite side of the buffer layer 2 across the channel layer 3. The barrier layer 4 is formed to a thickness of about 2nm to 40nm.

[0049] like Figure 1 As shown, the barrier layer 4 can be formed adjacent to the channel layer 3, in which case the interface between the two layers becomes a heterojunction interface. Alternatively, an isolation layer (not shown) can be provided between the channel layer 3 and the barrier layer 4, in which case the region from the interface between the channel layer 3 and the isolation layer to the interface between the barrier layer 4 and the isolation layer becomes a heterojunction interface region.

[0050] In either case, the channel layer 3 is made of GaN and the barrier layer 4 is made of AlGaN (Al x Ga 1-x N, 0<x<1) or InAlN (In y Al 1-y However, the combination of the channel layer 3 and the barrier layer 4 is not limited to this.

[0051] The formation of the buffer layer 2, the channel layer 3 and the barrier layer 4 is achieved, for example, by the MOCVD method. For layer formation by the MOCVD method, for example, when the buffer layer 2 and the channel layer 3 are formed of GaN and the barrier layer 4 is formed of AlGaN, it can be performed in the following manner: using a known MOCVD furnace configured to supply organic metal (MO) raw material gases (TMG, TMA), ammonia, hydrogen and nitrogen for Ga and Al into a reactor, the self-supporting substrate 1 placed in the reactor is heated to a predetermined temperature, and GaN crystals and AlGaN crystals generated by the gas phase reaction of the organic metal raw material gases corresponding to each layer and ammonia are sequentially deposited on the self-supporting substrate 1.

[0052] The source electrode 5 and the drain electrode 6 are metal electrodes having a thickness of about ten to a hundred nanometers, respectively. The source electrode 5 and the drain electrode 6 are preferably formed as a multilayer electrode including Ti / Al / Ni / Au, for example. The source electrode 5 and the drain electrode 6 have an ohmic contact with the barrier layer 4. A preferred example of the source electrode 5 and the drain electrode 6 is formed by vacuum evaporation and photolithography. It should be noted that in order to improve the ohmic contact between the two electrodes, it is preferred that after the electrodes are formed, a heat treatment is performed for several tens of seconds in a nitrogen atmosphere at a specified temperature between 650°C and 1000°C.

[0053] The gate electrode 7 is a metal electrode having a thickness of about 10 to 100 nm. The gate electrode 7 is preferably configured as a multilayer electrode including, for example, Ni / Au. The gate electrode 7 has a Schottky contact with the barrier layer 4. A preferred example of the gate electrode 7 is formed by vacuum evaporation and photolithography.

[0054] <Epitaxial substrate and HEMT device manufacturing method>

[0055] (Fabrication of independent substrate)

[0056] First, the procedure for producing the self-supporting substrate 1 by the flux method will be described.

[0057] First, prepare a c-plane sapphire substrate with a diameter equivalent to that of the self-supporting substrate 1 to be produced, and form a GaN low-temperature buffer layer with a thickness of about 10nm to 50nm on its surface at a temperature of 450°C to 750°C. Thereafter, use MOCVD to form a GaN thin film with a thickness of about 1μm to 10μm at a temperature of 1000°C to 1200°C, thereby obtaining a MOCVD-GaN template that can be used as a seed substrate.

[0058] Next, the obtained MOCVD-GaN template was used as a seed substrate, and a Zn-doped GaN single crystal layer was formed using a Na flux method.

[0059] Specifically, first, a MOCVD-GaN template is placed in an alumina crucible, and then 10 g to 60 g of metal Ga, 15 g to 90 g of metal Na, 0.4 g to 5 g of metal Zn, and 10 mg to 500 mg of C are filled into the alumina crucible.

[0060] The above alumina crucible is placed in a heating furnace, the furnace temperature is set to 800℃~950℃, the furnace pressure is set to 3MPa~5MPa, and heated for about 20 hours to 400 hours, and then cooled to room temperature. After cooling, the alumina crucible is taken out of the furnace. In the above order, a brown GaN single crystal layer is deposited on the surface of the MOCVD-GaN template with a thickness of 300μm~3000μm.

[0061] The GaN single crystal layer thus obtained is ground using diamond abrasives to flatten its surface. Thus, a Flux-GaN template having a GaN single crystal layer formed on the MOCVD-GaN template is obtained. The grinding is performed while maintaining the total thickness of the nitride layer in the Flux-GaN template within a range of a value sufficiently larger than the target thickness of the self-supporting substrate 1 to be finally obtained.

[0062] Next, using the laser lift-off method, the seed substrate is separated from the Flux-GaN template by irradiating the laser while scanning at a scanning speed of 0.1 mm / sec to 100 mm / sec from the seed substrate side. As the laser, it is preferred to use, for example, the third harmonic of Nd:YAG with a wavelength of 355 nm. In the above case, as long as the pulse width is 1 ns to 1000 ns and the pulse period is about 1 kHz to 200 kHz. When irradiating, it is preferred to focus the laser appropriately to adjust the light density. In addition, it is preferred to perform laser irradiation while heating the Flux-GaN template at a temperature of about 30°C to 600°C from the opposite side of the seed substrate.

[0063] After the seed substrate is separated, the surface of the obtained stacked structure peeled off from the seed substrate is polished. 18 cm -3 The GaN self-supporting substrate 1 is doped with Zn at the above concentration.

[0064] (Fabrication of epitaxial substrate)

[0065] Next, the preparation of the epitaxial substrate 10 by the MOCVD method is described. The epitaxial substrate 10 is obtained by placing a self-supporting substrate 1 on a susceptor provided in a reactor of an MOCVD furnace, and sequentially stacking a buffer layer 2, a channel layer 3, and a barrier layer 4 under the following conditions. Here, for the buffer layer 2, a single GaN buffer layer, or a multilayer buffer layer or a composition gradient buffer layer containing Ga and Al as Group 13 elements is exemplified. It should be noted that the formation temperature indicates the susceptor heating temperature.

[0066] In addition, in the present embodiment, the Group 15 / Group 13 gas ratio refers to the ratio (molar ratio) of the supply amount of ammonia gas as the Group 15 (N) raw material to the total supply amount of TMG (trimethylgallium), TMA (trimethylaluminum) and TMI (trimethylindium) as the Group 13 (Ga, Al, In) raw materials. The Al raw material gas / Group 13 raw material gas ratio when the barrier layer 4 is formed by AlGaN refers to the ratio (molar ratio) of the supply amount of the Al raw material relative to the total supply amount of the Group 13 (Ga, Al) raw materials, and the In raw material gas / Group 13 raw material gas ratio when the barrier layer 4 is formed by InAlN refers to the ratio (molar ratio) of the supply amount of the In raw material relative to the total supply amount of the Group 13 (In, Al) raw materials. Both are determined according to the desired composition of the barrier layer 4 (Al molar ratio x or In composition ratio y).

[0067] Buffer layer 2:

[0068] Formation temperature = 1000°C to 1200°C;

[0069] Pressure in reactor = 15 kPa ~ 105 kPa;

[0070] Carrier gas = hydrogen;

[0071] Group 15 / Group 13 gas ratio = 250-10000;

[0072] Al raw material gas / Group 13 raw material gas ratio = 0 (GaN buffer layer);

[0073] The ratio of Al source gas to Group 13 source gas is in the range of 0 to 1 and corresponds to the position in the thickness direction (in the case of a multi-layer buffer layer or a composition gradient buffer layer).

[0074] Channel layer 3:

[0075] Formation temperature = 1000°C ~ 1150°C;

[0076] Pressure in reactor = 15 kPa ~ 105 kPa;

[0077] Carrier gas = hydrogen;

[0078] Group 15 / Group 13 gas ratio = 1000 to 10000.

[0079] Barrier layer 4 (when formed of AlGaN):

[0080] Formation temperature = 1000°C to 1200°C;

[0081] Pressure in reactor = 1 kPa ~ 30 kPa;

[0082] Group 15 / Group 13 gas ratio = 5000-20000;

[0083] Carrier gas = hydrogen;

[0084] Al raw material gas / Group 13 raw material gas ratio = 0.1 to 0.4.

[0085] Barrier layer 4 (when formed of InAlN):

[0086] Formation temperature = 700°C to 900°C;

[0087] Pressure in reactor = 1 kPa ~ 30 kPa;

[0088] Group 15 / Group 13 gas ratio = 2000-20000;

[0089] Carrier gas = nitrogen;

[0090] In raw material gas / Group 13 raw material gas ratio = 0.1 to 0.9.

[0091] (Fabrication of HEMT Devices)

[0092] Fabrication of the HEMT device 20 using the epitaxial substrate 10 can be achieved by using a known technique.

[0093] For example, the photolithography process and RIE method are used to etch away the parts that will become the boundaries of each element to about 50nm to 1000nm for element separation processing, and then, a SiO2 film with a thickness of 50nm to 500nm is formed on the surface of the epitaxial substrate 10 (the surface of the barrier layer 4), and then the SiO2 film at the positions where the source electrode 5 and the drain electrode 6 are planned to be formed is etched away using photolithography, thereby obtaining a SiO2 pattern layer.

[0094] Next, a metal pattern containing Ti / Al / Ni / Au is formed at the positions where the source electrode 5 and the drain electrode 6 are to be formed by vacuum evaporation and photolithography, thereby forming the source electrode 5 and the drain electrode 6. The thickness of each metal layer is preferably 5nm to 50nm, 40nm to 400nm, 4nm to 40nm, and 20nm to 200nm, respectively.

[0095] Then, in order to improve the ohmic properties of the source electrode 5 and the drain electrode 6 , heat treatment is performed in a nitrogen atmosphere at 600° C. to 1000° C. for 10 seconds to 1000 seconds.

[0096] Next, by using a photolithography process, the SiO2 film at a position where the gate electrode 7 is to be formed is removed from the SiO2 pattern layer.

[0097] Furthermore, a Schottky metal pattern composed of Ni / Au is formed at a position where the gate electrode 7 is to be formed by vacuum evaporation and photolithography, thereby forming the gate electrode 7. The thickness of each metal layer is preferably 4 nm to 40 nm and 20 nm to 200 nm.

[0098] The HEMT device 20 is obtained through the above steps.

[0099] <Localization of Si and Diffusion of Zn>

[0100] In the HEMT device 20 manufactured according to the above-mentioned sequence and conditions, when a region including the self-supporting substrate 1 and the buffer layer 2 is defined as a first region, a portion of the first region has a 17 cm -3 The second region contains Si at the above concentration. Considering that Si is not a component intentionally contained in the manufacturing process of the HEMT device 20, especially in the process of preparing the self-supporting substrate 1 and forming the buffer layer 2 adjacent to the self-supporting substrate 1, it is speculated that the second region contains Si at the above concentration because Si introduced from the outside in the middle of the process remains after the HEMT device 20 is formed. More specifically, the second region includes the interface between the self-supporting substrate 1 and the buffer layer 2. However, it is not formed inside the self-supporting substrate 1.

[0101] In the HEMT device 20 of the present embodiment, Zn doped in the self-supporting substrate 1 diffuses at least into the buffer layer 2. Furthermore, Zn is diffused in the entire range of the second region at a concentration of 1×10 17 cm -3 There are concentrations above (the minimum concentration in the second region is 1×10 17 cm -3 exists in a certain way).

[0102] The HEMT device 20 of the present embodiment satisfies the above-mentioned concentration conditions, thereby reducing leakage current during driving and achieving a high withstand voltage (high device voltage).

[0103] On the other hand, it was confirmed that the minimum Zn concentration in the second region was less than 1×10 17 cm -3 The leakage current of the HEMT element increases and the withstand voltage decreases.

[0104] This is considered to be because Si introduced from the outside can act as a donor element. If Zn diffusion that satisfies the above concentration condition does not occur, a conductive layer that serves as a leakage path for drain-source current is formed inside the HEMT element by the above action, which may cause a decrease in pinch-off characteristics and a decrease in withstand voltage. 17 cm -3 When Zn exists in the form of Zn, the role of Si as a donor element is hindered by the presence of Zn.

[0105] That is, according to the present embodiment, it is possible to obtain a semiconductor element in which leakage current is reduced during driving and the withstand voltage (element voltage) is improved.

[0106] [Example]

[0107] (Example 1)

[0108] [Manufacturing of Zn-doped GaN single crystal substrate using flux method]

[0109] A 30nm GaN low-temperature buffer layer is formed at 550°C on the surface of a 2-inch diameter, 0.43mm thick c-plane sapphire substrate. Subsequently, a 3μm thick GaN film is formed at 1050°C using the MOCVD method to obtain a MOCVD-GaN template that can be used as a seed substrate.

[0110] The obtained MOCVD-GaN template was used as a seed substrate, and a Zn-doped GaN single crystal layer was formed using a Na flux method.

[0111] Specifically, first, a MOCVD-GaN template is placed in an alumina crucible, and then 30g of metal Ga, 45g of metal Na, 1g of metal zinc, and 100mg of carbon are filled into the alumina crucible. The alumina crucible is placed in a heating furnace, the furnace temperature is set to 850°C, the furnace pressure is set to 4.5MPa, and heated for about 100 hours, and then cooled to room temperature. After cooling, when the alumina crucible is taken out of the furnace, a brown GaN single crystal layer is deposited on the surface of the MOCVD-GaN template with a thickness of about 1000μm.

[0112] The GaN single crystal layer thus obtained was polished using diamond abrasives to flatten its surface, and the total thickness of the nitride layer formed on the base substrate was 900 μm. Thus, a Flux-GaN template having a GaN single crystal layer formed on the MOCVD-GaN template was obtained. It should be noted that no cracks were confirmed by visual observation of the Flux-GaN template.

[0113] Next, the laser lift-off method is used to irradiate the seed substrate from the Flux-GaN template while scanning the laser at a scanning speed of 30 mm / second. As the laser, the third harmonic of Nd:YAG with a wavelength of 355 nm is used. The pulse width is about 30 ns and the pulse period is about 50 kHz. When irradiating, the laser is focused to form a circular electron beam with a diameter of about 20 μm, so that the optical density is about 1.0 J / cm. In addition, the laser irradiation is performed while heating the Flux-GaN template at a temperature of about 50°C from the opposite side of the seed substrate.

[0114] After the seed substrate was separated, the surface of the obtained stacked structure which was peeled off from the seed substrate was polished to obtain a Zn-doped GaN self-supporting substrate having a total thickness of 430 μm.

[0115] The crystallinity of the obtained Zn-doped GaN substrate was evaluated using an X-ray rocking curve. The half-value width of the (0002) plane reflection was 120 seconds, and the half-value width of the (10-12) plane reflection was 150 seconds, indicating good crystallinity.

[0116] [Epitaxial substrate fabrication using MOCVD]

[0117] Next, an epitaxial substrate is prepared by MOCVD. Specifically, a GaN layer as a buffer layer, a GaN layer as a channel layer, and an AlGaN layer as a barrier layer are sequentially stacked on the Zn-doped GaN substrate according to the following conditions. It should be noted that in this embodiment, the 15th group / 13th group gas ratio refers to the ratio (molar ratio) of the supply amount of the 15th group (N) raw material to the supply amount of the 13th group (Ga, Al) raw material. In addition, the Al raw material gas / 13th group raw material gas ratio refers to the ratio (molar ratio) of the supply amount of the Al raw material relative to the overall supply amount of the 13th group (Ga, Al) raw material.

[0118] GaN buffer layer:

[0119] Formation temperature = 1150°C;

[0120] Reactor internal pressure = 15 kPa;

[0121] Group 15 / Group 13 gas ratio = 1000;

[0122] Thickness = 600 nm.

[0123] GaN channel layer:

[0124] Formation temperature = 1050°C;

[0125] Reactor internal pressure = 15 kPa;

[0126] Group 15 / Group 13 gas ratio = 1000;

[0127] Thickness = 3000nm.

[0128] AlGaN barrier layer:

[0129] Formation temperature = 1050°C;

[0130] Reactor internal pressure = 5 kPa;

[0131] Group 15 / Group 13 gas ratio = 12000;

[0132] Al raw material gas / Group 13 raw material gas ratio = 0.25;

[0133] Thickness = 25 nm.

[0134] After the above layers are formed, the susceptor temperature is lowered to near room temperature, the pressure in the reactor is returned to atmospheric pressure, and then the produced epitaxial substrate is taken out.

[0135] [Fabrication of HEMT Devices]

[0136] Next, the HEMT device 20 was fabricated using the epitaxial substrate 10. The HEMT device was designed to have a gate width of 100 μm, a source-gate interval of 1 μm, a gate-drain interval of 10 μm, and a gate length of 1 μm.

[0137] First, the portions to be the boundaries of the elements are etched away to a depth of about 100 nm using a photolithography process and RIE.

[0138] Next, a SiO 2 film with a thickness of 100 nm was formed on the epitaxial substrate, and then the SiO 2 film was etched away at positions where source and drain electrodes were to be formed using photolithography, thereby obtaining a SiO 2 pattern layer.

[0139] Next, a metal pattern including Ti / Al / Ni / Au (with a thickness of 25 / 200 / 20 / 100 nm) was formed at the positions where the source electrode and the drain electrode were to be formed by vacuum evaporation and photolithography, thereby forming the source electrode and the drain electrode. Next, in order to improve the ohmic properties of the source electrode and the drain electrode, a heat treatment was performed at 825°C in a nitrogen atmosphere for 30 seconds.

[0140] Then, using a photolithography process, the SiO2 film at a position where the gate electrode is to be formed is removed from the SiO2 pattern layer.

[0141] Furthermore, a Schottky metal pattern including Ni / Au (the film thickness of each was 20 / 100 nm) was formed at a position where a gate electrode was to be formed by vacuum evaporation and photolithography, thereby forming a gate electrode.

[0142] Through the above steps, a HEMT device is obtained.

[0143] [SIMS evaluation of HEMT devices]

[0144] The obtained HEMT device was subjected to elemental analysis in the depth direction by SIMS (Secondary Ion Mass Spectrometry) to determine the concentrations of Zn and Si in each of the AlGaN barrier layer, the GaN channel layer, the GaN buffer layer, and the GaN substrate.

[0145] Figure 2Graph showing the concentration distribution of Zn and Si near the interface between the GaN buffer layer and the GaN substrate. Figure 2 The results shown in , show the following.

[0146] (1) The GaN substrate is doped with a high concentration (1×10 19 cm -3 ) of Zn element.

[0147] (2) In the first region RE1 including the GaN substrate and the GaN buffer layer and near the interface between the two layers, Si element is formed with a density of 1×10 17 cm -3 The second region RE2 with high Si concentration is 6×10 18 cm -3 .

[0148] (3) The Zn concentration in the GaN buffer layer decreases more slowly than the Si concentration. That is, the Zn element diffuses more significantly than the Si element in the GaN buffer layer.

[0149] (4) The minimum value of Zn concentration in the second region RE2 is 5.3×10 17 cm -3 (≥1×10 17 cm -3 ).

[0150] [Evaluation of electrical characteristics of HEMT devices]

[0151] The drain current-drain voltage characteristics (Id-Vd characteristics) of the HEMT device were evaluated in DC mode using a semiconductor parameter analyzer. The pinch-off threshold voltage was Vg=-3V.

[0152] As an indicator for evaluating the amount of drain current leakage during pinch-off, the drain current Id when the drain voltage Vd = 10 V and the gate voltage Vg = -10 V are applied is used. Vd＝10V·Vg＝-10V , this value was calculated for the HEMT device of this embodiment and the result was 3×10 -7 A. Id Vd＝10V·Vg＝-10V The smaller the better. For the value normalized by the gate width, if Id Vd＝10V·Vg＝-10V ≤1×10 -5 A / mm, it can be judged that the drain current leakage is small. For the HEMT device of this embodiment, the drain current leakage obtained by standardizing the gate width to 100 μm is 3×10 -6 A / mm, and therefore judged to be sufficiently small.

[0153] The device withstand voltage was then measured. As an indicator for evaluating the device withstand voltage, the time at which the drain current Id first exceeded 1×10 -5 A (1×10 when normalized to a gate width of 100 μm) -4 A / mm), and the value was calculated for the HEMT device of this embodiment, and the result was 850 V. The larger the Vdb, the better, and as long as Vdb ≥ 300 V, it can be determined that the device withstand voltage is sufficient, and therefore it is determined that the device withstand voltage of the HEMT device of this embodiment is extremely large.

[0154] (Comparative Example 1)

[0155] A HEMT device was fabricated under the same conditions as in Example 1 except that the growth conditions of the GaN buffer layer were different from those in Example 1 and were the following conditions.

[0156] GaN buffer layer:

[0157] Formation temperature = 1050°C;

[0158] Reactor internal pressure = 15 kPa;

[0159] Group 15 / Group 13 gas ratio = 1000;

[0160] Thickness = 600 nm.

[0161] The concentration distribution of Zn and Si elements near the interface between the GaN buffer layer and the GaN substrate obtained by SIMS measurement of the HEMT device obtained under the same conditions as in Example 1 is shown in FIG. Figure 3 .according to Figure 3 The results shown in , show the following.

[0162] (1) As in Example 1, the GaN substrate is doped with a high concentration of Zn.

[0163] (2) As in Example 1, the second region RE2 is formed in the first region RE1 including the GaN substrate and the GaN buffer layer and in the vicinity of the interface between the two layers.

[0164] (3) Different from Example 1, the Zn concentration in the GaN buffer layer is reduced more rapidly than the Si concentration. That is, the diffusion of the Zn element in the GaN buffer layer is suppressed compared to the diffusion of the Si element.

[0165] (4) The minimum value of Zn concentration in the second region RE2 is 1.7×10 15 cm -3 (<1×10 17 cm-3 ).

[0166] The Id of the HEMT device was obtained under the same conditions as in Example 1. Vd＝10V·Vg＝-10V , the result is 8×10 -5 A (8×10 when normalized to a gate width of 100 μm) -4 That is, it is found that the drain current leakage amount is large and the pinch-off characteristic of the HEMT device of this comparative example is insufficient.

[0167] Furthermore, Vdb was determined under the same conditions as in Example 1 and the result was 100 V, which did not provide a sufficient device withstand voltage.

[0168] (Examples 2 to 6, Comparative Examples 2 to 3)

[0169] The HEMT device was fabricated under the same conditions as in Example 1 except that the growth conditions of the GaN buffer layer (growth temperature, reactor pressure, Group 15 / Group 13 gas ratio, thickness) were changed respectively. The distribution of Zn concentration and Si concentration in the depth direction of the obtained HEMT device was determined by SIMS measurement, and Id Vd＝10V·Vg＝-10V Determination of and determination of Vdb.

[0170] The obtained results are listed in Table 1 together with the results of Example 1 and Comparative Example 1.

[0171] [Table 1]

[0172]

[0173] As shown in Table 1, the minimum Zn concentration in region RE2 is 1×10 17 cm -3 In the case of Examples 1 to 6 manufactured under the above conditions, it can be obtained that the drain current leakage amount is small (Id Vd＝10V·Vg＝-10V ≤1×10 -5 A / mm) and a HEMT device with a large device breakdown voltage (Vdb ≥ 300V). On the other hand, the minimum Zn concentration in region RE2 is less than 1×10 17 cm -3 In the case of Comparative Examples 1 to 3 manufactured under the conditions of , only HEMT devices having a large drain current leakage and a small device withstand voltage were obtained.

[0174] (Example 7)

[0175] The growth conditions of the buffer layer 2 and the channel layer 3 were different from those in Example 1. The epitaxial substrate 10 and the HEMT device 20 were fabricated under the same conditions as in Example 1 except that the growth conditions of the buffer layer 2 and the channel layer 3 were different from those in Example 1. When forming the buffer layer 2, the formation conditions were set to two stages, namely the first condition and the second condition. The first condition was switched to the second condition during the formation. This is to form the buffer layer 2 on the Al a Ga 1-a A multilayer buffer layer in which a GaN layer is stacked on an N layer (0<a≤1) or a composition gradient buffer layer in which the abundance ratios of Al and Ga in the thickness direction are different. The total thickness of the buffer layer 2 is 110 nm.

[0176] Buffer layer (1st condition):

[0177] Formation temperature = 1050°C;

[0178] Reactor internal pressure = 5 kPa;

[0179] Group 13 raw material gas = Al raw material and Ga raw material;

[0180] Group 15 / Group 13 gas ratio = 2000;

[0181] Al raw material gas / Group 13 raw material gas ratio = 0.03;

[0182] Growth rate = 1 nm / sec;

[0183] Growth time = 10 seconds.

[0184] Buffer layer (second condition):

[0185] Formation temperature = 1050°C;

[0186] Reactor internal pressure = 10 kPa;

[0187] Group 13 raw material gas = Ga raw material;

[0188] Group 15 / Group 13 gas ratio = 500;

[0189] Growth rate = 1 nm / sec;

[0190] Growth time = 100 seconds.

[0191] GaN channel layer:

[0192] Formation temperature = 1050°C;

[0193] Reactor internal pressure = 100 kPa;

[0194] Group 15 / Group 13 gas ratio = 2000;

[0195] Thickness = 900 nm.

[0196] Figure 4 The figure shows the concentration distribution of Zn and Si elements in the depth direction from the surface (upper surface) of the barrier layer 4, and the secondary ion signal distribution of Al element in the depth direction (depth distribution of secondary ion count rate of Al element) obtained by measuring the HEMT element obtained in the depth direction under the same conditions as in Example 1 using SIMS. Figure 4 The results shown in , show the following.

[0197] (1) The GaN substrate is doped with a high concentration of Zn.

[0198] (2) A 1×10 17 cm -3 The second region RE2 contains Si at a high concentration, and the peak concentration of Si is 3×10 18 cm -3 .

[0199] (3) The Si concentration has a peak in the second region RE2 and decreases sharply as it approaches the channel layer. In contrast, the Zn concentration decreases gently from the buffer layer to the channel layer. That is, the Zn element diffuses significantly compared to the Si element. Specifically, the Zn element diffuses in the channel layer to a range of 200 to 250 nm from the interface with the buffer layer (the interface with the first region RE1).

[0200] (4) The minimum value of Zn concentration in the second region RE2 is 5.3×10 17 cm -3 (≥1×10 17 cm -3 ).

[0201] (5) The Al element exists in a range wider than 110 nm, which is the target thickness of the entire buffer layer, and this range also includes a part of the GaN substrate.

[0202] For the HEMT device, the Id is calculated under the same conditions as in Example 1. Vd＝10V·Vg＝-10V , the result is 8×10 -8 A (8×10 when normalized to a gate width of 100 μm) -7 That is, it can be seen that the drain current leakage is small and the HEMT device of this embodiment has good pinch-off characteristics.

[0203] Furthermore, Vdb was determined under the same conditions as in Example 1 and the result was 1200 V, which indicated a sufficient withstand voltage for the device.

[0204] (Example 8)

[0205] The HEMT device 20 was fabricated under the same conditions as in Example 7 except that the growth conditions of the buffer layer 2 and the channel layer 3 were set to the following conditions which were different from those in Example 7. That is, in this example, when forming the buffer layer 2, the formation conditions were set to two stages, namely the first condition and the second condition, and the first condition was switched to the second condition in the middle of the formation. In addition, the total thickness of the buffer layer 2 was set to 350 nm.

[0206] Buffer layer (1st condition):

[0207] Formation temperature = 1050°C;

[0208] Reactor internal pressure = 5 kPa;

[0209] Group 13 raw material gas = Al raw material and Ga raw material;

[0210] Group 15 / Group 13 gas ratio = 2000;

[0211] Al raw material gas / Group 13 raw material gas ratio = 0.01;

[0212] Growth rate = 1 nm / sec;

[0213] Growth time = 50 seconds.

[0214] Buffer layer (second condition):

[0215] Formation temperature = 1050°C;

[0216] Reactor internal pressure = 10 kPa;

[0217] Group 15 / Group 13 gas ratio = 500;

[0218] Growth rate = 1 nm / sec;

[0219] Growth time = 300 seconds.

[0220] GaN channel layer:

[0221] Formation temperature = 1050°C;

[0222] Reactor internal pressure = 100 kPa;

[0223] Group 15 / Group 13 gas ratio = 2000;

[0224] Thickness = 1700 nm.

[0225] Based on the concentration distribution of Zn and Si elements along the depth direction from the surface (upper surface) of the barrier layer 4 and the secondary ion signal distribution of Al element in the above-mentioned depth direction obtained by SIMS measurement of the obtained HEMT device under the same conditions as Example 1, the following can be understood.

[0226] (1) The GaN substrate is doped with a high concentration (1×10 19 cm -3 ) of Zn element.

[0227] (2) A 1×10 17 cm -3 The second region RE2 contains Si at a high concentration, and the peak concentration of Si is 4×10 18 cm -3 .

[0228] (3) The Si concentration has a peak in the second region RE2 and decreases sharply as it approaches the channel layer, whereas the Zn concentration decreases gently from the buffer layer to the channel layer. That is, the Zn element diffuses more significantly than the Si element.

[0229] (4) The minimum value of Zn concentration in the second region RE2 is 8.2×10 17 cm -3 (≥1×10 17 cm -3 ).

[0230] (5) The Al element exists in a range wider than 350 nm, which is the target thickness of the entire buffer layer, and this range also includes a part of the GaN substrate.

[0231] The Id of the HEMT device was obtained under the same conditions as in Example 1. Vd＝10V·Vg＝-10V , the result is 2×10 -7 A (2×10 when normalized to a gate width of 100 μm) -6 That is, it can be seen that the drain current leakage is small and the HEMT device of this embodiment has good pinch-off characteristics.

[0232] Furthermore, Vdb was determined under the same conditions as in Example 1 and the result was 1050 V, which indicated a sufficient device withstand voltage.

Claims

1. An epitaxial substrate for a semiconductor element, It is characterized in that include: A semi-insulating self-supporting substrate, wherein the semi-insulating self-supporting substrate comprises GaN doped with Zn, a buffer layer comprising a Group 13 nitride, the buffer layer being adjacent to the self-supporting substrate, a channel layer comprising a Group 13 nitride, the channel layer being adjacent to the buffer layer, and, a barrier layer including a Group 13 nitride, the barrier layer being disposed on the opposite side of the buffer layer across the channel layer; A portion of the first region including the self-supporting substrate and the buffer layer is 1×10 17 cm -3 The second region contains Si at a concentration of 10×10 17 cm -3 , The buffer layer is a composition gradient buffer layer, wherein the composition gradient buffer layer includes a Group 13 nitride containing two or more Group 13 elements, and the abundance ratio of each Group 13 element changes in a thickness direction.

2. The epitaxial substrate for a semiconductor element according to claim 1, It is characterized in that The second region exists in the first region so as to include an interface between the independent substrate and the buffer layer.

3. The epitaxial substrate for a semiconductor element according to claim 1 or 2, It is characterized in that The channel layer comprises GaN, The barrier layer includes AlGaN.

4. A semiconductor element, It is characterized in that include: A semi-insulating self-supporting substrate, wherein the semi-insulating self-supporting substrate comprises GaN doped with Zn, a buffer layer comprising a Group 13 nitride, the buffer layer being adjacent to the self-supporting substrate, a channel layer comprising a Group 13 nitride, the channel layer being adjacent to the buffer layer, a barrier layer including a Group 13 nitride, the barrier layer being disposed on the opposite side of the buffer layer across the channel layer, and A gate electrode, a source electrode and a drain electrode are provided on the barrier layer, A portion of the first region including the self-supporting substrate and the buffer layer is 1×10 17 cm -3 The second region contains Si at a concentration of 10×10 17 cm -3 , The buffer layer is a composition gradient buffer layer, wherein the composition gradient buffer layer includes a Group 13 nitride containing two or more Group 13 elements, and the abundance ratio of each Group 13 element changes in a thickness direction.

5. The semiconductor device according to claim 4, It is characterized in that The second region exists in the first region so as to include an interface between the independent substrate and the buffer layer.

6. The semiconductor element according to claim 4 or 5, It is characterized in that The channel layer comprises GaN, The barrier layer includes AlGaN.

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