Pattern correction method and semiconductor structure forming method

Abstract

A method for pattern correction and a method for forming a semiconductor structure, the method for pattern correction comprising: providing a layout to be corrected, the layout to be corrected having a plurality of first patterns to be corrected, the first patterns to be corrected having a first point, adjacent first patterns to be corrected being connected through the first point; obtaining first-type line segments and second-type line segments of the first patterns to be corrected, the first-type line segments being connected to the first point; correcting the second-type line segments of the first patterns to be corrected to obtain a correction layout, the correction layout comprising the first correction pattern; and performing optical proximity effect correction on the correction layout. The first correction pattern obtained by the method is a photolithography pattern after being corrected for the optical proximity effect, and the size accuracy of the photolithography pattern is high.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a pattern correction method and a method for forming a semiconductor structure. Background Art

[0002] In order to transfer the pattern from the mask to the surface of the silicon wafer, it is usually necessary to go through an exposure step, a development step after the exposure step, and an etching step after the development step. In the exposure step, light is irradiated onto the silicon wafer coated with photoresist through the light-transmitting area of ​​the mask, and the photoresist undergoes a chemical reaction under the irradiation of light; in the development step, the photolithography pattern is formed by utilizing the different degrees of solubility of the photosensitive and non-photosensitive photoresists in the developer, and the mask pattern is transferred to the photoresist; in the etching step, the silicon wafer is etched based on the photolithography pattern formed by the photoresist layer, and the mask pattern is further transferred to the silicon wafer.

[0003] In semiconductor manufacturing, as the design size continues to shrink, the design size is getting closer and closer to the limit of the lithography imaging system, and the diffraction effect of light becomes more and more obvious, resulting in optical image degradation of the design pattern. The actual lithography pattern is seriously distorted relative to the pattern on the mask. Finally, the actual pattern formed by lithography on the silicon wafer is different from the designed pattern. This phenomenon is called the optical proximity effect (OPE: Optical Proximity Effect).

[0004] In order to correct the optical proximity effect, optical proximity correction (OPC) was created. The core idea of ​​optical proximity correction is to establish an optical proximity correction model based on the consideration of offsetting the optical proximity effect, and to design the photomask pattern according to the optical proximity correction model. In this way, although the optical proximity effect occurs in the photolithography pattern corresponding to the photomask pattern after photolithography, since the offset of this phenomenon has been considered when designing the photomask pattern according to the optical proximity correction model, the photolithography pattern after photolithography is close to the target pattern that the user actually wants to obtain.

[0005] However, the dimensional error between the lithography pattern obtained by exposing the mask pattern after correction using the existing optical proximity model and the target pattern is relatively large. Summary of the invention

[0006] The technical problem solved by the present invention is to provide a pattern correction method and a method for forming a semiconductor structure to improve the pattern correction effect.

[0007] In order to solve the above technical problems, the technical solution of the present invention provides a graphic correction method, including: providing a layout to be corrected, the layout to be corrected has a plurality of first graphics to be corrected, the first graphics to be corrected has a first point, and adjacent first graphics to be corrected are connected through the first point; obtaining first-class line segments and second-class line segments of the first graphics to be corrected, the first-class line segments are connected to the first point; correcting a plurality of second-class line segments of the first graphics to be corrected, and obtaining a corrected layout, the corrected layout including the first corrected graphics.

[0008] Optionally, the method for obtaining first-category line segments and second-category line segments includes: dividing the outline of the first figure to be corrected into a preset number of line segments, the line segments include first-category line segments and second-category line segments, the first-category line segments are line segments connected to the first point, and the second-category line segments are line segments other than the first-category line segments.

[0009] Optionally, the method for correcting the second type of line segments of the first pattern to be corrected includes: providing an etching deviation; and offsetting the second type of line segments according to the etching deviation to obtain a first corrected pattern.

[0010] Optionally, the layout to be corrected also includes several second graphics to be corrected; the graphic correction method also includes: segmenting the outline of the second graphic to be corrected to obtain several line segments of the second graphic to be corrected; correcting the several line segments of the second graphic to be corrected to obtain a second corrected graphic; the corrected layout also includes a second corrected graphic.

[0011] Optionally, the method for correcting the plurality of third line segments of the second pattern to be corrected includes: providing an etching deviation; and offsetting the plurality of line segments of the second pattern to be corrected according to the etching deviation to obtain a second corrected pattern.

[0012] Optionally, the method further includes: performing optical proximity effect correction on the revised layout.

[0013] Correspondingly, the technical solution of the present invention also provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a plurality of initial gate structures on the substrate, wherein the plurality of initial gate structures are arranged in parallel on the substrate; forming a patterned layer on the plurality of initial gate structures, wherein the patterned layer exposes a portion of the initial gate structure; using the patterned layer as a mask, etching the exposed initial gate structure; a method for correcting the pattern of the patterned layer comprises: providing a layout to be corrected, wherein the layout to be corrected has a plurality of first patterns to be corrected, wherein the first patterns to be corrected have a first point, and adjacent first patterns to be corrected are connected through the first point; obtaining a first type of line segment and a second type of line segment of the first pattern to be corrected, wherein the first type of line segment is connected to the first point; correcting the second type of line segment of the first pattern to be corrected, and obtaining a corrected layout, wherein the corrected layout includes the first corrected pattern.

[0014] Optionally, the method for obtaining first-category line segments and second-category line segments includes: dividing the outline of the first figure to be corrected into a preset number of line segments, the line segments include first-category line segments and second-category line segments, the first-category line segments are line segments connected to the first point, and the second-category line segments are line segments other than the first-category line segments.

[0015] Optionally, the method for correcting the second type of line segments of the first pattern to be corrected includes: providing an etching deviation; and offsetting the second type of line segments according to the etching deviation to obtain a first corrected pattern.

[0016] Optionally, the layout to be corrected also includes several second graphics to be corrected; the graphic correction method also includes: segmenting the outline of the second graphic to be corrected to obtain several third line segments of the second graphic to be corrected; correcting the several third line segments of the second graphic to be corrected to obtain a second corrected graphic; the corrected layout also includes a second corrected graphic.

[0017] Optionally, the method for correcting several line segments of the second figure to be corrected includes: providing a correction model; obtaining second line segments to be corrected from several of the third line segments, the second line segments to be corrected being line segments when the edge placement error is greater than a preset value; offsetting the second line segments to be corrected according to the correction model to obtain second corrected line segments; replacing corresponding second line segments to be corrected with the second corrected line segments to form the second corrected figure.

[0018] Optionally, the method for correcting the patterned layer pattern further includes: performing optical proximity effect correction on the corrected layout.

[0019] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0020] The graphic correction method in the technical solution of the present invention obtains the first type of line segments and the second type of line segments of the first graphic to be corrected, wherein the first type of line segments are line segments connected to the first point, and the second type of line segments are line segments other than the first type of line segments, and then corrects the second type of line segments of the first graphic to be corrected to obtain a first corrected graphic. The edges of the photolithographic graphic obtained by the first corrected graphic obtained by the method after subsequent optical proximity effect correction are smoother and more in line with design requirements. When etching is subsequently performed using the photolithographic graphic, the edges of the semiconductor structure formed are smoother and the size is more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figures 1 to 3 is a schematic cross-sectional structural diagram of a semiconductor structure forming process in one embodiment;

[0022] Figure 4 is a flow chart of a graphics correction process in an embodiment of the present invention;

[0023] Figures 5 to 9 is a schematic diagram of a graphics correction process in an embodiment of the present invention;

[0024] Figures 10 to 12 It is a schematic cross-sectional structure diagram of the semiconductor structure forming process in an embodiment of the present invention. DETAILED DESCRIPTION

[0025] As described in the background art, the dimensional error between the photolithography pattern obtained by exposing the mask pattern after correction using the existing optical proximity model and the target pattern is relatively large. This is now analyzed and explained in conjunction with a specific embodiment.

[0026] Figures 1 to 3 It is a schematic cross-sectional structure diagram of a semiconductor structure forming process in one embodiment.

[0027] Please refer to Figure 1 , providing a substrate 100; forming a plurality of parallel gates 101 on the substrate; providing a layout to be corrected, the layout to be corrected having a plurality of graphics to be corrected 102, the graphics to be corrected 102 having a first point A, adjacent graphics to be corrected 102 being connected via the first point A, the layout to be corrected being used to form a patterned layer on the underlying structure, the patterned layer being used to etch a portion of the gates 101 to reduce the size of the gates 101.

[0028] Please refer to Figure 2 , providing an etching deviation, and compensating and correcting the to-be-corrected pattern 102 through the etching deviation to form a corrected pattern 103.

[0029] Please refer to Figure 3A patterned layer is formed on the plurality of gates 101, wherein the patterned layer has a plurality of patterns 104, and the patterns 104 are photolithography patterns formed after the correction patterns 103 are subjected to optical proximity correction.

[0030] In the process of acquiring the pattern 104, the etching deviation compensation correction is first performed on the pattern to be corrected 102 to form the correction pattern 103, and then the correction pattern 103 after the compensation correction of the etching deviation is corrected by optical proximity effect to form the photolithography pattern 104. The etching deviation is usually a negative value, so that the correction pattern 103 formed after the compensation correction is formed, the adjacent correction patterns 103 are no longer connected through the first point A, and there is a spacing between adjacent correction patterns 103. In the process of using the correction model to correct the optical proximity effect of the correction pattern 103, the rules of the correction model include mask rule constraints (MRC), that is, the minimum spacing between the patterns cannot be less than a preset value. Since the spacing between adjacent correction patterns 103 is less than the preset value of the minimum spacing, the spacing between the adjacent correction patterns 103 after the correction of the pattern 104 becomes larger, so that the obtained pattern 104 has a larger rounded corner, so that the pattern 104 is greatly different from the design pattern.

[0031] When the pattern 104 is used as a photolithography pattern to form a patterned layer, the pattern of the patterned layer also has a large rounded corner, so that the projection length of the gate 101 exposed by the patterned layer on the substrate is inconsistent. When the exposed gate 101 is etched, the etching of the gate 101 is uneven, and the effect of reducing the size of the gate 101 in the specified area is not good.

[0032] In order to solve the above problems, the present invention provides a method for correcting a pattern and a method for forming a semiconductor structure, by first obtaining a plurality of first-class line segments and a plurality of second-class line segments of a first pattern to be corrected, wherein the first-class line segments are line segments connected to the first point, and the second-class line segments are line segments other than the first-class line segments, and then correcting the plurality of second-class line segments of the first pattern to be corrected to obtain a first corrected pattern. The first corrected pattern obtained by the method is used as a photolithography pattern, and the edge of the photolithography pattern is smoother and more in line with design requirements. When etching is subsequently performed using the photolithography pattern, the edge of the semiconductor structure formed is smoother and the size is more accurate.

[0033] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0034] Figure 4 is a flow chart of a graphics correction method in an embodiment of the present invention;

[0035] Please refer to Figure 4 , the graphics correction method comprises:

[0036] S1: providing a layout to be corrected, wherein the layout to be corrected has a plurality of first graphics to be corrected, each of the first graphics to be corrected has a first point, and adjacent first graphics to be corrected are connected through the first point;

[0037] S2: Acquire a first type of line segment and a second type of line segment of a first figure to be corrected, wherein the first type of line segment is connected to the first point;

[0038] S3: Correcting the second type of line segments of the first to-be-corrected figure to obtain a correction layout, wherein the correction layout includes the first correction figure;

[0039] S4: performing optical proximity effect correction on the corrected layout.

[0040] The pattern correction method first obtains a plurality of first-category line segments and a plurality of second-category line segments of a first pattern to be corrected, wherein the first-category line segments are line segments connected to the first point, and the second-category line segments are line segments other than the first-category line segments, and then corrects the plurality of second-category line segments of the first pattern to be corrected to obtain a first corrected pattern. The edges of the photolithography pattern obtained by the first corrected pattern obtained by the method after subsequent optical proximity effect correction are smoother and more in line with design requirements. When etching is subsequently performed using the photolithography pattern, the edges of the semiconductor structure formed are smoother and the size is more accurate.

[0041] Figures 5 to 9 Schematic diagram of the graphics correction process in an embodiment of the present invention.

[0042] Please refer to Figure 5 , providing a layout 200 to be corrected, wherein the layout 200 to be corrected has a plurality of first graphics 202 to be corrected, wherein the first graphics 202 to be corrected have a first point A, and adjacent first graphics 202 to be corrected are connected through the first point A.

[0043] The to-be-corrected layout 200 is an initial design pattern. The to-be-corrected layout 200 is corrected to obtain a corrected layout. The pattern obtained after the corrected layout is further corrected by optical proximity correction is the pattern subsequently made on the mask to form a patterned layer.

[0044] In this embodiment, the to-be-corrected layout 200 further includes a plurality of second to-be-corrected graphics (not shown), and the second to-be-corrected graphics are graphics to be corrected in the to-be-corrected layout 200 except the first to-be-corrected graphics 202 .

[0045] Please refer to Figure 6, obtain a first type of line segment L1 and a second type of line segment (not marked) of the first figure to be corrected 202, wherein the first type of line segment L1 is connected to the first point A.

[0046] The method for obtaining the first type of line segments L1 and the second type of line segments includes: dividing the outline of the first figure to be corrected 202 into a preset number of line segments, the line segments include the first type of line segments L1 and the second type of line segments, the first type of line segments L1 are line segments connected to the first point A, and the second type of line segments are line segments other than the first type of line segments L1.

[0047] In this embodiment, the length of the first type line segment L1 can be the same as the length of the second type line segment.

[0048] In other embodiments, the lengths of the first type of line segments and the lengths of the second type of line segments may be partially the same or completely different.

[0049] In this embodiment, the graphic correction method further includes: obtaining a plurality of line segments (not shown) of the second graphic to be corrected.

[0050] The method for obtaining a plurality of line segments of the second figure to be corrected includes: segmenting the outline of the second figure to be corrected, and obtaining a plurality of line segments of the second figure to be corrected.

[0051] Please refer to Figure 7 , correct the second type of line segments of the first to-be-corrected graphic 202 to obtain a corrected layout, wherein the corrected layout includes the first corrected graphic 205.

[0052] The method for correcting the second type of line segments of the first to-be-corrected pattern 202 includes: providing an etching deviation; and offsetting the second type of line segments according to the etching deviation to obtain a first corrected pattern 205. .

[0053] In this embodiment, the offset of the second type of line segments is performed simultaneously.

[0054] In this embodiment, the method further includes: correcting a plurality of line segments of the second graphic to be corrected to obtain a second corrected graphic (not shown), and the corrected version also includes the second corrected graphic.

[0055] The method for correcting the plurality of line segments of the second pattern to be corrected includes: providing an etching deviation; and offsetting the plurality of line segments of the second pattern to be corrected according to the etching deviation to obtain a second corrected pattern.

[0056] By only correcting the etching deviation of the second type of line segments of the first pattern to be corrected, the position of the first type of line segments L1 can be fixed, so that the adjacent first corrected patterns 205 formed can be kept intact and still connected through the first point A. Therefore, in the subsequent optical proximity effect correction process, the position of the first corrected pattern 205 at the first point A is not restricted by the mask rules, so that the pattern after the optical proximity effect correction has a smaller rounded corner at the first point A, which is beneficial for making the subsequently formed lithography pattern closer to the design pattern.

[0057] In this embodiment, the correction of the plurality of line segments of the second figure to be corrected is performed simultaneously with the correction of the second type of line segments of the first figure to be corrected.

[0058] After obtaining the first correction pattern 205 and the second correction pattern, the optical proximity effect correction is performed on the first correction pattern 205 and the second correction pattern. For the specific correction process, please refer to Figure 8 and Fig. 9 .

[0059] Please refer to Figure 8 , performing optical proximity effect correction on the corrected layout to obtain a target pattern 203.

[0060] The method for correcting the optical proximity effect of the corrected layout includes: simulating exposure of the corrected layout to form an exposed layout (not shown); determining whether edge placement errors of a plurality of line segments of the exposed layout contour are within a preset range; if the edge placement error of any line segment is greater than the preset range, offsetting the line segment according to the correction model; the above process is iterated N times until the edge placement error is within the preset range, thereby obtaining a target graphic 203.

[0061] The target pattern 203 is a pattern that forms a photolithography pattern after subsequent exposure.

[0062] By only correcting the etching deviation of the second type of line segments of the first to-be-corrected pattern 202, the position of the first type of line segments L1 can be fixed, so that the adjacent first corrected patterns 205 formed can be kept from being separated and still connected through the first point A. Therefore, in the process of optical proximity effect correction, the position of the first corrected pattern 205 at the first point A is not restricted by the mask rule, so that the target pattern 203 after the optical proximity effect correction has a smaller rounded corner at the first point A, so that the subsequently formed lithography pattern is closer to the design pattern.

[0063] Please refer to Fig. 9 , simulate exposure is performed on the target pattern 203 to obtain a photolithography pattern 204.

[0064] The photolithography pattern 204 is close to the design pattern and meets the design requirements. When the target pattern 203 is used as the mask pattern, the edge of the photolithography pattern 204 is smoother and more in line with the design requirements. When etching is subsequently performed using the photolithography pattern 204, the edge of the semiconductor structure formed is smoother and the size is more precise.

[0065] Figures 10 to 12 It is a schematic cross-sectional structure diagram of the semiconductor structure forming process in an embodiment of the present invention.

[0066] Please refer to Fig.10 , providing a substrate 400.

[0067] In this embodiment, the material of the substrate 400 is silicon.

[0068] Please continue to refer to Fig.10 , a plurality of initial gate structures 401 are formed on a substrate 400 , and the plurality of initial gate structures 401 are arranged in parallel on the substrate 400 .

[0069] The initial gate structure 401 includes: a gate dielectric layer (not shown) and a gate layer (not shown) located on the gate dielectric layer.

[0070] Please refer to Fig.11 , a patterned layer 402 is formed on the initial gate structures 401 , wherein the patterned layer 402 exposes a portion of the initial gate structures 401 .

[0071] Please refer to the method for correcting the pattern of the pattern layer 402. Figures 5 to 9 , I will not go into details here.

[0072] In this embodiment, the material of the patterned layer 402 includes photoresist.

[0073] The pattern of the patterned layer 402 is the pattern of the target pattern 203 transferred from the mask to the photoresist.

[0074] Please refer to Fig.12 , using the patterned layer 402 as a mask, the exposed initial gate structure 401 is etched to form a gate structure 403.

[0075] The target graphic 203 obtained by the graphic correction method is used as a mask graphic for forming a graphic layer 402. The edges of the graphic of the graphic layer 402 are smoother and more in line with design requirements. The projection length of the initial gate structure 401 exposed by the graphic layer 402 on the substrate is uniform. Therefore, when the initial gate structure 401 is etched using the graphic layer 402 as a mask, the etching of the initial gate structure 401 is relatively uniform, and the effect of reducing the size of the initial gate structure 401 in the specified area is better, so that the size of the formed gate structure 403 is relatively uniform.

[0076] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for correcting a mask pattern, characterized in that: include: Providing a layout to be corrected, wherein the layout to be corrected has a plurality of first graphics to be corrected, the first graphics to be corrected have first points, and adjacent first graphics to be corrected are connected through the first points; Acquire a first type of line segment and a second type of line segment of a first figure to be corrected, wherein the first type of line segment is connected to the first point; Correcting the second type of line segments of the first to-be-corrected figure to obtain a correction layout, wherein the correction layout includes the first correction figure, and the second type of line segments are line segments other than the first type of line segments; The optical proximity effect correction is performed on the modified layout.

2. The method for correcting a mask pattern according to claim 1, wherein: The method for obtaining first-category line segments and second-category line segments includes: dividing the outline of the first figure to be corrected into a preset number of line segments, the line segments include first-category line segments and second-category line segments, the first-category line segments are line segments connected to the first point, and the second-category line segments are line segments other than the first-category line segments.

3. The method for correcting a mask pattern according to claim 1, wherein: The method for correcting the second type of line segments of the first to-be-corrected pattern includes: providing an etching deviation; and offsetting the second type of line segments according to the etching deviation to obtain a first corrected pattern.

4. The method for correcting a mask pattern according to claim 1, wherein: The to-be-corrected layout also includes a plurality of second to-be-corrected graphics; The graphic correction method also includes: segmenting the outline of the second graphic to be corrected to obtain a plurality of line segments of the second graphic to be corrected; correcting the plurality of line segments of the second graphic to be corrected to obtain a second corrected graphic; and the correction map also includes a second corrected graphic.

5. The method for correcting a mask pattern according to claim 4, wherein: The method for correcting the plurality of line segments of the second pattern to be corrected includes: providing an etching deviation; and offsetting the plurality of line segments of the second pattern to be corrected according to the etching deviation to obtain a second corrected pattern.

6. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming a plurality of initial gate structures on a substrate, wherein the plurality of initial gate structures are arranged in parallel on the substrate; forming a patterned layer on the initial gate structures, wherein the patterned layer exposes a portion of the initial gate structures; Using the patterned layer as a mask, etching the exposed initial gate structure; The method for correcting the patterned layer graphics includes: providing a layout to be corrected, the layout to be corrected has a plurality of first graphics to be corrected, the first graphics to be corrected has a first point, and adjacent first graphics to be corrected are connected through the first point; obtaining first-class line segments and second-class line segments of the first graphics to be corrected, the first-class line segments are connected to the first point; correcting the second-class line segments of the first graphics to be corrected, the second-class line segments are line segments other than the first-class line segments, and obtaining a corrected layout, the corrected layout includes the first corrected graphics; and performing optical proximity effect correction on the corrected layout.

7. The method for forming a semiconductor structure according to claim 6, wherein: The method for obtaining first-category line segments and second-category line segments includes: dividing the outline of the first figure to be corrected into a preset number of line segments, the line segments include first-category line segments and second-category line segments, the first-category line segments are line segments connected to the first point, and the second-category line segments are line segments other than the first-category line segments.

8. The method for forming a semiconductor structure according to claim 6, wherein: The method for correcting the second type of line segments of the first to-be-corrected pattern includes: providing an etching deviation; and offsetting the second type of line segments according to the etching deviation to obtain a first corrected pattern.

9. The method for forming a semiconductor structure according to claim 6, wherein: The to-be-corrected layout also includes a plurality of second to-be-corrected graphics; the graphics correction method also includes: segmenting the outline of the second to-be-corrected graphics to obtain a plurality of third line segments of the second to-be-corrected graphics; correcting the plurality of third line segments of the second to-be-corrected graphics to obtain a second corrected graphics; the corrected layout also includes a second corrected graphics.

10. The method for forming a semiconductor structure according to claim 9, wherein: The method for correcting the plurality of line segments of the second pattern to be corrected includes: providing an etching deviation; and offsetting the plurality of line segments of the second pattern to be corrected according to the etching deviation to obtain a second corrected pattern.

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