Display panel and display device

Abstract

The present application discloses a display panel and a display device. The display panel includes a substrate; a first signal line layer, the first signal line layer includes a first signal line located in a non-display area; an encapsulation layer, located on the side of the first signal line layer away from the substrate; a second signal line layer, located on the side of the encapsulation layer away from the substrate, the second signal line layer includes a second signal line at least partially located in the display area; a first blocking portion, located in the non-display area and arranged around the display area, the first blocking portion is located on the side of the second signal line layer facing the substrate and includes a first blocking section and a first notch section distributed along its own extension direction, and the thickness of the first blocking section is greater than the thickness of the first notch section. The first blocking section is located on the side of the connection end facing the display area. The first blocking section can block the encapsulation layer, improve the encapsulation layer from directly spreading to the non-display area and affecting the via connection of the connection end, and improve the stability of the via connection between the second signal line connection end and the first signal line.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular, relates to a display panel and a display device. Background Art

[0002] In recent years, display technology has developed towards full-screen displays, and organic light-emitting diode (OLED) display devices have been favored by many consumers due to their advantages such as high screen-to-body ratio and narrow bezel. In existing narrow bezel design solutions, there is a problem of poor contact between the lines near the bezel area. Summary of the invention

[0003] Embodiments of the present application provide a display panel and a display device, which can improve the stability of circuit connections in a border area of ​​the display panel and enhance the display stability of the display panel.

[0004] In a first aspect, a display panel is provided, the display panel having a display area and a non-display area surrounding the display area, the display panel comprising: a substrate; a first signal line layer located on one side of the substrate, the first signal line layer comprising a first signal line located in the non-display area; an encapsulation layer located on a side of the first signal line layer away from the substrate; a second signal line layer located on a side of the encapsulation layer away from the substrate, the second signal line layer comprising a second signal line at least partially located in the display area; a first blocking portion located in the non-display area and arranged around the display area, the first blocking portion being located on a side of the second signal line layer facing the substrate and comprising a first blocking segment and a first notch segment distributed along its own extension direction, the thickness of the first blocking segment being greater than the thickness of the first notch segment; wherein the second signal line extends from the display area to the non-display area via the first notch segment, the second signal line comprises a connecting end located in the non-display area, and the second signal line is connected to the first signal line via a via hole in the non-display area through the connecting end, and the first blocking segment is located on a side of the connecting end facing the display area.

[0005] In a second aspect, a display device is provided, comprising the display panel according to the first aspect.

[0006] According to the display device provided by the embodiment of the present application, by providing a first blocking portion surrounding the display area in the non-display area, the encapsulation layer can be blocked to a certain extent from spreading to the connection end of the second signal line and affecting the normal connection of the wiring near the connection end. Since the thickness of the first notch section is lower than that of the first blocking section, the second signal line can be connected to the first signal line by crossing the first notch section with a smaller thickness. The thickness of the film layer crossed is smaller, which reduces the stress on the second signal line itself and other film layers, prevents the second signal line from being broken, and ensures the stability of the line routing and the reliability of the wiring connection. The first blocking section is located on the side of the connection end of the second signal line facing the display area, and the second signal line is connected to the first signal line through the connection end. That is to say, the first blocking section with a larger thickness is located between the via and the display area, which further improves the blocking effect of the first blocking section, and avoids the encapsulation layer from spreading directly to the via to a greater extent, which leads to the accumulation of the encapsulation layer material at the via position, and then leads to the phenomenon that the via depth or the via opening size is affected. Therefore, the first blocking section can block the encapsulation layer, improve the encapsulation layer from directly spreading to the non-display area and affecting the via connection of the connection end, and improve the stability of the via connection between the second signal line connection end and the first signal line. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0008] Figure 1 A schematic top view of a display panel provided in accordance with an embodiment of the present application.

[0009] Figure 2 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region;

[0010] Figure 3 For an embodiment of this application Figure 2 Sectional view of the middle BB section;

[0011] Figure 4 For an embodiment of this application Figure 1 Sectional view of section AA;

[0012] Figure 5 A schematic top view of a display panel provided in another embodiment of the present application;

[0013] Figure 6 Another embodiment of the present application corresponds to Figure 5 Schematic diagram of the internal structure of the middle P region;

[0014] Figure 7 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region;

[0015] Figure 8 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region;

[0016] Fig. 9 Another embodiment of the present application corresponds to Figure 5 Schematic diagram of the internal structure of the middle P region;

[0017] Fig.10 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region;

[0018] Fig.11 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region.

[0019] Fig.12 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region.

[0020] In the attached figure:

[0021] 10. Substrate;

[0022] 01, first signal line layer; 011, first signal line;

[0023] 02, second signal line layer; 021, second signal line; 022, connection end; 023, via hole;

[0024] 03. Touch layer;

[0025] 20. Encapsulation layer; 21. First inorganic encapsulation layer; 22. Second inorganic encapsulation layer; 23. First organic encapsulation layer;

[0026] 30, first blocking portion; 31, first blocking section; 32, first notch section; 321, opening section; 322, first thinning section;

[0027] 40. Array layer; 401. Planarization layer

[0028] 50, light-emitting functional layer; 501, anode; 502, light-emitting material layer; 503, cathode; 504, pixel definition layer; 51, light-emitting device;

[0029] 60. a second blocking portion;

[0030] 70. third blocking portion; 71. buffer section; 72. second thinning section;

[0031] 80. fourth blocking portion;

[0032] AA, display area; NA, non-display area;

[0033] X, first direction; Y, second direction;

[0034] 100. Display panel. DETAILED DESCRIPTION

[0035] The features and exemplary embodiments of various aspects of the application will be described in detail below. In the detailed description below, many specific details are proposed to provide a comprehensive understanding of the application. However, it is obvious to those skilled in the art that the application can be implemented when some details in these specific details are not needed. The following description of the embodiments is only to provide a better understanding of the application by illustrating the example of the application.

[0036] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The embodiments will be described in detail below in conjunction with the accompanying drawings.

[0037] Relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device that includes a series of elements includes not only those elements, but also other elements that are not explicitly listed, or also includes elements that are inherent to such process, method, article, or device. In the absence of further restrictions, the elements defined by the statement "comprising ..." do not exclude the presence of additional identical elements in the process, method, article, or device that includes the elements.

[0038] It should be understood that when describing the structure of a component, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean that it is directly on the other layer or another region, or that other layers or regions are included between it and the other layer or another region. Moreover, if the component is turned over, the layer or a region will be "below" or "beneath" another layer or another region.

[0039] In addition, the term "and / or" in this article is only a description of the association relationship between the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0040] It should be understood that in the embodiment of the present application, "B corresponding to A" means that B is associated with A, and B can be determined according to A. However, it should also be understood that determining B according to A does not mean determining B only according to A, and B can also be determined according to A and / or other information.

[0041] With the rapid development of display technology and the growing display market, consumers have higher requirements for display area and screen-to-body ratio, and display panels are also evolving towards full-screen.

[0042] "Full screen" literally means that the whole screen is a screen, or the whole area can be displayed. However, due to technical limitations, it is still difficult to achieve a truly borderless full screen display. Related technologies usually reduce the border area to increase the visible area, thereby obtaining a "borderless", "narrow border", "ultra-narrow border" and other visual effects that are close to a full screen. Among the many display technologies, organic light emitting diodes (OLEDs) are the most popular. ， OLED has been widely used due to its advantages such as high brightness, high contrast, easy to achieve ultra-thin and flexible display, and the combination of organic light-emitting diodes and full-screen technology has also become a research hotspot. Actual products have also been gradually introduced to the market and begun to gain favor from consumers.

[0043] The applicant has discovered and realized that in order to make the display device have a full-screen display effect, the non-display area needs to be gradually reduced, because some signal lines located in the display area need to be led out from the display area to the non-display area, and then connected to the signal lines located in the non-display area, and the connection end is located in the non-display area. Therefore, as the non-display area gradually decreases, the connection end will gradually approach the display area, and when the connection end is too close to the display area, it may be affected by part of the film layer in the display area, which will lead to poor contact of the line near the connection end. In particular, when signal lines of different layers are connected through vias in the non-display area, that is, when signal lines located in different layers are connected through vias, due to the limitations of process accuracy and yield rate, part of the film layer located in the display area may spread to the non-display area and cover the vias, resulting in poor contact problems such as virtual connection and easy breakage between signal lines of different layers that should be normally electrically connected, affecting the life of the display device.

[0044] For example, in an organic light-emitting touch display device, in order to prevent water vapor, oxygen and dirt from affecting the organic light-emitting material, a thin film encapsulation layer (Thin Film En-capsulation, TFE) needs to be formed above the organic light-emitting material. In order to reduce the thickness and cost of the display panel module, the touch electrode can be set inside the display panel, that is, an embedded touch panel (In Cell Touch Panel). Specifically, the touch electrode can be set above the thin film encapsulation layer, or in certain film layers of the thin film encapsulation layer to form a touch panel on thin film encapsulation (Touch Panel On TFE, TPOT) structure, and after the touch electrode is led out from the display area, it needs to be connected to the signal line of another film layer in the non-display area. In actual manufacturing, some film layers in the thin film encapsulation layer, such as the inorganic encapsulation layer, are generally formed by a chemical vapor deposition (CVD) process. Due to the limitations of process precision, it is difficult to completely ensure that the deposited film layer is confined to a certain area and does not spread the boundary of the film layer to other areas. That is to say, as the connecting end gradually approaches the display area, the inorganic layer located in the display area, its own CVD shadow may cover the via where the connecting end is located, resulting in abnormal contact between the touch electrode and the signal line of another layer, affecting the touch reliability.

[0045] Based on this, in order to at least alleviate or solve the above-mentioned technical problems to a certain extent, this application is proposed.

[0046] The display panel disclosed in the embodiment of the present application can be used for, but not limited to, mobile display devices such as mobile phones, tablets, laptops, wearable devices; it can also be used for, but not limited to, fixed display devices such as exhibition stands, visual display windows, desktop displays, etc.; it can also be used for, but not limited to, consumer-grade entertainment products such as electric toys, game consoles, device remote controls, head-mounted displays, etc.; it can also be used for, but not limited to, industrial-grade equipment such as industrial robots, touch tables, power tools, and testing tools; it can also be used for, but not limited to, automobiles, electric vehicles, and other means of transportation that have display requirements, as well as other device terminals that may have display requirements.

[0047] In order to better understand this application, Figures 1 to 12 The display panel and the display device according to the embodiment of the present application are described in detail.

[0048] It should be noted that, in the embodiments of the present application, an organic light emitting diode display panel with an embedded touch structure is taken as an example for description.

[0049] The present application embodiment provides a display panel 100, see Figures 1 to 4 , Figure 1 A schematic diagram of the structure of a display panel 100 provided in an embodiment of the present application is shown in FIG. Figure 2For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region, Figure 3 For an embodiment of this application Figure 2 The cross-sectional view of the BB section, Figure 4 For an embodiment of this application Figure 1 Cross-sectional view of section AA.

[0050] The display panel 100 provided in the embodiment of the present application has a display area AA and a non-display area NA surrounding the display area AA, and the display panel 100 includes: a substrate 10, a first signal line layer 01, an encapsulation layer 20, a second signal line layer 02, and a first blocking portion 30. The first signal line layer 01 is located on one side of the substrate 10, and the first signal line layer 01 includes a first signal line 011 located in the non-display area NA. The encapsulation layer 20 is located on the side of the first signal line layer 01 away from the substrate 10. The second signal line layer 02 is located on the side of the encapsulation layer 20 away from the substrate 10, and the second signal line layer 02 includes a second signal line 021 at least partially located in the display area AA. The first blocking portion 30 is located in the non-display area NA and is arranged around the display area AA. The first blocking portion 30 is located on the side of the second signal line layer 02 facing the substrate 10 and includes a first blocking segment 31 and a first notch segment 32 distributed along its own extension direction, and the thickness of the first blocking segment 31 is greater than the thickness of the first notch segment 32; wherein, the second signal line 021 extends from the display area AA to the non-display area NA via the first notch segment 32, the second signal line 021 includes a connecting end 022 located in the non-display area NA, and the second signal line 021 is connected to the first signal line 011 via 023 in the non-display area NA through the connecting end 022, and the first blocking segment 31 is located on the side of the connecting end 022 facing the display area AA.

[0051] In the embodiment of the present application, the display panel 100 may be, for example, a liquid crystal display panel 100 (Liquid Crystal Display, LCD), an organic light emitting diode (OLED), or a ， The display panel 100 may be any one of an OLED (organic light emitting diode) display panel 100, a quantum dot light emitting diode (QLED) display panel 100, and a micro light emitting diode (Micro LED) display panel 100, which is not limited here. The following discussion only takes the display panel 100 as an OLED display panel 100 as an example.

[0052] The substrate 10 may be transparent, translucent or opaque. The substrate 10 may be a rigid substrate 10, such as a glass substrate 10, a silicon substrate 10, etc. The substrate 10 may also be a flexible substrate 10, such as a flexible resin material, or formed by a thin polymer, and specific materials may include polyimide (PI), polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), etc. The substrate 10 may also include a buffer layer, which may include a multi-layer inorganic and organic layer stacked structure to block oxygen and moisture, prevent moisture or impurities from diffusing through the substrate 10, and provide a flat surface on the upper surface of the substrate 10.

[0053] See also Figure 4 , the encapsulation layer 20 may be a thin film encapsulation layer 20 for encapsulating the organic light-emitting device 51, and the thin film encapsulation layer 20 includes an inorganic encapsulation layer and / or an organic encapsulation layer. The inorganic encapsulation layer 20 generally includes a first inorganic encapsulation layer 21 and a second inorganic encapsulation layer 22. Specifically, the thin film encapsulation layer may include a first inorganic encapsulation layer 21, a first organic encapsulation layer 23, and a second inorganic encapsulation layer 22 that are stacked. The first organic encapsulation layer 23 may be manufactured by inkjet printing, and the first inorganic encapsulation layer 21 and the second inorganic encapsulation layer 22 may be formed by chemical vapor deposition. The encapsulation layer 20 in the embodiment of the present application may be all thin film encapsulation layers, or one or several layers of the thin film encapsulation layers.

[0054] In the embodiment of the present application, the second signal line 021 is located on one side of the encapsulation layer 20, and the first signal line 011 is located on the other side of the encapsulation layer 20. The connection end 022 of the first signal line 011 and the second signal line 021 is connected through a via 023. By providing a first blocking portion 30 surrounding the display area AA in the non-display area NA, the encapsulation layer 20 can be blocked to a certain extent from spreading to the connection end 022 of the second signal line 021 and affecting the normal connection of the wiring near the connection end 022. The first blocking portion 30 includes a first blocking segment 31 and a first notch segment 32 distributed along its own extension direction, and the thickness of the first blocking segment 31 is greater than the thickness of the first notch segment 32. The thickness in this embodiment refers to the height in a direction perpendicular to the plane where the display panel 100 is located. On the one hand, the second signal line 021 extends from the display area AA to the non-display area NA via the first notch segment 32. Since the thickness of the first notch segment 32 is lower than that of the first blocking segment 31, the second signal line 021 only needs to cross the first notch segment 32 with a smaller thickness to connect with the first signal line 011. The thickness of the film layer crossed is smaller, which can alleviate the phenomenon of uneven stress on the second signal line 021 itself and other film layers, prevent the second signal line 021 from breaking, and ensure the stability of the line routing and the reliability of the routing connection. It should be noted that the thickness of the first notch segment 32 defined in this embodiment is less than that of other parts of the first blocking portion 30. In fact, the thickness of the first notch segment 32 can be reduced to 0, which means that the first notch segment 32 forms an opening and the first blocking portion 30 is a non-closed figure. On the other hand, the first blocking section 31 is located at the side of the connection end 022 of the second signal line 021 facing the display area AA, and the second signal line 021 is connected to the via hole 023 of the first signal line 011 through the connection end 022. That is to say, the first blocking section 31 with a larger thickness is located between the via hole 023 and the display area AA, further improving the blocking effect of the first blocking portion 30, and preventing the encapsulation layer 20 from directly spreading to the via hole 023 to a greater extent, thereby preventing the encapsulation layer 20 from directly spreading to the via hole 023, thereby causing the accumulation of the encapsulation layer 20 material at the position of the via hole 023, and further affecting the depth of the via hole 023 or the opening size of the via hole 023. In particular, the first blocking portion 30 can block the extension of the inorganic encapsulation layer 20 in the encapsulation layer 20. Therefore, the first blocking section 31 can block the encapsulation layer 20, improve the encapsulation layer 20 from directly spreading to the non-display area NA and affecting the connection of the via hole 023 of the connection end 022, and improve the stability of the connection between the connection end 022 of the second signal line 021 and the via hole 023 of the first signal line 011.

[0055] Optional, please continue to Figure 4The display panel 100 also includes a touch layer 03 for realizing a touch function. The touch layer 03 is located above the encapsulation layer 20. The touch layer 03 includes a plurality of touch electrodes. The touch electrodes can be set as a single layer or a double layer. They can be formed using transparent metal oxides such as indium tin oxide (ITO), or a metal mesh formed using metal wires. The second signal line 021 can be an electrode lead drawn from the touch electrode. The first signal line 011 can be a connecting line connected to the touch electrode. The first signal line 011 can be connected to a driver chip. When the display panel 100 is used for touch operation, the driver chip sends an electrical signal and transmits it to the second signal line 021 through the first signal line 011. After the touch operation, the signal change on the second signal line 021 is transmitted to the driver chip through the first signal line 011, thereby realizing touch judgment.

[0056] Optionally, the display panel 100 further includes a light-emitting functional layer 50, which is located on the side of the encapsulation layer 20 facing the substrate 10, and the light-emitting functional layer 50 includes a light-emitting device 51, and a plurality of light-emitting devices 51 are arranged in an array, and the light-emitting device 51 includes an anode 501, a pixel definition layer 504 covering the anode 501, a light-emitting material layer and a cathode 503. The anode 501, the light-emitting material layer 502 and the cathode 503 are sequentially arranged in a direction away from the substrate 10. The anode 501 includes an anode 501 pattern corresponding to a pixel unit one by one, and the anode 501 pattern is connected to the source electrode or the drain electrode of the thin film transistor through the via 023 on the planarization layer 401. The pixel definition layer 504 is located on the side of the anode 501 away from the array layer 40. The pixel definition layer 504 can be formed of an organic material such as polyimide (PI), polyamide, benzocyclobutene (BCB), acrylic resin or phenolic resin, or a material such as SiN x formed by inorganic materials.

[0057] Optionally, the display panel 100 further includes an array layer 40, such as Figure 4As shown, the array layer 40 includes a plurality of thin film transistors (TFTs) and a pixel circuit composed of thin film transistors for controlling the light emitting device 51. Specifically, the array layer 40 includes an active layer for forming a thin film transistor, the active layer including a source region and a drain region formed by doping N-type impurity ions or P-type impurity ions, and a channel region between the source region and the drain region; a gate insulating layer located on the active layer; a gate layer of the thin film transistor located on the gate insulating layer, the gate layer including a plurality of gates arranged at intervals. An interlayer insulating layer located on the gate, the interlayer insulating layer can be formed by an insulating inorganic layer such as silicon oxide or silicon nitride, and optionally, the interlayer insulating layer can be formed by an insulating organic layer. The source electrode and the drain electrode of the thin film transistor are located on the interlayer insulating layer. The source electrode and the drain electrode are electrically connected (or combined) to the source region and the drain region respectively through contact holes, and the contact holes are formed by selectively removing the gate insulating layer and the interlayer insulating layer. It can be understood that a plurality of TFT elements are formed on the substrate 10. The gate electrode may be or may include a metal material such as copper, gold, silver, iron, etc. The material of the source electrode and the drain electrode may be similar to the gate electrode, that is, a metal material; or may be or may include a doped semiconductor material. An insulating layer is provided between the gate layer, the source and drain electrode layer, and the active layer, respectively. The material of the insulating layer may be or may include a transparent and insulating material, such as silicon oxide or silicon nitride.

[0058] Optionally, the array layer 40 further includes a passivation layer located on the thin film transistor. Specifically, the passivation layer is located on the source electrode and the drain electrode. The passivation layer can be formed of an inorganic layer such as silicon oxide or silicon nitride, or an organic layer.

[0059] Optionally, the display panel 100 further includes a planarization layer 401 located on the array layer 40. The planarization layer 401 may include an organic layer such as acrylic, polyimide (PI) or benzocyclobutene (BCB), and the planarization layer 401 has a planarization function.

[0060] Optionally, the display panel 100 further includes a protective layer located above the second signal line layer 02. The protective layer is the outermost film layer of the touch display panel 100 and may be a protective cover plate or a protective film. The protective layer may be bonded to the adjacent film layer inside the touch display panel 100 by optically clear adhesive (OCA).

[0061] It should be noted that the first blocking portion 30 in the drawings is a strip-shaped structure, but the actual application is not limited to this structure.

[0062] In some embodiments, please refer to Figure 2, a direction parallel to the plane where the display panel 100 is located and perpendicular to the extension direction is defined as a first direction X, and the connection end 022 overlaps with the first blocking portion 30 in the first direction X. The distance between the encapsulation layer 20 and the connection end 022 along the first direction X is the shortest. By providing the first blocking portion 30, the encapsulation layer 20 can be blocked from extending to the connection end 022 and the via hole 023 to a certain extent, at least the encapsulation layer 20 can be blocked from directly extending to the connection end 022 and the via hole 023 along the first direction X. When the encapsulation layer 20 extends to the first blocking portion 30, its travel route will be blocked, and then it will extend in a direction intersecting with the first direction X, so the encapsulation layer 20 will not directly extend to the connection end 022 and the via hole 023. Specifically, the first blocking portion 30 is used to block the inorganic packaging layer 20 from extending to the connection end 022 and the via 023. In other words, the first blocking portion 30 is used to block the first inorganic layer and / or the second inorganic layer from extending to the connection end 022 and the via 023, thereby improving the situation where the packaging layer 20 covers the connection end 022, so as to avoid abnormal contact between the first signal line 011 and the second signal line 021 at the connection end 022, thereby improving the reliability of the connection between the first signal line 011 and the second signal line 021.

[0063] Optionally, the projection of the first blocking portion 30 along the first direction X covers the connection end 022, that is, under the blocking of the first blocking portion 30, the encapsulation layer 20 cannot directly invade the connection end 022 along the first direction X, and the extension path of the encapsulation layer 20 along the first direction X will be completely blocked by the first blocking portion 30, which can avoid the encapsulation layer 20 from directly extending to the connection end 022 along the first direction X to a greater extent.

[0064] Optional, see Figure 2 Combined with Figure 3 , along the direction perpendicular to the plane where the display panel 100 is located, the first notch section 32 overlaps the second signal line 021. The second signal line 021 passes through the area where the first notch section 32 is located, and the thickness of the first notch section 32 is thinner than other parts of the first blocking portion 30. Therefore, the second signal line 021 is routed through the area where the first notch section 32 is located, which can alleviate the phenomenon of uneven stress of the second signal line 021 itself due to the uneven thickness of the film layer, and reduce the probability of disconnection and virtual connection of the second signal line 021.

[0065] It should be noted that the second signal line 021 may be one or more, and the first notch section 32 may be one or more. In other words, one second signal line 021 may overlap with one first notch section 32; multiple second signal lines 021 may overlap with the same first notch section 32; or multiple second signal lines 021 may overlap with their respective corresponding first notch sections 32.

[0066] In some embodiments, please refer to Figure 2 Combined with Figure 3 , the number of the first signal line 011 and the second signal line 021 is multiple, the first blocking segments 31 and the first notch segments 32 are alternately distributed, so that each second signal line 021 extends to the non-display area NA shown via the first notch segments 32, and each first blocking segment 31 is located on the side of each connection end 022 facing the display area AA. Since there is a height difference between the first blocking portion 30 and the film layer in the surrounding area thereof, when the second signal line 021 is formed in the first blocking portion 30, two adjacent second signal lines 021 are prone to disconnection. Specifically, due to the height difference of the above-mentioned film layer, after certain film forming processes such as photolithography, the conductive metal or conductive liquid will remain at the root of the first blocking portion 30, that is, the conductive metal or conductive liquid will remain in the gap between the side wall of the first blocking portion 30 and the film layer below the first blocking portion 30, thereby causing a short circuit between adjacent second signal lines 021. Therefore, the plurality of second signal lines 021 correspond to respective first notch segments 32, and the first blocking segments 31 and the first notch segments 32 are alternately distributed, so that adjacent first notch segments 32 are not directly connected, thereby alleviating to a certain extent the phenomenon that the conductive materials remaining at the roots of the first notch segments 32 are connected to each other to form a conductive path, thereby reducing the risk of short circuit of the second signal line 021.

[0067] See also Figure 5 and Figure 6 , Figure 5 A schematic top view of a display panel provided in another embodiment of the present application is shown in FIG. Figure 6 Another embodiment of the present application corresponds to Figure 5 Schematic diagram of the internal structure of the P region.

[0068] In some embodiments, Figure 5 and Figure 6 As shown, the display panel 100 further includes a second barrier 60, which surrounds the first barrier 30 and is spaced apart from the first barrier 30, and the connection end 022 is located between the first barrier 30 and the second barrier 60. The second barrier 60 can prevent water, oxygen and external dirt from invading the display area AA, thereby improving the reliability of the display panel 100.

[0069] Optionally, the first barrier 30 and / or the second barrier 60 are closed patterns, that is, the first barrier 30 structure can be a closed structure formed around the display area AA, which can not only better block the encapsulation layer 20 from extending to the connection end 022 and the via 023, but also prevent the encapsulation layer 20 from covering more of the non-display area NA. The second barrier 60 structure is a closed structure formed around the display area AA, which can better prevent the risk of external water, oxygen and dirt invading the non-display area NA, and even invading the display area AA, to ensure that the display effect is not affected.

[0070] See also Figure 7 , Figure 7 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region.

[0071] In some embodiments, the first notch section 32 includes an opening section 321 and a first thinning section 322 distributed in the extension direction, and the second signal line 021 extends to the non-display area NA via the opening section 321 and / or the first thinning section 322. The opening section 321 means that the thickness of the first barrier 30 in this section is 0 or almost 0.

[0072] Optionally, the second signal line 021 passes through the opening section 321. Since the thickness of the opening section 321 is 0, the second signal line 021 passing through this section will not cause uneven routing stress. At the same time, the thickness at the opening section 321 is 0, so there is almost no residual conductive material. The conductive material remaining at the root of other areas of the first blocking portion 30 will be cut off at the opening section 321 and will not form a passage, thereby not causing the short circuit between two adjacent second signal lines 021, thereby improving circuit reliability.

[0073] Optionally, the second signal line 021 passes through the first thinning section 322. Due to the existence of the opening section 321, on the one hand, it is possible to avoid the conductive material remaining at the root of the first blocking portion 30 from being connected to form a conductive path, thereby preventing two adjacent second signal lines 021 from being short-circuited. On the other hand, since the blocking of the encapsulation layer 20 at the opening section 321 is the weakest, the probability that the encapsulation layer 20 extends to the non-display area NA via the opening section 321 is higher, that is, the possibility that the encapsulation layer 20 directly crosses the first blocking portion 30 and then covers the connection terminal 022 is smaller, and the energy required to overcome is greater. The path of the encapsulation layer 20 originally extending in a straight line along the first direction X is converted into a non-straight path, which increases the length of the extension path of the encapsulation layer 20 and reduces the risk of the connection terminal 022 being covered by the encapsulation layer 20.

[0074] It should be noted that the technical effect of the solution in which the second signal line 021 extends to the non-display area NA via the opening section 321 and the first thinned section 322 is similar to the above two solutions, so it will not be described in detail.

[0075] See also Figure 8 , Figure 8 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region.

[0076] In some embodiments, the display panel 100 includes a third barrier 70, the third barrier 70 is located between the first barrier 30 and the second barrier 60, the direction intersecting the extension direction of the first barrier 30 is defined as the second direction Y, and the third barrier 70 extends along the second direction Y. On the one hand, when the encapsulation layer 20 crosses the first barrier 30 and then spreads to the side of the first barrier 30 away from the display area AA, the third barrier 70 can play a secondary blocking role for the encapsulation layer 20. Along the extension direction of the first barrier 30, the third barrier 70 is arranged at intervals with a preset number of vias 023. In other words, the third barrier 70 can block the vias 023, and when the third barrier 70 is connected to the first barrier 30 and the second barrier 60, it can also enclose and form an isolation space for accommodating the vias 023, thereby preventing the encapsulation layer 20 from spreading to the vias 023 and the connection end 022 to a greater extent, and improving the reliability of the wiring connection at the connection end 022. In addition, the gap between the side wall of the third barrier portion 70 and the film layer below the third barrier portion 70 can accommodate the conductive material remaining in the previous process, thereby preventing the conductive material from gathering and concentrating to cause a short circuit in the second signal line 021 .

[0077] The present embodiment does not limit the structure of the third blocking portion 70 , and the third blocking portion 70 may be any structure extending along the second direction Y, such as a strip-shaped structure, an arc-shaped structure, and the like.

[0078] In some embodiments, there is a gap between at least one of the first barrier 30 and the second barrier 60 and the third barrier 70. The gap can be used to accumulate the conductive material remaining in the previous process, to prevent the conductive materials at different positions from converging and forming a connecting path, to prevent the short circuit of two adjacent second signal lines 021, and to improve the line reliability.

[0079] See also Fig. 9 , Fig. 9 Another embodiment of the present application corresponds to Figure 5 Schematic diagram of the internal structure of the P region.

[0080] Optional, such as Fig. 9 As shown, the third barrier 70 is connected to the first barrier 30 and the second barrier 60, and the third barrier 70 and the first barrier 30 and the second barrier 60 together enclose an isolation space for isolating the via hole and the connection end 022, thereby preventing the encapsulation layer from spreading to the via hole 023 and the connection end 022 to a greater extent.

[0081] See also Fig.10 , Fig.10 Another embodiment of the present application corresponds to Figure 1 Schematic diagram of the internal structure of the middle Q region.

[0082] In some embodiments, the second signal line 021 extends to the non-display area NA via the first thinning section 322; the third blocking portion 70 includes a buffer section 71, and the buffer section 71 is located between the connection end 022 and the first opening section 321, so that the extension path of the encapsulation layer 20 and the connection end 022 are mutually avoided. The encapsulation layer 20 spreads to the side of the first blocking portion 30 away from the display area AA via the first opening section 321, and the buffer section 71 located between the connection end 022 and the first opening section 321 can play a role in blocking and draining the spreading part of the encapsulation layer 20.

[0083] On the other hand, after the spreading part of the encapsulation layer 20 contacts the buffer segment 71, it can extend along the structural shape of the buffer segment 71, thereby increasing the extension path of the encapsulation layer 20, making the path further away from the connection end 022 and the via 023, preventing the connection end 022 from being covered and the via 023 from being shielded, thereby ensuring to a greater extent that the connection between the first signal line 011 and the second signal line 021 at the connection end 022 is stable and reliable.

[0084] See also Fig.11 , Fig.11 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region.

[0085] In some embodiments, Fig.11 As shown, the third blocking portion 70 includes a second thinning section 72, which defines the height direction of the third blocking portion 70 along a direction perpendicular to the substrate 10, and the height of the second thinning section 72 is less than the height of other parts of the third blocking portion 70. At least part of the second signal line 021 extends to the via 023 through the second thinning section 72 and is connected to the first signal line 011. The second signal line 021 passes through the first notch section 32 and then extends to the via 023 through the second thinning section 72. Since the thickness of the second thinning section 72 is relatively small, the thickness difference of the film layer in contact with the second signal line 021 is relatively small, that is, the second signal line 021 spans a relatively small film layer height, so the phenomenon of uneven stress between the second signal line 021 and the film layer in contact with the second signal line 021 can be effectively alleviated. The routing reliability of the second signal line 021 is improved, and the phenomenon of disconnection of the second signal line 021 is prevented.

[0086] See also Fig.12 , Fig.12 For an embodiment of this application Figure 1 Schematic diagram of the internal structure of the middle Q region.

[0087] In some embodiments, the display panel 100 further includes a fourth barrier 80, which is located on a side of the first barrier 30 away from the second barrier 60. There are multiple fourth barriers 80, which are arranged at intervals along the extension direction of the first barrier 30. Each fourth barrier 80 is located on a side of each opening segment 321 facing the display area AA. The fourth barrier segment arranged above the opening segment 321 can slow down the flow of the organic encapsulation layer 20. Because the fourth barrier segment is located between the opening segment 321 and the display area AA, the portion of the encapsulation layer 20 extending toward the opening segment 321 will be blocked by the fourth barrier segment, and then extends toward both sides of the fourth barrier segment. In other words, the straight extension path of the encapsulation layer 20 from the display area AA to the opening segment 321 is transformed into a non-straight extension path, thereby increasing the extension path of the encapsulation layer 20.

[0088] In some embodiments, the direction parallel to the plane where the display panel 100 is located and perpendicular to the extension direction is defined as the first direction X. The fourth blocking portion 80 overlaps with the opening section 321 in the first direction X. Therefore, the extension path of the encapsulation layer 20 along the first direction X will be directly blocked or slowed down by the fourth blocking section. The fourth blocking section is arranged above the opening section 321, and its blocking effect is better. In addition, after the encapsulation layer 20 extends to the fourth blocking section and contacts the fourth blocking section, it will extend along the side wall of the fourth blocking section, thereby extending the extension path of the encapsulation layer 20, thereby reducing the risk of the encapsulation layer 20 extending to the connection end 022 and the via 023. In addition, the gap formed by the side wall of the fourth blocking portion 80 and the surface of the film layer below the fourth blocking portion 80 can accommodate the conductive material remaining in the previous process to slow down the phenomenon that the conductive material gathers near the second signal line 021 and causes the second signal line 021 to short-circuit, thereby improving the display reliability of the display device.

[0089] In some embodiments, the projection of the fourth barrier 80 along the first direction X covers the opening section 321. The fourth barrier 80 is located directly above the opening section 321, and its blocking effect is better. Moreover, since the fourth barrier 80 covers the opening section 321, the encapsulation layer 20 will not directly extend to the opening section 321 after extending and dispersing along the side wall of the fourth barrier 80. The extension path of the encapsulation layer 20 is increased, thereby reducing the risk of the encapsulation layer 20 extending to the connection end 022 and the via 023.

[0090] In some embodiments, the first barrier 30 is reused as an organic functional layer, and the organic functional layer includes at least one of a planarization layer 401 and a support layer. An organic functional layer refers to a film layer of an organic material used to achieve a specific function. In the related art, the planarization layer 401 is used to planarize film layers of different thicknesses. The support layer, for example, may include a support post (PS), which is disposed on the side of the pixel definition layer 504 away from the substrate 10. In this embodiment, the organic functional layers such as the planarization layer 401 and the support layer in the related art can be reused as the first barrier 30. Therefore, the first barrier 30 can be manufactured using the existing process of the organic functional layer, and can be manufactured simultaneously with the organic functional layer. Not only is the manufacturing process mature, but the manufactured first barrier 30 and the organic functional layer are integrally connected, and its mechanical properties are better.

[0091] The embodiment of the present application further provides a display device. The display device includes the display panel 100 provided by any of the above embodiments. The display device provided by the embodiment of the present application can be any product or component with real functions such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc.

[0092] In summary, the embodiment of the present application provides a display panel 100 and a display device. By providing a first blocking portion 30 surrounding the display area AA in the non-display area NA, the encapsulation layer 20 can be blocked to a certain extent from spreading to the connection end 022 and the via hole 023 of the second signal line 021, thereby preventing the via hole 023 from being shielded and unable to be completely penetrated, and affecting the normal connection of the wiring near the connection end 022. The second signal line 021 can be connected to the first signal line 011 by crossing the first notch section 32 with a smaller thickness. The thickness of the crossed film layer is smaller, which can alleviate the phenomenon of uneven stress on the second signal line 021 itself and other film layers. The first blocking section 31 with a larger thickness can block the encapsulation layer 20, improve the encapsulation layer 20 directly spreading to the non-display area NA and affecting the connection of the via hole 023 of the connection end 022, and improve the stability of the connection between the connection end 022 of the second signal line 021 and the via hole 023 of the first signal line 011.

[0093] The above description is only a specific implementation mode of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and these modifications or substitutions should be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel has a display area and a non-display area surrounding the display area, and the display panel includes: substrate; A first signal line layer, located at one side of the substrate, the first signal line layer comprising a first signal line located in the non-display area; A packaging layer, located on a side of the first signal line layer away from the substrate; A second signal line layer, located on a side of the encapsulation layer away from the substrate, the second signal line layer comprising a second signal line at least partially located in the display area; A first blocking portion, located in the non-display area and arranged around the display area, the first blocking portion is located on the side of the second signal line layer facing the substrate and includes a first blocking segment and a first notch segment distributed along its own extension direction, and the thickness of the first blocking segment is greater than the thickness of the first notch segment; Among them, the second signal line extends from the display area to the non-display area through the first notch segment, the second signal line includes a connecting end located in the non-display area, and the second signal line is connected to the via hole of the first signal line in the non-display area through the connecting end, and the first blocking segment is located on the side of the connecting end facing the display area.

2. The display panel according to claim 1, characterized in that: A direction parallel to the plane where the display panel is located and perpendicular to the extending direction is defined as a first direction, and the connecting end and the first blocking portion overlap in the first direction.

3. The display panel according to claim 2, characterized in that: A projection of the first blocking portion along the first direction covers the connecting end.

4. The display panel according to claim 1, characterized in that: Along a direction perpendicular to the plane where the display panel is located, the first notch segment overlaps with the second signal line.

5. The display panel according to claim 1, characterized in that: There are multiple first signal lines and multiple second signal lines, and the first blocking segments and the first notch segments are alternately distributed so that each second signal line extends to the non-display area through the first notch segment, and each first blocking segment is located on the side of each connecting end facing the display area.

6. The display panel according to claim 1, characterized in that: The display panel further includes: The second blocking portion surrounds the first blocking portion and is spaced apart from the first blocking portion, and the connecting end is located between the first blocking portion and the second blocking portion.

7. The display panel according to claim 6, characterized in that: The first notch segment includes an opening segment and a first thinning segment distributed in the extending direction, and the second signal line extends to the non-display area via the opening segment and / or the first thinning segment.

8. The display panel according to claim 7, characterized in that: The display panel comprises: A third blocking portion, located between the first blocking portion and the second blocking portion, wherein a direction intersecting with an extending direction of the first blocking portion is defined as a second direction, and the third blocking portion extends along the second direction; Along the extending direction of the first blocking portion, the third blocking portion is arranged at intervals from a preset number of the via holes.

9. The display panel according to claim 8, characterized in that: There is a gap between at least one of the first blocking portion and the second blocking portion and the third blocking portion.

10. The display panel according to claim 8, characterized in that: The second signal line extends to the non-display area via the first thinned section; The third blocking portion includes a buffer section, and the buffer section is located between the connecting end and the opening section, so that the extending path of the packaging layer and the connecting end avoid each other.

11. The display panel according to claim 8, characterized in that: The third blocking portion comprises: a second thinning section, defining a height direction of the third blocking portion along a direction perpendicular to the substrate, wherein the height of the second thinning section is smaller than the height of other parts of the third blocking portion; At least a portion of the second signal line extends to the via hole through the second thinned section and is connected to the first signal line.

12. The display panel according to claim 7, characterized in that: The display panel further includes: The fourth blocking portion is located on a side of the first blocking portion away from the second blocking portion. There are multiple fourth blocking portions which are spaced apart along the extension direction of the first blocking portion. Each fourth blocking portion is located on a side of each opening segment facing the display area.

13. The display panel according to claim 12, characterized in that: A direction parallel to the plane where the display panel is located and perpendicular to the extending direction is defined as a first direction, and the fourth blocking portion overlaps with the opening section in the first direction.

14. The display panel according to claim 13, characterized in that: A projection of the fourth blocking portion along the first direction covers the opening section.

15. The display panel according to claim 1, characterized in that: The first blocking portion is reused as an organic functional layer, and the organic functional layer includes at least one of a planarization layer and a support layer.

16. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1 to 15.

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