Failure analysis methods for packaging tubes and semiconductor chips

Abstract

The present application provides a failure analysis method for a package shell and a semiconductor crystal. The package shell for semiconductor crystal testing includes: a shell and a connecting pin; wherein the shell is used to accommodate the semiconductor crystal therein; the shell includes a first observation window corresponding to the front side of the semiconductor crystal and a second observation window corresponding to the back side of the semiconductor crystal; the connecting pin is used to form a connection with the semiconductor crystal accommodated in the shell, and when the package shell is inserted into the slot in the first direction through the connecting pin for testing, the hot spot on the front side of the semiconductor crystal is located through the first observation window; when the package shell is inserted into the slot in the second direction through the connecting pin for testing, the hot spot on the back side of the semiconductor crystal is located through the second observation window. The package shell can make the process of locating the hot spots on the front and back sides of the semiconductor crystal relatively simple and time-consuming, effectively shortening the product testing cycle and improving the product testing success rate.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a failure analysis method for a packaged tube shell and a semiconductor crystal grain. Background Art

[0002] In the post-Moore's Law era, integrated circuits extend from traditional planar integration to three-dimensional integration. For example, two or more wafers are stacked to form semiconductor devices, which are cut into dies and packaged to form semiconductor packages. These semiconductor dies include at least a first chip and a second chip. In the process of reliability testing these semiconductor dies, it is often necessary to locate the hot spots on the front and back of the failed product for failure analysis.

[0003] At present, for semiconductor packages returned by customers, the pins of the semiconductor package are generally broken off and ground until the substrate of the first chip (such as a silicon substrate), that is, the back side of the semiconductor crystal grain, is exposed. Then the semiconductor package is turned upside down on a socket to expose the substrate of the first chip, and a micro-light microscope (EMMI) machine is used to capture the dynamic hotspot on the back side of the semiconductor crystal grain. After the dynamic hotspot on the back side is captured, the semiconductor package is completely unsealed and the semiconductor crystal grain is taken out by using fuming nitric acid, and the obtained semiconductor crystal grain is connected to a dual in-line package (DIP) tube shell so that the substrate of the second chip faces upward, that is, the front side of the semiconductor crystal grain, and the dynamic hotspot on the front side of the semiconductor crystal grain is captured by the EMMI (micro-light microscope) machine for failure analysis.

[0004] However, the process of capturing the hot spots on the front and back sides of semiconductor crystal grains by the above method is relatively complicated and time-consuming, which increases the product testing cycle and reduces the product testing success rate. Summary of the invention

[0005] The failure analysis method of the packaging tube shell and semiconductor grain provided in the present application is intended to solve the problem that the existing process of grabbing the hot spots on the front / back side of the semiconductor grain is relatively complicated and time-consuming, which increases the product testing cycle and reduces the product testing success rate.

[0006] In order to solve the above technical problems, a technical solution adopted in the embodiment of the present application is: to provide a packaging tube shell for semiconductor grain testing. The packaging tube shell includes: a shell and a connecting pin; wherein the shell is used to accommodate the semiconductor grain therein; the shell includes a first observation window corresponding to the front side of the semiconductor grain and a second observation window corresponding to the back side of the semiconductor grain; the connecting pin is used to form a connection with the semiconductor grain accommodated in the shell, and when the packaging tube shell is inserted into the slot in the first direction through the connecting pin for testing, the hot spot on the front side of the semiconductor grain is located through the first observation window; when the packaging tube shell is inserted into the slot in the second direction through the connecting pin for testing, the hot spot on the back side of the semiconductor grain is located through the second observation window.

[0007] Wherein, the shell has a first surface and a second surface opposite to each other, and the first observation window and the second observation window are respectively arranged on the first surface and the second surface; wherein, the first observation window and the second observation window are transparent; or, the first surface and the second surface are transparent as a whole to constitute the first observation window and the second observation window respectively; or, the first observation window is hollow to expose the front side of the semiconductor grain.

[0008] Wherein, the connecting pins include: a first group of pins, which are arranged in the lower half of the shell, and the packaging tube shell is inserted into the slot in a first direction through the first group of pins, so that the first observation window is away from the slot, so as to locate the hot spot on the front side of the semiconductor grain through the first observation window; a second group of pins, which are arranged in the upper half of the shell, and the packaging tube shell is inserted into the slot in a second direction through the second group of pins, so that the second observation window is away from the slot, so as to locate the hot spot on the back side of the semiconductor grain through the second observation window.

[0009] Wherein, the connecting pins include: a first group of pins and a second group of pins, the first group of pins and the second group of pins are arranged in a plane; the packaging tube shell is inserted into the slot in a first direction through the first group of pins, so that the first observation window is away from the slot, so as to locate the hot spot on the front side of the semiconductor grain through the first observation window; the packaging tube shell is inserted into the slot in a second direction through the second group of pins, so that the second observation window is away from the slot, so as to locate the hot spot on the back side of the semiconductor grain through the second observation window.

[0010] Among them, the first group of pins and / or the second group of pins are switched between a first configuration and a second configuration, and the first group of pins and / or the second group of pins are configured in the first configuration; the first group of pins and / or the second group of pins extend along an extension direction parallel to the first surface and / or the second surface; when the first group of pins or the second group of pins are configured in the second configuration, the first group of pins or the second group of pins are configured to face the direction of the slot so as to be inserted into the slot, so that the first observation window or the second observation window faces away from the slot.

[0011] Wherein, the connecting pins are a group of pins, and are arranged between a first direction and a second direction opposite to each other; when the connecting pins are arranged in the first direction and inserted in the slot, the first observation window is away from the slot to locate the hot spot on the front side of the semiconductor grain through the first observation window; when the connecting pins are arranged in the second direction and inserted in the slot, the second observation window is away from the slot to locate the hot spot on the back side of the semiconductor grain through the second observation window.

[0012] Wherein, the first observation window and / or the second observation window is made of a transparent glass material, and the melting point of the transparent glass material is not less than 160°C.

[0013] Wherein, the connecting pins are distributed in a dual-in-line plug-in manner.

[0014] Wherein, the semiconductor crystal grain includes at least two chips.

[0015] In order to solve the above technical problems, another technical solution adopted in the embodiment of the present application is: to provide a method for failure analysis of semiconductor grains. The method includes: providing a semiconductor grain; accommodating the semiconductor grain in a packaging tube shell and connecting it with the connecting pins of the packaging tube shell; wherein the packaging tube shell is the packaging tube shell involved above; inserting the packaging tube shell in a slot in a first direction through the connecting pins for testing, and locating the hot spot on the front side of the semiconductor grain through the first observation window of the packaging tube shell; inserting the packaging tube shell in a second direction through the connecting pins for testing, and locating the hot spot on the back side of the semiconductor grain through the second observation window of the packaging tube shell.

[0016] The beneficial effects of the present application are as follows: compared with the prior art, the packaging shell for semiconductor grain testing provided by the embodiment of the present application is provided with a shell and connecting pins, and the shell is used to accommodate the semiconductor grain, and the shell includes a first observation window corresponding to the front side of the semiconductor grain and a second observation window corresponding to the back side of the semiconductor grain, so that when the packaging shell is inserted into the slot in the first direction through the connecting pins for testing, the hot spot on the front side of the semiconductor grain is located through the first observation window; when the packaging shell is inserted into the slot in the second direction through the connecting pins for testing, the hot spot on the back side of the semiconductor grain is located through the second observation window, thereby realizing the positioning of the hot spots on the front and back sides of the semiconductor grain; wherein, in the specific application process, since the packaging shell only needs to switch the direction in which the connecting pins are inserted into the slot, the hot spot on the front side and the hot spot on the back side of the semiconductor grain can be located respectively through the first observation window and the second observation window on the packaging shell, which not only makes the hot spot positioning process on the front and back sides of the semiconductor grain simpler and less time-consuming, effectively shortens the product testing cycle, and the packaging shell makes the method of positioning the hot spots on the front and back sides of the semiconductor grain the same, thereby effectively improving the product testing success rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:

[0018] Figure 1 A schematic structural diagram of a first embodiment of a packaging tube shell for semiconductor die testing provided by the present application when not in use;

[0019] Figure 2 for Figure 1 SS section view of the middle shell;

[0020] Figure 3 A schematic cross-sectional view of a semiconductor crystal grain provided by an embodiment of the present application;

[0021] Figure 4 for Figure 1 A schematic diagram of the structure of the package shell when the first group of pins are configured to the second configuration;

[0022] Figure 5 for Figure 1 A schematic diagram of the structure when the second group of pins of the package shell is configured to a second configuration;

[0023] Figure 6 A schematic structural diagram of a second embodiment of the packaging tube shell for semiconductor die testing provided by the present application when not in use;

[0024] Figure 7 for Figure 6 A schematic diagram of the structure when the package shell is configured in a first direction;

[0025] Figure 8 for Figure 6 A schematic diagram of the structure when the package shell is configured in the second direction;

[0026] Fig. 9 A failure analysis method for semiconductor grains is provided in one embodiment of the present application.

[0027] BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Package tube shell 10; shell 11; receiving cavity 111; first observation window 112; second observation window 113; connecting pins 12; first group of pins 121; second group of pins 122; semiconductor die 20; first wafer 21; second wafer 22; first direction A; second direction B. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0030] The terms "first", "second", "third" in this application are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of the features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the embodiments of this application, all directional indications (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication also changes accordingly. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the steps or units listed, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

[0031] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0032] The present application is described in detail below with reference to the accompanying drawings and embodiments.

[0033] See also Figure 1 to Figure 2 , Figure 1 A schematic structural diagram of a first embodiment of a packaging tube shell for semiconductor die testing provided by the present application when not in use; Figure 2 for Figure 1 In this embodiment, a package tube shell for semiconductor die testing is provided, such as Figure 3 As shown, Figure 3 The cross-sectional schematic diagram of a semiconductor die provided in an embodiment of the present application; the semiconductor die 20 is a die formed by cutting a first wafer 21 and a second wafer 22 connected together, and the semiconductor die 20 includes at least two chips. The package tube shell 10 used for testing the semiconductor die 20 can be a DIP tube shell, which specifically includes a housing 11 and connecting pins 12.

[0034] Among them, Figure 1 and Figure 2 As shown, the housing 11 has a receiving cavity 111, and the receiving cavity 111 is used to receive the semiconductor crystal grain 20 therein, for example, the semiconductor crystal grain 20 is fixed in the receiving cavity 111 by glue. The housing 11 includes a first observation window 112 and a second observation window 113 at a position corresponding to the receiving cavity 111; wherein the first observation window 112 is arranged corresponding to the front side of the semiconductor crystal grain 20 received in the housing 11, and the second observation window 113 is arranged corresponding to the back side of the semiconductor crystal grain 20 received in the housing 11, that is, when locating the hot spots on the front and back sides of the semiconductor crystal grain 20, the micro-light microscope can observe the front side of the semiconductor crystal grain 20 received in the housing 11 through the first observation window 112, so as to grasp and locate the hot spots on the front side of the semiconductor crystal grain 20, and the micro-light microscope can observe the back side of the semiconductor crystal grain 20 received in the housing 11 through the second observation window 113, so as to grasp and locate the hot spots on the back side of the semiconductor crystal grain 20. Among them, the specific process of using a micro-light microscope to locate the hot spots on the front and back sides of the semiconductor grain 20 is the same or similar to the specific process of using a micro-light microscope to locate the hot spots on the back side of the semiconductor grain 20 in the prior art. For details, please refer to the prior art and will not be repeated here.

[0035] Specifically, the housing 11 has a first surface and a second surface facing each other, and the first observation window 112 and the second observation window 113 are respectively arranged on the first surface and the second surface of the housing 11; and the first observation window 112 and the second observation window 113 are transparent; or, the entire surface of the first surface and / or the second surface of the housing 11 is transparent to respectively form the first observation window 112 and the second observation window 113; or the first observation window 112 is hollowed out to expose the front of the semiconductor crystal grain 20, so that the hot spot on the front of the semiconductor crystal grain 20 can be directly observed. Specifically, the first observation window 112 and / or the second observation window 113 can be made of a transparent glass material, and the melting point of the transparent glass material is not less than 160°C, so as to avoid the problem of the high temperature during the connection process between the semiconductor crystal grain 20 and the housing 11 causing damage to the housing 11.

[0036] In one embodiment, the shell 11 includes a main body and a cover body; the main body has a receiving groove, and a second observation window 113 is formed on the bottom wall of the receiving groove; the cover body is at least covered on the notch of the receiving groove to cooperate with the receiving groove to form a receiving cavity 111, and the cover body forms a first observation window 112 on at least the portion corresponding to the receiving groove.

[0037] Please continue reading Figure 1 The connection pin 12 is provided on the housing 11, and is used to form a connection with the semiconductor crystal grain 20 accommodated in the housing 11. Specifically, a solder pad is provided in the receiving cavity 111 of the housing 11 at a position corresponding to the external pin of the semiconductor crystal grain 20, and the solder pad is connected to the connection pin 12 through a conductive hole to achieve the connection between the connection pin 12 and the semiconductor crystal grain 20 accommodated in the housing 11. Specifically, the semiconductor crystal grain 20 can be connected to the solder pad.

[0038] In a specific embodiment, when the package shell 10 is inserted into a socket in a first direction A through the connecting pins 12 for reliability testing, the first observation window 112 is away from the socket, and the micro-light microscope locates the hot spot on the front side of the semiconductor die 20 through the first observation window 112; when the package shell 10 is inserted into the socket in a second direction B through the connecting pins 12 for reliability testing, the second observation window 113 is away from the socket, and the micro-light microscope locates the hot spot on the back side of the semiconductor die 20 through the second observation window 113. The first direction A and the second direction B are opposite directions.

[0039] In this way, in the process of using the package tube shell 10 to locate the hot spots on the front and back sides of the semiconductor crystal grain 20, it is only necessary to change the direction in which the connecting pin 12 is inserted into the slot, so that the first observation window 112 and the second observation window 113 of the package tube shell 10 are respectively arranged away from the slot, so that the micro-light microscope can locate the hot spots on the front and back sides of the semiconductor crystal grain 20 through the first observation window 112 and the second observation window 113 respectively; compared with the existing method of first grinding the semiconductor device until the back side of the semiconductor crystal grain 20 is exposed, and then using the EMMI (micro-light microscope) machine to capture the dynamic hotspot on the back side of the semiconductor crystal grain 20; then unsealing the semiconductor device to obtain the semiconductor crystal grain 20, and connecting the obtained semiconductor crystal grain 20 to a dual in-line package (dual in-line package, DIP) tube shell, and using the EMMI (micro-light microscope) machine to capture the dynamic hotspot on the front side of the semiconductor crystal grain 20 The solution of not only locating the hot spots on the front and back sides of the semiconductor crystal grain 20 through the package tube shell 10 to perform failure analysis, but also the package tube shell 10 makes the process of locating the hot spots on the front and back sides of the semiconductor crystal grain 20 simpler and less time-consuming, thereby effectively shortening the product test cycle; at the same time, the package tube shell 10 makes the method of locating the hot spots on the front and back sides of the semiconductor crystal grain 20 the same, thereby effectively improving the test success rate of the product.

[0040] In a specific embodiment, please continue to refer to Figure 1 , the connection pins 12 include a first group of pins 121 and a second group of pins 122. The first group of pins 121 and the second group of pins 122 each include a plurality of pins, and the plurality of pins are distributed in a dual in-line arrangement; specifically, the plurality of pins are symmetrically distributed on both sides of the housing 11. The number of the first group of pins 121 and the second group of pins 122 is the same as the number of external pins of the semiconductor die 20, and the positions of the first group of pins 121 and the second group of pins 122 may correspond one-to-one to the positions of the external pins of the semiconductor die 20.

[0041] The first set of pins 121 is disposed at the lower half of the housing 11, and the package shell 10 can be inserted into the slot in the first direction A through the first set of pins 121, so that the first observation window 112 is away from the slot, so as to locate the hot spot on the front side of the semiconductor die 20 through the first observation window 112. Specifically, the first set of pins 121 can be disposed on the second surface of the housing 11.

[0042] In a specific embodiment, the first group of pins 121 can be switched between a first configuration and a second configuration. Figure 1As shown, when the first group of pins 121 are configured in the first configuration, the first group of pins 121 extend along an extension direction parallel to the second surface to reduce the volume of the package tube shell 10. Figure 4 , Figure 4 for Figure 1 The schematic diagram of the structure when the first group of pins of the package tube shell is configured to the second configuration is shown; when the first group of pins 121 are configured in the second configuration, the first group of pins 121 are configured to face the direction of the slot to be inserted into the slot, so that the first observation window 112 is away from the slot. Specifically, the first group of pins 121 can be switched between the first configuration and the second configuration by bending. Of course, the switching between the first configuration and the second configuration can also be achieved by hinges with the shell.

[0043] like Figure 1 and Figure 5 As shown, Figure 5 for Figure 1 The second group of pins 122 of the package shell are configured to the second configuration; the second group of pins 122 are arranged on the upper part of the shell 11, and the package shell 10 can be inserted into the slot in the second direction B through the second group of pins 122, so that the second observation window 113 is away from the slot, so as to locate the hot spot on the back side of the semiconductor die 20 through the second observation window 113. Specifically, the second group of pins 122 can be arranged on the first surface of the shell 11; of course, the first group of pins 121 can also be arranged on the side of the shell 11, and the present application does not limit this.

[0044] In a specific embodiment, Figure 1 and Figure 5 As shown, the second group of pins 122 can be switched between a first configuration and a second configuration. Figure 1 As shown, when the second group of pins 122 are configured in the first configuration, the second group of pins 122 extend along an extension direction parallel to the first surface to reduce the volume of the package tube shell 10. Figure 5 As shown, when the second group of pins 122 are configured in the second configuration, the second group of pins 122 are configured to face the direction of the slot so as to be inserted into the slot, so that the second observation window 113 is away from the slot. It can be understood that in a specific application process, the package tube shell 10 is limited to inserting only one group of pins from the first group of pins 121 and the second group of pins 122 into the slot at a time. For the convenience of testing, when one group of pins from the first group of pins 121 and the second group of pins 122 is configured in the second configuration, the other group of pins is configured to the first configuration.

[0045] In this specific embodiment, the connecting pins 12 are arranged to include a first group of pins 121 and a second group of pins 122, and the first group of pins 121 are arranged at the lower half of the housing 11, so that after the first group of pins 121 are inserted into the slot along the first direction A, the first observation window 112 is turned away from the slot, thereby locating the hot spot on the front side of the semiconductor crystal grain 20 through the first observation window 112; at the same time, the second group of pins 122 are arranged at the upper half of the housing 11, so that after the second group of pins 122 are inserted into the slot along the second direction B, the second observation window 113 is turned away from the slot, and then the hot spot on the back side of the semiconductor crystal grain 20 is located through the second observation window 113; in this way, during the test process, when one group of pins 121 is inserted into the slot along the first direction A, the first observation window 112 is turned away from the slot, thereby locating the hot spot on the back side of the semiconductor crystal grain 20 through the second observation window 113. After the pins (such as the first group of pins 121) are inserted into the slot and the hot spot positioning of one of the front and back sides of the semiconductor grain 20 (such as the front side) is completed, it is only necessary to flip the packaging tube shell 10 so that the other group of pins (such as the second group of pins 122) are bent and face the slot and inserted into the slot, and then the hot spot of the other side (such as the back side) of the front and back sides of the semiconductor grain 20 can be positioned. The operation steps are relatively small, the process is relatively simple, and time and labor are saved. At the same time, compared with the structure of a group of connecting pins 12, there is no need to bend the connecting pins 12 back and forth 180° to make them face the first direction A or the second direction B, which can effectively reduce the probability of shortening the service life of the connecting pins 12 due to bending the connecting pins 12 back and forth.

[0046] In one embodiment, the connecting pins include a first group of pins and a second group of pins, and the first group of pins and the second group of pins are arranged in a plane (not shown); the packaging tube shell is inserted into the slot in a first direction through the first group of pins, so that the first observation window is away from the slot, so as to locate the hot spot on the front side of the semiconductor grain through the first observation window; the packaging tube shell is inserted into the slot in a second direction through the second group of pins, so that the second observation window is away from the slot, so as to locate the hot spot on the back side of the semiconductor grain through the second observation window.

[0047] The use process of the first group of pins and the second group of pins is the same as that of the previous embodiment, and will not be repeated here.

[0048] In another specific embodiment, see Figure 6 , Figure 6 This is a schematic diagram of the structure of the second embodiment of the package tube shell for semiconductor die testing provided by the present application when it is not in use; the difference from the above embodiment is that in this specific embodiment, the connecting pins 12 are a group of pins. The group of pins is arranged on the housing 11 and can be arranged between the first direction and the second direction opposite to each other. Figure 7 , Figure 7 for Figure 6The schematic diagram of the structure when the package shell is configured in the first direction; when the connecting pin 12 is configured in the first direction and inserted into the slot, the first observation window 112 is away from the slot, so as to locate the hot spot on the front side of the semiconductor die 20 through the first observation window 112; see Figure 8 , Figure 8 for Figure 6 The schematic diagram of the structure when the package shell is configured in the second direction is shown; when the connecting pin 12 is configured in the second direction and inserted in the slot, the second observation window 113 is away from the slot, so as to locate the hot spot on the back side of the semiconductor die 20 through the second observation window 113. It can be understood that the first direction A and the second direction B are both directions toward the slot, and the difference is that the first direction A refers to a direction perpendicular to the second surface of the shell 11 and away from the second surface, and the second direction B refers to a direction perpendicular to the first surface of the shell 11 and away from the first surface of the shell 11.

[0049] In this specific embodiment, the connecting pin 12 includes a group of pin structures, and the connecting pin 12 can be configured between a first direction and a second direction opposite to each other, and then inserted into the slot along the first direction or the second direction respectively, so that the first observation window 112 or the second observation window 113 is away from the slot, and then the hot spots on the front and back sides of the semiconductor grain 20 are located respectively; this not only can locate the hot spots on the front and back sides of the semiconductor grain 20, but also compared with the structure of two groups of pins, the structure is simpler and cost-saving.

[0050] It is worth noting that there can be many ways to set up and use the connecting pins, and they are not limited to the contents described in the above embodiments. For example, when the connecting pins include a first group of pins and a second group of pins, the first group of pins and the second group of pins can both be bent in the first direction and the second direction. Thus, when a problem occurs with one group of pins, the other group of pins can be bent in the first direction and the second direction and inserted into the slot so that the first observation window and the second observation window are away from the slot, thereby locating the hot spots on the front and back sides of the semiconductor grain respectively. Such a setting can increase the service life of the connecting pins.

[0051] The package tube shell 10 for testing a semiconductor die 20 provided in this embodiment is provided with a shell 11 and a connecting pin 12, and the shell 11 is used to accommodate the semiconductor die 20, and the shell 11 includes a first observation window 112 corresponding to the front side of the semiconductor die 20 and a second observation window 113 corresponding to the back side of the semiconductor die 20, so that when the package tube shell 10 is inserted into the slot in a first direction A for testing through the connecting pin 12, the hot spot on the front side of the semiconductor die 20 can be located through the first observation window 112; when the package tube shell 10 is inserted into the slot in a second direction B for testing through the connecting pin 12, the hot spot on the back side of the semiconductor die 20 can be located through the second observation window 113. The hot spots on the front and back sides of the semiconductor crystal grain 20 can be located; wherein, in a specific application process, since the packaging tube shell 10 only needs to switch the direction in which the connecting pin 12 is inserted into the slot, the hot spots on the front and back sides of the semiconductor crystal grain 20 can be located respectively through the first observation window 112 and the second observation window 113 on the packaging tube shell 10. The packaging tube shell 10 not only makes the hot spot positioning process on the front and back sides of the semiconductor crystal grain 20 simpler and less time-consuming, thereby effectively shortening the product test cycle, but also the packaging tube shell 10 can make the method of locating the hot spots on the front and back sides of the semiconductor crystal grain 20 the same, thereby effectively improving the product test success rate.

[0052] See also Fig. 9 , Fig. 9 A method for analyzing failure of semiconductor grains provided in one embodiment of the present application. The method specifically comprises:

[0053] Step S1: providing semiconductor crystal grains.

[0054] In one embodiment, step S1 includes:

[0055] Step S11: providing a semiconductor package.

[0056] The semiconductor package includes a semiconductor crystal grain 20 and a packaging layer for packaging the semiconductor crystal grain 20. The semiconductor crystal grain 20 includes at least two chips.

[0057] Step S12: unpacking the semiconductor package to obtain semiconductor dies.

[0058] Specifically, the specific implementation process of opening the semiconductor package to obtain the semiconductor grain 20 is the same or similar to the specific implementation process of opening the semiconductor package to obtain the semiconductor grain 20 in the prior art, and can achieve the same or similar technical effects. For details, please refer to the prior art and will not be repeated here.

[0059] In another embodiment, the semiconductor die 20 may be obtained directly by dicing from a wafer.

[0060] Step S2: placing the semiconductor die in a package shell and connecting the semiconductor die to the connecting pins of the package shell.

[0061] The package tube shell 10 is specifically the package tube shell 10 involved in the above embodiment. The specific structure and function thereof can be found in the above related text description, which will not be repeated here.

[0062] In a specific embodiment, the semiconductor die 20 is connected inside the package shell 10 and connected to the pads inside the package shell 10 one by one, so as to form an electrical connection with the connection pins 12 of the package shell 10 through the pads and the vias connected to the pads.

[0063] Step S3: inserting the package shell into the slot in a first direction through the connecting pins for testing, and locating the hot spot on the front side of the semiconductor die through the first observation window of the package shell.

[0064] Step S4: inserting the package shell into the slot in the second direction through the connecting pins for testing, and locating the hot spot on the back side of the semiconductor die through the second observation window of the package shell.

[0065] In a specific embodiment, the connecting pins 12 include a first group of pins 121 and a second group of pins 122. Steps S3 and S4 specifically include: configuring the first group of pins 121 to the second configuration so that the first group of pins 121 extend in the direction of the slot and are inserted into the slot, and then using a micro-light microscope to locate the hot spot on the front side of the semiconductor crystal grain 20 through the first observation window 112 of the package tube shell 10; after completing the hot spot location on the front side of the semiconductor crystal grain 20, configuring the first group of pins 121 to the first configuration, and configuring the second group of pins 122 to the second configuration so that the second group of pins 122 extend in the direction of the slot and are inserted into the slot, and then using a micro-light microscope to locate the hot spot on the front side of the semiconductor crystal grain 20; after completing the hot spot location on the front side of the semiconductor crystal grain 20, configuring the first group of pins 121 to the first configuration, and configuring the second group of pins 122 to the second configuration so that the second group of pins 122 extend in the direction of the slot and are inserted into the slot, and then using A micro-light microscope is used to locate the hot spot on the back side of the semiconductor grain 20 through the second observation window 113 of the packaging tube shell 10, thereby completing the hot spot positioning on the front and back sides of the semiconductor grain 20; this process only requires unsealing the semiconductor device, then connecting the semiconductor grain 20 to the packaging tube shell 10, and then flipping the packaging tube shell 10 to allow the first group of pins 121 or the second group of pins 122 to be inserted into the slot to achieve the hot spot positioning on the front and back sides of the semiconductor grain 20. Compared with the prior art, the process is simpler, with fewer operating steps, and the test cycle is greatly shortened. In addition, the method for locating the hot spots on the front and back sides of the semiconductor grain 20 is the same, which effectively improves the test success rate.

[0066] In another specific embodiment, the connecting pin 12 includes a group of pins, and steps S3-S4 specifically include: configuring the connecting pin 12 to a first direction and inserting it into a slot, and then locating the hot spot on the front side of the semiconductor crystal grain 20 through the first observation window 112; after completing the hot spot positioning on the front side of the semiconductor crystal grain 20, configuring the connecting pin 12 to a second direction and inserting it into the slot, and then locating the hot spot on the back side of the semiconductor crystal grain 20 through the second observation window 113. This process only requires unsealing the semiconductor device, and then connecting the semiconductor crystal grain 20 to the package tube shell 10, and then switching the direction of the connecting pin 12 to insert it into the slot from different directions, so that the first observation window 112 or the second observation window 113 is set away from the slot, and the hot spots on the front and back sides of the semiconductor crystal grain 20 can be located respectively by using a micro-light microscope through the first observation window 112 and the second observation window 113. Compared with the prior art, the process is simpler, the operation steps are fewer, and the test cycle is greatly shortened; and the method of locating the hot spots on the front and back sides of the semiconductor crystal grain 20 is the same, thereby effectively improving the test success rate.

[0067] It should be noted that, in a specific embodiment, the order of locating the hot spots on the front and back sides of the semiconductor die 20 is not limited.

[0068] The failure analysis method of semiconductor crystal grains provided in the present embodiment comprises providing a semiconductor crystal grain 20; accommodating the semiconductor crystal grain 20 in the package tube shell 10 involved in the above-mentioned embodiment and connecting it with the connecting pin 12 of the package tube shell 10; then inserting the package tube shell 10 into the slot in the first direction A through the connecting pin 12 for testing, and locating the hot spot on the front side of the semiconductor crystal grain 20 through the first observation window 112 of the package tube shell 10; inserting the package tube shell 10 into the slot in the second direction B through the connecting pin 12 for testing, and locating the hot spot on the back side of the semiconductor crystal grain 20 through the second observation window 113 of the package tube shell 10; thereby, not only can the hot spots on the front and back sides of the semiconductor crystal grain 20 be located by using a micro-light microscope through the first observation window 112 and the second observation window 113, but also The method can locate the hot spots on the front and back sides of the semiconductor grain 20 by simply switching the direction in which the connecting pin 12 is inserted into the slot. Compared with the existing method of first grinding the back side of the semiconductor device until the back side of the semiconductor grain 20 is exposed, and then using a micro-light microscope to capture the dynamic hot spots on the back side of the semiconductor grain 20; then opening the semiconductor device to obtain the semiconductor grain 20, connecting the obtained semiconductor grain 20 to the DIP tube shell, and using a micro-light microscope to capture the dynamic hot spots on the front side of the semiconductor grain 20, the operation process of the present application is relatively simple, time-consuming, and effectively shortens the product test cycle. At the same time, the method of locating the hot spots on the front and back sides of the semiconductor grain 20 in the present application is the same, which effectively improves the product test success rate.

[0069] The above are only implementation methods of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A package tube shell for semiconductor die testing, characterized in that: include: A shell, used to accommodate the semiconductor crystal grain therein; the shell comprises a first observation window corresponding to the front side of the semiconductor crystal grain and a second observation window corresponding to the back side of the semiconductor crystal grain; The connecting pins include at least one group of pins, and the at least one group of pins can be configured to a first direction and / or a second direction different from the first direction; the connecting pins are used to form a connection with the semiconductor grain accommodated in the shell, and when the packaging tube shell is inserted into the slot in the first direction through the connecting pins for testing, the hot spot on the front side of the semiconductor grain is located through the first observation window; when the packaging tube shell is inserted into the slot in the second direction through the connecting pins for testing, the hot spot on the back side of the semiconductor grain is located through the second observation window.

2. The package shell according to claim 1, characterized in that: The housing has a first surface and a second surface opposite to each other, and the first observation window and the second observation window are respectively arranged on the first surface and the second surface; The first observation window and the second observation window are transparent; or the first surface and the second surface are transparent as a whole to respectively constitute the first observation window and the second observation window; or the first observation window is hollow to expose the front side of the semiconductor grain.

3. The package shell according to claim 1, characterized in that: The connecting pins include: A first group of pins is arranged at the lower part of the housing, and the package shell is inserted into the slot in a first direction through the first group of pins, so that the first observation window is away from the slot, so as to locate the hot spot on the front side of the semiconductor die through the first observation window; A second group of pins is arranged on the upper part of the shell, and the package shell is inserted into the slot in a second direction through the second group of pins, so that the second observation window is away from the slot to locate the hot spot on the back side of the semiconductor grain through the second observation window.

4. The package shell according to claim 1, characterized in that: The connecting pins include: A first group of pins and a second group of pins, wherein the first group of pins and the second group of pins are arranged in a plane; The package shell is inserted into the slot in a first direction through the first group of pins, so that the first observation window faces away from the slot, so as to locate the hot spot on the front side of the semiconductor die through the first observation window; The package shell is inserted into the slot in a second direction through the second group of pins, so that the second observation window faces away from the slot, so as to locate the hot spot on the back side of the semiconductor die through the second observation window.

5. The package tube shell according to claim 3 or 4, characterized in that: The first group of pins and / or the second group of pins are switched between a first configuration and a second configuration; When the first group of pins and / or the second group of pins are configured in the first configuration, the first group of pins and / or the second group of pins extend along an extension direction parallel to the first surface of the housing and / or the second surface of the housing; When the first group of pins or the second group of pins are configured in the second configuration, the first group of pins or the second group of pins are configured to face the direction of the slot so as to be inserted into the slot, so that the first observation window or the second observation window faces away from the slot.

6. The package shell according to claim 1, characterized in that: The connecting pins are a group of pins, and are arranged between a first direction and a second direction that are opposite to each other; When the connecting pin is arranged in the first direction and inserted into the slot, the first observation window faces away from the slot, so as to locate the hot spot on the front side of the semiconductor die through the first observation window; When the connecting pin is arranged in the second direction and inserted into the slot, the second observation window is away from the slot, so as to locate the hot spot on the back side of the semiconductor die through the second observation window.

7. The package shell according to claim 1, characterized in that: The first observation window and / or the second observation window is made of a transparent glass material, and the melting point of the transparent glass material is not less than 160°C.

8. The package shell according to claim 1, characterized in that: The connecting pins are distributed in a dual in-line plug-in manner.

9. The package shell according to claim 1, characterized in that: The semiconductor die includes at least two chips.

10. A method for failure analysis of semiconductor grains, characterized in that: include: Providing semiconductor chips; The semiconductor die is housed in a packaging tube shell and connected to a connecting pin of the packaging tube shell; wherein the packaging tube shell is a packaging tube shell as claimed in any one of claims 1 to 9; Inserting the package tube shell into a slot in a first direction through the connecting pins for testing, and locating the hot spot on the front side of the semiconductor die through the first observation window of the package tube shell; The package shell is inserted into the slot in a second direction through the connecting pins for testing, and the hot spot on the back side of the semiconductor die is located through the second observation window of the package shell.

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