A back crystalline silicon battery and its preparation method

By using the front metal gate lines of silver and aluminum in the back crystalline silicon battery, the problem of local heavy doping and high-temperature boron expansion is solved, simple metallization and high-efficiency light absorption are achieved, and the electrode shading area is reduced and the electrode is improved. Battery performance.

CN115241303BActive Publication Date: 2024-12-10SUZHOU TALESUN SOLAR TECH CO LTD +1
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Patent Information

Application Number
CN202110445224.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-04-23
Publication Date
2024-12-10
Estimated Expiration
2041-04-23

AI Technical Summary

Technical Problem

In the prior art, the front metallization of the back crystalline silicon battery based on P-type silicon wafers has problems of complex local heavy doping steps and high-temperature boron expansion, and the width of the laser hole and aluminum gate lines leads to a large light-shielding area of ​​the electrode, affecting light absorption. efficiency.

Method used

The front metal gate line of silver and aluminum is used to contact the silicon substrate through the aluminum electrode. The silver electrode is responsible for current conduction to avoid complex local heavy doping and high-temperature boron expansion, and silver is formed by sintering non-fired through silver paste at low temperature. The electrode ensures that the silver electrode has a narrow width and a small light-shielding area.

Benefits of technology

Simple metallization steps are implemented, which reduces thermal damage to P-type silicon wafers, improves the light absorption efficiency of the silicon wafers, reduces the electrode light shading area, and improves battery performance.

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Abstract

The present invention provides a back crystalline silicon cell and a preparation method thereof, wherein the back crystalline silicon cell comprises: a P-type silicon wafer, a front passivation anti-reflection layer, and a front metal grid line; wherein the front passivation anti-reflection layer is formed on the front of the P-type silicon wafer, and the front metal grid line is a periodic segmented structure, and a single periodic segmented structure comprises an aluminum electrode and a front silver electrode, wherein the aluminum electrode is formed on the front passivation anti-reflection layer and penetrates the front passivation anti-reflection layer to contact the P-type silicon wafer, and the front silver electrode is formed on the front passivation anti-reflection layer and overlaps and contacts the aluminum electrode. The back crystalline silicon cell of the present invention does not require a complicated local heavy doping step, nor does it require high-temperature boron diffusion; and the silver electrode has a small light-shielding area, thereby improving the light absorption efficiency of the silicon wafer.
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Description

Technical Field

[0001] The present invention relates to the field of photovoltaic cells, and in particular to a back crystalline silicon cell and a preparation method thereof. Background Art

[0002] The front electrode of the back crystalline silicon cell based on P-type silicon wafer generally uses silver aluminum paste, but in order for the silver aluminum paste to form a good ohmic contact with silicon, the silicon in the silver aluminum paste contact area needs to be locally heavily doped with boron. This has two problems. First, the steps to achieve local heavy doping are complicated, and second, the high temperature of boron diffusion will cause the minority carrier lifetime of the P-type silicon wafer to decrease.

[0003] If laser drilling and aluminum paste are used for metallization, although better ohmic contact can be achieved, it is limited by the alignment accuracy of laser drilling and aluminum grid line printing. The width of the aluminum grid line is generally more than 150 microns, which is much larger than the 40 microns width of the silver aluminum paste grid line. The increase in the grid line width will increase the electrode shading area and affect the light absorption of the silicon wafer.

[0004] Therefore, it is particularly important to solve the problem of front metallization of crystalline silicon cells based on P-type silicon wafers. Summary of the invention

[0005] In order to solve the above technical problems, the present invention discloses a back crystalline silicon cell and a preparation method thereof. The back crystalline silicon cell of the present invention does not require complicated local re-doping steps, nor does it require high-temperature boron diffusion; and the silver electrode has a small shading area, thereby improving the light absorption efficiency of the silicon wafer.

[0006] To achieve the above-mentioned purpose, the technical solution of the present invention provides a back crystalline silicon cell, which includes: a P-type silicon wafer, a front passivation anti-reflection layer, and a front metal grid line; wherein the front passivation anti-reflection layer is formed on the front side of the P-type silicon wafer, and the front metal grid line is a periodic segmented structure, and a single period of the segmented structure includes an aluminum electrode and a front silver electrode, wherein the aluminum electrode is formed on the front passivation anti-reflection layer and penetrates the front passivation anti-reflection layer to contact the P-type silicon wafer, the front silver electrode is formed on the front passivation anti-reflection layer and overlaps with the aluminum electrode, and an aluminum-doped surface field is formed at the position where the P-type silicon wafer contacts the aluminum electrode.

[0007] Furthermore, the width of the front silver electrode is narrower than the width of the aluminum electrode.

[0008] Furthermore, the rear crystalline silicon cell includes a plurality of mutually parallel front metal grid lines covering the entire front surface of the cell.

[0009] Furthermore, the aluminum electrodes and the front silver electrodes of two adjacent front metal grid lines are arranged alternately.

[0010] Furthermore, the front passivation anti-reflection layer includes a silicon nitride layer and an aluminum oxide layer, wherein the aluminum oxide layer is stacked on the front side of the P-type silicon wafer, and the silicon nitride layer is stacked on the aluminum oxide layer.

[0011] Furthermore, the back crystalline silicon cell also includes a back passivation contact layer, a back silver electrode and a back dielectric protection layer located on the back side of the P-type silicon wafer, wherein the back passivation contact layer is stacked on the back side of the P-type silicon wafer, the back dielectric protection layer is stacked on the back passivation contact layer, and the back silver electrode is formed on the back dielectric protection layer and penetrates the back dielectric protection layer to contact the back passivation contact layer.

[0012] Furthermore, the back passivation contact layer includes a tunneling silicon oxide layer and an N-type polysilicon layer, wherein the tunneling silicon oxide layer is stacked on the back of the P-type silicon wafer, and the N-type polysilicon layer is stacked on the tunneling silicon oxide layer and contacts the back silver electrode.

[0013] Furthermore, the back dielectric protection layer is a silicon nitride layer.

[0014] The front electrode of the present invention is a segmented structure of silver and aluminum, wherein aluminum realizes contact with the silicon substrate and silver is responsible for current conduction. On the one hand, using aluminum to realize contact with the silicon substrate is simple and convenient, and does not require complicated local heavy doping steps or high-temperature boron diffusion; on the other hand, silver is responsible for current conduction, and the silver electrode has a narrow width and a small light-shielding area.

[0015] The embodiment of the present invention also discloses a method for preparing a back crystalline silicon battery, which includes the following steps: a) texturing the front side of a P-type silicon wafer, polishing the back side, depositing a front passivation anti-reflection layer on the front side of the P-type silicon wafer and performing laser drilling, and growing and depositing a back passivation contact layer and a back dielectric protection layer on the back side of the P-type silicon wafer; b) printing aluminum paste on the front side of the P-type silicon wafer and drying it, printing a burn-through silver paste on the back side of the P-type silicon wafer and drying it, sintering and curing it to form a front aluminum electrode and a back silver electrode, wherein the sintering peak temperature is 750°C to 850°C, the burn-through silver paste burns through the back dielectric protection layer and contacts the back passivation contact layer; c) printing a non-burn-through silver paste on the front side of the P-type silicon wafer and drying it, sintering and curing it, the sintering peak temperature is 150°C to 550°C, to form a front silver electrode, and the front silver electrode overlaps and contacts the aluminum electrode.

[0016] Further, in step a), depositing a front passivation anti-reflection layer on the front side of the P-type silicon wafer includes sequentially depositing an aluminum oxide layer and a silicon nitride layer on the front side of the P-type silicon wafer.

[0017] Further, in step a), growing and depositing a back passivation contact layer and a back dielectric protection layer on the back side of the P-type silicon wafer includes growing a tunneling silicon oxide layer on the back side of the P-type silicon wafer, and sequentially depositing an N-type polysilicon layer and a silicon nitride layer.

[0018] The preparation method of the back crystalline silicon battery of the present invention first completes the preparation of the front aluminum electrode and the back silver electrode, and then adopts a non-burn-through silver paste that can be cured at a sintering peak temperature below 550°C to prepare the front silver electrode. Since the sintering peak temperature is lower than 550°C, a silver-aluminum alloy will not be formed, thereby reducing the line resistance of the front metal grid line and improving the light absorption efficiency of the silicon wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a side view of a rear crystalline silicon cell of the present invention;

[0020] Figure 2 is a top view of the back crystalline silicon cell of the present invention;

[0021] Figure 3 It is a flow chart of the method for preparing the back crystalline silicon cell of the present invention;

[0022] Figure 4 It is a structural schematic diagram of the preparation process of the back crystalline silicon battery of the present invention.

[0023] Markings in the figure: 1-front silver electrode, 2-aluminum electrode, 3-silicon nitride layer, 4-aluminum oxide layer, 5-aluminum-doped surface field (aluminum-doped silicon), 6-P-type silicon wafer, 7-tunneling silicon oxide layer, 8-N-type polysilicon layer, 9-back dielectric protection layer, 10-back silver electrode. DETAILED DESCRIPTION

[0024] The technical solution of the present invention is further described below in conjunction with specific embodiments, but the present invention is not limited to these embodiments.

[0025] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change of the proportion relationship or adjustment of the size should still fall within the scope of the technical content disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "above", "below", "left", "right", "front", "back", "middle" and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical content.

[0026] As mentioned in the background technology section, the metallization technology based on silver aluminum paste has two problems. One is that the steps to achieve local heavy doping are complicated, and the other is that the high temperature of boron diffusion will reduce the minority carrier lifetime of P-type silicon wafers. In addition, the metallization technology based on laser drilling and aluminum paste has the problems of wide gate lines and large light shielding area.

[0027] The purpose of the present invention is to solve the problem of front metallization of crystalline silicon cells based on P-type silicon wafers. On the one hand, the steps are simple and do not affect the minority carrier lifetime of the P-type silicon wafer. On the other hand, there is no problem of large shading area of ​​the front electrode.

[0028] In a specific embodiment, see Figure 1 and Figure 2 The back crystalline silicon cell of the present invention comprises: a P-type silicon wafer 6, a front passivation anti-reflection layer, and a front metal grid line; wherein the front passivation anti-reflection layer is formed on the front side of the P-type silicon wafer 6, and the front metal grid line is a periodic segmented structure, and a single periodic segmented structure comprises an aluminum electrode 2 and a front silver electrode 1, wherein the aluminum electrode 2 is formed on the front passivation anti-reflection layer and penetrates the front passivation anti-reflection layer to contact the P-type silicon wafer 6, and the front silver electrode 1 is formed on the front passivation anti-reflection layer and overlaps with the aluminum electrode 2.

[0029] In a specific embodiment, the front passivation anti-reflection layer may be a silicon nitride layer, a silicon oxynitride layer or an aluminum oxide layer, or a stack of several of them, such as Figure 1 As shown, for example, it may include a silicon nitride layer 3 and an aluminum oxide layer 4 , wherein the aluminum oxide layer 4 is stacked on the front side of the P-type silicon wafer 6 , and the silicon nitride layer 3 is stacked on the aluminum oxide layer 4 .

[0030] In the above embodiment of the present invention, the front silver electrode 1 adopts non-burn-through silver paste. During the sintering process, the silver paste will not burn through the front passivation anti-reflection layer, thereby not contacting the P-type silicon wafer 6, avoiding serious composite silver-silicon contact.

[0031] Moreover, further, an aluminum-doped surface field 5 is formed at the position where the P-type silicon wafer 6 contacts the aluminum electrode 2. Specifically, during sintering, the aluminum paste penetrates the openings on the silicon nitride layer 3 and the aluminum oxide layer 4 to undergo an aluminum-silicon eutectic reaction with the P-type silicon wafer 6 to form an aluminum-doped surface field 5, thereby allowing the aluminum electrode 2 to form a good ohmic contact with the aluminum-doped surface field 5.

[0032] Furthermore, in order to reduce the shading area and improve the light absorption efficiency, as Figure 2 As shown, the width of the front silver electrode 1 is narrower than the width of the aluminum electrode 2 .

[0033] Furthermore, if Figure 2As shown, the rear crystalline silicon cell includes a plurality of mutually parallel front metal grid lines covering the entire front surface of the cell.

[0034] Furthermore, the aluminum electrodes 2 and the front silver electrodes 1 of two adjacent front metal grid lines are arranged alternately.

[0035] Furthermore, the back crystalline silicon cell also includes a back passivation contact layer, a back silver electrode 10 and a back dielectric protection layer 9 located on the back side of the P-type silicon wafer 6, wherein the back passivation contact layer is stacked on the back side of the P-type silicon wafer 6, the back dielectric protection layer 9 is stacked on the back passivation contact layer, and the back silver electrode 10 is formed on the back dielectric protection layer 9 and penetrates the back dielectric protection layer 9 to contact the back passivation contact layer.

[0036] In a specific example, Figure 1 As shown, the back passivation contact layer may include a tunneling silicon oxide layer 7 and an N-type polysilicon layer 8, wherein the tunneling silicon oxide layer 7 is stacked on the back side of the P-type silicon wafer 6, and the N-type polysilicon layer 8 is stacked on the tunneling silicon oxide layer 7 and in contact with the back silver electrode 10.

[0037] Furthermore, the back dielectric protection layer 9 may be a silicon nitride layer.

[0038] In the back crystalline silicon cell of the present invention, the front electrode is a segmented structure of silver and aluminum, wherein the aluminum realizes contact with the silicon substrate and the silver is responsible for the conduction of current. On the one hand, the use of aluminum to realize contact with the silicon substrate is simple and convenient, without the need for complicated local heavy doping steps and high-temperature boron diffusion; on the other hand, silver is responsible for the conduction of current, the silver electrode is narrow in width, and the light-shielding area is small.

[0039] In a further embodiment of the present invention, a method for preparing a rear crystalline silicon cell is also provided.

[0040] Specifically, see Figure 3 The method for preparing the back crystalline silicon cell of the present invention comprises the following steps:

[0041] a) Texturing is performed on the front side of the P-type silicon wafer, polishing is performed on the back side, a front passivation anti-reflection layer is deposited on the front side of the P-type silicon wafer and laser drilling is performed, and a back passivation contact layer and a back dielectric protection layer are grown and deposited on the back side of the P-type silicon wafer. Specifically, a tunneling silicon oxide layer 7 is grown on the back side of the P-type silicon wafer 6, an N-type polysilicon layer 8 and a back side silicon nitride layer 9 are deposited, an aluminum oxide layer 4 and a front side silicon nitride layer 3 are deposited on the front side of the P-type silicon wafer 6, and laser drilling is performed on the front side, thereby obtaining the following Figure 4 The structure shown.

[0042] b) Print aluminum paste on the front side of the P-type silicon wafer 6 and dry it, print burn-through silver paste on the back side of the P-type silicon wafer 6 and dry it, and sinter and solidify it to form a front aluminum electrode and a back silver electrode, wherein the sintering peak temperature is 750°C to 850°C. During the sintering process, the aluminum paste and the P-type silicon wafer 6 undergo a eutectic reaction to form an aluminum-doped surface field. The burn-through silver paste on the back side of the P-type silicon wafer 6 burns through the back dielectric protection layer (specifically, burns through the back silicon nitride layer 9) and contacts the back passivation contact layer (specifically, the N-type polysilicon layer 8).

[0043] c) Printing non-burn-through silver paste on the front side of the P-type silicon wafer 6 and drying it, sintering and curing it, with the sintering peak temperature being 150° C. to 550° C., to form a front silver electrode, which overlaps and contacts the aluminum electrode.

[0044] Compared with the above-mentioned preparation method of the present invention, if aluminum paste is first printed on the front side and dried, non-burn-through silver paste is printed on the front side and dried, and burn-through silver paste is printed on the back side and dried, and then sintering and curing are performed, since the sintering peak temperature is 750°C to 850°C, aluminum and silver will also undergo an alloy reaction to form a silver-aluminum alloy. On the one hand, the resistivity of the silver-aluminum alloy is large, which will seriously increase the line resistance of the front metal grid line. On the other hand, the silver-aluminum alloy will form a pinning structure, destroying the front passivation anti-reflection layer below, and contacting with silicon, with a high recombination rate.

[0045] In the preparation method of the present invention, after the front aluminum electrode and the back silver electrode are prepared, a non-burn-through silver paste that can be cured at a sintering peak temperature below 550°C is used to prepare the front silver electrode. Since the sintering peak temperature can be lower than 550°C, silver-aluminum alloy will not be formed, thereby reducing the line resistance of the front metal grid line and improving the light absorption efficiency of the silicon wafer.

[0046] The above is only a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several modifications and improvements without departing from the inventive concept of the present invention, which all fall within the protection scope of the present invention.

Claims

1. A back crystalline silicon cell, It is characterized in that include: P-type silicon wafer, front passivation anti-reflection layer, front metal grid line; wherein, The front passivation anti-reflection layer is formed on the front side of the P-type silicon wafer, the front metal grid line is a periodic segmented structure, and a single periodic segmented structure includes an aluminum electrode and a front silver electrode, wherein the aluminum electrode is formed on the front passivation anti-reflection layer and penetrates the front passivation anti-reflection layer to contact the P-type silicon wafer, the front silver electrode is formed on the front passivation anti-reflection layer and overlaps with the aluminum electrode, and an aluminum-doped surface field is formed at a position where the P-type silicon wafer contacts the aluminum electrode; The front passivation anti-reflection layer comprises a silicon nitride layer and an aluminum oxide layer, wherein the aluminum oxide layer is stacked on the front side of the P-type silicon wafer, and the silicon nitride layer is stacked on the aluminum oxide layer; The back crystalline silicon cell also includes a back passivation contact layer, a back silver electrode and a back dielectric protection layer located on the back side of the P-type silicon wafer, wherein the back passivation contact layer is stacked on the back side of the P-type silicon wafer, the back dielectric protection layer is stacked on the back passivation contact layer, and the back silver electrode is formed on the back dielectric protection layer and penetrates the back dielectric protection layer to contact the back passivation contact layer.

2. The back crystalline silicon cell according to claim 1, It is characterized in that The width of the front silver electrode is narrower than that of the aluminum electrode.

3. The back crystalline silicon cell according to claim 2, It is characterized in that The rear crystalline silicon cell comprises a plurality of mutually parallel front metal grid lines covering the entire front surface of the cell.

4. The back crystalline silicon cell according to claim 3, It is characterized in that The aluminum electrodes and the front silver electrodes of two adjacent front metal grid lines are arranged alternately.

5. The back crystalline silicon cell according to claim 4, It is characterized in that The back passivation contact layer includes a tunneling silicon oxide layer and an N-type polysilicon layer, and the back dielectric protection layer is a silicon nitride layer, wherein the tunneling silicon oxide layer is stacked on the back of the P-type silicon wafer, and the N-type polysilicon layer is stacked on the tunneling silicon oxide layer and contacts the back silver electrode.

6. A method for preparing a back crystalline silicon cell, It is characterized in that The steps include: a) texturing the front side of the P-type silicon wafer, polishing the back side, depositing a front passivation anti-reflection layer on the front side of the P-type silicon wafer and performing laser drilling, and growing and depositing a back passivation contact layer and a back dielectric protection layer on the back side of the P-type silicon wafer; b) printing aluminum paste on the front side of the P-type silicon wafer and drying it, printing a burn-through silver paste on the back side of the P-type silicon wafer and drying it, and sintering and curing it to form a front aluminum electrode and a back silver electrode, wherein the sintering peak temperature is 750° C. to 850° C., and the burn-through silver paste burns through the back dielectric protective layer to contact the back passivation contact layer; c) Printing non-burn-through silver paste on the front side of the P-type silicon wafer and drying it, and then sintering and curing it, with the sintering peak temperature being 150° C. to 550° C., to form a front silver electrode, which overlaps and contacts the aluminum electrode.

7. The method for preparing a rear crystalline silicon cell according to claim 6, It is characterized in that In step a), depositing a front passivation anti-reflection layer on the front side of the P-type silicon wafer includes sequentially depositing an aluminum oxide layer and a silicon nitride layer on the front side of the P-type silicon wafer.

8. The method for preparing a rear crystalline silicon cell according to claim 7, It is characterized in that In step a), growing and depositing a back passivation contact layer and a back dielectric protection layer on the back side of the P-type silicon wafer includes growing a tunneling silicon oxide layer on the back side of the P-type silicon wafer, and sequentially depositing an N-type polysilicon layer and a silicon nitride layer.