An AC SSPC input and output voltage acquisition circuit

Abstract

The present invention relates to an AC SSPC input and output voltage acquisition circuit, and belongs to the field of power electronics technology. The circuit can simultaneously realize input voltage acquisition and output voltage acquisition functions. The input and output voltage acquisition circuit includes resistors R1, R2, R3, R4, R5, and R6. The function of the circuit is realized by only using resistor devices, and no integrated chip is used, so that the input and output voltage acquisition circuit has high reliability. An AC SSPC input and output voltage acquisition circuit of the present invention can simultaneously realize the two functions of input voltage acquisition and output voltage acquisition with a simple hardware structure, and achieve low economy and high reliability.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics and is specifically an AC SSPC input and output voltage acquisition circuit. Background Art

[0002] Solid-state power controller (SSPC) is an intelligent switching device and an important component of aircraft power distribution system. It is responsible for power supply and management of electrical loads and has many advantages such as fast response speed, high power density and convenient control. Solid-state power controllers include DC SSPC and AC SSPC. AC SSPC is responsible for powering AC loads. To facilitate monitoring of AC SSPC status, the host computer needs to report its input voltage and output voltage values. Therefore, input voltage acquisition function and output voltage acquisition function become indispensable functions of AC SSPC.

[0003] The traditional input voltage acquisition function and output voltage acquisition function need to be implemented by two different hardware circuits, and the hardware circuits are complex. The principle is usually to reduce the input voltage or output voltage to a small signal through a voltage divider resistor, and then input the small signal into the effective value conversion chip to output the corresponding effective value. Finally, the operational amplifier is used to amplify the signal proportionally and input the amplified signal into the processor. Integrated chips such as effective value conversion chips and operational amplifiers are often used in traditional hardware circuit design, resulting in complex circuits and poor reliability and economy.

[0004] CN114115181A Voltage acquisition circuit for solid-state power controller

[0005] The present invention relates to a voltage acquisition circuit of a solid-state power controller, including an output voltage acquisition circuit and a reference source circuit, wherein the output voltage acquisition circuit includes an operational amplifier M1B; resistors R28, R29, R34, R35, R83, R84, R26, R37, R16, R145, filter capacitors C23, C25, a reference source circuit including a reference source chip U5; capacitors C106-C110, and a resistor R95. The voltage acquisition circuit of a solid-state power controller of the present invention realizes BIT self-detection of the output voltage by acquiring and reporting the output voltage of a high-voltage SSPC, and adopts a simple hardware structure with a low error rate.

[0006] However, the hardware circuit design and design ideas of this patent are not exactly the same as those of this patent, and there are large and obvious differences in the patent content and technical focus. Summary of the invention

[0007] The purpose of the present invention is to provide an AC SSPC input and output voltage acquisition circuit, which can simultaneously realize the two functions of input voltage acquisition and output voltage acquisition. The hardware circuit structure is simple, and only resistor devices are used, which replaces the complex circuit design built with integrated devices in the past, and improves the reliability and economy of the circuit.

[0008] Technical Solution

[0009] An AC SSPC input and output voltage acquisition circuit, characterized in that the circuit includes resistors R1, R2, R3, R4, R5, and R6, the first end of the resistor R1 is connected to the power input INPUT of the power circuit, the second end of the resistor R1 is connected to the first end of the resistor R4 and the VIN pin of the processor, the first end of the resistor R2 is connected to the power output POUT of the power circuit, the second end of the resistor R2 is connected to the first end of the resistor R5 and the VOUT pin of the processor, the first end of the resistor R3 is connected to the power ground PGND of the power circuit, the second end of the resistor R3 is connected to the first end of the resistor R6 and the VREF pin of the processor, the second end of the resistor R4 is connected to the lift voltage Vt, the second end of the resistor R5 is connected to the lift voltage Vt, and the second end of the resistor R6 is connected to the lift voltage Vt

[0010] Furthermore, R1, R2, R3, R4, R5, and R6 are voltage-dividing resistors.

[0011] Furthermore, the three resistors R1, R2, and R3 have the same resistance value, and the three resistors R4, R5, and R6 have the same resistance value.

[0012] Furthermore, the input voltage acquisition signal is the voltage difference between INPUT and PGND.

[0013] Furthermore, the output voltage acquisition signal is the voltage difference between POUT and PGND.

[0014] Furthermore, the calculation formula of the input voltage is:

[0015] INPUT-PGND=(VIN-VREF)*(R4+R1 / R4)

[0016] Furthermore, the calculation formula of the output voltage is:

[0017] POUT-PGND=(VOUT-VREF)*(R4+R1 / R4)

[0018] Furthermore, setting the resistance value the same can keep the input and output voltage acquisition formulas consistent in various scenarios.

[0019] Furthermore, the multiple scenarios include four scenarios: the power device is turned on and the AC SSPC is loaded, the power device is turned off and the AC SSPC is loaded, the power device is turned on and the AC SSPC is not loaded, and the power device is turned off and the AC SSPC is not loaded.

[0020] Furthermore, the relationship between the resistance values ​​of R1 and R4 is determined according to the relationship between the input voltage and the processor power supply voltage.

[0021] Furthermore, the processor power supply voltage is Vc, the boost voltage is Vt, and the relationship between the two is Vc=2Vt. The boost voltage value is set to half of the processor power supply voltage.

[0022] Furthermore, the reference ground of the power supply voltage of the processor is the same as the reference ground of the boost voltage.

[0023] Furthermore, the three signals INPUT, POUT, and PGND related to the external input voltage collection and the output voltage collection are processed by the voltage divider resistors, and the three voltage collection values ​​VIN, VOUT, and VREF that can be recognized by the processor are output.

[0024] Technical Effects

[0025] An AC SSPC input and output voltage acquisition circuit of the present invention only requires six resistor devices to simultaneously realize the two functions of input voltage acquisition and output voltage acquisition required by AC SSPC. The present invention proposes a new design concept and idea. Instead of using an effective value conversion chip to convert the AC voltage value into an effective value before inputting it into the processor, the input and output voltage ratio is reduced and a certain voltage is raised before directly inputting it into the processor. The hardware circuit structure of the present invention is simple, replacing the complex circuit design outside. It no longer uses integrated chips such as effective value conversion chips and operational amplifiers, thereby improving the reliability of the circuit. The simple hardware circuit design can also increase the power density of the SSPC, reduce the weight of the SSPC board, and reduce the cost of the SSPC. The input and output voltage acquisition circuit of the present invention is not limited to the use of AC SSPC, but is also applicable to other fields that require AC voltage acquisition, such as the field of home appliances, the field of mains electricity, the industrial field, etc. Voltage acquisition of different voltage values ​​can be achieved by changing the resistance value of the resistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is the AC SSPC input and output voltage acquisition circuit. DETAILED DESCRIPTION

[0027] The present invention is further described below in conjunction with embodiments. The following are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] like Figure 1 The input and output voltage acquisition and zero-crossing identification circuit shown includes resistors R1, R2, R3, R4, R5, and R6. The first end of resistor R1 is connected to the power input INPUT of the power circuit, the second end of resistor R1 is connected to the first end of resistor R4 and the VIN pin of the processor, the first end of resistor R2 is connected to the power output OUTPUT of the power circuit, the second end of resistor R2 is connected to the first end of resistor R5 and the VOUT pin of the processor, the first end of resistor R3 is connected to the power ground PGND of the power circuit, the second end of resistor R3 is connected to the first end of resistor R6 and the VREF pin of the processor, and the second ends of resistors R4, R5, and R6 are connected to 1.6V;

[0030] The resistance values ​​of R1, R2, and R3 are the same, and the resistance values ​​of R4, R5, and R6 are the same;

[0031] The processor's supply voltage is 3.3V and the processor's reference ground is the same as the 1.6V reference ground;

[0032] like Figure 1 The AC SSPC input and output voltage acquisition circuit shown in the figure realizes the input voltage acquisition and output voltage acquisition functions.

[0033] 1) Input voltage acquisition process:

[0034] When the external input voltage is an AC sine wave with an effective value of 115V, the voltage between the INPUT and PGND points of this input-output voltage acquisition circuit is an AC sine wave with an effective value of 115V. After being processed by the voltage divider resistor, VIN and VREF are output. The processor performs difference processing on VIN and VREF and reports the input voltage value.

[0035] The input voltage acquisition calculation formula is:

[0036] INPUT-PGND=(VIN-VREF)*((R4+R1) / R4)

[0037] 2) Output voltage acquisition process:

[0038] When the external output voltage is an AC sine wave with an effective value of 115V, the voltage between POUT and PGND of this input-output voltage acquisition circuit is an AC sine wave with an effective value of 115V. After being processed by the voltage divider resistor, VOUT and VREF are output. The processor performs difference processing on VOUT and VREF and reports the output voltage value.

[0039] Example 1

[0040] The AC SSPC input and output voltage acquisition circuit is characterized in that the circuit includes resistors R1, R2, R3, R4, R5, and R6, the first end of the resistor R1 is connected to the power input INPUT of the power circuit, the second end of the resistor R1 is connected to the first end of the resistor R4 and the processor VIN pin, the first end of the resistor R2 is connected to the power output POUT of the power circuit, the second end of the resistor R2 is connected to the first end of the resistor R5 and the processor VOUT pin, the first end of the resistor R3 is connected to the power ground PGND of the power circuit, the second end of the resistor R3 is connected to the first end of the resistor R6 and the processor VREF pin, the second end of the resistor R4 is connected to the lift voltage Vt, the second end of the resistor R5 is connected to the lift voltage Vt, and the second end of the resistor R6 is connected to the lift voltage Vt

[0041] It is characterized in that R1, R2, R3, R4, R5 and R6 are voltage divider resistors, wherein R1, R2 and R3 have the same resistance value, and R4, R5 and R6 have the same resistance value. The purpose of setting the resistance value is to simplify the circuit and calculation, and to ensure that the input and output voltage acquisition formulas in various scenarios do not change.

[0042] It is characterized by multiple scenarios including four scenarios: the power device is turned on and the AC SSPC is loaded, the power device is turned off and the AC SSPC is loaded, the power device is turned on and the AC SSPC is not loaded, and the power device is turned off and the AC SSPC is not loaded.

[0043] The characteristic is that the relationship between the resistance values ​​of R1 and R4 is determined according to the relationship between the input voltage and the processor power supply voltage, so that the voltage value after the resistor voltage division can reach the processor recognition range.

[0044] The feature is that the processor power supply voltage is Vc, the boost voltage is Vt, and the relationship between the two is Vc = 2Vt. The boost voltage value is set to half of the processor power supply voltage in order to ensure that the entire collected sine wave can be recognized by the processor.

[0045] The invention is characterized in that the reference ground of the power supply voltage of the processor is the same as the reference ground of the boost voltage.

[0046] The characteristic is that the input voltage acquisition signal is the voltage difference between INPUT and PGND, and the AC SSPC input voltage acquisition signal is an AC sine wave with an effective value of 115V.

[0047] The characteristic is that the output voltage acquisition signal is the voltage difference between POUT and PGND, and after the power device is turned on, the AC SSPC output voltage acquisition signal is an AC sine wave with an effective value of 115V.

[0048] The invention is characterized in that after the three signals INPUT, POUT and PGND related to external input voltage collection and output voltage collection are processed by voltage-dividing resistors, the three voltage collection values ​​VIN, VOUT and VREF which can be recognized by the processor are output.

[0049] The characteristic is that the calculation formula of input voltage is:

[0050] INPUT-PGND=(VIN-VREF)*(R4+R1 / R4)

[0051] It is characterized in that the calculation formula of the output voltage is:

[0052] POUT-PGND=(VOUT-VREF)*(R4+R1 / R4)

[0053] Example 1

[0054] The AC SSPC input and output voltage acquisition circuit is characterized in that the circuit includes resistors R1, R2, R3, R4, R5, and R6, the first end of the resistor R1 is connected to the power input INPUT of the power circuit, the second end of the resistor R1 is connected to the first end of the resistor R4 and the processor VIN pin, the first end of the resistor R2 is connected to the power output POUT of the power circuit, the second end of the resistor R2 is connected to the first end of the resistor R5 and the processor VOUT pin, the first end of the resistor R3 is connected to the power ground PGND of the power circuit, the second end of the resistor R3 is connected to the first end of the resistor R6 and the processor VREF pin, the second end of the resistor R4 is connected to the lift voltage Vt, the second end of the resistor R5 is connected to the lift voltage Vt, and the second end of the resistor R6 is connected to the lift voltage Vt

[0055] The R1, R2, R3, R4, R5, and R6 are voltage divider resistors, where the resistance values ​​of the three resistors R1, R2, and R3 are the same, and the resistance values ​​of the three resistors R4, R5, and R6 are the same. The input voltage acquisition signal is the voltage difference between INPUT and PGND. The output voltage acquisition signal is the voltage difference between POUT and PGND. The calculation formula for the input voltage is:

[0056] INPUT-PGND=(VIN-VREF)*(R4+R1 / R4)

[0057] The output voltage is calculated as:

[0058] POUT-PGND=(VOUT-VREF)*(R4+R1 / R4)

[0059] Setting the same resistance value can make the input and output voltage acquisition formulas consistent in various scenarios. The various scenarios include four scenarios: the power device is turned on and the AC SSPC is loaded, the power device is disconnected and the AC SSPC is loaded, the power device is turned on and the AC SSPC is not loaded, and the power device is disconnected and the AC SSPC is not loaded. The relationship between the resistance values ​​of R1 and R4 is determined according to the relationship between the input voltage and the processor power supply voltage. The processor power supply voltage is Vc, the boost voltage is Vt, and the relationship between the two is Vc=2Vt. The boost voltage value is set to half of the processor power supply voltage. The power supply voltage reference ground of the processor is the same as the reference ground of the boost voltage. After the three signals INPUT, POUT, and PGND related to the external input voltage acquisition and output voltage acquisition are processed by the voltage divider resistor, the three voltage acquisition values ​​VIN, VOUT, and VREF that can be recognized by the processor are output.

[0060] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as the general understanding of those skilled in the art in the field to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have a meaning consistent with the meaning in the context of the prior art, and will not be interpreted with an idealized or overly formal meaning unless defined as here. The specific implementation methods described above further explain the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An AC SSPC input and output voltage acquisition circuit, characterized in that: The circuit includes resistors R1, R2, R3, R4, R5, and R6. The first end of the resistor R1 is connected to the power input INPUT of the power circuit, the second end of the resistor R1 is connected to the first end of the resistor R4 and the processor VIN pin, the first end of the resistor R2 is connected to the power output POUT of the power circuit, the second end of the resistor R2 is connected to the first end of the resistor R5 and the processor VOUT pin, the first end of the resistor R3 is connected to the power ground PGND of the power circuit, the second end of the resistor R3 is connected to the first end of the resistor R6 and the processor VREF pin, the second end of the resistor R4 is connected to the lift voltage Vt, the second end of the resistor R5 is connected to the lift voltage Vt, and the second end of the resistor R6 is connected to the lift voltage Vt; wherein the three resistors R1, R2, and R3 have the same resistance value, and the three resistors R4, R5, and R6 have the same resistance value; the input voltage acquisition signal is V INPUT With V PGND The voltage difference between the output voltage acquisition signal is V POUT With V PGND The voltage difference between the input voltage and the input voltage is calculated as: V INPUT -V PGND =(V VIN -V VREF )*((R4+R1) / R4); The output voltage is calculated as: V POUT -V PGND =(V VOUT -V VREF )*((R4+R1) / R4).

2. The AC SSPC input and output voltage acquisition circuit according to claim 1, characterized in that: The R1, R2, R3, R4, R5 and R6 are voltage-dividing resistors.

3. The AC SSPC input and output voltage acquisition circuit according to claim 2, characterized in that: Setting the same resistance value can keep the input and output voltage acquisition formulas consistent in various scenarios.

4. The AC SSPC input and output voltage acquisition circuit according to claim 3, characterized in that: The various scenarios include four scenarios: the power device is turned on and the AC SSPC is loaded, the power device is turned off and the AC SSPC is loaded, the power device is turned on and the AC SSPC is not loaded, and the power device is turned off and the AC SSPC is not loaded. The relationship between the resistance values ​​of R1 and R4 is determined according to the relationship between the input voltage and the processor power supply voltage.

5. The AC SSPC input and output voltage acquisition circuit according to claim 4, characterized in that: The processor power supply voltage is Vc, the boost voltage is Vt, and the relationship between the two is Vc = 2Vt; the boost voltage value is set to half of the processor power supply voltage; the processor power supply voltage reference ground is the same as the boost voltage reference ground; the external input voltage acquisition and output voltage acquisition related V INPUT 、V POUT 、V PGND After the three signals are processed by the voltage divider resistor, the output is V VIN 、V VOUT 、V VREF Three voltage acquisition values ​​that the processor can recognize.

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