Radiation-resistant charge pump phase-locked loop lock detection circuit based on analog-to-digital conversion circuit

Abstract

The present invention discloses a radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit, comprising: a voltage-to-voltage conversion circuit, an analog-to-digital conversion circuit, and an adjustable-precision judgment circuit. The present invention utilizes two voltage-to-voltage conversion circuits to lead out a sensitive signal of a control voltage under the condition that the phase-locked loop loop works normally, and then utilizes an analog-to-digital conversion circuit to quantify the control voltage, and compares the quantization results in two adjacent time windows through a trigger and a logic gate circuit in the judgment circuit to determine whether the circuit is locked. The lock detection accuracy is adjustable, which improves the control voltage fluctuation judgment tolerance and avoids the locked state being misjudged as a non-locked state due to the influence of radiation.

Description

Technical Field

[0001] The invention belongs to the field of integrated circuits, and more specifically, relates to a design of a radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit. Background Art

[0002] Phase-locked loop frequency synthesizer is an important unit module in high-speed serial communication and RF wireless transceiver. The traditional analog phase-locked loop frequency synthesizer circuit mainly includes basic modules such as frequency detector, charge pump, low-pass filter, voltage-controlled oscillator, and frequency divider. With the rapid development of semiconductor technology in the past two decades, the phase-locked loop with advantages such as high integration, low power consumption, and high performance has become the mainstream choice for local oscillator signals in fully integrated CMOS wireless transceivers.

[0003] As the integration of semiconductor devices continues to increase, large-scale integrated circuits are increasingly used in spacecraft. The total ionization dose effect produced by charged particles and electrons in the space radiation environment in integrated circuits seriously affects the reliability and on-orbit life of spacecraft.

[0004] The oscillation signal in the resonant cavity of the voltage-controlled oscillator (VCO) has a large swing and a high oscillation frequency. Due to the presence of parasitic capacitance, the oscillation signal crosstalks to the control voltage; and the single particle effect and total dose effect caused by radiation aggravate the control voltage fluctuation, resulting in non-locking misjudgment. In order to avoid lock detection misjudgment, the present invention proposes a lock detection circuit with adjustable accuracy. Summary of the invention

[0005] The purpose of the present invention is to provide a radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit, which can improve the discrimination tolerance under the condition of ensuring the loop performance and avoid misjudgment of control voltage fluctuations caused by radiation effects and high-frequency crosstalk.

[0006] The objective of the present invention is achieved through the following technical solutions:

[0007] A radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit, comprising: a voltage-to-voltage conversion circuit A, a voltage-to-voltage conversion circuit B, an analog-to-digital conversion circuit and a judgment circuit;

[0008] The control voltage at the loop filter in the charge pump phase-locked loop is used as the input of the lock detection circuit, which is respectively connected to the input of the voltage-to-voltage conversion circuit A and the voltage-to-voltage conversion circuit B, wherein the output end of the voltage-to-voltage conversion circuit B is connected to the input of the voltage-controlled oscillator; the output end of the voltage-to-voltage conversion circuit A is connected to the input of the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit quantizes the control voltage, and compares the quantization results in two adjacent time windows through the trigger and logic gate circuit in the judgment circuit to judge the circuit locking state.

[0009] Furthermore, the voltage-to-voltage conversion circuits A and B are both unit gain amplifiers.

[0010] Furthermore, the voltage-to-voltage conversion circuits A and B have the same circuit structure, and both include: transistors PM1, PM2, NM1, and NM2;

[0011] Transistors PM1 and PM2 are PMOS transistors, and NM1 and NM2 are NMOS transistors; wherein transistors PM1 and PM2 form a current mirror structure as an output load, and transistors NM1 and NM2 form a differential input pair, and the differential inputs are respectively connected to their gate terminals; the drain terminal of transistor NM2 is connected to the gate terminal to realize the unit gain connection of the amplifier.

[0012] Furthermore, the analog-to-digital conversion circuit generates 12-bit quantized values ​​D0, D1, D2 ... D11.

[0013] Furthermore, the judgment circuit includes: 12 groups of D flip-flops and XNOR gates, and each group of D flip-flops and XNOR gates outputs one logic value.

[0014] Furthermore, the connection relationship of the judgment circuit is as follows: the input terminal D and the output terminal Q of the D flip-flop are used as inputs of the XOR gate. According to the logic table of the XOR gate, when the logic values ​​of D and Q are the same, the output logic value is 1; when the logic values ​​of D and Q are the same, the output logic value is 0; the 12-bit quantization values ​​D0, D1, D2...D11 of the analog-to-digital conversion circuit are respectively connected to the D terminal of the D flip-flop and triggered by the same clock.

[0015] Furthermore, the accuracy of the judgment circuit is adjustable.

[0016] Furthermore, in the 12-bit quantization value of the analog-to-digital conversion circuit, D0 is the highest weight bit and D11 is the lowest weight bit, and the corresponding XOR gate logic output values ​​are A0 to A11, where A0 is the highest weight bit and A11 is the lowest weight bit; according to different environmental conditions, the accuracy is defined by defining the number of bits that remain unchanged from A0 to A11.

[0017] Further, the circuit locking state is determined as follows:

[0018] When the accuracy is set to 8 bits, if the logic values ​​of A0 to A7 remain unchanged after two adjacent clock edges are triggered, it is considered locked. At this time, the accuracy error is 1 / 2 of the power supply voltage. 8 ; When the accuracy is set to 5 bits, if the logic values ​​of A0 to A4 remain unchanged after two adjacent clock edges are triggered, it is considered locked. At this time, the accuracy error is 1 / 2 of the power supply voltage 5 .

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] It can be seen from the technical solution provided by the present invention that, by including an analog-to-digital conversion circuit, a voltage-to-voltage conversion circuit and an adjustable precision judgment circuit in the loop, the accuracy of the lock detection can be guaranteed while ensuring the loop performance, thereby avoiding control voltage fluctuations caused by oscillation signal crosstalk and radiation effects, which may result in misjudgment of the analog lock detection circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a principle block diagram of a radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit of the present invention;

[0022] Figure 2 yes Figure 1 A schematic diagram of a specific implementation of a voltage-to-voltage conversion circuit;

[0023] Figure 3 yes Figure 1 Schematic diagram of voltage change control during the phase-locked loop locking process;

[0024] Figure 4 It is a schematic diagram of adjusting the control voltage discrimination tolerance by using the accuracy of the analog-to-digital conversion circuit; DETAILED DESCRIPTION

[0025] The specific implementation of the present invention is described below in conjunction with the accompanying drawings so that those skilled in the art can better understand the present invention. It should be noted that in the following description, when the detailed description of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0026] The invention discloses a radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit. Two voltage-to-voltage conversion circuits are used to lead out a sensitive signal of a control voltage under the condition that the phase-locked loop loop works normally, and then the control voltage is quantified by the analog-to-digital conversion circuit. The quantization results are compared in two adjacent time windows by a trigger and a logic gate circuit in the judgment circuit to judge whether the circuit is locked. The lock detection accuracy is adjustable, which improves the control voltage fluctuation discrimination tolerance and avoids the lock state being misjudged as a non-lock state due to the influence of radiation.

[0027] Specifically, Figure 1 As shown, the present invention proposes a radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit, comprising: a voltage-to-voltage conversion circuit A, a voltage-to-voltage conversion circuit B, an analog-to-digital conversion circuit and a judgment circuit;

[0028] The control voltage at the loop filter in the charge pump phase-locked loop is used as the input of the lock detection circuit, which is connected to the input of the voltage-to-voltage conversion circuit A and the voltage-to-voltage conversion circuit B respectively, wherein the output end of the voltage-to-voltage conversion circuit B is connected to the input of the voltage-controlled oscillator; the output end of the voltage-to-voltage conversion circuit A is connected to the input of the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit quantizes the control voltage, and compares the quantization results in two adjacent time windows through the trigger and logic gate circuit in the judgment circuit. The number and position of the high level in the judgment circuit determine the accuracy and detection state of the lock detection. Since the lock detection accuracy is adjustable, the control voltage fluctuation discrimination tolerance is improved to avoid the lock state being misjudged as the unlocked state.

[0029] The voltage-to-voltage conversion circuits A and B are both unity-gain amplifiers.

[0030] The analog-to-digital conversion circuit generates 12-bit quantized values ​​D0, D1, D2...D11.

[0031] like Figure 2 As shown, the voltage-to-voltage conversion circuits A and B have the same circuit structure, both comprising: transistors PM1, PM2, NM1 and NM2;

[0032] Transistors PM1 and PM2 are PMOS transistors, and NM1 and NM2 are NMOS transistors; wherein transistors PM1 and PM2 form a current mirror structure as an output load, and transistors NM1 and NM2 form a differential input pair, and the differential inputs are respectively connected to their gate terminals; the drain terminal of transistor NM2 is connected to the gate terminal to realize the unit gain connection of the amplifier.

[0033] like Figure 1 As shown, the judgment circuit includes: 12 groups of D flip-flops and XNOR gates, and each group of D flip-flops and XNOR gates outputs a logic value.

[0034] The connection relationship of the judgment circuit is as follows: the input terminal D and the output terminal Q of the D flip-flop are used as the input of the XOR gate. According to the logic table of the XOR gate, when the logic values ​​of D and Q are the same, the output logic value is 1; when the logic values ​​of D and Q are the same, the output logic value is 0; the 12-bit quantization values ​​D0, D1, D2...D11 of the analog-to-digital conversion circuit are respectively connected to the D terminal of the D flip-flop and triggered by the same clock.

[0035] In the present invention, the accuracy of the judgment circuit is adjustable.

[0036] In the 12-bit quantization value of the analog-to-digital conversion circuit, D0 is the highest weight bit and D11 is the lowest weight bit. The corresponding XOR gate logic output values ​​are A0 to A11, where A0 is the highest weight bit and A11 is the lowest weight bit. According to different environmental conditions, the accuracy is defined by defining the number of bits that remain unchanged from A0 to A11.

[0037] In the present invention, the circuit locking state is determined as follows:

[0038] When the accuracy is set to 8 bits, if the logic values ​​of A0 to A7 remain unchanged after two adjacent clock edges are triggered, it is considered locked. At this time, the accuracy error is 1 / 2 of the power supply voltage. 8 ; When the accuracy is set to 5 bits, if the logic values ​​of A0 to A4 remain unchanged after two adjacent clock edges are triggered, it is considered locked. At this time, the accuracy error is 1 / 2 of the power supply voltage 5 .

[0039] Working process: The radiation-resistant charge pump phase-locked loop lock detection circuit based on the analog-to-digital conversion circuit works in real time with the loop, and the voltage-to-voltage conversion circuits A and B protect and extract the sensitive signal of the control voltage of the voltage-controlled oscillator. The voltage-to-voltage conversion circuit B ensures that the control voltage signal is transmitted to the voltage-controlled oscillator and reduces the leakage current; the output end of the voltage-to-voltage conversion circuit A is connected to the input of the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit quantizes the control voltage. Through the trigger and logic gate circuit in the judgment circuit, the quantization results are compared in two adjacent time windows. The number and position of the high level in the judgment circuit determine the accuracy and detection state of the lock detection. Since the lock detection accuracy is adjustable, the control voltage fluctuation judgment tolerance is improved to avoid the lock state being misjudged as the unlocked state.

[0040] Example

[0041] Figure 1 An embodiment of the present invention provides a radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit, such as Figure 1 As shown, it mainly includes: a voltage-to-voltage conversion circuit A, a voltage-to-voltage conversion circuit B, an analog-to-digital conversion circuit and a judgment circuit, and the connection relationship is as follows: the control voltage at the loop filter in the charge pump phase-locked loop is used as the input of the lock detection circuit, which is respectively connected to the input of the voltage-to-voltage conversion circuit A and the voltage-to-voltage conversion circuit B, wherein the output end of the voltage-to-voltage conversion circuit B is connected to the input of the voltage-controlled oscillator; the output end of the voltage-to-voltage conversion circuit A is connected to the input of the analog-to-digital conversion circuit, and the 12-bit analog-to-digital conversion circuit quantizes the control voltage, and the quantization results are compared in two adjacent time windows through the trigger and logic gate circuit in the judgment circuit, and the number and position of the high level in the judgment circuit determine the accuracy and detection state of the lock detection.

[0042] like Figure 2 As shown, the voltage-to-voltage conversion circuit is a simple unity-gain amplifier. If all tubes are matched, the output voltage is equal to the input voltage, and a MOS tube circuit implementation is given.

[0043] The voltage-to-voltage conversion circuit can reduce the influence of the lock detection circuit on the phase-locked loop, and at the same time transmit the sensitive signal control voltage to facilitate the subsequent circuit to perform state judgment.

[0044] like Figure 3 As shown in FIG. 1 , a 2.5V power supply voltage is used to provide the locking process of the charge pump phase-locked loop. When the loop approaches locking, the control voltage will be stable in the region, and the loop is judged to be locked when the control voltage is the same at two adjacent moments.

[0045] like Figure 4 As shown, due to the large signal crosstalk of the voltage-controlled oscillator and the radiation effect, the control voltage fluctuates, which may cause a false judgment of non-locking for the analog lock detection circuit. The precision of the analog-to-digital conversion circuit used in the present invention is adjustable, and the discrimination tolerance can be adjusted according to the needs. In this embodiment, the discrimination tolerance is between 0.744 and 0.763V, and the corresponding codeword is between 01001100011 and 01001110010. Combined with the comparison results of the XOR gate in adjacent time windows, the circuit lock state is judged.

[0046] By using the analog-to-digital conversion circuit, the voltage-to-voltage conversion circuit and the precision-adjustable judgment circuit in the loop, the accuracy of the lock detection can be guaranteed while ensuring the loop performance, avoiding the control voltage fluctuation caused by the oscillation signal crosstalk and the radiation effect, which may lead to the misjudgment of the analog lock detection circuit.

[0047] Although the above describes the illustrative specific embodiments of the present invention to facilitate those skilled in the art to understand the present invention, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations using the concept of the present invention are protected.

Claims

1. A radiation-resistant charge pump phase-locked loop lock detection circuit based on an analog-to-digital conversion circuit, characterized in that: include: Voltage-to-voltage conversion circuit A, voltage-to-voltage conversion circuit B, analog-to-digital conversion circuit and judgment circuit; The control voltage at the loop filter in the charge pump phase-locked loop is used as the input of the lock detection circuit, which is connected to the input of the voltage-to-voltage conversion circuit A and the voltage-to-voltage conversion circuit B respectively, wherein the output end of the voltage-to-voltage conversion circuit B is connected to the input of the voltage-controlled oscillator; the output end of the voltage-to-voltage conversion circuit A is connected to the input of the analog-to-digital conversion circuit, and the analog-to-digital conversion circuit quantizes the control voltage, and compares the quantization results in two adjacent time windows through the trigger and logic gate circuit in the judgment circuit to judge the circuit locking state; The analog-to-digital conversion circuit generates 12-bit quantized values ​​D0, D1, D2...D11; The judgment circuit includes: 12 groups of D flip-flops and XNOR gates, each group of D flip-flops and XNOR gates outputs a logic value; The connection relationship of the judgment circuit is as follows: the input terminal D and the output terminal Q of the D flip-flop are used as the input of the XOR gate. According to the logic table of the XOR gate, when the logic values ​​of D and Q are the same, the output logic value is 1; when the logic values ​​of D and Q are the same, the output logic value is 0; the 12-bit quantization values ​​D0, D1, D2...D11 of the analog-to-digital conversion circuit are respectively connected to the D terminal of the D flip-flop and triggered by the same clock.

2. The radiation-resistant charge pump phase-locked loop lock detection circuit based on analog-to-digital conversion circuit according to claim 1, characterized in that: The voltage-to-voltage conversion circuits A and B are both unity-gain amplifiers.

3. The radiation-resistant charge pump phase-locked loop lock detection circuit based on analog-to-digital conversion circuit according to claim 1 or 2, characterized in that: The voltage-to-voltage conversion circuits A and B have the same circuit structure, and both include: transistors PM1, PM2, NM1, and NM2; Transistors PM1 and PM2 are PMOS transistors, and NM1 and NM2 are NMOS transistors; wherein transistors PM1 and PM2 form a current mirror structure as an output load, and transistors NM1 and NM2 form a differential input pair, and the differential inputs are respectively connected to their gate terminals; the drain terminal of transistor NM2 is connected to the gate terminal to realize the unit gain connection of the amplifier.

4. The radiation-resistant charge pump phase-locked loop lock detection circuit based on analog-to-digital conversion circuit according to claim 1, characterized in that: The accuracy of the judgment circuit is adjustable.

5. The radiation-resistant charge pump phase-locked loop lock detection circuit based on analog-to-digital conversion circuit according to claim 4, characterized in that: In the 12-bit quantization value of the analog-to-digital conversion circuit, D0 is the highest weight bit and D11 is the lowest weight bit. The corresponding XOR gate logic output values ​​are A0 to A11, where A0 is the highest weight bit and A11 is the lowest weight bit. According to different environmental conditions, the accuracy is defined by defining the number of bits that remain unchanged from A0 to A11.

6. The radiation-resistant charge pump phase-locked loop lock detection circuit based on analog-to-digital conversion circuit according to claim 1, characterized in that: Determine the circuit lock status, specifically: When the accuracy is set to 8 bits, if the logic values ​​of A0 to A7 remain unchanged after two adjacent clock edges are triggered, it is considered locked. At this time, the accuracy error is 1 / 2 of the power supply voltage. 8 ; When the accuracy is set to 5 bits, if the logic values ​​of A0 to A4 remain unchanged after two adjacent clock edges are triggered, it is considered locked. At this time, the accuracy error is 1 / 2 of the power supply voltage 5 .

Images